| 09th week of 2010 patent applcation highlights part 19 |
| Patent application number | Title | Published |
|---|
| 20100053878 | ADJUSTABLE LAPTOP MONITOR ASSEMBLY - An adjustable laptop computer monitor assembly, comprising: a flat panel display assembly comprising a display screen and support electronics for the display screen; a computer base that houses an associated microprocessor and a portion of the support electronics for the display screen; an attachment means; a support mechanism in communication with the attachment means on the back portion of the display screen and in pivotal communication with the computer base by a pivot means, wherein at least one support mechanism allows the display screen to move pivotally and vertically relative to the computer base. | 2010-03-04 |
| 20100053879 | STORAGE DEVICE - In a storage device accommodating a plurality of memory devices in a general-purpose chassis provided from both surface sides thereof, a cooling device is provided on the front of the memory devices. This cooling device is allowed to freely move to leave available the area in front of the memory devices, thereby enabling maintenance and replacement of the memory devices from the both surface sides of the chassis. With such a storage device of a type using a general-purpose chassis, and inserting therein a plurality of memory devices from the both surface sides thereof, even if a cooling device is located on the front of the chassis, the memory devices can be subjected to maintenance and replacement. | 2010-03-04 |
| 20100053880 | DEPTH SPREADING PLACEMENT OF DATA STORAGE CARTRIDGES IN MULTI-CARTRIDGE DEEP SLOT CELLS OF AN AUTOMATED DATA STORAGE LIBRARY - In an automated data storage library having a plurality of multi-cartridge deep slot cells, each configured to store a plurality of data storage cartridges arranged in sequential order of tiers from front to rear, and having accessor(s) configured to selectively extract, place and transport cartridges with respect to the cells; operating the accessor(s) to selectively extract, place and transport cartridges with respect to the cells and with respect to other elements of the library. If all tiers of the selected cells except the rearmost tier are full, added cartridges are placed to fill the rearmost tier of an evenly spread selection of the cells. | 2010-03-04 |
| 20100053881 | DISK DEVICE - In a disk device, a case includes a base frame and a top panel, which are made of thin metal plates. In the top panel, a corrugated section is formed to increase its rigidity. The corrugated section has peaks and valleys that are alternately arranged. The peaks and valleys extend in a direction orthogonal to a disk loading direction to the vicinity of both side ends of the top panel. | 2010-03-04 |
| 20100053882 | Panel Detaching Mechanism - In a car audio system, a hook part and a projection latches an operation panel with a front bracket and releases the latching of the operation panel when a user operates a lever. A tilt mechanism pulls out the front bracket so that the lower outer edge of the operation panel is pulled out from the state where the operation panel is latched at a standard position with the operation panel latched. The lever is arranged near the panel back face so that the lever cannot be operated by a user when the panel is latched by the front bracket at the standard position, but can be operated by a user when the front bracket is pulled out with the operation panel latched. | 2010-03-04 |
| 20100053883 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES THROUGH USER INTERFACES - An electronic device can be provided with a user interface component and a cooling component contained within a housing. The housing may include at least one surface having an opening formed therethrough, and the user interface may include one port formed therethrough. The user interface port may provide at least a first portion of a passageway between the housing opening and the cooling component. The passageway may allow fluids to be exchanged between the cooling component and the housing opening for cooling the electronic device. | 2010-03-04 |
| 20100053884 | HEAT DISSIPATION DEVICE AND COMPUTER USING SAME - A heat dissipation device includes a fin unit, a fan and a fan duct. The fin unit includes a plurality of fins stacked together. An airflow channel is defined between each two neighboring fins. The fan includes an air inlet and an opposite air outlet. The fan duct communicates the airflow channels of the fin unit and the fan. The fan duct includes a first flue connected to the air inlet of the fan and a second flue connected to the fin unit. The second flue includes a first side plate and a second side plate covering on two neighboring sides of the fin unit, respectively. | 2010-03-04 |
| 20100053885 | METHODS AND APPARATUS FOR COOLING ELECTRONIC DEVICES USING THERMALLY CONDUCTIVE HINGE ASSEMBLIES - An electronic device can be provided with a first housing at least partially containing a first electronic component, a second housing, and a hinge assembly coupled to the first housing and the second housing. The hinge assembly may be configured to dissipate heat generated by the first electronic component away from the first housing. In some embodiments, the hinge assembly may be configured to dissipate heat generated by the first electronic component away from the first housing and on to the second housing. The second housing may include a heat spreader for dissipating the heat from the hinge assembly throughout the second housing. | 2010-03-04 |
| 20100053886 | FOLDABLE ELECTRONIC DEVICE AND LATCH MECHANISM APPLIED IN THE FOLDABLE ELECTRONIC DEVICE - A foldable electronic device includes a first cover, a second cover rotatably connected to the first cover, and a latch mechanism. The latch mechanism includes a latching portion formed on the first cover and a catching unit positioned in the second cover. The catching cover includes a pivoted button. The pivoted button defines a catching structure to engage with the latching portion. The pivoted button is rotatably attached to the second cover. The pivoted button causes the catching structure of the pivoted button to engage with or disengage from the latching portion. A latch mechanism applied in the foldable electronic device is also provided. | 2010-03-04 |
| 20100053887 | Face Panel for a Computer Housing - A face panel for a computer housing includes a face panel body and a cover plate assembly. The face panel body includes a surrounding wall having first and second engaging grooves, and a mounting hole. The cover plate assembly is provided in the mounting hole and is assembled to the surrounding wall, and includes a cover plate having a through hole and a first engaging hook for engaging the first engaging groove, and a locking member having a fixed block coupled to the cover plate, a slide block, and a resilient connecting portion interconnecting the fixed and slide blocks to provide the slide block with a restoring force. The slide block includes a second engaging hook for engaging the second engaging groove, and a press portion exposed through the through hole and pressible to enable the second engaging hook to disengage from the second engaging groove. | 2010-03-04 |
| 20100053898 | MOTOR CONTROLLER - There is provided a motor controller that can easily reduce the size and manufacturing cost of a motor controller by reducing the size of a heat sink without increasing the number of parts much. | 2010-03-04 |
| 20100053899 | HEAT SPREADER, ELECTRONIC APPARATUS, AND HEAT SPREADER MANUFACTURING METHOD - According to an embodiment, there is provided a heat spreader including a condenser portion formed of a nanomaterial. The heat spreader further includes a first plate member, a second plate member, and a support portion. The first plate member includes a first surface, the first surface including a first area provided with the condenser portion. The second plate member includes a second surface and is arranged such that the second surface faces the first surface. The support portion protrudes from the first area of the first plate member to the second plate member, and has an end portion that is free from the nanomaterial and is in contact with the second surface of the second plate member. | 2010-03-04 |
| 20100053900 | HEAT DISSIPATION STRUCTURE AND VEHICULAR INVERTER - A heat dissipation structure is equipped with a heating element; a substrate, on which the heating element is provided; and a heat dissipation member that is in contact with the substrate via thermally conductive grease. The substrate and the heat dissipation member have contact surfaces that are in contact with each other, and at least one of the contact surfaces has a first contact region on which the thermally conductive grease is disposed, and a second contact region that surrounds the first contact region. A surface roughness of the second contact region is lower than a surface roughness of the first contact region. | 2010-03-04 |
| 20100053901 | Hybrid Chassis Cooling System - In a system for housing electronics cards, methods and systems for cooling the electronics cards are presented. Each electronics card preferably contains heat-producing electronics and a heat sink, and is preferably placed within a card guide of the chassis and secured into position with a clamping device. At least one of the heat sink, the card guide, the clamping device, and a cold wall of the chassis are used to facilitate the conduction cooling of the heat-producing electronics. Furthermore, a clamping device may rigidly secure a card into position, thus reducing the impact of vibrations (including shock) on the card. Additionally, an air flow further cools the electronics cards, the card guides, and/or the cold wall. | 2010-03-04 |
| 20100053902 | ELECTRONIC DEVICE WITH CIRCUIT BOARD SUPPORT - An electronic device includes a circuit board comprising a first surface and a second surface, a heat sink positioned on the first surface, and a support positioned on the second surface to support the circuit board. The circuit board includes a pair of first locating holes extending through the first surface and the second surface. The heat sink includes a pair of second locating holes corresponding to the first locating holes. The support includes a pair of locating posts projecting from a pair of diagonal corners thereof and extending through the corresponding first and second locating holes to limit unwanted movement of the heat sink and a shim projecting from a center thereof to prevent the circuit board from flexing. Dimensions of the shim are contoured to provide compensation for bending of the support under an applied load. | 2010-03-04 |
| 20100053903 | INSULATION SUBSTRATE, POWER MODULE SUBSTRATE, MANUFACTURING METHOD THEREOF, AND POWER MODULE USING THE SAME - A process for providing a power module substrate. A brazing sheet is temporarily fixed on a surface of a ceramic substrate by surface tension of a volatile organic medium, and a conductive pattern member punched from a base material is temporarily fixed on a surface of the brazing sheet by surface tension. These are heated so as to volatilize the volatile organic medium, and a pressure is applied to the conductive pattern member in its thickness direction. The brazing sheet is then melted to join the conductive pattern member with the surface of the ceramics substrate. | 2010-03-04 |
| 20100053904 | LOCKING DEVICE FOR HEAT SINK - A locking device is used for securing a heat sink to an electronic device mounted on a first face of a printed circuit board which defines a first hole. The heat sink defines a second hole therein. The locking device has a fastener including a head portion located aside the heat sink, a foot portion located aside a second face of the printed circuit board, and a body portion extending through the holes of the heat sink and the printed circuit board and interconnecting the head portion and the foot portion. The foot portion includes a buckling part abutting against the second face of the printed circuit board, and a positioning part extending toward the head portion to a position above the buckling part. When the buckling part abuts against the printed circuit board, the positioning part has a portion thereof entering into the first hole. | 2010-03-04 |
| 20100053905 | HEAT DISSIPATION APPARATUS - A heat dissipation apparatus ( | 2010-03-04 |
| 20100053906 | HEAT DISSIPATION DEVICE - A heat dissipation device for dissipating heat generated by an electronic device on a printed circuit board includes a heat sink and a plurality of mounting devices. A plurality of retaining pillars are secured on the printed circuit board at positions around the electronic device. Each of the mounting devices includes a fixing portion connecting with the heat sink, a mounting portion extending from the fixing portion and a locating portion extending from the mounting portion to a position below the mounting portion. The retaining pillars on the printed circuit board extend through the locating portions and abut against bottoms of the mounting portions to accurately position the heat dissipation device on the electronic device on the circuit board before fasteners are brought to extend through the mounting portions to screw in the retaining pillars. | 2010-03-04 |
| 20100053907 | SYSTEMS AND METHODS FOR SIMPLE EFFICIENT ASSEMBLY AND PACKAGING OF ELECTRONIC DEVICES - Systems and methods for simple, efficient and/or cost effective manufacturing and assembly of electronic devices are provided. The various systems and methods of the invention may include various ways of coupling, attaching, and/or connecting the various components of the system to one another, for improved cost and ease of assembly. A number of clips may be used to attach together various parts of an electronic system and housing including circuit devices, enclosure lid and housing, and/or cabling. These clips may be screw-less, may be made of a resilient or spring material, designed so that they quickly snap into place so as to provide good mechanical strength and electrical connection. Various circuit elements may include planar circuits, and may include filters made of a high temperature superconductor material. A planar cable may be used for electrical connecting of components. These systems and devices may be used in, for example, wireless communication systems. | 2010-03-04 |
| 20100053918 | ELECTRONIC-PARTS PACKAGE AND MANUFACTURING METHOD THEREFOR - An electronic-parts package includes a base member, a conductive member extending through the base member, the conductive member having the insulating substance on the surface removed by polishing, electronic parts disposed on one surface of the conductive member through a connection portion, an exterior electrode disposed through a metal film on the opposite surface of the surface of the base member on which the electronic parts is disposed, and a cap member that protects the electronic parts on the base member. | 2010-03-04 |
| 20100053919 | Device for the Protection of an Electronic Component - The invention relates to a protection device fixed to a support and covering an electronic component. The protection device comprises at least a first wall corresponding to a first portion of printed circuit comprising at least a first conductive track, the first wall comprising at least a first mechanical guide element; at least a second wall corresponding to a second portion of printed circuit comprising at least a second conductive track, the second wall comprising at least a second mechanical guide element which interacts with the first guide element; and spot welds connecting the first wall to the second wall, at least one of the spot welds also electrically connecting the first conductive track to the second conductive track. | 2010-03-04 |
| 20100053920 | PACKAGING SUBSTRATE WITH EMBEDDED SEMICONDUCTOR COMPONENT AND METHOD FOR FABRICATING THE SAME - A packaging substrate with an embedded semiconductor component and a method of fabricating the same are provided, including: fixing a semiconductor chip with electrode pads to an assisting layer with apertures through an adhesive member, wherein each of the electrode pads has a bump formed thereon, each of the apertures is filled with a filling material, and the bumps correspond to the apertures, respectively; forming a first dielectric layer on the assisting layer to encapsulate the semiconductor chip; removing the bumps and the filling material to form vias; and forming a first wiring layer on the first dielectric layer and forming first conductive vias in the vias to provide electrical connections between the electrode pads and the first wiring layer, wherein the first wiring layer comprises a plurality of conductive lands formed right on the first conductive vias, respectively. | 2010-03-04 |
| 20100053921 | Printed Circuit Board and Electronic Device - According to one embodiment, there is provided a printed circuit board including a plurality of electrode pads provided on a component mounting face on which a semiconductor component is to be mounted, a plurality of hole terminals provided on the component mounting face so as to correspond to the electrode pads, and a plurality of wiring pattern layers connecting the plurality of electrode pads and the plurality of hole terminals corresponding to the plurality of electrode pads, the plurality of wiring pattern layers being wired across directions of elastic deformation of the component mounting face. | 2010-03-04 |
| 20100053922 | MICROPACKAGING METHOD AND DEVICES - A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box. | 2010-03-04 |
| 20100053923 | SEMICONDUCTOR DEVICE AND CIRCUIT BOARD ASSEMBLY - A semiconductor device that includes a semiconductor element, a package substrate, and a plurality of bonding members. The semiconductor element is fixed on the front surface of the package substrate. The package substrate has a first region and a second region on the back surface. The plurality of bonding members is arranged in a grid pattern on the first region of the back surface of the package substrate. The second region of the package substrate defines a bonding prohibition region corresponding with the periphery of the semiconductor element in a plan view. | 2010-03-04 |
| 20100053924 | ANISOTROPIC CONDUCTIVE MATERIAL - [Problem] A conventional anisotropic conductive material using low melting point particles exhibits a low degree of conductivity between the upper and lower conductors and the insulation resistance between adjoining conductors is also low. | 2010-03-04 |
| 20100053925 | CHIP MOUNT FOR DATA STORAGE DEVICE - A chip mount for a data storage device is mounted on a circuit board and has a frame and multiple legs being separately mounted through the frame and being soldered to the circuit board. A chip is mounted in a chip room of the frame and is connected to the circuit board through the legs. The chip mount prevents the chip from being damaged while being soldered to the circuit board. Furthermore, since the chip is removably mounted in the chip room of the frame of the chip mount, the chip is easily replaced with another chip to enlarge a storage capacity or renovate the data storage device. No new data storage device needs to be bought saving money and materials. | 2010-03-04 |
| 20100053926 | SHIELD - A shield for electronic elements of a circuit board includes a frame and a cover, the frame including a peripheral wall comprising a plurality of fixed portions thereon, wherein the fixed portion includes a protrusion and a gap, the protrusion formed on the inner side of the peripheral wall, and the cover has a plurality of folding pieces corresponding to the fixed portions, the folding pieces defines an aperture, and the cover is mounted on the frame, the folding pieces match with the fixed portions correspondingly, the protrusion passes the aperture and locks with the aperture. When the cover is detached, the folding pieces are resisted via the gap to make the protrusion to break away from the aperture of the folding piece, enabling the cover to be opened. | 2010-03-04 |
| 20100053927 | CAPACITOR UNIT AND ITS MANUFACTURING METHOD - There is provided a capacitor unit including plural capacitors, each including end face electrode at one end face and side face electrode having a polarity different from end face electrode at a side face, arranged side by side; bus bar connected to end face electrode of capacitor, and partially connected to side face electrode of adjacent capacitor unit; and a circuit substrate arranged at the one end face sides or the other end face sides of plural capacitors; wherein bus bar and the circuit substrate are electrically connected through conductive portion arranged from bus bar towards the circuit substrate. | 2010-03-04 |
| 20100053938 | BACKLIGHT ASSEMBLY AND A DISPLAY DEVICE HAVING THE SAME - A backlight assembly comprising: a plurality of fluorescent lamps each including a lamp tube having a fluorescent layer, a discharge gas contained in the lamp tube, a first electrode disposed in the lamp tube, and a conductive terminal capacitively coupled to the first electrode; and a lamp socket which secures the plurality of fluorescent lamps. | 2010-03-04 |
| 20100053939 | Backlight module - A backlight module includes a frame, a diffuser, a first light source, and a light guiding plate. The diffuser is disposed in the frame. A plurality of diffusing particles is doped into the diffuser. The refractive index of the plurality of diffusing particles is less than that of the diffuser. Furthermore, the diffuser has a first light entrance surface and a light exit surface. The first light source is disposed in a long-axial direction of the diffuser and is located at a side of the first light entrance surface. The light guide plate is disposed at a side of the light exit surface. | 2010-03-04 |
| 20100053940 | REMOVABLE WORK LIGHT ASSEMBLY FOR A HAND TOOL - A work light assembly for use with a hand drill or like rotary tool having a work light, a side handle assembly, and an attachment assembly, where the work light is removably secured to a portion of the rotary tool. | 2010-03-04 |
| 20100053941 | Security light purse - A security light purse having a purse light disposed in an interior compartment of the purse body so as to light up the compartment to enable the user to more easily find one or more objects inside the purse. In a preferred embodiment, the purse light comprises a flexible light panel having a plurality of LEDs or other light sources disposed about the periphery of the light panel. The light sources connect to batteries disposed inside a battery compartment at the bottom of the purse. A recharge port facilitates recharging the batteries. The purse can have an alarm unit operatively connected to the purse's handles such that the alarm is activated when the handles are pulled from the purse body during an attempted purse snatching. The preferred purse also has a safety device mechanism for securing a personal safety device, such as mace, to the purse for ready use. | 2010-03-04 |
| 20100053942 | LANTERN WITH MOOD LIGHT AND ROTATING COLLAR DIMMER SWITCH - A lantern ( | 2010-03-04 |
| 20100053943 | ELECTRICAL COMPONENT, SUCH AS A LIGHTING UNIT AND BATTERY CHARGER ASSEMBLY - An apparatus includes a housing including an AC power input and a power tool battery port adapted to receive a power tool battery pack. A light body includes an illumination portion operable to emit light. The illumination portion is movably coupled to the housing such that the illumination portion is movable between an open position and a closed position in which the housing blocks the emitted light. A circuit includes a battery charger portion. The circuit is operable when AC power is available at the AC power input to direct AC power from the AC power input to the battery charger portion and from the battery charger portion to the power tool battery port to charge the power tool battery pack and to direct AC power to the illumination portion to emit the light. When AC power is not available, the circuit directs power from the power tool battery pack to the illumination portion to emit the light. | 2010-03-04 |
| 20100053944 | TELESCOPIC FLASHLIGHT - A telescopic flashlight includes a handle provided to receive a battery for providing power. A telescopic shaft is selectively and longitudinally received in the handle. The telescopic shaft includes a series of sleeves slidably received one by one. Each sleeve has a stop structure longitudinally formed thereon to prevent the series of sleeves from rotating relative to one another. A light element is mounted to a free end of the telescopic shaft. | 2010-03-04 |
| 20100053945 | LUMINAIRE FOR INSPECTING THE SURFACE QUALITY OF AN OBJECT - A luminaire comprising a reflector ( | 2010-03-04 |
| 20100053946 | Flush-Mounted Flashing Light - The invention relates to a flush-mounted flashing light for approach guidance of aircraft, having a housing which has a housing pot ( | 2010-03-04 |
| 20100053947 | Lighting device and lens assembly - A lighting assembly is provided having a main housing and a lens assembly hinged to the main housing. The lens assembly has a body with end walls with a recess in an upper end of the end walls. The recess in each end wall has a dimension to receive and support a lens for directing light to the target area. The lens has a length greater than the length of the cover so that the ends of the lens extend beyond the outer edge of the end walls of the cover. Stop members are provided on the end walls to limit longitudinal movements of the lens with respect to the body of the lens assembly. A reflector extends from a bottom edge of the cover to an upper edge overlying a portion of the lens. A spring clip is provided to couple the lens to the reflector. | 2010-03-04 |
| 20100053948 | DEVICE FOR MIXING LIGHT OF SIDE EMITTING LEDS - A light emitting device ( | 2010-03-04 |
| 20100053949 | LED LAMP - An LED lamp includes a heat sink, a first and second LED modules mounted on the heat sink, a reflector and a supporting post connecting the heat sink and the reflector. The heat sink includes a base having a first end and a second end opposing to the first end, and a plurality of fins extending from the base and between the first and second ends thereof. The first and second LED modules are mounted on the first and second ends of the base, respectively. The supporting post is disposed on the second end of the base with one end thereof connecting the reflector. The reflector is facing towards the second LED module to reflect light generated therefrom toward the first LED module over an enlarged area. | 2010-03-04 |
| 20100053950 | LIGHTING APPARATUS HAVING LIGHT EMITTING DIODES FOR LIGHT SOURCE - A down-light has a main body, a substrate, a plurality of LEDs, a reflector, a central boss, a central screw and peripheral screws. The main body has a mounting area. The substrate having LEDs is assembled in the mounting area. The reflector is attached to the main body with the substrate interposed therebetween, and reflects light emitted from the LEDs. The central boss is formed on the mounting area to correspond to a central part of the substrate. The central screw fixes the central part of the substrate to the central boss from the reflector side. Peripheral screws fix the substrate to the main body by pulling the reflector from the main body side. | 2010-03-04 |
| 20100053951 | LED FLOOR LAMP - An LED floor lamp comprises a main structure, a light shade and a light source, the main structure includes a rod and a base, and the light shade includes a reflecting surface, wherein the rod is fixed on the base, the light shade is mounted on a top end of the rod and the reflecting surface thereof faces upward, the light source is disposed in the light shade and consisted of a plurality of single-packaged light emitting diodes each with a power of more than 12 W. Therefore, the LED floor lamp can provide a high illumination while avoiding energy waste. | 2010-03-04 |
| 20100053952 | Illumination system and method - A system and a method are disclosed here for illumination of illumination of objects to produce visual displays. The object has internal transmissive surfaces and a proximal end and a tapering distal end, the proximal end has an aperture for receiving light, and the distal end terminates with at least one transmissive ornamental portion. The method comprises the step of providing at least one light source with a large surface area, reflecting the light rays, collecting the light rays at the distal end, and producing a visual ornamental display. The system comprises at least one light source, the light source is spaced apart from the proximal end, and at least one transmissive ornamental portion disposed at the distal end for collecting and focusing light to produce visual displays. | 2010-03-04 |
| 20100053953 | LIGHT-GUIDING MODULE AND LED LAMP USING THE SAME - An LED lamp includes a heat sink, a plurality of LED modules mounted on a top of the heat sink and a plurality of light-guiding modules respectively fixed on the LED modules. The heat sink includes a base and a plurality of fins extending downwardly from the base. Each LED module includes a plurality of LEDs mounted thereon. Each light-guiding module includes a mounting bracket defining a plurality of through holes therein and a plurality of guiding units respectively received in the through holes of the mounting bracket. The guiding units are respectively in alignment with the LEDs of a corresponding LED module and receive the LEDs in lower ends thereof to reflect and guide light generated by the corresponding LED module in a predetermined manner. | 2010-03-04 |
| 20100053954 | ILLUMINANT MODULE WITH OPTICAL FILM OF MULTIPLE CURVATURES - An Illuminant module includes an optical film and a light source array. The optical array includes a plurality of concave surfaces and a plurality of convex surfaces alternatively arranged along at least one direction, wherein each concave surface has a concave surface width along the at least one direction, and each convex surface has a convex surface width along the at least one direction. The light source array includes a plurality of light emitting diodes, wherein the concave surface width is not equal to the convex surface width, and the light from the light source array penetrates the optical film. | 2010-03-04 |
| 20100053955 | LIGHT EMITTING DIODE LIGHTING DEVICE - The present invention relates to a light emitting diode (LED) lighting device ( | 2010-03-04 |
| 20100053956 | LIGHT EMITTING MODULE - There is provided a light emitting module including: a printed circuit board; a plurality of light emitting diode chips disposed at a distance from one another on a conductive pattern formed on a top of the printed circuit board; and a connector formed on a bottom of the printed circuit board and electrically connected to the plurality of light emitting diode chips. The light emitting diode chips and the connector are optimally arranged to ensure that the light emitting module is suitably utilized as a high-density linear light source including a great number of light emitting diode chips and emits light outward with minimum loss. | 2010-03-04 |
| 20100053957 | THREADED LED RETROFIT MODULE - An LED based module designed to be easily retrofitted into existing incandescent based light fixtures with minimum or no modification is provided. The LED module of the present disclosure includes a generally cylindrical threaded adapter module including a flat top surface and a conical bottom portion. The bottom portion includes a threaded cavity for receiving a conventional threaded rod of a light fixture which then couples the LED module to the light fixture. The top surface of the LED module is configured to mount a metal core printed circuit board including at least one LED (light emitting diode). Furthermore, the LED module includes at least two channels running therethrough to accommodate wires or conductors from the light fixture to the metal core printed circuit board. The threaded surface of the LED module is configured to accept a conventional shade retainer ring or nut. | 2010-03-04 |
| 20100053988 | Vehicle Projector Lamp - A projector lamp for a vehicle headlamp and method for continuously forming the same, which lamp is formed from one piece of sheet metal and includes a cylindrical lens holder and a cup shaped reflector for reflecting light from a vehicle bulb toward the cylindrical lens holder. Integral tabs formed from and extending inwardly from the cylindrical lens holder secure an optical lens within the cylindrical lens holder. | 2010-03-04 |
| 20100053989 | HIGH PRESSURE DISCHARGE LAMP - A high pressure discharge lamp ( | 2010-03-04 |
| 20100053990 | ILLUMINATING GLASS COMPLEX - Illuminating glass complex characterized in that it comprises a light source consisting of a textile web containing optical fibres arranged in a warp and/or a weft associated with binding yarns in a warp and weft, said optical fibres being capable of emitting light laterally. | 2010-03-04 |
| 20100053991 | Illuminated artificial christmas tree - The artificial Christmas tree has a trunk configured in the form of popular or religious inspired figures, which may include a Christian cross, Santa Claus, an angel, Jesus, holiday signage and a reindeer. The artificial tree is provided with a base to support the trunk and with artificial branches and/or materials that simulate the shape of a Christmas tree. The branches and base are removably attached to the trunk to allow for dismantling and storage. The trunk is fabricated from plastic and/or other material that may be translucent to light. A source of light can be disposed inside the trunk to illuminate the trunk. The branches are of different lengths and configurations so that the assembled artificial tree will assume the shape of a Christmas tree as much as possible. | 2010-03-04 |
| 20100053992 | ILLUMINATION SYSTEM AND DISPLAY DEVICE - The invention relates to an illumination system ( | 2010-03-04 |
| 20100053993 | DISPLAY DEVICE - A display device is provided, which can precisely control a light source by measuring the quantity of light from the light source under uniform conditions. The display device includes a display panel displaying an image, a light source generating light, a light guide plate guiding and providing the light to the display panel, a receptacle accommodating the light source and the light guide plate, an optical sensor fixed to the receptacle to sense the light, a light receiving hole formed at an edge of the receptacle to provide a path through which the light reaches the optical sensor, and an optical adjustment member interposed between the light guide plate and the optical sensor to reduce luminance of the light incident to the optical sensor. The optical sensor is completely exposed to the optical adjustment member through the light receiving hole. | 2010-03-04 |
| 20100053994 | OPTICAL MEMBER, LIGHT SOURCE DEVICE, AND DISPLAY DEVICE - An optical member, a light source device, and a display device, which can prevent or reduce luminance irregularity on the screen of a display panel, include sheet or plate shaped optical member located between the display panel which displays an image and a plurality of light sources including a region provided in an area corresponding to an area in which the arrangement intervals between the light sources are wider (an end portion of the screen of the display panel) and has light reflectance higher than light reflectance in a region provided in an area in which the arrangement intervals between the light sources are narrower (a center portion of the screen of the display panel). | 2010-03-04 |
| 20100053995 | BACKLIGHT UNIT - A backlight unit is provided that, for a case where on a mounting board on which a plurality of point light sources are mounted, an electronic component other than those point light sources is mounted, can reduce the occurrence of uneven luminance, with no increase in the size of the backlight unit. This backlight unit ( | 2010-03-04 |
| 20100053996 | LIGHT GUIDE WITH REFLECTANCE ENHANCEMENT AND LIGHTING SYSTEM INCLUDING THE SAME - According to an aspect of the invention, a light guide is provided which includes a light guide substrate having a top surface through which light is to be emitted, a bottom surface, an incident edge surface through which incident light is to be introduced into the light guide substrate, and another edge surface. The another edge surface includes at least one micro structure operative to reflect at least a portion of the incident light, which travels through the light guide substrate and is incident on the another edge surface, back within the light guide substrate. | 2010-03-04 |
| 20100053997 | LIGHT GUIDE UNIT AND BACKLIGHT MODULE - A light guide unit including a light guide plate and a plurality of rod lenses is provided. The light guide plate has a first surface, a second surface opposite to the first surface, and a light incident surface connecting the first surface and the second surface. The light guide plate further has a plurality of diffusion net points located at the second surface. The rod lenses are disposed on the first surface. Each of the rod lenses extends along a first direction and has a curved surface curving in a second direction. The rod lenses are arranged along the second direction. Pitches of the adjacent diffusion net points in the first direction are smaller than pitches of the adjacent diffusion net points in the second direction. A backlight module using the light guide unit is also provided. | 2010-03-04 |
| 20100054008 | Inductorless Isolated Power Converters With Zero Voltage and Zero Current Switching - A method of controlling an isolated switching power converter that includes a transformer with a primary side and a secondary side, at least one primary switch coupled to the primary side of the transformer and at least one synchronous rectifier coupled to the secondary side of the transformer is disclosed. The method includes turning on the synchronous rectifier a first fixed time after turning on the primary switch and turning off the synchronous rectifier a second fixed time after turning off the primary switch. Power converters for operation according to this method are also disclosed, including power converters without an output inductor. | 2010-03-04 |
| 20100054009 | CURRENT CONVERSION CIRCUIT - A current conversion circuit includes a control circuit, and a switch circuit. The control circuit includes a first photoelectric coupler receiving a first driving signal and outputting a first control signal, and a second photoelectric coupler receiving a second driving signal and outputting a second control signal. The switch circuit includes a first transistor and a second transistor connected in series between a positive power source and a negative power source. The first transistor includes a control terminal receiving the first control signal, and the second transistor includes a control terminal receiving the second control signal. A node between the first and second transistors outputs an alternating signal. | 2010-03-04 |
| 20100054010 | VEHICLE INVERTER - A method and system of inverting DC energy stored within a vehicle to AC energy sufficient for supplying appliances or other devices that traditionally receive AC energy from a wall outlet. The inverting may be executed without feedback control in that switching operations used to controller boosting and inverting the DC energy are controller solely from inputs and without regard to the actual output. | 2010-03-04 |
| 20100054011 | High speed SRAM - High speed SRAM is realized such that a first dynamic circuit serves as a local sense amp for reading a memory cell through a lightly loaded local bit line, a second dynamic circuit serves as a segment sense amp for reading the local sense amp, and a tri-state inverter serves as an inverting amplifier of a global sense amp for reading the segment sense amp. When reading, a voltage difference in the local bit line is converted to a time difference for differentiating low data and high data by the sense amps for realizing fast access with dynamic operation. Furthermore, a buffered data path is used for achieving fast access and amplify transistor of the sense amps is composed of relatively long channel transistor for reducing turn-off current. Additionally, alternative circuits and memory cell structures for implementing the SRAM are described. | 2010-03-04 |
| 20100054012 | CONTENT ADDRESABLE MEMORY HAVING PROGRAMMABLE INTERCONNECT STRUCTURE - A content addressable memory (CAM) device includes a CAM array, a programmable interconnect structure, and a priority encoder. The CAM array includes a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates a match result for the CAM row. The programmable interconnect structure is coupled to each CAM row and a plurality of CAM rows, each row including a number of CAM cells for storing a data word and coupled to a match line that indicates match results for the row. The programmable interconnect structure coupled to each CAM row, and is configured to logically connect any number N of selected CAM rows together to form a data word chain spanning N rows, regardless of whether the selected CAM rows are contiguous. | 2010-03-04 |
| 20100054013 | CONTENT ADDRESABLE MEMORY HAVING SELECTIVELY INTERCONNECTED COUNTER CIRCUITS - A content addressable memory (CAM) device includes a plurality of CAM rows, a number of sequencing logic circuits, and a programmable interconnect structure. Each CAM row includes a number of CAM cells to generate a match signal on a match line and includes an enable input. Each sequencing logic circuit includes an input and an output, and is configured to count sequences of match signals from the CAM rows. The programmable interconnect structure selectively connects the match line of any CAM row to the input of any sequencing logic circuit, and selectively connects the output of any sequencing logic circuit to the enable input of any CAM row. | 2010-03-04 |
| 20100054014 | HIGH DENSITY RESISTANCE BASED SEMICONDUCTOR DEVICE - Memory devices are described along with methods for manufacturing. A memory device as described herein includes a plurality of memory cells located between word lines and bit lines. Each memory cell comprises a diode and a plurality of memory elements each comprising one or more metal-oxygen compounds, the diode and the plurality of memory elements arranged in electrical series along a current path between a corresponding word line and a corresponding bit line. | 2010-03-04 |
| 20100054015 | Non-volatile memory device and method of operating the same - Provided is a non-volatile memory device that may include a plurality of variable resistors, each of the variable resistors having first and second terminals, the plurality of variable resistors arranged as a first layer of a plurality of layers and having data storage capability, at least one common bit plane arranged as a second layer of the plurality of layers and coupled to the first terminal of each of the variable resistors of the first layer, and a plurality of bit lines coupled to the second terminal of each of the variable resistors of the first layer. | 2010-03-04 |
| 20100054016 | Semiconductor memory device having floating body type NMOS transistor - A semiconductor memory device comprises a memory cell array and a sense amplifier circuit. The memory cell array includes a first NMOS transistor which has a gate electrode connected to a word line and has one source/drain region connected to a bit line. The sense amplifier circuit includes a second NMOS transistor which has a gate electrode connected to the bit line and has one source/drain region connected to a predetermined voltage. In the semiconductor memory device, each of the first and second MOS transistors is a floating body type NMOS transistor, and the predetermined voltage is supplied to the bit line at least in a precharge operation, thereby preventing characteristic deterioration due to accumulation of holes in the floating body. | 2010-03-04 |
| 20100054017 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprising: a plurality of cell arrays having a plurality of first wirings and a plurality of second wirings intersecting each other and memory cells disposed at intersections between said first wirings and said second wirings, each containing a variable resistive element that is electrically rewritable and stores a resistance value as data; and a control circuit for selectively driving said first wirings and said second wirings; wherein said control circuit performs a first operation of applying a voltage required for one operation selected from the data write, read and erase operations to said one memory cell via one combination of said first and second wirings and a second operation of applying a voltage required for an operation selected from the data write, read and erase operations and different from the first operation to said other memory cell via another combination of said first and second wirings. | 2010-03-04 |
| 20100054018 | SEMICONDUCTOR MEMORY DEVICE AND INFORMATION PROCESSING SYSTEM - A semiconductor memory device comprises a memory cell array and a forming controller. The memory cell array includes a plurality of first memory cells each having a structure in which dielectric material is sandwiched between two electrodes, and the memory cell array is divided into a plurality of areas capable of being designated. The forming controller controls to perform “forming” for the first memory cells in an area selectively designated from the plurality of areas of the memory cell array, and as a result of the forming, the first memory cells are changed to non-volatile second memory cells. | 2010-03-04 |
| 20100054019 | RESISTANCE CHANGE MEMORY DEVICE - A resistance change memory device includes a cell array having multiple layers of mats laminated thereon, each of the mats having word lines and bit lines intersecting each other as well as resistance change type memory cells arranged at intersections thereof, each of the mats further having therein a reference cell and a reference bit line connected to the reference cell, the reference cell set to a state of a certain resistance value; a selection circuit configured to select a word line in each mat of the cell array, and select a bit line intersecting a selected word line and the reference bit line at the same time; and a sense amplifier configured to sense data by comparing respective cell currents of a selected memory cell on the selected bit line and the reference cell on the reference bit line. | 2010-03-04 |
| 20100054020 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a memory cell having a resistance which differs based on stored data, a bit line connected to the memory cell, a first MOSFET which clamps the bit line to a read voltage when reading data, a sense amplifier which detects the stored data in the memory cell based on a current flowing through the bit line, a first switch element which connects the sense amplifier to a drain of the first MOSFET, a second switch element which connects a source of the first MOSFET to the bit line, a third switch element which connects the drain of the first MOSFET to a ground terminal, and a fourth switch element which connects the source of the first MOSFET to a ground terminal. | 2010-03-04 |
| 20100054021 | Memory Device with Multiple Capacitor Types - An integrated circuit includes a memory array portion and a support circuitry portion arranged on a semiconductor substrate. An insulative layer is formed on the semiconductor substrate. Data storage capacitors are located in the memory array portion and extending through the insulative layer. Non-data storage capacitors are located in the support circuitry portion and terminating above the insulative layer. | 2010-03-04 |
| 20100054022 | Method and Apparatus for Reducing Charge Trapping in High-K Dielectric Material - In one embodiment, an integrated circuit includes a memory array having a plurality of capacitors for storing data of an initial state in the memory array in an initial state. The integrated circuit also includes circuitry for occasionally inverting the data stored by the plurality of capacitors and tracking whether the current state of the data stored by the plurality of capacitors corresponds to the initial state. The circuitry inverts the data read out of the memory array during a read operation when the current state of the data does not correspond to the initial state. | 2010-03-04 |
| 20100054023 | CHARGE STORAGE CIRCUIT, VOLTAGE STABILIZER CIRCUIT, METHOD FOR STORING CHARGE USING THE SAME - A charge storage circuit includes a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to a corresponding word line among the word lines and connected to a corresponding bit line among the bit lines. Each of the memory cells includes a transistor turned on in response to a predetermined voltage of the corresponding word line and connected to the corresponding bit line, and a capacitor having one end connected to the transistor and the other end connected to the corresponding word line. | 2010-03-04 |
| 20100054024 | CIRCUIT FOR READING A CHARGE RETENTION ELEMENT FOR A TIME MEASUREMENT - A method and a circuit for reading an electronic charge retention element for a temporal measurement, of the type including at least one capacitive element whose dielectric exhibits a leakage and a transistor with insulated control terminal for reading the residual charges, the reading circuit including; two parallel branches between two supply terminals, each branch including at least one transistor of a first type and one transistor of a second type, the transistor of the second type of one of the branches consisting of that of the element to be read and the transistor of the second type of the other branch receiving, on its control terminal, a staircase signal, the respective drains of the transistors of the first type being connected to the respective inputs of a comparator whose output provides an indication of the residual voltage in the charge retention element. | 2010-03-04 |
| 20100054025 | SEMICONDUCTOR INTEGRATED MEMORY CIRCUIT AND TRIMMING METHOD THEREOF - A latch circuit includes first and second inverters connected in a cross-coupling manner at a first node and a second node. A voltage application circuit applies a hot carrier generation voltage for generating hot carrier at a transistor included in the first inverter or the second inverter. An inverting circuit generates an inversion signal as an inverted signal of an amplified signal provided from the latch circuit to the bit line pair to provide the inversion signal to the first node and the second node. | 2010-03-04 |
| 20100054026 | MEMORY WITH SEPARATE READ AND WRITE PATHS - A memory unit includes a giant magnetoresistance cell electrically coupled between a write bit line and a write source line and a magnetic tunnel junction data cell electrically coupled between a read bit line and a read source line. A write current passing through the giant magnetoresistance cell switches the giant magnetoresistance cell between a high resistance state and a low resistance state. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by magnetostatic coupling with the giant magnetoresistance cell. The magnetic tunnel junction data cell is read by a read current passing though the magnetic tunnel junction data cell. | 2010-03-04 |
| 20100054027 | Symmetric STT-MRAM Bit Cell Design - A symmetric Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) bit cell and STT-MRAM bit cell array are disclosed. The STT-MRAM bit cell includes a poly silicon layer, a magnetic tunnel junction (MTJ) storage element, and a bottom electrode (BE) plate. The storage element and bottom electrode (BE) plate are symmetric along a center line of the poly silicon layer. | 2010-03-04 |
| 20100054048 | METHOD AND APPARATUS FOR PROGRAMMING AUTO SHUT-OFF - A method and system for enabling auto shut-off of programming of a non-volatile memory cell is disclosed. The system includes a memory array having a plurality of memory cells, each cell storing one bit of data. During the programming process, programming signals are applied to the target memory cells. A predefined period of time after the programming signals are applied, the auto shut-off system begins sensing an output signal from the memory cell. After the system detects an output signal from the memory cell, the system waits for a second predefined period of time before turning off the programming voltages. The system may be configured to sense an output voltage from the memory cell. The system then compares the output voltage to a reference voltage in order to detect when the cell is programmed. Alternatively, the system may sense an output current from the memory cell. The system then compares the output current to a reference current to detect when the cell is programmed. | 2010-03-04 |
| 20100054049 | SEMICONDUCTOR DEVICE - The semiconductor device makes a comparison between a word-line timing signal for determining a word-line activation time and a reference signal, applies a back-gate bias for enlarging a read margin when the result of the comparison represents a low condition of the read margin, and applies a back-gate bias for enlarging a write margin when the comparison result represents a low condition of the write margin. The reference signal is selected depending on whether to compensate an operating margin fluctuating according to the word-line activation time (or word-line pulse width), or to compensate an operating margin fluctuating according to the process fluctuation (or variation in threshold voltage). By controlling the back-gate biases according to the word-line pulse width, an operating margin fluctuating according to the word-line pulse width, and an operating margin fluctuating owing to the variation in threshold voltage during its fabrication are improved. | 2010-03-04 |
| 20100054050 | APPARATUS AND METHOD FOR PROVIDING POWER IN SEMICONDUCTOR MEMORY DEVICE - An apparatus for applying power in a semiconductor memory device includes a first power pin for receiving a first power at a first voltage from an external device, a second power pin for receiving a second power at the first voltage, a memory array block connected to the first power pin, the memory array block writing input data, outputting read data, and refreshing regularly to sustain stored data, a peripheral logic block connected to the first power pin for receiving the first power and communicating with the memory array block to perform data write and read operations, a data output driver connected to the second power pin and driving a data output pin, and a switch for electrically connecting the first power pin and the second power pin by performing a switching operation during a refresh operation of the memory array block. | 2010-03-04 |
| 20100054051 | MEMORY DEVICE AND METHOD THEREOF - The present application discloses a memory array where each memory bit cell of the array includes a level shifter. In addition, each memory bit cell includes a write port that includes pass gate that can include a p-type field effect transistor and an n-type field effect transistor. The control electrodes of the p-type field effect transistor and the n-type field effect transistor are connected together as part of a common node. In addition, a current electrode of the p-type field effect transistor and a current electrode of the n-type field effect transistor are connected together to form a common node. | 2010-03-04 |
| 20100054052 | SEMICONDUCTOR MEMORY - A semiconductor memory is provided which includes a word line coupled to a transistor of a memory cell; a word driver configured to activate the word line; a first resistance portion configured to couple the word line to a low-level voltage line in accordance with an activation of the word line and to decouple the coupling after a first period in an activation period of the word line elapses; a second resistance portion configured to couple the word line to a high-level voltage line in a second period in the activation period; and a third resistance portion configured to couple the word line to the low-level voltage line in the second period, a resistance of the third resistance portion being higher than a resistance of the first resistance portion, wherein a high-level voltage of the word line in the second period is lower than that of the high-level voltage line. | 2010-03-04 |
| 20100054053 | Integrated Circuit Memory Devices Including Mode Registers Set Using A Data Input/Output Bus - An integrated circuit memory device may include a memory cell array and a plurality of data input/output pins. The plurality of data input/output pins may be configured to receive data from a memory controller to be written to the memory cell array during a data write operation, and the data input/output pins may be further configured to provide data to the memory controller from the memory cell array during a data read operation. A mode register may be configured to store information defining an operational characteristic of the memory device, and the mode register may be configured to be set using the data input/output bus. Related methods, systems, and additional devices are also discussed. | 2010-03-04 |
| 20100054054 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device includes a plurality of word lines and a plurality of pairs of bit lines and complementary bit lines that cross the plurality of word lines. A plurality of memory cells is disposed at regions where the word lines and the pairs of bit lines and complementary bit lines cross each other. A voltage control unit includes a plurality of elements connected in parallel, each of which is connected to a power voltage source and is switched on/off based on a control signal that controls an operation of the plurality of memory cells. The voltage control unit controls the voltage of the power voltage source to a predetermined level, thus obtaining a controlled voltage to be applied to the memory cells. | 2010-03-04 |
| 20100054055 | DATA INPUT/OUTPUT CIRCUIT - A data input/output circuit includes an output unit for outputting a first data strobe signal and first data in response to an internal clock generated in a delay locked loop, a first transmission line unit having a clock tree structure for transmitting the internal clock to the output unit, a second transmission line unit for transmitting the internal clock from the delay locked loop to the first transmission line unit, a duty cycle ratio correcting unit interconnected between the first transmission line unit and the second transmission line unit for correcting a duty cycle ratio of the internal clock, a data strobe signal input unit for receiving a second data strobe signal from an outside of a semiconductor memory device and generating an internal data strobe signal, and a plurality of data input units for outputting a second data in response to the internal data strobe signal. | 2010-03-04 |
| 20100054056 | MEMORY ACCESS STROBE CONFIGURATION SYSTEM AND PROCESS - A memory access strobe configuration system and process operable to generate a strobe signal having a selected phase. Based on the strobe signal, a write/read cycle using a first logic value at a memory location of a memory device generates a result logic value. The result logic value provided by the write/read cycle is compared to the first logic value. Where there is a mismatch between the result logic value and the first logic value, the phase of the strobe signal is updated. The process is then repeated using a strobe signal having the updated phase. | 2010-03-04 |
| 20100054057 | Memory Sensing Method and Apparatus - Techniques for sensing data states of respective memory cells in a memory array are provided, the memory array including at least a first bit line coupled to at least a subset of the memory cells. In one aspect, a circuit for sensing data states of respective memory cells in the memory array includes at least one sense amplifier coupled to the first bit line. The sense amplifier includes a first transistor operative to selectively inhibit charging of the first bit line in a manner which is independent of a voltage level on a second bit line coupled to the sense amplifier. | 2010-03-04 |
| 20100054068 | TEMPERATURE COMPENSATION OF MEMORY SIGNALS USING DIGITAL SIGNALS - A temperature sensor generates a digital representation of the temperature of the integrated circuit. A logic circuit reads the digital temperature and generates a multiple bit digital representation of an operational voltage and a multiple bit digital representation of a timing signal, both being functions of the integrated circuit temperature. A voltage generator converts the digital representation of the operational voltage to an analog voltage that biases portions of the integrated circuit requiring temperature compensated voltages. In one embodiment, the temperature compensated voltages bias memory cells. A timing generator converts the multiple bit digital representation of the timing signal to a logic signal. | 2010-03-04 |
| 20100054069 | MEMORY SYSTEM - The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner. | 2010-03-04 |
| 20100054070 | METHOD AND SYSTEM FOR CONTROLLING REFRESH TO AVOID MEMORY CELL DATA LOSSES - A DRAM includes a register storing subsets of row addresses corresponding to rows containing at least one memory cell that is unable to store a data bit during a normal refresh cycle. Each subset includes all but the most significant bit of a corresponding row address. A refresh counter in the DRAM generates refresh row addresses that are used to refresh rows of memory cells. The refresh row addresses are compared to the subsets of row addresses that are stored in the register. In the event of a match, the row of memory cells corresponding to the matching subset of bits is refreshed. The number of refreshes occurring each refresh cycle will depend upon the number of bits in the subset that are omitted from the row address. The memory cells that are unable to retain data bits are identified by a modified sense amplifier. | 2010-03-04 |
| 20100054071 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device is provided which has a memory cell region in which a plurality of memory cells are arranged in a matrix. The memory cell region is divided into a plurality of sectors each including a predetermined number of rows. Main bit lines extending in a column direction have an intersecting region between the sectors in which the main bit lines intersect at one or more points. The semiconductor memory device is configured to be able to supply different voltages to neighbor ones of the main bit lines in each of the sectors. | 2010-03-04 |
| 20100054072 | DISTRIBUTED BLOCK RAM - Memory blocks, such as the embedded memory blocks in a reconfigurable device, are connected together using shared global busses and interface circuits. The interface circuits allow the memory blocks to be selectively connected together to form depth and width expanded memory blocks, and also allow the blocks to be used as standalone blocks. The interface circuits connect the memory array within a memory block to any desired memory input and output lines that are linked on the same shared global busses, to allow use of any convenient input and output lines to access the expanded memory block. A shared global address bus allows memory blocks to broadcast address information to each other, and allows unused address inputs to be re-used for broadcasting information such as block selection information or shared column information. Flexible and configurable depth and width-expanded memory blocks are thereby created. | 2010-03-04 |
| 20100054073 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a clock inputting unit configured to receive a system clock and a data clock, a clock dividing unit configured to divide a frequency of the data clock to generate a data division clock and determining a phase of the data division clock according to a division control signal, a phase dividing unit configured to generate a plurality of multiple-phase data division clocks each having a predetermined phase difference according to the data division clock, and a first phase detecting unit configured to detect a phase of the system clock based on a predetermined selection clock among the multiple-phase data division clocks, and generate the division control signal according to the detection result. | 2010-03-04 |
| 20100054074 | VOLTAGE GENERATION CIRCUIT AND NONVOLATILE MEMORY DEVICE INCLUDING THE SAME - A high voltage generation circuit includes a clock logic unit configured to generate a switch clock signal and a pump clock signal, that has a varying frequency, in response to an input signal, a high voltage unit configured to generate a high voltage in response to the pump clock signal, a high voltage switch configured to output a selection signal in response to the switch clock signal, and a switching element configured to transfer the high voltage, generated by the high voltage unit, to an output node in response to the selection signal. | 2010-03-04 |
| 20100054075 | VERTEBROPLASTY ALL IN ONE MIXER - In at least one embodiment of the present invention, a device for mixing and dispensing a bone cement mixture is provided. The device comprises an injector housing having a chamber for containing a first and a second bone cement component and a second housing having a chamber for containing a flexible wire mixing element. A plunger actuates within the chamber of the second housing to transfer the wire mixing element to the injector housing for mixing the first and second bone cement components to form the bone cement mixture. The plunger rotates the wire mixing element to mix the bone cement mixture. Thereafter, the wire mixing element is withdrawn from the injector housing and the injector housing is assembled with an injector handle. A plunger coupled to the injector handle advances through the injector chamber to dispense the bone cement mixture from the device. | 2010-03-04 |
| 20100054076 | METHOD FOR AGITATING LIQUEFIED MATERIAL USING QUARTZ CRYSTAL OSCILLATOR - It is an object of the invention to provide an agitation method for sufficiently agitating a mixture of a solution such as a buffer solution and a material to be detected, with no need of any dedicated unit for agitation, for measurements using a quartz crystal oscillator. The method for agitating a liquefied material using a quartz crystal oscillator in vibrating the quartz crystal oscillator at a given frequency and measuring the variation of the frequency due to a substance in contact with the quartz crystal oscillator, is that the quartz crystal oscillator is vibrated at other frequency different from the given frequency and equal to or higher than the fundamental vibration frequency to agitate a liquid containing the substance. | 2010-03-04 |
| 20100054077 | METHOD AND APPARATUS FOR DETERMINING THE HOMOGENEITY OF A MIXTURE - Method and apparatus for determining the homogeneity ( | 2010-03-04 |
