| 09th week of 2011 patent applcation highlights part 80 |
| Patent application number | Title | Published |
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| 20110055584 | METHOD AND APPARATUS FOR ACCESS CONTROL TO INSTALLATION CONTROL SYSTEMS OF WIND ENERGY INSTALLATIONS - A method for access control to installation control systems of wind energy installations. The method includes receiving a requested user name and a requested password, wherein authorizations and checking information are coded in the requested password. The method further includes decoding the authorizations and the checking information from the requested password, checking the requested user name on the basis of the decoded checking information, checking the decoded authorizations if the check of the requested user name on the basis of the decoded checking information has a positive result, and allowing access to an installation control system of a wind energy installation when the decoded authorizations are sufficient. A wind energy installation for implementing the method includes an installation control system and a decoding unit. | 2011-03-03 |
| 20110055585 | Methods and Systems to Create Big Memorizable Secrets and Their Applications in Information Engineering - Main invention is methods and systems to create big and yet memorizable secret, which are later applied into many novel and innovated applications in information engineering. Among the big secret creation methods are (i) self-created signature-like Chinese character, (ii) two-dimensional key (2D key), (iii) multilingual key, (iv) multi-tier geo-image key, (v) multi-factor key using software token, and their hybrid combinations. Multihash key using hash iteration and hash truncation is further used to increase number of created secret for multiple offline and online accounts. Besides, multihash signature using multiple hash values of a message from different hash iteration provides object-designated signature function. The object may be recipient, action, feature, function, meaning, etc., as representation. Also, random space steganography using stego-data with random noise insertion is proposed. The main application of big memorizable secret is MePKC (Memorizable Public-Key Cryptography) using fully memorizable private key. Here, 160- to 512-bit MePKC can be realized. | 2011-03-03 |
| 20110055586 | Secure PIN Character Retrieval and Setting Using PIN Offset Masking - Securely disclosing a personal identification number (“PIN”) associated with a financial account to an account holder and receiving a new PIN from the account holder. A PIN reveal application can interact with a hardware security module (“HSM”) using a PIN offset masking process and randomly generated account data to reveal the PIN to the account holder one or more PIN characters at a time. A PIN set application also can interact the HSM using a PIN offset masking process and randomly generated account data to receive a new PIN for the account one or more PIN characters at a time. In each of the PIN reveal and PIN setting processes, less than the entirety of the PIN is stored in an unencrypted format outside of the HSM only. | 2011-03-03 |
| 20110055587 | Alert options for electronic-paper verification - A system and method to control the writing on electronic paper (e-paper). An e-paper device may incorporate authentication indicia as part of informational data written on e-paper material. The informational data is protected by a security methodology that is accessible to authorized entities. A reader device may be used to help make a verification determination of whether encrypted or encoded data has been altered. In some instances an output alert operably coupled to the reader device serves as a verification status indicator. | 2011-03-03 |
| 20110055588 | METHODS AND SYSTEMS FOR SECURELY TERMINATING PROCESSES IN A CLOUD COMPUTING ENVIRONMENT - When terminating a process instantiated in a cloud, a cloud management system can provide and interact with an eraser agent on the computing systems supporting the process. The process can be any type of process that can exits in the cloud such a virtual machine, software appliance, or software instance. The eraser agent can execute on the computing systems to erase information stored on physical storage devices of the computing systems and associated with the process. In particular, the eraser agent can utilize secure algorithms to alter and obscure the information stored on the physical storage devices of the computing systems and associated with the process. | 2011-03-03 |
| 20110055589 | INFORMATION CERTIFICATION SYSTEM - The invention discloses an information certification system including a data processing device and a portable storage medium. The portable storage medium includes a transmission interface and a memory array. The portable storage medium is removably coupled to the data processing device through the transmission interface. The memory array includes a hidden storage area. When a protected program is executed on the data processing device, the data processing device sends a certification request to the portable storage medium. The portable storage medium checks the certification request and selectively returns certification information stored in the hidden storage area back to the data processing device. Wherein, the certification information corresponds to the protected program. | 2011-03-03 |
| 20110055590 | APPARATUS AND METHOD FOR COLLECTING EVIDENCE DATA - An apparatus for collecting evidence data includes: an online data collection unit for collecting online data from a location designated by a user; a screen capture unit for capturing shots viewed on a computer screen, as they are; a time stamping unit for calculating a message digest for the collected online data to generate a time stamp including date and time when the message digest has been generated and a signature of the time stamping unit itself; and an image generation unit for generating a forensic image for the collected online data and generating a message digest for the collected online data. | 2011-03-03 |
| 20110055591 | METHOD FOR CRYPTOGRAPHIC DATA PROCESSING, PARTICULARLY USING AN S BOX, AND RELATED DEVICE AND SOFTWARE - A method for data cryptographic processing, that is implemented by an electronic entity and includes the conversion of input data (M′i−1), masked by an input mask (X), into output data, the conversion using a conversion table (S), and the method including the following steps: for at least one plurality of possible values (A) for the input mask (X), transferring the output value of the conversion table (S) corresponding to the masked input data (M′i−1) converted by the application of an unmasking operation using the possible value (A), into a table (T) at a position corresponding to a determined value (0) masked by the input mask (X) and converted by the application of an unmasking operation using the possible value (A); determining the output data using the value located in the table (T) at the position corresponding to the determined value (0). | 2011-03-03 |
| 20110055592 | METHOD OF OBFUSCATING A CODE - A method of obfuscating a code is provided, wherein the method comprises performing a first level obfuscating technique on a code to generate a first obfuscated code, and performing a second level obfuscating technique on the first obfuscated code. In particular, the code may be a software code or a software module. Furthermore, the first level obfuscating technique and the second obfuscating may be different. In particular, the second level obfuscating technique may perform a deobfuscation. | 2011-03-03 |
| 20110055593 | METHOD AND APPARATUS FOR PROTECTING ACCOUNT NUMBERS AND PASSWORDS - A method and apparatus are provided for protecting confidential information. The method includes the steps of providing a plurality of files where each file contains at least one item of secret information, such as a password for a private account. Access to the plurality of files is password protected with a master password. To access the plurality of files, the master password must be entered into a master password entry field. The files are deleted upon successive entry of incorrect passwords into the master password entry field a predetermined number of times. | 2011-03-03 |
| 20110055594 | Methods for Providing Power to an Information Handling System - A method for powering on an information handling system (IHS) includes receiving a power request signal from a video display in communication with the IHS. The methods further includes determining that the power request signal is a response to a power-on signal for the video display, and powering on the IHS by sending the power-on signal to a power controller of the IHS. | 2011-03-03 |
| 20110055595 | COMPUTER INCLUDING A CARRIER BOARD AND METHODS OF ASSEMBLY - A method is provided for assembling a computer that includes a carrier board having a board management controller (BMC), a power supply, and a carrier bus. The method includes coupling a module to the carrier board, determining, by the carrier board, a type of the module, and providing power to the module based on the module type such that a voltage component of the power is one of a first voltage and a second voltage that is different than the first voltage. | 2011-03-03 |
| 20110055596 | REGULATING POWER WITHIN A SHARED BUDGET - Metrics representing a combined measure of power used by a central processing unit (CPU) and power used by a graphics processing unit (GPU) are compared to a shared supply power and/or shared thermal power budget. A state of the CPU and a state of the GPU are regulated by the power management system to maintain the metrics within the shared supply power and/or thermal power budget for the purpose of managing the components to meet platform power supply, and cooling, constraints and design requirements. | 2011-03-03 |
| 20110055597 | REGULATING POWER USING A FUZZY LOGIC CONTROL SYSTEM - Metrics representing a combined measure of power used by a central processing unit (CPU) and power used by a graphics processing unit (GPU) are compared to a shared supply power and thermal power budgets. Power used by the CPU and power used by the GPU are regulated in tandem using a fuzzy logic control system that can implement fuzzy rules that describe the management within thermal and supply power design constraints of the platform. | 2011-03-03 |
| 20110055598 | AC Disconnect of Power Over Ethernet Devices - Embodiments of power sourcing equipment (PSE) utilizing AC disconnect are provided herein. In one embodiment, a PSE is provided that includes a DC supply configured to provide a DC voltage over a data communications medium, a controller configured to provide an AC disconnect signal over the data communications medium, and a parallel inductor-capacitor (LC) circuit coupled between the DC supply and the data communications medium. The parallel LC circuit is configured to isolate the DC supply from the AC disconnect signal. In another embodiment, a PSE is provided that includes a DC supply configured to provide a DC voltage at an output, an inductor coupled between the output of the DC supply and a data communications medium, and a capacitor coupled between the data communications medium and ground. The inductor and capacitor form a series LC circuit configured to generate an AC disconnect signal. | 2011-03-03 |
| 20110055599 | POWER SUPPLY CIRCUIT OF PORTABLE COMPUTER - A power supply circuit for supplying electric power to a portable computer includes a main battery, a first control circuit, a backup battery and a second control circuit. The main battery includes a first output terminal and a second output terminal shorter than the first output terminal. When the main battery is drawn out of the portable computer, a disconnection between the second output terminal and the portable computer occurs earlier than a disconnection between the first output terminal and the portable computer to from a time difference between the two disconnections. During this time difference, the main battery is controlled by the first control circuit to change from supplying electric power to the portable computer to not supplying electric power to the portable computer, and the backup battery is controlled by the second control circuit to supply electric power to the portable computer instead of the main battery. | 2011-03-03 |
| 20110055600 | POWER SUPPLY CONTROL CIRCUIT AND METHOD - A power supply control circuit for a motherboard of a computer is provided. The power supply control circuit includes a south bridge chip and a voltage output control circuit connected to the south bridge chip. The south bridge chip includes a control pin and a detecting pin. The voltage output control circuit has a voltage input terminal and a voltage output terminal. The voltage output control circuit includes a transistor connected to the voltage input terminal and also connected to the voltage output terminal via a switch component. The voltage output terminal is connected to the detecting pin of the south bridge chip via a super I/O chip. The transistor is capable of controlling the switch component to transmit a high level voltage to the super I/O chip when the computer is shut down. A method is also provided. | 2011-03-03 |
| 20110055601 | COMPUTING DEVICE AND METHOD FOR PROTECTING A POWER BUTTON OF THE COMPUTING DEVICE - A method protects a power button of a computing device. The computing device includes a front panel and a motherboard. The front panel includes a protection switch and a power button. The motherboard includes a power protection unit that displays a power-on simulation icon and a power-off simulation icon on a display screen when the power button is pressed. The power protection unit controls a general-purpose input/output (GPIO) pin of the motherboard to output a first voltage level when the power-off simulation icon is selected, and shuts off the protection switch to enable the power button according to the first voltage level. The power protection unit controls the GPIO pin to output a second voltage level when the power-on simulation icon is selected, and turns on the protection switch to enable the power button according to the second voltage level. | 2011-03-03 |
| 20110055602 | MECHANISM FOR MANAGING POWER IN A VIRTUAL MACHINE SYSTEM - A mechanism for managing power in a virtual machine system is disclosed. A method for a host-based power management system may include monitoring a plurality of VMs in a VM system to detect user activity associated with each of the plurality of VMs, identifying a VM of the plurality of VMs that is inactive based on the user activity associated with the VM, and applying a power reduction policy to the VM. | 2011-03-03 |
| 20110055603 | POWER MANAGEMENT FOR PROCESSOR - Techniques are generally described related to management of power consumption for a processor. One example method may include identifying a target operating constraint and a first operating parameter; determining a second operating parameter based on the target operating constraint and the first operating parameter; estimating an actual operating constraint; comparing the target operating constraint and the actual operating constraint; and setting up the first operating parameter and the second operating parameter of the processor based on a comparison of the target operating constraint and the actual operating constraint, wherein the target operating constraint is not a worst-case operating constraint. Other examples of methods, systems, and computer programs related to managing power consumption for a processor are also contemplated. | 2011-03-03 |
| 20110055604 | SYSTEM AND METHOD FOR MANAGING ENERGY CONSUMPTION IN A COMPUTE ENVIRONMENT - A system, method and non-transitory computer readable storage medium are disclosed for managing workload in a data center. The method includes receiving, at a workload manager, energy consumption information. The method further includes receiving workload information about a second data center that is remote from a first data center, and receiving, as controlled by the workload manager, at the first data center at least a portion of workload associated with the second data center based on at least one of the energy consumption information and the workload information. | 2011-03-03 |
| 20110055605 | SYSTEM AND METHOD FOR MANAGING ENERGY CONSUMPTION IN A COMPUTE ENVIRONMENT - A system, method and non-transitory computer readable storage medium are disclosed for managing workload in a data center. The method includes receiving, at a workload manager, energy consumption information associated with at least one of a first data center and a second data center that is geographically distanced from the first data center. The method further includes receiving workload information associated with at least one of the first data center and the second data center, and transmitting, as controlled by the workload manager, at least part of workload scheduled to be processed at the second data center to the first data center based on at least one of the energy consumption information and the workload information. | 2011-03-03 |
| 20110055606 | COMPUTER SYSTEM, INTEGRATED CHIP, SUPER IO MODULE AND CONTROL METHOD OF THE COMPUTER SYSTEM - A computer system including a wireless module and a super IO module is provided. The wireless module communicates with a mobile device to detect whether the mobile device is within a predetermined distance to the computer system. The super IO module electrically coupled to the wireless module manages the status of the computer system based on the distance of the mobile device. If the mobile device moves away from the range of the predetermined distance, the super IO module sends a first management signal to switch the computer system to an inactive state. Conversely, if the mobile device moves into the range of the predetermined distance while the computer system is in an inactive status, the super IO module sends a second management signal to switch the computer system back to a normal operation status or power up the computer system. | 2011-03-03 |
| 20110055607 | METHODS FOR MANAGING PROCESS ACTIVITY DATA USING A SYSTEM-WIDE DAEMON - Techniques for managing process activity statistics using a system-wide daemon are described herein. A power management daemon retrieves process activity status data from a system monitoring file stored within a data processing system, in response to a request received from a session client via an application programming interface (API). The power management daemon is a single system-wide component within the data processing system to provide the process activity status data to a plurality of session clients. The retrieved process activity status data is returned to the client via the API, where the system monitoring file requires a predetermined accessing privilege for accessing. Thus, through the power management daemon, the session client does not have to satisfy the predetermined accessing privilege in order to access the process activity status data stored in the system monitoring file. | 2011-03-03 |
| 20110055608 | NOTEBOOK COMPUTER WITH SLEEP MODE FUNCTION - An exemplary embodiment of notebook computer includes a main body, a display, and a proximity sensor. The display is pivotably connected to the main body. The proximity sensor is installed in the main body and includes an emitter and a receiver. The emitter is configured for emitting an emission. The receiver is configure for receiving the emission, determining if an included angle between the main body and the display is in a predetermined range based upon the received emission, and, if yes, generating a signal indicative of placing the notebook computer in the sleep mode. | 2011-03-03 |
| 20110055609 | Controlling the Power State of a Computer - A computer implemented method of controlling a computer comprises periodically determining the total value of at least one activity metric of the controlled computer. The contribution(s) to the said total value(s) of one or more predetermined activities are determined. In one embodiment, the said contribution(s) are subtracted from the said total value(s) to provide respective net value(s). The net values are compared with respective preset values and the power state of the computer is controlled in dependence on the comparison. The one or more predetermined activities may be identified using a predetermined data set. In another embodiment the net value of at least one activity metric of the monitored computer is a net value excluding contributions to the said value(s) from the said one or more predetermined activities identified from the said data set. | 2011-03-03 |
| 20110055610 | PROCESSOR AND CACHE CONTROL METHOD - A processor and a cache control method are provided herein. The processor includes a plurality of caches and a control unit. The caches are respectively controlled by a plurality of cache enable signals to be activated. The control unit generates the cache enable signals according to a power mode for selecting and accessing a subset of the caches in response to the power mode, wherein the number of the subset of the caches is determined by the power mode. Therefore, the processor can activate the caches as requirement according to the power mode for reducing power consumption of the caches. | 2011-03-03 |
| 20110055611 | SYSTEM FOR CONTROLLING POWER CONSUMPTION OF A NETWORK - A system for controlling power consumption of a network includes at least one terminal to receive a plurality of requests to route data from a plurality of data sources to a plurality of data sinks, where the data sources and the data sinks are connected to each other through a plurality of network nodes forming the network, and a network configuration unit. The network configuration unit includes a selection module configured to select a configuration of the network nodes that allows the network to have a lowest overall power consumption of the network among a plurality of configurations of the network, and an output module configured to output a plurality of instruction signals to the network nodes to perform the network configuration. A network path for transmitting a network flow is selected that does not allow the network flow to be split and flow through another network path. | 2011-03-03 |
| 20110055612 | COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A computer system and a control method thereof reduce power to devices not in use. The system typically includes a device unit; a switching unit which switches supply of power to the device unit; and a control unit which checks whether or not the device unit is in use, and controls the switching unit to prevent power from being supplied to the device unit if the device unit is not in use. Wasteful power consumed by devices which are not in use is minimized. In addition, if a user wants to reuse a device with supply of power cut off, it is possible to reuse the device by resuming the supply of power to the device in a simple manner. | 2011-03-03 |
| 20110055613 | POWER OPTIMIZATION FOR DATA SERVICES - Systems and methods for optimizing the power of a battery in a mobile device are provided. The systems and methods include receiving a request from at least one of a plurality of applications running on the mobile device. The systems and methods further include determining user characteristics from interacting with at least one of the applications and determining a user dwell time threshold based upon the user's interactions with an application. The systems and methods further include buffering requests if the user dwell time is less than the user dwell threshold level. | 2011-03-03 |
| 20110055614 | POWER-SUPPLY EXPANSION SYSTEM AND METHOD THEREOF - A power-supply expansion system includes a primary power-supply unit for providing a main power supply, a secondary power-supply unit for providing an auxiliary power supply, a power unit having a first and a second input terminal and an output terminal, and a control unit connected to the primary and the secondary power-supply unit. The control unit, based on a load value of the primary power-supply unit, selectively performs a power-supply expansion process for the secondary power-supply unit to feed the auxiliary power supply to the second input terminal. In the power-supply expansion process, the first input terminal receives the main power supply and the second input terminal receives the auxiliary power supply, and the power unit integrates the main and the auxiliary power supply into an output power supply, which is output via the output terminal. A power-supply expansion method applicable to the power-supply expansion system is also disclosed. | 2011-03-03 |
| 20110055615 | METHOD OF AND DEVICE FOR DETECTING CABLE CONNECTION - The detector includes a plug for connecting a personal computer through a cable, a battery power supply which provides a constant power supply, and an MCU which receives a specific potential from the personal computer when the latter is connected. | 2011-03-03 |
| 20110055616 | Memory module - A memory buffer mounted on a memory module includes a pre-launch function of advancing outputs of address/command signal and a post-launch function of delaying outputs of control signal. A time step increment for pre/post-launch time adjustment is set to be equal to or finer than tCK/32 where tCK is one clock cycle. | 2011-03-03 |
| 20110055617 | Hybrid Single and Dual Channel DDR Interface Scheme by Interleaving Address/Control Signals During Dual Channel Operation - A memory structure is described. In one embodiment, the memory structure comprises a memory controller configured to receive a clock signal and to be coupled to a plurality of memory modules via a single address/control bus. The memory controller couples to each of the plurality of memory modules via a separate chip select signal for each memory module. The memory controller issues commands across the address/control bus to the memory modules in an interleaved fashion in accordance with the timing supplied by the clock. During a waiting period after issuance of a command to one memory module, the memory controller can issue commands to a different memory module. | 2011-03-03 |
| 20110055618 | MEMORY CONTROLLING METHOD - A memory controlling method adapted for driving a memory within a computer system is disclosed. When the computer system is booted, the memory is driven and tested via the BIOS. The memory controlling method performs tests on multiple controlling signals of the memory. The memory controlling method includes steps of: detecting an active window of each controlling signal; determining whether the active windows is larger than a predetermined window; performing a parameter adjustment on the controlling signals if one of the active windows is smaller than the predetermined window; performing a phase range test between two of the control signals if the active windows are larger than the predetermined window; performing a phase adjustment on the active windows of the controlling signals if the controlling signals fails in the phase range test; and driving the memory according to the adjusted controlling signals. | 2011-03-03 |
| 20110055619 | SYNCHRONIZING PROBLEM RESOLUTION TASK STATUS USING AWARENESS OF CURRENT STATE AND TRANSACTION HISTORY - Systems, methods and articles of manufacture are disclosed for synchronizing a transaction profile with a resolution status of a problem experienced by an application. The problem may be detected for the application. A transaction profile may be retrieved for the detected problem. The transaction profile may include a sequence of transactions to be performed on the system to remedy the open problem. Transactions occurring on the system may be monitored, and an instance of the transaction profile may be updated accordingly to create a synchronized transaction profile. | 2011-03-03 |
| 20110055620 | Identifying and Predicting Errors and Root Causes in a Data Processing Operation - Methods and systems for automated quality management and/or monitoring of a data processing operation, including identifying root causes for errors, identifying which errors are likely to have root causes, predicting errors, and predicting increases in errors. | 2011-03-03 |
| 20110055621 | DATA REPLICATION BASED ON CAPACITY OPTIMIZATION - A system and associated method for replicating data based on capacity optimization. A local node receives the data associated with a key. The local node within a local domain communicates with nodes of remote domains in a system through a communication network. Each domain has its own distributed hash table that partitions key space and assigns a certain key range to an owner node within the domain. For new data, the local node queries owner nodes of domains in the system progressively from the local domain to remote domains for a duplicate of the new data. Depending on a result returned by owner nodes and factors for replication strategies, the local node determines a replication strategy and records the new data in the local node pursuant to the replication strategy. | 2011-03-03 |
| 20110055622 | NETWORK SYSTEM AND NETWORK RELAY APPARATUS - The network system is provided. The network system includes: a first processing apparatus configured to provide a specific service; a second processing apparatus configured to provide the specific service, the first processing apparatus and the second processing apparatus having one identical address; a client apparatus configured to utilize the specific service; and a network relay apparatus connected directly or indirectly via interfaces to the first processing apparatus, the second processing apparatus, and the client apparatus and configured to relay packet transmission between the client apparatus and the first processing apparatus or the second processing apparatus, wherein the network relay apparatus forwards a received packet, which is received via the interface connecting with the client apparatus to be sent to the address as a destination, to one processing apparatus in a state enabled to provide the specific service between the first processing apparatus and the second processing apparatus. | 2011-03-03 |
| 20110055623 | SOLID STATE STORAGE SYSTEM WITH IMPROVED DATA MERGING EFFICIENCY AND CONTROL METHOD THEREOF - The presented solid state storage system provides an efficient manner of processing read and write operations in a memory block that has a faulty page of memory within it. The solid state storage system includes a flash memory area and a memory controller. The memory controller stores link information into a buffer, allocates a first temporary physical block to resume operations of the bad block past the first bad page, updates and stores mapping information associated with the remaining portions of the bad block past the first bad page, and merges together those valid pages from among the bad block into a final physical block by merging together all prior successfully operated valid pages from among the bad block with any subsequently successfully operated valid pages which are associated with successful operations subsequently to the failure in the first bad page of the bad block. | 2011-03-03 |
| 20110055624 | METHOD FOR IMPLEMENTING CONTINUOUS DATA PROTECTION UTILIZING ALLOCATE-ON-WRITE SNAPSHOTS - The present disclosure is directed to a method for providing continuous data protection for a virtual volume (VV). The method may comprise conceptually dividing the VV into a plurality of same sized chunks; preserving contents of the VV at a specified time; creating a Point in Time (PiT) instance for the VV at the specified time, comprising: a PiT Temporary Virtual Volume (PTVV) for storing modifications to the VV subsequent to the specified time, wherein data stored in the PTVV is prohibited from been overwritten; a re-allocation table for providing read access to a most recent version of each of the plurality of chunks of the VV; and a Continuous Data Protection (CDP) log for providing read access to a historic version of a chunk stored in the PTVV; and updating the PiT instance when a chunk of the plurality of chunks of the VV is being modified. | 2011-03-03 |
| 20110055625 | NONVOLATILE MEMORY DEVICE AND MEMORY CONTROLLER - The memory controller writes and reads data in and from a nonvolatile memory. The nonvolatile memory has a plurality of memory cell blocks, each memory cell block includes a plurality of multi-level cells each capable of storing m-bit data (m is a natural number of two or more), a first page to a m-th page are allocated to the respective m bits of the multi-level cell, the memory controller sequentially writes the data to the memory cells from the first page in ascending order, and comprises a backup unit, and when a write command is received from the outside of the memory controller, in a case where a data write destination of the data in the nonvolatile memory is a n-th (n is a natural number of two to m) page of the multi-level cell, and data is already written in the first to (n-1)th pages, the backup unit copies the already written data to a nonvolatile storable backup region. | 2011-03-03 |
| 20110055626 | SYSTEMS AND METHODS FOR RECOVERING INFORMATION FROM NAND GATES ARRAY MEMORY SYSTEMS - A method is disclosed for recovering data associated with a damaged file stored in a NAND gate array memory. The method includes the steps of: identifying all meta data associated with the damaged file; identifying each logical block address of all identified meta data; collecting all physical block addresses associated with one of the identified logical block addresses or the identified meta data; counting in a replace table (ReplTable) a number of matches to a physical block address of the damaged file for each physical block address of the damaged file; choosing a block in a linked list that corresponds to the physical block address of the block in the linked list; and linking all chosen blocks to form a replicated file. | 2011-03-03 |
| 20110055627 | Seamless Application Session Reconstruction Between Devices - A first device captures session data for each application session that is executing on a first device, and provides the session data to a second device in order for the second device to reconstruct the application sessions. A first device identifies one or more application sessions currently executing on the first device. Each of the application sessions include a media object and session data, which includes a media object identifier that corresponds to the media object and a first device media session position. The first device captures the session data transmits the captured session data to one or more second devices. The second devices are adapted to reconstruct at least one of the application sessions using the received session data and positions the application sessions at a second device media session position that corresponds to the received first device media session position. | 2011-03-03 |
| 20110055628 | Method for Determining a State Associated with a Transaction - A computer implemented method, apparatus, and computer program product for determining a state associated with a transaction for use with a transactional processing system comprising a transaction coordinator and a plurality of grouped and inter-connected resource managers, the method comprising the steps of: in response to a communications failure between the transaction coordinator and a first resource manager causing a transaction to have an in doubt state, connecting to a second resource manager; in response to the connecting step, sending by the transaction coordinator to the second resource manager, a query requesting data associated with the in doubt transaction; obtaining at the first resource manager, by the second resource manager, a shared lock to data associated with the in doubt transaction; and in response to the obtaining step, collating, by the second resource manager, data associated with the in doubt transaction associated with the first resource manager. | 2011-03-03 |
| 20110055629 | COMPUTER SYSTEM, CONTROL METHOD THEREOF AND RECORDING MEDIUM STORING COMPUTER PROGRAM THEREOF - A computer system, a control method thereof and a recording medium storing a computer program thereof are provided to recover a program efficiently and be resistant to viruses, worms, and user error. The control method of computer system receives a user's request for a recovery of a program which is installed in a first storage unit. A file system of a second storage unit is determined which stores therein a recovery program corresponding to the program for which the recovery is requested. The recovery program is read from the second storage unit with reference to the determined file system, and the program in the first storage unit is recovered by using the read recovery program. | 2011-03-03 |
| 20110055630 | Safely Rolling Back Transactions In A Transactional Memory System With Concurrent Readers - A technique for safely rolling back transactional memory transactions without impacting concurrent readers of the uncommitted transaction data. An updater uses a transactional memory technique to perform an data update on data that is shared with a reader. The update is implemented as a transaction in which the updated data is initially uncommitted due to the transaction being subject to roll back. The reader is allowed to perform a data read on the uncommitted data during the transaction. Upon a rollback of the transaction, reclamation of memory locations used by the uncommitted data is deferred until a grace period has elapsed after which the reader can no longer be referencing the uncommitted data. | 2011-03-03 |
| 20110055631 | PLUGGABLE ERROR DETECTION BOARD AND MOTHERBOARD ERROR DETECTION SYSTEM CONTAINING THE SAME - A motherboard error detection system includes a pluggable error detection board and a motherboard having a boot management chip. When the motherboard enters a device-driven status from a standby status, the boot management chip is used to manage power-on timings of different voltage sources; to collect a plurality of sets of status information; and to check whether the sets of status information and the power-on timings have errors. The pluggable error detection board includes an interpreting unit, a message-reading interface and a connector which is pluggably disposed on the motherboard. When the boot management chip notifies the pluggable error detection board to read an error message, the interpreting unit converts the error message to human-readable information, and the human-readable information is outputted through the message-reading interface. | 2011-03-03 |
| 20110055632 | Wireless Diagnostic System - Results of field testing of portions of a distributed system such as a Broadband Communications System from a testing device to a controller which downloads programmed test protocols and sequences thereof to the separate testing device over a wired or wireless link and thereafter can be used to control the testing device as well as display test results and provide analysis of the test results and suggest procedures to technical personnel. The controller then can transmit the test data to a central facility or distribution hub in substantially real-time together with work performance data where full technical analysis can be performed. The test data and results of analysis can then be distributed as desired such as to a management analysis facility to support improvement of efficiency of the system and the operation thereof. | 2011-03-03 |
| 20110055633 | Declarative Test Execution - A test controller interprets declarative test instructions into imperative test tasks and runs the tests using the imperative test tasks. Declarative test instructions indicate what tests are to be run and the imperative test tasks indicate how these tests are to be run. In addition, the imperative test tasks further indicate a control flow of the running of the tests. | 2011-03-03 |
| 20110055634 | SYSTEM AND METHOD FOR TESTING A COMPUTER - A system and method for testing a computer divide test programs in a test file into hardware test programs and software test programs. A test server selects one or more test programs from the divided test file according to test parameters of the computer. The test server generates a test command for testing test items of the computer. The computer executes the test command. The test server analyzes test results and stores analyzed results into a predefined storage path. | 2011-03-03 |
| 20110055635 | Declarative Test Result Validation - A test controller translates test rules into executable code and validates the test results using the executable code. The test controller translates the test rules using a test grammar. The test rules are used to indicate expected test results of a device under test. The test controller further generates the test results by executing test instructions. In addition, the test controller uses the test grammar to validate the test rules. | 2011-03-03 |
| 20110055636 | SYSTEMS AND METHODS FOR TESTING RESULTS OF CONFIGURATION MANAGEMENT ACTIVITY - Embodiments relate to systems and methods for testing results of configuration management activity. In embodiments, a configuration management server can control and maintain the configuration state of one or more targets, hosts, servers, clients, or other machines in a managed. In aspects, a testing tool hosted on the configuration management server can verify the correct implementation of configuration instructions. In embodiments, the testing tool can access or receive an anticipated or target configuration state for one or more target(s) or other machines, indicating the status of services, memory, security, storage, and/or other configuration parameters after a selected configuration command is to be transmitted and run on the recipient machine. After the configuration change or update is performed, the test tool can receive results indicating the actual configuration state achieved after running the configuration management command(s), and compare those to the anticipated configuration state. Any discrepancies can be flagged, and corrective commands can be issued. | 2011-03-03 |
| 20110055637 | ADAPTIVELY COLLECTING NETWORK EVENT FORENSIC DATA - In an embodiment, a data processing system comprises a repository configured to store a plurality of event message definitions for error messages, syslog messages, or other notification messages that may be emitted by one or more managed network elements; event annotation logic coupled to the data repository and configured to receive and store one or more annotations to each of the event message definitions, wherein each of the annotations specifies event context information to be collected in the managed network elements when an associated event message occurs; event forensics definitions generator logic coupled to the event annotation logic and configured to generate an event forensics definitions file capable of interpretation by one or more managed network elements and comprising event type identifiers and context information identifiers for context information to be collected, and configured to cause distributing the event forensics definitions file to the one or more managed network elements. | 2011-03-03 |
| 20110055638 | SYSTEM AND METHOD FOR ANNOTATION DRIVEN INTEGRITY VERIFICATION - Disclosed herein are methods, systems, and computer-readable storage media for annotation driven integrity program verification. The method includes distributing verification calls configured to verify a function across call paths leading to the function in source code, generating a binary from the source code having placeholders associated with the verification calls, and filling each placeholder in the binary with verification data or reference checksums. Alternatively, the method includes receiving source code having a verification call, replacing the verification call with one or more equivalent verification calls distributed over a call path, replacing each verification call with a checksum function generating placeholders while compiling, generating a binary based on the placeholders, and filling each placeholder in the binary with reference checksums. The system includes a processor and a module controlling the processor to perform the methods. The computer-readable storage medium includes instructions for controlling a computer to perform the methods. | 2011-03-03 |
| 20110055639 | KEYBOARD INPUT METHOD AND ASSISTANT SYSTEM THEREOF - A keyboard input method and an assistant system thereof are provided. In the present method, first, an assistant on-screen keyboard program is launched and an input signal is received. Then, if it is determined that the input signal represents an input character, whether the input character leads to an input error is determined according to an input method of an electronic device. If the input character leads to the input error, a keyboard position of the key corresponding to the input character is obtained, and a partial area of an assistant on-screen keyboard is displayed according to the position, wherein the partial area includes the key corresponding to the input character. | 2011-03-03 |
| 20110055640 | METHOD AND SYSTEM FOR EXCEPTION DETECTING AND ALERTING - Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided. | 2011-03-03 |
| 20110055641 | DATA CORRUPTION DETECTION - In general, this disclosure relates to various techniques for detecting corrupt bits in a data stream. The techniques may allow a data storage device to detect corrupt bits prior to transformation of the data stream and subsequent to transformation of the data stream. A data storage device may include a first error-related code generating unit configured to generate a first error-related code based on received data and combine the first error-related code and the received data to generate a first data stream. The data storage device may further include a transform unit configured to transform the first data stream to a transformed data stream. The data storage device may also include a second error-related code generating unit configured to generate a second error-related code based on the transformed data stream. | 2011-03-03 |
| 20110055642 | ARTICLE INFORMATION MANAGEMENT APPARATUS AND ARTICLE INFORMATION MANAGEMENT METHOD - A storage unit which stores table data defining information about each article sold in a store, a receiving unit which receives update data for the table data sent from an external device at a predetermined transmission time, a determination unit which determines whether the update data is received by the receiving unit or not during a lapse of a predetermined time from the transmission time, and a notification unit which notifies that the update data fails to arrive, when the determination unit determines that the update data is not received, are provided. | 2011-03-03 |
| 20110055643 | RECEIVER POWER SAVING VIA BLOCK CODE FAILURE DETECTION - A communication system includes a receiver configured to receive a packet that contains plural codewords, and a codeword failure detector cooperatively operable with the receiver. The codeword failure detector can be configured to detect a codeword failure in at least one codeword of the plural codewords as it is being received by the receiver, and to terminate reception at the receiver, when the codeword failure is detected before the end of the packet, to put the receiver into a power save mode for a duration of a remainder of the packet that contains the at least one codeword. | 2011-03-03 |
| 20110055644 | CENTRALIZED MBIST FAILURE INFORMATION - Failure and repair information collected during self-testing of arrays in an integrated circuit is stored in a centralized array in the integrated circuit. In that way, a centralized array can be read out to provide failure and repair information on the arrays in the integrated circuit rather than having to read from each array. In addition, the failure and repair information may also be stored in the array under test for certain of the arrays. | 2011-03-03 |
| 20110055645 | SEMICONDUCTOR TEST METHOD, SEMICONDUCTOR TEST APPARATUS, AND COMPUTER READABLE MEDIUM - A semiconductor test apparatus includes an inputting module, a monitor, a converter, a storage, and a tester. The inputting module inputs addresses for first test, in which the addresses of a plurality of semiconductor memories are arrayed in an arbitrary order. The monitor monitors test time of the first test on each semiconductor memory. The converter sorts the addresses of the semiconductor memories based on the test time in order to convert the address for the first test to addresses for a second test. The storage stores the addresses for the second test. The tester tests each semiconductor device based on the addresses for the second test stored in the storage. | 2011-03-03 |
| 20110055646 | FAULT DIAGNOSIS IN A MEMORY BIST ENVIRONMENT - Disclosed are methods and devices for temporally compacting test response signatures of failed memory tests in a memory built-in self-test environment, to provide the ability to carry on memory built-in self-test operations even with the detection of multiple time related memory test failures. In some implementations of the invention, the compacted test response signatures are provided to an automated test equipment device along with memory location information. According to various implementations of the invention, an integrated circuit with embedded memory ( | 2011-03-03 |
| 20110055647 | PROCESSOR - A processor has an ALU, a load/store unit, a timer, an ECC calculator, and a plurality of ECC registers. When the load/store unit writes data in a main memory, the load/store unit writes written data and a count value of a timer in the main memory, and sets ECC status flag which indicates that an ECC about the written data is not correct in the main memory, and causes the ECC calculator to calculate the ECC about the written data after setting the ECC status flag, and writes the calculated ECC in the main memory and resets the ECC status flag after the ECC is calculated. | 2011-03-03 |
| 20110055648 | SYSTEM AND A METHOD FOR TESTING CONNECTIVITY BETWEEN A FIRST DEVICE AND A SECOND DEVICE - A device and a method for testing a connectivity between a first device and a second device, the method includes: writing, at a first frequency and in a serial manner, a first test word to a source boundary scan register; writing a content of the source boundary scan register, at a second frequency and in a parallel manner, to a target boundary scan register; wherein the second frequency is higher than the first frequency; reading the content of the target boundary scan register; wherein the source and target boundary scan registers are selected from a first boundary scan register of the first device and a second boundary scan register of the second device; and evaluating a connectivity between the first and second device in response to a relationship between the first test word and the content of the target boundary scan register. | 2011-03-03 |
| 20110055649 | TESTING SECURITY OF MAPPING FUNCTIONS - Methods, apparatuses and articles for testing security of a mapping function—such as a Physically Unclonable Function (PUF)—of an integrated circuit (IC) are disclosed. In various embodiments, one or more tests may be performed. In various embodiments, the tests may include a predictability test, a collision test, a sensitivity test, a reverse-engineering test and an emulation test. In various embodiments, a test may determine a metric to indicate a level of security or vulnerability. In various embodiments, a test may include characterizing one or more delay elements and/or path segments of the mapping function. Other embodiments may be described and claimed. | 2011-03-03 |
| 20110055650 | Hold Transition Fault Model and Test Generation Method - A method of hold fault modeling and test generation. The method includes first modeling a fast-to-rise and a fast-to-fall hold fault for a plurality of circuit nets. Testing a fast-to-rise hold fault is accomplished by: setting up a logic value on each of the plurality of circuit nodes to 0; transitioning each of the plurality of circuit nodes from 0 to 1 with a single clock pulse; and determining if at least one downstream node was inadvertently impacted by the transitioning from 0 to 1. Testing a fast-to-fall hold is accomplished by: setting up a logic value on each of the plurality circuit nodes to 1; transitioning each of the plurality of circuit nodes from 1 to 0 with a single clock pulse; and determining if at least one downstream node was inadvertently impacted by the transitioning from 1 to 0. | 2011-03-03 |
| 20110055651 | High-speed serial transfer device test method, program, and device - A test pattern generating unit generates a test pattern in which unconverted data is arranged such that same values of 0 or 1 bits in converted data according to a code conversion table are successively transferred to each of a plurality of serial transfer channels that a high-speed serial transfer device has. A basic pattern setting unit sets a basic pattern while considering a byte order method and an RD value of code conversion in the high-speed serial transfer device. A basic pattern resetting unit resets the basic pattern in accordance with a channel usage method of a bit transfer order in the high-speed serial transfer device. A basic pattern rearranging unit performs rearrangement such that the basic pattern is transferred to each of the channels in accordance with the number of used channels and a channel usage method such as bit transfer order in the high-speed serial transfer device. | 2011-03-03 |
| 20110055652 | METHOD FOR CONDUCTING HARQ WITH A WIRELESS COMMUNICATIONS SYSTEM - Provided is a method of performing hybrid automatic repeat request (HARQ) of a receiver in a wireless communication system. The method includes: receiving data in a transmission time interval (TTI) unit consisting of a plurality of consecutive subframes; and transmitting acknowledgment (ACK)/non-acknowledgment (NACK) for the received data, wherein the data is received using a plurality of redundancy versions respectively allocated to the plurality of subframes, and the ACK/NACK is transmitted with an interval of a predetermined processing delay from a transmission time of a specific redundancy version among the plurality of redundancy versions. | 2011-03-03 |
| 20110055653 | METHOD AND APPARATUS FOR THE JOINT DESIGN AND OPERATION OF ARQ PROTOCOLS WITH USER SCHEDULING FOR USE WITH MULTIUSER MIMO IN THE DOWNLINK OF WIRELESS SYSTEMS - A method and apparatus is disclosed herein for performing wireless communication. In one embodiment, the apparatus comprises a processing unit to run a scheduling selection algorithm to update user terminal scheduling weights in response to scheduling feedback transmitted by a plurality of user terminals by an end of an immediately preceding scheduling event; a scheduler and precoder, responsive to the updated user terminal scheduling weights generated by the scheduling algorithm and channel estimates of user terminals, to choose a set of user terminals for scheduling and to choose precoder beams and their power for such user terminal in the set of user terminals; a plurality of precoding blocks to receive one coded ARQ block for at least one packet for each user terminal in the set and, responsive to the precoder beams, to generate precoded data, where the one coded ARQ block is one of a plurality of ARQ blocks generated for a single packet and being generated using a single ARQ scheme for such each user terminal; and a transmitter to transmit the precoded data using MIMO transmission. | 2011-03-03 |
| 20110055654 | NAK-TO-ACK ERROR DETECTION AND RECOVERY - According to one embodiment, a system is provided that allows a receiver to determine that an initial error message (such as a NAK message) was not correctly received by a transmitter, and to cause the transmitter to continue transmitting information corresponding to data that has not yet been successfully decoded by the receiver. In accordance with another embodiment, the receiver can generate a message (e.g., a continue previous packet message) to correct the transmitter and initiate full recovery at the physical layer. | 2011-03-03 |
| 20110055655 | Hardware-Efficient Low Density Parity Check Code for Digital Communications - A network element receiving signals from the network over a communications channel via transceiver circuitry. The network element has a host interface for communicating to a host system, decoded signals corresponding signals received from the network. Demodulator circuitry demodulates the signals into a data stream. Circuitry for decoding the data stream according to a sequence of operations is provided. The sequence of operations includes receiving a set of input values corresponding to input nodes of the macro parity check matrix. Estimating a check node value using values of other input nodes contributing to the parity check sum. Evaluating a probability value using the estimates of the check node values for that input node. The The operations are repeated until termination point is reached. | 2011-03-03 |
| 20110055656 | Systems, Methods, and Media for Checking Available Bandwidth Using Forward Error Correction - Methods for checking available bandwidth using forward error correction are provided, the methods comprising: identifying data to be transmitted; determining an amount of forward error correction data to be sent to a receiver; creating the forward error correction data based on corresponding data in the data to be transmitted; transmitting to the receiver the forward error correction data and the corresponding data in the data to be transmitted; determining an error level in at least one of the corresponding data and the forward error correction data; and when the error level is below a value, increasing the amount of bandwidth used in a transmission to the receiver of other data in the data to be transmitted over the amount of bandwidth used in the transmission to the receiver of the corresponding data and decreasing the amount of bandwidth used for forward error correction data in the transmission of the other data. | 2011-03-03 |
| 20110055657 | METHOD AND SYSTEM FOR STOPPING EXECUTION OF A TURBO DECODER - A method for conditionally stopping execution of a turbo decoder is proposed. The decoder has elementary decoders. Each elementary decoder performs a sequence of decoding operations and is arranged to receive an input from at least one other elementary decoder. The method determines for each specific decoding operation if the sequence of elementary decoding operations of the specific elementary decoder has substantially converged or substantially diverged. The method terminates the execution of decoding operations if a number of sequences has substantially converged or substantially diverged. | 2011-03-03 |
| 20110055658 | CONTENT DISTRIBUTION METHOD, ENCODING METHOD, RECEPTION/REPRODUCTION METHOD AND APPARATUS, AND PROGRAM - There are provided a content data transmission method, device, and program that minimize serious disturbances in reproduced content on the reception side, caused by a transmission error of encoded data, without sending feedback information from the reception side to the transmission side. When an encoder | 2011-03-03 |
| 20110055659 | Method and System of Dynamic Data Storage for Error Correction in a Memory Device - A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, and the received data is then encoded and associated error correction code (ECC) is generated. The encoded data is stored in a portion of a data partition of the memory device, wherein percentage of the stored data in the data partition is determined according to an amount of corrected errors associated with the data partition or is predetermined. | 2011-03-03 |
| 20110055660 | High-Reliability Memory - A memory circuit includes a memory including a plurality of primary memory elements, and an error correction circuit coupled to the memory and operative to detect an error in at least one of the primary memory elements and to provide corrected data corresponding to the primary memory element. The memory circuit further includes at least one spare memory element and a control circuit operative to replace at least one of the primary memory elements with the spare memory element as a function of results generated by the error correction circuit. | 2011-03-03 |
| 20110055661 | METHOD AND APPARATUS FOR NESTED DISBURSED STORAGE - A method begins by a DS processing module generating a plurality of encoded slices from a data segment using an error encoding function. The method continues with the DS processing module identifying a plurality of DS storage units for storing the plurality of encoded slices. The method continues with the DS processing module selecting an encoded slice of the plurality of encoded slices for sub-slicing using a sub-slicing encoding function to produce a selected encoded slice. The method continues with the DS processing module outputting the plurality of encoded slices to the plurality of DS storage units. The method continues with the DS processing module outputting a command to a DS storage unit of the plurality of DS storage units corresponding to the selected encoded slice, wherein the command includes an instruction to sub-slice the selected encoded slice. | 2011-03-03 |
| 20110055662 | NESTED DISTRIBUTED STORAGE UNIT AND APPLICATIONS THEREOF - A method for execution by a DS storage unit begins with the DS storage unit receiving an encoded slice of a plurality of encoded slices, wherein the plurality of encoded slices was generated from a data segment using an error encoding function. The method continues with the DS storage unit determining whether the encoded slice is to be sub-sliced using a sub-slicing encoding function. The method continues with the DS storage unit generating a plurality of encoded sub-slices from the encoded slices using the encoded sub-slicing encoding function when the encoded slice is to be sub-sliced. The method continues with the DS storage unit outputting the plurality of encoded sub-slices to a plurality of DS storage units. | 2011-03-03 |
| 20110055663 | Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves - Address generation for contention-free memory mappings of turbo codes with ARP (almost regular permutation) interleaves. A novel means is presented by which anticipatory address generation is employed using an index function | 2011-03-03 |
| 20110055664 | SYSTEMS AND METHODS FOR COMPRESSING DATA IN NON-VOLATILE SEMICONDUCTOR MEMORY DRIVES - A non-volatile semiconductor memory (NVSM) storage system includes a NVSM drive interface configured to receive host data sectors (HDSs) from a host interface. A buffer managing module is configured to store the HDSs in a buffer. A compression module is configured to compress the HDSs to generate compressed HDSs of different lengths. A drive data sector (DDS) generating module is configured to add nuisance data to the compressed HDSs to generate DDSs. The DDSs are stored in NVSM. | 2011-03-03 |
| 20110055665 | DATA MODULATION METHOD, MODULATOR, RECORDING METHOD, AND RECORDING APPARATUS - A data modulation method and a data error correction method are provided. The data modulation method includes generating a channel sequence for an input sequence, determining whether or not the channel sequence violates a Run Length Limit (RLL) constraint, and performing, when the channel sequence violates the RLL constraint, bit flip at a position prior to a position at which the RLL constraint is violated among positions of bits included in the channel sequence. The data error correction method includes detecting an error bit of received data using a parity check matrix, determining whether or not the error bit is an error caused by bit flip, and correcting the error bit when the error bit is an error caused by bit flip for applying an RLL constraint. | 2011-03-03 |
| 20110055666 | RECEIVER FOR ERROR-PROTECTED PACKET-BASED FRAME - In one embodiment, a receiver for a frame of media packets employing the real-time transmission protocol (RTP) and forward error correction (FEC) is disclosed. The receiver comprises a packet buffer and an FEC decoder. After a packet is received by the packet buffer, the FEC decoder reads the packet and, as part of FEC processing, performs an XOR operation on the packet, without waiting for the entire frame (or, indeed, for any subsequent packet of the frame) to be received. The XOR operation results are accumulated until sufficient packets are received to reconstruct a missing packet in the frame. Because the XOR operations are performed immediately after a packet is received, without any delay from waiting for subsequent packets, the receiver has a very low latency, and the packet buffer may be relatively small. | 2011-03-03 |
| 20110055667 | EFFICIENT SOFT VALUE GENERATION FOR CODED BITS IN A TURBO DECODER - Techniques for generating soft values for parity bits in a convolutional decoding process are disclosed. An exemplary method comprises, for each of at least one iteration in at least one soft-input soft-output decoder, calculating intermediate probability values for each possible transition between a first plurality of candidate decoder states at a first time and a second plurality of candidate decoder states at a second time. Two or more partial sums are then computed from the intermediate probability values, wherein the partial sums correspond to possible combinations of two or more systematic bits, two or more parity bits, or at least one systematic bit and at least one parity bit. Soft values, such as log-likelihood values, are then estimated for each of at least one systematic bit and at least one parity bit of the received communications data corresponding to the interval between the first and second times, based on the partial sums. | 2011-03-03 |
| 20110055668 | METHOD, DEVICE, AND DIGITAL CIRCUITY FOR PROVIDING A CLOSED-FORM SOLUTION TO A SCALED ERROR LOCATOR POLYNOMIAL USED IN BCH DECODING - A method of determining positions of one or more error bits is disclosed. The method includes receiving a BCH codeword at input circuitry of a decoder device, establishing a threshold number of correctable bits, and determining from the received BCH codeword and a root of an encoder polynomial, a value of each of one or more syndromes. The number of the one or more syndromes is twice a maximum number of correctable bits in the received BCH codeword. When the maximum number of correctable bits in the received BCH codeword is less than the threshold number of correctable bits, the value of each coefficient in a scaled error locator polynomial is determined by performing a non-iterative, closed-form solution on the scaled error locator polynomial. The scaled error locator polynomial is an original error locator polynomial scaled by a constant scale factor. The constant scale factor is determined according to the value of each of the one or more syndromes. Having determined the value of each coefficient in the scaled error locator polynomial, one or more roots of the scaled error locator polynomial are obtained. Each of the one or more roots indicates a position of an error bit. A BCH decoder device that can implement the method and a digital circuit that preserves operations implementing the method are also disclosed. | 2011-03-03 |
| 20110055669 | SYSTEMS AND METHODS FOR DETECTING MACHINE FAULTS IN NETWORK USING ACOUSTIC MONITORING - Embodiments relate systems and methods for detecting machine faults in a network using acoustic monitoring. In embodiments, one or more servers, clients, or other machines in a managed network can have a microphone or other acoustic sensor integrated into motherboard or other hardware. The sensor can sample acoustic signals from inside or near the machine, and can digitize that data. The resulting set of acoustic data can be transmitted to a management server or other destination for analysis of the operating sounds related to that machine. For instance, the acoustic data can be analyzed to detect indications of a failed or failing hard drive, for instance by detecting spindle whine or head movement noises, or a failed or failing power supply based on other sounds. The management server can respond to potential fault events for instance by issuing configuration commands, such as instructions to power down the malfunctioning component. | 2011-03-03 |
| 20110055670 | Programming Method and Memory Device Using the Same - A programming method applied to a memory is provided. The memory includes a number of memory cells. The method includes the following steps. A target cell of the memory cells is programmed in response to a first programming command. The target cell is programmed in response to a second programming command. | 2011-03-03 |
| 20110055671 | ADVANCED MEMORY DEVICE HAVING IMPROVED PERFORMANCE, REDUCED POWER AND INCREASED RELIABILITY - An advanced memory having improved performance, reduced power and increased reliability. A memory device includes a memory array, a receiver for receiving a command and associated data, error control coding circuitry for performing error control checking on the received command, and data masking circuitry for preventing the associated data from being written to the memory array in response to the error control coding circuitry detecting an error in the received command. Another memory device includes a programmable preamble. Another memory device includes a fast exit self-refresh mode. Another memory device includes auto refresh function that is controlled by the characteristic device. Another memory device includes an auto refresh function that is controlled by a characteristic of the memory device. | 2011-03-03 |
| 20110055672 | METHOD OF CERTIFYING MULTIPLE VERSIONS OF AN APPLICATION - A first check code is computed by applying an algorithm to a proper subset of a first body of data. A second check code is computed by applying the algorithm to an equivalent proper subset of a second equivalent body of data. The two check codes are compared. The extent of the proper subset of the first body of data is determined by a semantic analysis of the first body of data. Multiple versions of an application, when the semantic changes between the applications are inconsequential, may then be certified by ignoring the non-significant modifications and ensuring the integrity of the remainder of the content. | 2011-03-03 |
| 20110055673 | DOMAIN BASED WORKFLOWS - Technology is disclosed for using workflows based on domains in a hierarchical data structure (e.g. LDAP directory) or other type of data structure. When a workflow is created, it is associated with domain. The domain is defined by a selected node and all nodes below that selected node in the hierarchical data structure. At run time, the system identifies which workflows perform a requested task and are associated with a domain that includes the target of the task. If multiple workflows are determined, the user is provided with the ability to choose one of the identified workflows for performing the tasks. | 2011-03-03 |
| 20110055674 | METHOD FOR EXPRESSING EMOTION IN A TEXT MESSAGE - In one embodiment of the present invention, while composing a textual message, a portion of the textual message is dynamically indicated as having heightened emotional value. In one embodiment, this is indicated by depressing a key on a keyboard for a period longer than a typical debounce interval. While the key remains depressed, a plurality of text parameters for the character associated with the depressed key are accessed and one of the text parameters is chosen. Animation processing is then performed upon the textual message and the indicated portion of the textual message is visually emphasized in the animated text message. | 2011-03-03 |
| 20110055675 | METHOD FOR EXPRESSING EMOTION IN A TEXT MESSAGE - In one embodiment of the present invention, while composing a textual message, a portion of the textual message is dynamically indicated as having heightened emotional value. In one embodiment, this is indicated by depressing a key on a keyboard for a period longer than a typical debounce interval. While the key remains depressed, a plurality of text parameters for the character associated with the depressed key are accessed and one of the text parameters is chosen. Animation processing is then performed upon the textual message and the indicated portion of the textual message is visually emphasized in the animated text message. | 2011-03-03 |
| 20110055676 | Interactive user interface by embedding a document into a standardized object container - A user interface is provided for a computer application program having a document and one or more interactive tools associated with the document. The document and associated tools are embedded into a standardized object container. The standardized object container is embedded into a computer display program capable of displaying instances of the standardized object container. Interactions between the tools and the document are processed by the computer application program. The application program and display program collaborate to handle user interface events according to a protocol determined by the standardized object container. A first advantage of this approach is that the tools do not need to have separate versions developed for each display file type of interest. A second advantage of this approach is that interactions between the tools and the document are handled by the computer application program, which provides enhanced flexibility and capability. | 2011-03-03 |
| 20110055677 | SYSTEMS AND METHODS FOR ASSOCIATING AND ORGANIZING DIGITAL FILES - Systems and methods for associating digital files into a data project are described. The systems and methods may create a template for a data project. A user may provide inputs for the template. The inputs may define a user-structured data hierarchy, where the user-structured data hierarchy includes a plurality of levels and sub-levels of information. The user may then provide links to one or more digital files associated with each level of the user-structured data hierarchy. The one or more digital files are then associated with corresponding levels of the user-structured data hierarchy. The user-structured data hierarchy and the one or more digital files may be compiled into a data project before being accessed by a user. | 2011-03-03 |
| 20110055678 | MULTIMEDIA SYSTEM FOR MOBILE DEVICES - A system for use in conjunction with a mobile device. The system includes a pre-processor configured to receive input data from a plurality of multimedia sources, generate Extensible Markup Language output links relating to the input data, and generate outputs comprising at least one of images, thumbnails, and rich media. The outputs are assembled into a mobile device application. | 2011-03-03 |
| 20110055679 | DOCUMENT LINK CONVERTING SERVER, DOCUMENT LINK CONVERTING SYSTEM AND DOCUMENT LINK CONVERTING METHOD - In order to enable a mobile terminal where software necessary to open a document file is not installed to display a document linked from a markup document such as an HTML document, a document link converting system converts an HTML of a web page requested by a mobile terminal in accordance with a terminal type of the mobile terminal which requests an access to the web page, and sends the converted HTML to the mobile terminal. When a document is specified by the mobile terminal, the document link converting system sends an application for browsing the document to the mobile terminal, creates an image for browsing the specified document, and sends the created image to the mobile terminal. The mobile terminal displays the image for browsing with using the received application for browsing the document. | 2011-03-03 |
| 20110055680 | SYSTEMS AND METHODS FOR GENERATING A SET OF LINKED ROTATIONAL VIEWS OF MODEL OBJECTS - Embodiments relate to systems and methods for generating a set of linked rotational views of a model object. A modeling client can host modeling logic and an application programming interface (API) to create, access, manipulate, and import/export modeling objects used in modeling applications, such as engineering, medical, financial, and other modeling platforms. The source data accepted into the modeling client can include consumer or business-level applications, whose spreadsheet, database or other content can be extracted and encapsulated in object-oriented format, such as extensible markup language (XML) format. A set of layers of the model objects can be associated via a set of linkages. A rotator widget or other interface object can be presented to allow a user to traverse the linkages and rapidly rotate through layers in a view, without having to switch tabs, planes, database dimensions, or manually operate other dimensional control, enhancing viewing efficiency of large layers. | 2011-03-03 |
| 20110055681 | PARSER, CODE GENERATOR, AND DATA CALCULATION AND TRANSFORMATION ENGINE FOR SPREADSHEET CALCULATIONS - A system including spreadsheet sheets, makes calculations and data transformations, which is available through a programming interface, and conforms to the grammar and syntax of a target software development language is presented. The system includes an Object Model with Data Structures representing entities involved in spreadsheets. The system includes a Parser and Code Generator that extracts data from a body of spreadsheet data, instantiates instances of Data Structures of the Object Model to represent the spreadsheet data, parses the data and formulas contained in the cells of the spreadsheets, iterates through the instantiated instances of the Data Structures, and generates source code that performs the calculations and data transformations embodied in the spreadsheet data. The system includes a Calculation Engine with software base classes that implement the common structural and data access features of spreadsheet data, and further implement the operations of common spreadsheet functions and operators. | 2011-03-03 |
| 20110055682 | CREATING, UPDATING, SAVING, AND PROPAGATING CUSTOMIZED VIEWS OF TABLE AND GRID INFORMATION - Systems, methods, and computer products that create, update, save, and propagate customized views of table and grid information, including spreadsheets. The embodiment of the invention comprises associating at least one column as a first view of the table, associating at least one column as a second view of the table; and combining the first view with the second view, thereby efficiently creating a third view. Further, the combining includes dragging the second view; and dropping the dragged second view into the first view. The combining also includes creating a thumbnail image representing the first view or the second view. It also comprises updating columns that are shared between views. Additionally, the views may be stored, and new views may be propagated from the stored views. | 2011-03-03 |
| 20110055683 | PAGE CACHING FOR RENDERING DYNAMIC WEB PAGES - In one embodiment, a method includes, in response to a determination that one or more resources related to a requested target structured document are stored in a cache: accessing, by a first executable code segment embedded in a rendered structured document and executing within the context of a first client application, one or more resources related to the target structured document in the cache; calling, by the first executable code segment, one or more handler functions associated with corresponding resources of the target structured document, each handler function operative to transmit requests to a remote server for updates to a respective resource; and rendering, by the first executable code segment, content rendered by the first client application based at least in part on the one or more accessed resources in the cache and the updates retrieved by the one or more handler functions. | 2011-03-03 |
