08th week of 2017 patent applcation highlights part 49 |
Patent application number | Title | Published |
20170053845 | REDUCING DIRECTIONAL STRESS IN AN ORTHOTROPIC ENCAPSULATION MEMBER OF AN ELECTRONIC PACKAGE | 2017-02-23 |
20170053846 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053847 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053848 | SENSING MODULE AND METHOD FOR FORMING THE SAME | 2017-02-23 |
20170053849 | Thermal Dissipation Through Seal Rings in 3DIC Structure | 2017-02-23 |
20170053850 | PRINTED WIRING BOARD ASSEMBLY, ELECTRICAL DEVICE, AND METHOD FOR ASSEMBLING PRINTED WIRING BOARD ASSEMBLY | 2017-02-23 |
20170053851 | HIGHLY ORIENTED GRAPHITE | 2017-02-23 |
20170053852 | POWER-MODULE SUBSTRATE UNIT AND POWER MODULE | 2017-02-23 |
20170053853 | HEAT SPREADER WITH FLEXIBLE TOLERANCE MECHANISM | 2017-02-23 |
20170053854 | Packaged Device with Additive Substrate Surface Modification | 2017-02-23 |
20170053855 | ELECTRONIC DEVICE AND METHOD OF MAKING SAME | 2017-02-23 |
20170053856 | SEMICONDUCTOR DIE ATTACHMENT WITH EMBEDDED STUD BUMPS IN ATTACHMENT MATERIAL | 2017-02-23 |
20170053857 | LOW CTE INTERPOSER | 2017-02-23 |
20170053858 | SUBSTRATE ON SUBSTRATE PACKAGE | 2017-02-23 |
20170053859 | ELECTRONIC PACKAGE AND FABRICATION METHOD THEREOF | 2017-02-23 |
20170053860 | HIGH-FREQUENCY, HIGH-OUTPUT DEVICE UNIT | 2017-02-23 |
20170053861 | POWER SEMICONDUCTOR MODULE AND POWER UNIT | 2017-02-23 |
20170053862 | THREE-DIMENSIONAL INTEGRATED CIRCUIT SYSTEMS IN A PACKAGE AND METHODS THEREFOR | 2017-02-23 |
20170053863 | Structure and Method for Interconnection | 2017-02-23 |
20170053864 | Method of Forming Metal Interconnection | 2017-02-23 |
20170053865 | INTERCONNECT STRUCTURE WITH TWIN BOUNDARIES AND METHOD FOR FORMING THE SAME | 2017-02-23 |
20170053866 | VIA STRUCTURE FOR OPTIMIZING SIGNAL POROSITY | 2017-02-23 |
20170053867 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-02-23 |
20170053868 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME | 2017-02-23 |
20170053869 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2017-02-23 |
20170053870 | Interconnection Structure and Methods of Fabrication the Same | 2017-02-23 |
20170053871 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2017-02-23 |
20170053872 | Integrated Circuit Devices Having Through-Silicon Via Structures and Methods of Manufacturing the Same | 2017-02-23 |
20170053873 | Flexible integrated circuit devices and methods for manufacturing the same | 2017-02-23 |
20170053874 | Electronic Assembly Comprising a Carrier Structure Made From a Printed Circuit Board | 2017-02-23 |
20170053875 | ELECTRO-MIGRATION BARRIER FOR CU INTERCONNECT | 2017-02-23 |
20170053876 | TRENCH LINER FOR REMOVING IMPURITIES IN A NON-COPPER TRENCH | 2017-02-23 |
20170053877 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053878 | PRINTED WIRING BOARD AND SEMICONDUCTOR PACKAGE | 2017-02-23 |
20170053879 | METHOD, A SEMICONDUCTOR DEVICE AND A LAYER ARRANGEMENT | 2017-02-23 |
20170053880 | SEMICONDUCTOR APPARATUS, METHOD FOR MANUFACTURING THE SAME, ELECTRONIC DEVICE, AND MOVING BODY | 2017-02-23 |
20170053881 | BONDING PADS WITH THERMAL PATHWAYS | 2017-02-23 |
20170053882 | ELECTRONIC DEVICE HAVING A REDISTRIBUTION AREA | 2017-02-23 |
20170053883 | INTEGRATED CIRCUIT PACKAGE | 2017-02-23 |
20170053884 | STRUCTURE AND LAYOUT OF BALL GRID ARRAY PACKAGES | 2017-02-23 |
20170053885 | Protrusion Bump Pads for Bond-on-Trace Processing | 2017-02-23 |
20170053886 | TALL AND FINE PITCH INTERCONNECTS | 2017-02-23 |
20170053887 | HIGH DENSITY SUBSTRATE ROUTING IN BBUL PACKAGE | 2017-02-23 |
20170053888 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053889 | BONDING DEVICE | 2017-02-23 |
20170053890 | ELECTROSTATIC DISCHARGE PROTECTION APPARATUS AND PROCESS | 2017-02-23 |
20170053891 | Wafer Bonding Edge Protection Using Double Patterning With Edge Exposure | 2017-02-23 |
20170053892 | DEVICE AND METHOD FOR PERMANENT BONDING | 2017-02-23 |
20170053893 | Semiconductor Device and Method for Producing Semiconductor Device | 2017-02-23 |
20170053894 | METHOD FOR MANUFACTURING STRETCHABLE WIRE AND METHOD FOR MANUFACTURING STRETCHABLE INTEGRATED CIRCUIT | 2017-02-23 |
20170053895 | WIRE BONDING METHODS AND SYSTEMS INCORPORATING METAL NANOPARTICLES | 2017-02-23 |
20170053896 | PACKAGE STRUCTURES AND METHOD OF FORMING THE SAME | 2017-02-23 |
20170053897 | INDEPENDENT 3D STACKING | 2017-02-23 |
20170053898 | SEMICONDUCTOR PACKAGE WITH PILLAR-TOP-INTERCONNECTION (PTI) CONFIGURATION AND ITS MIS FABRICATING METHOD | 2017-02-23 |
20170053899 | OPTIMIZING POWER DISTRIBUTION FROM A POWER SOURCE THROUGH A C4 SOLDER BALL GRID INTERCONNECTED THROUGH SILICON VIAS IN INTERMEDIATE INTEGRATED CIRCUIT CHIP CONNECTED TO CIRCUITRY IN AN UPPER INTERGRATED CIRCUIT CHIP THROUGH A GRID OF MICRO uC4 SOLDER BALLS | 2017-02-23 |
20170053900 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053901 | SUBSTRATE WITH ARRAY OF LEDS FOR BACKLIGHTING A DISPLAY DEVICE | 2017-02-23 |
20170053902 | THREE-DIMENSIONAL INTEGRATED CIRCUIT STRUCTURE AND BONDED STRUCTURE | 2017-02-23 |
20170053903 | OPTICAL SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053904 | BACK-TO-BACK STACKED DIES | 2017-02-23 |
20170053905 | ELECTROSTATIC DISCHARGE PROTECTION DEVICE FOR HIGH VOLTAGE | 2017-02-23 |
20170053906 | SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE | 2017-02-23 |
20170053907 | DOUBLE-SIDE PROCESS SILICON MOS AND PASSIVE DEVICES FOR RF FRONT-END MODULES | 2017-02-23 |
20170053908 | GRAPHENE FET DEVICES, SYSTEMS, AND METHODS OF USING THE SAME FOR SEQUENCING NUCLEIC ACIDS | 2017-02-23 |
20170053909 | FIELD EFFECT TRANSISTOR HAVING TWO-DIMENSIONALLY DISTRIBUTED FIELD EFFECT TRANSISTOR CELLS | 2017-02-23 |
20170053910 | Field Effect Transistor Having Loop Distributed Field Effect Transistor Cells | 2017-02-23 |
20170053911 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD | 2017-02-23 |
20170053912 | FINFET WITH SOURCE/DRAIN STRUCTURE AND METHOD OF FABRICATION THEREOF | 2017-02-23 |
20170053913 | SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING GATE PROFILE USING THIN FILM STRESS IN GATE LAST PROCESS | 2017-02-23 |
20170053914 | SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR | 2017-02-23 |
20170053915 | HIGH-K GATE DIELECTRIC AND METAL GATE CONDUCTOR STACK FOR FIN-TYPE FIELD EFFECT TRANSISTORS FORMED ON TYPE III-V SEMICONDUCTOR MATERIAL AND SILICON GERMANIUM SEMICONDUCTOR MATERIAL | 2017-02-23 |
20170053916 | SEMICONDUCTOR STRUCTURE WITH RECESSED SOURCE/DRAIN STRUCTURE AND METHOD FOR FORMING THE SAME | 2017-02-23 |
20170053917 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053918 | FORMING CMOSFET STRUCTURES WITH DIFFERENT CONTACT LINERS | 2017-02-23 |
20170053919 | Method of Maintaining the State of Semiconductor Memory Having Electrically Floating Body Transistor | 2017-02-23 |
20170053920 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053921 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | 2017-02-23 |
20170053922 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF | 2017-02-23 |
20170053923 | NON-VOLATILE MEMORY DEVICE AND NON-VOLATILE MEMORY SYSTEM INCLUDING THE SAME | 2017-02-23 |
20170053924 | NONVOLATILE SEMICONDUCTOR STORAGE DEVICE | 2017-02-23 |
20170053925 | ANTIFUSE-TYPE ONE TIME PROGRAMMING MEMORY CELL AND ARRAY STRUCTURE WITH SAME | 2017-02-23 |
20170053926 | ANTIFUSE-TYPE ONE TIME PROGRAMMING MEMORY CELL AND ARRAY STRUCTURE WITH SAME | 2017-02-23 |
20170053927 | One-Time Programmable Memory and Method for Making the Same | 2017-02-23 |
20170053928 | SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME | 2017-02-23 |
20170053929 | SHALLOW TRENCH ISOLATION TRENCHES AND METHODS FOR NAND MEMORY | 2017-02-23 |
20170053930 | SEMICONDUCTOR DEVICE HAVING A METAL OXIDE METAL (MOM) CAPACITOR AND A PLURALITY OF SERIES CAPACITORS AND METHOD FOR FORMING | 2017-02-23 |
20170053931 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053932 | SEMICONDUCTOR MEMORY DEVICE | 2017-02-23 |
20170053933 | SEMICONDUCTOR DEVICE | 2017-02-23 |
20170053934 | U-SHAPED VERTICAL THIN-CHANNEL MEMORY | 2017-02-23 |
20170053935 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2017-02-23 |
20170053936 | STRUCTURE FOR INTERCONNECT PARASITIC EXTRACTION | 2017-02-23 |
20170053937 | Semiconductor Chip and Method for Manufacturing the Same | 2017-02-23 |
20170053938 | NON-UNIFORM SPACING IN TRANSISTOR STACKS | 2017-02-23 |
20170053939 | THIN FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME, ARRAY SUBSTRATE AND DISPLAY PANEL | 2017-02-23 |
20170053940 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME | 2017-02-23 |
20170053941 | FINFET DEVICES HAVING GATE DIELECTRIC STRUCTURES WITH DIFFERENT THICKNESSES ON SAME SEMICONDUCTOR STRUCTURE | 2017-02-23 |
20170053942 | STRAINED FINFET DEVICE FABRICATION | 2017-02-23 |
20170053943 | STRAIN RELEASE IN PFET REGIONS | 2017-02-23 |
20170053944 | FIN-SHAPED STRUCTURE | 2017-02-23 |