08th week of 2012 patent applcation highlights part 50 |
Patent application number | Title | Published |
20120047339 | REDUNDANT ARRAY OF INDEPENDENT CLOUDS - A computing device executing a reliable cloud storage module divides data into a first data block and a second data block. The computing device stores the first data block in a first storage cloud provided by a first storage service, and stores the second data block in a second storage cloud provided by a second storage service. The computing device thereafter receives a command to read the data. In response, the computing device retrieves the first data block from the first storage cloud and the second data block from the second storage cloud. The computing device then reproduces the original data from the first data block and the second data block. | 2012-02-23 |
20120047340 | INFORMATION PROCESSING APPARATUS, METHOD OF CONTROLLING INFORMATION PROCESSING APPARATUS, AND PROGRAM - An apparatus includes a plurality of storage units, a setting unit configured to set mirroring areas to be subjected to mirroring in storage areas of the plurality of storage units, a determination unit configured to determine a degree of importance of data to be stored in the storage units, and a control unit configured to perform control to store data that has a high degree of importance into the mirroring areas of the plurality of storage units, and store data that has a low degree of importance into a non-mirroring area of any one of the storage units. | 2012-02-23 |
20120047341 | DATA RECOVERY APPARATUS AND DATA RECOVERY METHOD - A data recovery apparatus includes accepting unit configure to accept an instruction to recover data in a first storage device, generating unit configure to generate difference information describing differences between backup data backed up from the first storage device to a second storage device and data stored in the first storage device at the point in time when the data recovery instruction has been received by the accepting unit; and updating unit configure to update data stored in the first storage device on the basis of the difference information generated by the generating unit and the backup data. | 2012-02-23 |
20120047342 | FACILITATION OF SIMULTANEOUS STORAGE INITIALIZATION AND DATA DESTAGE - Various embodiments for storage initialization and data destage in a computing storage environment are provided. At least a portion of data on a storage device is initialized using a background process, while one of simultaneously and subsequently destaging the at least the portion of the data to the storage device using a foreground process is performed. A persistent metadata bitmap, adapted to indicate whether the at least the portion of the data has been initialized, is staged to cache, the cache operable in the computing storage environment. The background process maintains a volatile bitmap indicating a status of the initialization of the at least the portion of the data in direct correspondence to the metadata bitmap. As the background process initializes the at least the portion of the data, an applicable bit on the persistent metadata bitmap is cleared and a corresponding bit is set on the volatile bitmap. | 2012-02-23 |
20120047343 | USE OF TEST PROTECTION INSTRUCTION IN COMPUTING ENVIRONMENTS THAT SUPPORT PAGEABLE GUESTS - Management of storage used by pageable guests of a computing environment is facilitated. A query instruction is provided that details information regarding the storage location indicated in the query. It specifies whether the storage location, if protected, is protected by host-level protection or guest-level protection. | 2012-02-23 |
20120047344 | METHODS AND APPARATUSES FOR RE-ORDERING DATA - Apparatuses and methods to perform data re-ordering are presented. In one embodiment, an apparatus comprises an input permutation unit, a multi-bank memory array, and an output permutation unit. The multi-bank memory array is coupled to receive data from the input permutation unit. The output permutation unit is coupled to receive data from the multi-bank memory array. The memory array comprises two or more memory rows. Each memory row comprises two or more memory elements. | 2012-02-23 |
20120047345 | METHODS AND SYSTEMS FOR RELEASING AND RE-ALLOCATING STORAGE SEGMENTS IN A STORAGE VOLUME - Methods, computer-readable mediums, and systems for releasing and re-allocating segments in a storage volume are provided. One method includes receiving a notice to release a segment allocated to the storage volume and assigning a release pending status to the segment while preparing the segment for release enabling the storage volume to re-claim the segment while the segment includes the release pending status. One computer-readable medium includes instructions that cause a processor to perform the above method. A system includes a storage volume comprising a plurality of storage elements and a processor configured to perform the above method. | 2012-02-23 |
20120047346 | TIERED STORAGE POOL MANAGEMENT AND CONTROL FOR LOOSELY COUPLED MULTIPLE STORAGE ENVIRONMENT - A system comprises a first storage system including a first storage controller, which receives input/output commands from host computers and provides first storage volumes to the host computers; and a second storage system including a second storage controller which receives input/output commands from host computers and provides second storage volumes to the host computers. A first data storing region of one of the first storage volumes is allocated from a first pool by the first storage controller. A second data storing region of another one of the first storage volumes is allocated from a second pool by the first storage controller. A third data storing region of one of the second storage volumes is allocated from the first pool by the second storage controller. A fourth data storing region of another one of the second storage volumes is allocated from the second pool by the second storage controller. | 2012-02-23 |
20120047347 | Generic Data Collection Plugin and Configuration File Language for SMI-S Based Agents - A system and method is provided for facilitating data collection from storage devices. A generic low level module may be provided that can handle data collection for devices that store data according to particular variants of a storage standard such as SMI-S storage standard, SNMP protocol, and/or other storage standard. | 2012-02-23 |
20120047348 | VIRTUALIZATION WITH FORTUITOUSLY SIZED SHADOW PAGE TABLES - One or more embodiments provides a shadow page table used by a virtualization software wherein at least a portion of the shadow page table shares computer memory with a guest page table used by a guest operating system (OS) and wherein the virtualization software provides a mapping of guest OS physical pages to machine pages. | 2012-02-23 |
20120047349 | DATA TRANSFER SYSTEM - A data transfer system includes: a plurality of processors; and a plurality of data transfer units that executes a data transfer from one processor to other processor via a plurality of input ports and a plurality of output ports. The data transfer unit includes: an arbitration unit that executes arbitration of conflicting data sent to a same next destination; and a strength information notification unit that sends strength information indicating a number of conflicts of the arbitrated conflicting data to the next destination. The arbitration unit decides a selection ratio, which is a ratio of selecting each of the input ports and receiving the conflicting data from the selected input port, according to a ratio between the input ports in relation to magnitude of the number of conflicts indicated by the strength information received from each of the input ports. | 2012-02-23 |
20120047350 | CONTROLLING SIMD PARALLEL PROCESSORS - A processing apparatus for processing source code comprising a plurality of single line instructions to implement a desired processing function is described. The processing apparatus comprises: | 2012-02-23 |
20120047351 | DATA PROCESSING SYSTEM HAVING SELECTIVE REDUNDANCY AND METHOD THEREFOR - A method includes: decoding an instruction a first time to obtain a first decoded instruction; decoding the instruction a second time to obtain a second decoded instruction; comparing at least a portion of the first decoded instruction to at least a portion of the second decoded instruction; and when the at least a portion of the first decoded instruction matches the at least a portion of the second decoded instruction, executing the instruction. | 2012-02-23 |
20120047352 | PROCESSOR - A processor includes: an instruction buffer which stores the instructions to be dispatched to the arithmetic units; a dependency detecting unit which (i) detects a first dependency and a second dependency and (ii) determines an instruction group including the instructions to be dispatched to the corresponding arithmetic units, the first dependency found between any given two of the instructions stored in the instruction buffer, the second dependency found between each of the instructions stored in the instruction buffer and each of the dispatched instructions, and the instruction group including at least one instruction (i) found in the instructions stored in the instruction buffer and (ii) having neither the first dependency nor the second dependency; and a dispatching unit which dispatches, to the corresponding one of the arithmetic units, the instruction included in the determined instruction group. | 2012-02-23 |
20120047353 | System and Method Providing Run-Time Parallelization of Computer Software Accommodating Data Dependencies - A system and method of parallelizing programs employs runtime instructions to identify data accessed by program portions and to assign those program portions to particular processors based on potential overlap between the access data. Data dependence between different program portions may be identified and used to look for pending “predicate” program portions that could create data dependencies and to postpone program portions that may be dependent while permitting parallel execution of other program portions. | 2012-02-23 |
20120047354 | INFORMATION PROCESSING APPARATUS AND INFORMATION PROCESSING METHOD - According to one embodiment, an information processing apparatus includes: a first verification section configured to perform true-false determination for a predetermined verification target using a verification item obtained by combining specified one of plural verification libraries respectively defining plural verification matters and an affirmative operator or a negative operator; a second verification section configured to subject, concerning the verification target, a true-false determination result of each of a plurality of the verification items verified by the first verification section to an arithmetic operation using a predetermined logical operator and obtain one arithmetic operation result; and an output section configured to output the arithmetic operation result of the second verification section. | 2012-02-23 |
20120047355 | Information Processing Apparatus Performing Various Bit Operation and Information Processing Method Thereof - An information processing apparatus operates data stored in an input register for each bit and stores a result thereof in an output register. A selector circuit selects output data of a bit from input data of 128 bits in the input register. An AND circuit outputs, only when data from a corresponding selector circuit is valid, the data to a corresponding bit of the output register. A control signal generator inputs a select signal indicating the number of a bit to be selected to each selector circuit, and also inputs a signal indicating whether data input from the selector circuit is valid or invalid to each AND circuit. | 2012-02-23 |
20120047356 | Isolation of Device Namespace to Allow Duplicate/Common Names in Root Volume Group Workload Partitions - A mechanism is provided for isolation of device namespace to allow duplicate or common names in root volume group workload partitions. The mechanism creates a scratch file system that contains enough information to create an execution environment for a workload partition and information about which physical volumes to use for the root volume group file systems. The mechanism then populates the root file systems on a disk in the global space. The mechanism boots the workload partition from the scratch file system and configures the devices to be exported to the workload partition based information in the scratch file system. The mechanism then renames the logical volume names to the traditional names. The mechanism then temporarily mounts the root volume group file system onto the scratch file system. | 2012-02-23 |
20120047357 | METHODS AND SYSTEMS FOR ENABLING CONTROL TO A HYPERVISOR IN A CLOUD COMPUTING ENVIRONMENT - A method for enabling control in a cloud computing environment includes initializing a portion of computing resources identified for enabling service to a user system in a cloud computing environment. The method may also include enabling service to the user system. Further, the method may include initializing another portion of the computing resources. After the service in the cloud computing environment has been enabled, cloud computing services may be provided by the host system to one or more user systems. | 2012-02-23 |
20120047358 | METHOD AND SYSTEM FOR ACCELERATING BOOTING PROCESS - A method and a system for accelerating booting process are provided. The method is adapted to an electronic device having a processor, an embedded controller, and a system memory, in which program codes of a basic input/output system (BIOS) and the embedded controller of the electronic apparatus are commonly stored in the system memory. In the method, when receiving a booting triggering signal of the electronic apparatus, the processor controls the embedded controller to cease accessing the system memory, so as to load the BIOS program code from the system memory to a cache memory and execute power-on self test (POST) procedure. After the program code is loaded, the processor controls the embedded controller to return to a normal mode so as to access the system memory and execute monitoring functions. | 2012-02-23 |
20120047359 | POWER AND COMPUTATIONAL LOAD MANAGEMENT TECHNIQUES IN VIDEO PROCESSING - Techniques for power and computational load management in video processing and decoding are provided. In one configuration, an apparatus comprising a processor having a set of instructions operative to extract and compile information from a data stream having video is provided. The processor is operative to prioritize a set of parsing or decoding operations to process the data stream referred to as power management (PM) sequences based on the information and calculate projections of at least one of power and computational loading for each of the prioritized PM sequences. | 2012-02-23 |
20120047360 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND PROGRAM - An information processing device including: a data processing unit that generates content for transmitting to a client; and a communication unit that transmits the generated content of the data processing unit, wherein the data processing unit generates, based on basic encrypted content having a plurality of units that each includes a SEED that is data for encryption key generation and a block that is encrypted data that is encrypted by an encryption key generated using the SEED, each data of (a) converted encrypted content on which conversion processing to replace the SEED with dummy data or to delete the SEED is performed, and (b) encrypted SEED that is the SEED encrypted by content transmission processing or by individual keys that are different by units of users at a transmission destination, and transmits the generated converted encrypted content and encrypted SEED as data provided to the client via the communication unit. | 2012-02-23 |
20120047361 | METHOD FOR SECURING COMMUNICATIONS IN A WIRELESS NETWORK, AND RESOURCE-RESTRICTED DEVICE THEREFOR - The present invention relates to a method for securing communications between a resource-restricted device ( | 2012-02-23 |
20120047362 | PORTABLE ELECTRONIC FULL SCREEN SYSTEM EQUIPPED WITH COMPUTER PROCESSING FUNCTION - A portable electronic full screen system equipped with comprehensive computer processing function includes a portable electronic full screen module and a remote host. The portable electronic full screen module is linked to the remote host through a public network to get comprehensive processing power to perform application processing. Processed data is presented in a multimedia fashion on the portable electronic full screen module. Compared with conventional mobile devices such as E-book, iPAD, SmartBook, Netbook and the like, the portable electronic full screen module has a powerful computer processing capability and has a screen of the same size of the conventional mobile devices without changing too much of hardware structure, and maintains features of the mobile devices of thin and light, energy-saving, lower cost and longer power life. | 2012-02-23 |
20120047363 | Implicit Certificate Verification - A method of computing a cryptographic key to be shared between a pair of correspondents communicating with one another through a cryptographic system is provided, where one of the correspondents receives a certificate of the other correspondents public key information to be combined with private key information of the one correspondent to generate the key. The method comprises the steps of computing the key by combining the public key information and the private key information and including in the computation a component corresponding to verification of the certificate, such that failure of the certificate to verify results in a key at the one correspondent that is different to the key computed at the other correspondent. | 2012-02-23 |
20120047364 | SYSTEM AND METHODS FOR PROVIDING DATA SECURITY AND SELECTIVE COMMUNICATION - Systems and methods for providing data security and selective communication are provided in which a classified communication is received and processed for retransmission to a recipient having a different clearance authorization than that associated with the communication. The retransmitted data includes a subset of data that is selected based on predetermined criteria, and is determined automatically by a guard application, such that the retransmitted information is properly sanitized. | 2012-02-23 |
20120047365 | SECURE, AUDITABLE FILE EXCHANGE SYSTEM AND METHOD - Secure and auditable file exchange between a professional and a client, patient, colleague, or other associate of the professional may be achieved via a file exchange service that automatically verifies the professional's professional status and identity and provides applications and/or tools to accept files for transfer to the verified professional. The files are stored in encrypted form, along with cryptographic integrity codes. After the files have been transferred to the professional, the cryptographic integrity codes may be used to verify that the professional received a correct copy of the file that was originally provided. | 2012-02-23 |
20120047366 | SOC WITH SECURITY FUNCTION AND DEVICE AND SCANNING METHOD USING THE SAME - A system-on-chip (SOC) for semiconductor intellectual property (IP), a device including the same, and a method of operating the same are provided. The SOC includes: an interface which receives scanning data from a main module in which the SOC is mounted; and an anti-virus engine which determines whether a virus exists in the received scanning data. Accordingly, the security of a device is tightened. | 2012-02-23 |
20120047367 | METHOD AND APPARATUS FOR GENERATING SECURITY CONTEXT - A method and an apparatus for generating a security context are provided. The implementation of the method includes: receiving a first message carrying a network capability of a User Equipment (UE); and generating the security context according to the network capability of the UE carried in the first message if the network capability of the UE carried in the first message is inconsistent with the stored network capability of the UE. After the network capability of the UE changes, information carrying the network capability of the UE is sent to a network side, so as to inform the network side that the network capability of the UE changes; therefore the network side can obtain the network capability of the UE, generate the security context according to the changed network capability of the UE, and further trigger a Radio Resource Control (RRC) connection establishment process. | 2012-02-23 |
20120047368 | AUTHENTICATING A MULTIPLE INTERFACE DEVICE ON AN ENUMERATED BUS - A method for authenticating a multiple interface accessory device is provided. The method includes receiving enumeration information identifying the multiple interfaces supported by the accessory. The enumeration information includes information about a master interface supported by the accessory. A host device obtains authentication information from the accessory in accordance with a protocol associated with the master interface. Based on the authentication information, the host device determines whether the accessory is authorized to communicate with the host device. In the event that the accessory is authorized, the host device permits communication with the accessory using one or more of the multiple interfaces supported by the accessory. | 2012-02-23 |
20120047369 | REVOKEABLE MSR PASSWORD PROTECTION - A microprocessor includes an MSR and fuses. The microprocessor encounters an instruction requesting access to the MSR and specifying the MSR address, performs a function of the specified MSR address and a value read from the fuses to generate a first result, encrypts the first result with a secret key to generate a second result, compares the second result with an instruction-specified password, and allows the instruction to access the MSR if the second result matches the password and otherwise denies access MSR. Manufacturing subsequent instances of the microprocessor with a different fuse value effectively revokes the password. Alternatively, a control register of the microprocessor may be written by system software to override the fuse value and thereby revoke the password. The function may be XOR or concatenation, the encryption may be AES, and the secret key is externally invisible. | 2012-02-23 |
20120047370 | METHODS FOR SECURE RESTORATION OF PERSONAL IDENTITY CREDENTIALS INTO ELECTRONIC DEVICES - A method and system for securely enrolling personal identity credentials into personal identification devices. The system of the invention comprises the manufacturer of the device and an enrollment authority. The manufacturer is responsible for recording serial numbers or another unique identifier for each device that it produces, along with a self-generated public key for each device. The enrollment authority is recognized by the manufacturer or another suitable institution as capable of validating an individual before enrolling him into the device. The enrollment authority maintains and operates the appropriate equipment for enrollment, and provides its approval of the enrollment. The methods described herein discuss post-manufacturing, enrollment, backup, and recovery processes for the device. | 2012-02-23 |
20120047371 | SECURE FIELD-PROGRAMMABLE GATE ARRAY (FPGA) ARCHITECTURE - A method and system for configuring a field-programmable gate array (FPGA) includes receiving an encrypted FPGA load-decryption key at an FPGA from a remote key-storage device. The remote key-storage device may be external to and operatively connected with the FPGA. The encrypted FPGA load-decryption key is decrypted using a session key, which may be stored at both the FPGA and the remote key-storage device. Encrypted FPGA-configuration data is received at the FPGA, and decrypted and authenticated using the decrypted FPGA load-decryption key. The decryption of the FPGA-configuration data may indicate a cryptographic state associated with the FPGA-configuration data, which may be used in recurring authentication of the FPGA-configuration data. For recurring authentication, a challenge message may be received at the FPGA from an authentication device, which may be encrypted using the cryptographic state and the session key to generate a response message. The response message may then be sent to the authentication device to determine authenticity of the FPGA-configuration data. | 2012-02-23 |
20120047372 | OPTICAL DISC, OPTICAL DISC RECORDING METHOD, OPTICAL DISC REPRODUCTION METHOD, OPTICAL DISC DEVICE AND STORAGE SYSTEM - A storage system having a plurality of optical disc devices allows other optical disc devices inside the storage system to reproduce the optical disc recorded by a certain optical disc device but inhibits optical disc devices outside the storage system to reproduce the optical disc. A device key as a base for generating an encryption key is common to the plurality of optical disc devices. In the optical disc devices, a guest key other than the device key can be used temporarily to generate the encryption key. An authentication list containing a reproduction condition is recorded with the key information to the optical disc. | 2012-02-23 |
20120047373 | MEMORY SUBSYSTEM AND METHOD THEREFOR - A memory subsystem and method for loading and storing data at memory addresses of the subsystem. The memory subsystem is functionally connected to a processor and has a first mode of address encryption to convert logical memory addresses generated by the processor into physical memory addresses at which the data are stored in the memory subsystem. The memory subsystem is adapted to pull low a write enable signal to store data in the memory subsystem and to pull high the write enable signal to load data in the memory subsystem, wherein if pulled high the write enable signal alters the address encryption from the first mode to a second mode. The memory subsystem is adapted to be coupled to a local hardware device which supplies a key that acts upon the address encryption of the memory subsystem. | 2012-02-23 |
20120047374 | TAMPER RESISTANCE EXTENSION VIA TAMPER SENSING MATERIAL HOUSING INTEGRATION - Systems and apparatuses disclosed herein provide for a tamper resistant electronic device. The electronic device can include a circuit board, housing, a security shield, one or more pressure sensitive switches, and security electronics. The security shield can cover a first area of the circuit board and be configured to sense tampering. The security shield can also be integrated into the first part of the housing, wherein a second area of the circuit board is covered by the housing and is outside of the security shield, both the first area and the second area having electronics therein. The security electronics on the circuit board can be coupled to the security shield and the one or more pressure switches, and can be configured to zeroize data stored on the circuit board if the security shield senses tampering or if one or more of the one or more pressure sensitive switches is disengaged. | 2012-02-23 |
20120047375 | INFORMATION PROCESSING APPARATUS, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - An apparatus includes a storage unit, a power source unit configured to supply power in a normal operation mode, a power supply unit configured to receive power from an external apparatus, a communication unit configured to communicate with the external apparatus, a control unit configured to rewrite the storage unit using data received from the communication unit, and a switching unit configured to switch power supply to the storage unit between from the power source unit and from the power supply unit, wherein the control unit controls the switching unit, when receiving a rewrite request command from the external apparatus, to supply power to the storage unit from the external power supply unit, so that rewriting of the storage unit is executed. | 2012-02-23 |
20120047376 | Semiconductor integrated circuit - In a semiconductor LSI that sequentially performs predetermined processing on data input successively, a host CPU, a plurality of sequencers, and a data engine are connected in a hierarchical manner with the host CPU at top and the data engine at bottom. Each sequencer includes a memory that stores a parameter for execution of the sequencer, a memory controller, a loop counter, a sequence controller, and an interface unit that handles transmission and reception of signals with an external unit of the sequencer. The interface units of the plurality of sequencers have the same specifications. | 2012-02-23 |
20120047377 | MULTICORE PROCESSOR POWER CREDIT MANAGEMENT BY DIRECTLY MEASURING PROCESSOR ENERGY CONSUMPTION - A microprocessor includes an input that receives an indication of the amount of instantaneous power being supplied to the microprocessor by an external power source. The microprocessor includes a plurality of processing cores that each receive the indication from the input and responsively determine an amount of energy consumed by the microprocessor during a preceding period. The period is a predetermined length of time. Each processing core operates at a frequency above a predetermined frequency in response to determining that the amount of energy consumed by the microprocessor during the preceding period is less than a predetermined amount of energy. The predetermined frequency may be: a frequency at which all the cores can operate over the predetermined length of time without the microprocessor consuming more than the predetermined amount of energy, or alternatively the maximum frequency at which system software may request the two or more processing cores to operate. | 2012-02-23 |
20120047378 | METHOD AND SYSTEM FOR LOW-POWERED DATA TRANSMISSION - One embodiment of the present invention is a sensor comprising one or more sensing devices, data-transmission components that transmit sensor data to a receiving component, and a processing component. The processing component executes routines to record sensing-device output as data for transmission to the receiving entity and to control the data-transmission components to transmit the data to the receiving entity. The processing component executes one or more compressing routines to compress data prior to transmission, when data compression is estimated to result in a lower power cost than transmitting uncompressed data, and controlling the data-transmission components to transmit data without compressing the data when data compression is estimated to result in a higher power cost than transmitting uncompressed data. | 2012-02-23 |
20120047379 | BATTERY POWER MANAGEMENT FOR A MOBILE DEVICE - Techniques for managing battery power of a mobile device are described. In an aspect, battery power may be reserved for an application prior to execution of the application on the mobile device. The reservation may ensure that the application has sufficient battery power for execution. In another aspect, battery power may be allocated to applications based on their priorities. The applications may be ordered based on their priorities, and the available battery power for the mobile device may be allocated to one application at a time, starting with the highest priority application. In yet another aspect, battery power may be allocated to applications based on a battery discharge curve for the mobile device. An operating point on the battery discharge curve may be selected based on at least one objective. The available battery power may be determined based on the selected operating point and allocated to the applications. | 2012-02-23 |
20120047380 | METHOD, APPARATUS AND COMPUTER PROGRAM PRODUCT FOR PRESENTATION OF INFORMATION IN A LOW POWER MODE - Provided herein is a method, apparatus, and computer program product for presenting information on a display to a user when the display is operating in a low, or reduced power mode. In particular, the method includes providing for operation in a user interface state that is configured to present a first amount of information with at least a portion of the first amount of information being presented on a display while operating in a first power mode, selecting information from the first amount of information to create a second amount of information that is a subset of the first amount of information, where the second amount of information is selected from the first amount of information based upon relevancy parameters, and providing for display of a second amount of information from the user interface state while operating in a second power mode. | 2012-02-23 |
20120047381 | Control Device, Main Board and Computer - The invention provides a control apparatus, a main board, and a computer wherein, the control apparatus is applied in the computing device. The computing device includes a main board, a standby power supply, and a switching means configured between the standby power supply and the at least one electronic element. The control apparatus includes a signal receiving module, a judging module for judging whether the computing device is in a turn-off mode according to the signal, and a controlling module. The standby power supply is connected with the main board through the control apparatus and the switching switch respectively, so that after the turn-off of the computer, the control apparatus switches off the connection between the standby power supply and the main board, to reduce the power consumption of the main board after the turn-off. | 2012-02-23 |
20120047382 | Script engine for control of power management controllers - A power management IC (PMIC) and methods thereof have been achieved wherein the PMIC invented supports multiple applications while having a high degree of flexibility and allowing a small built and a low power consumption. An embedded script engine on an internal communication bus of the PMIC replaces hard-wired sequencers and control interfaces or using processors as utilized in prior art. The script engine reads instructions from a non-volatile memory as e.g. a one-time programmable (OTP) memory. Furthermore a RAM can be provided to store executable instructions loaded from a host. Moreover a FIFO process is provided if instructions or TAGs are received while a previous script is being exercised. Any type of power supplies, output GPIO or other function could be controlled also by the Script Engine. The invention is also applicable to any other kind of power management circuits. | 2012-02-23 |
20120047383 | Mechanism for Manager and Host-Based Integrated Power Saving Policy in Virtualization Systems - A mechanism for a manager and host-based integrated power saving policy in virtualization systems is disclosed. A method of the invention includes receiving configuration and power information of a host machine from a management agent on the host machine, performing a macro-level power saving scheduling algorithm that takes into consideration the received configuration and power information of the host machine, and requesting that the host machine alter a number of active running CPU cores as part of the macro-level power saving scheduling algorithm. | 2012-02-23 |
20120047384 | METHODS, SYSTEMS, AND COMPUTER PROGRAM PRODUCTS FOR SELECTING A RESOURCE IN RESPONSE TO A CHANGE IN AVAILABLE ENERGY - Methods and systems are described for selecting a resource in response to a change in available energy. A change in a first energy source is detected during processing of a first resource by a program component. A second resource is selected based on a measure of an energy cost for processing the second resource. The second resource is identified to the program component for processing in response to detecting the change. | 2012-02-23 |
20120047385 | MULTICORE PROCESSOR POWER CREDIT MANAGEMENT TO ALLOW ALL PROCESSING CORES TO OPERATE AT ELEVATED FREQUENCY - A microprocessor includes two or more processing cores each configured to determine, at each of succeeding instances in time, an amount of energy consumed by the microprocessor during a period preceding the instance in time. The period is predetermined. Each core also operates at a frequency above a predetermined frequency in response to determining the amount of energy consumed is less than a predetermined amount of energy. All of the cores may operate above the predetermined frequency simultaneously until one of the cores determines the microprocessor has consumed more than the predetermined amount of energy during the period preceding the instance in time. The predetermined frequency may be: a frequency at which all the cores can operate over the predetermined period without the microprocessor consuming more than the predetermined amount of energy, or alternatively the maximum frequency at which system software may request the cores to operate. | 2012-02-23 |
20120047386 | CONTROL APPARATUS AND CONTROL METHOD - There is provided a control apparatus that instantaneously switches a DC/DC converter from a maximum-power-point tracking operation to an output voltage control operation, and can constantly supply an electric power to a load. | 2012-02-23 |
20120047387 | Cache control device and cache control method - A cache control device includes, in a secondary cache data unit, a clean area that stores only information that is the same information as that stored in a main storage. Then, the cache control device monitors information on electrical power consumption of the cache control device, determines whether the information on the electrical power consumption is equal to or greater than a predetermined threshold, monitors an activity ratio of a cache memory, and determines whether the activity ratio is equal to or less than a predetermined threshold. Subsequently, if the cache control device determines that the information on the electrical power consumption is equal to or greater than the predetermined threshold or determines that the activity ratio of the secondary cache memory is equal to or less than the predetermined threshold, the cache control device performs control such that the clean area in the secondary cache data unit is degenerated. | 2012-02-23 |
20120047388 | Adjustable Byte Lane Offset For Memory Module to Reduce Skew - Disclosed herein are solutions for addressing the problem of skew of data within a byte lane by factors caused external to the integrated circuit or module providing the data. To compensate for such skew, an on-chip delay is added to the data out paths of those bits in the byte lane with otherwise would arrive early to their destinations. Such on-chip delay is provided delay circuits preferably positioned directly before the output buffers/bond pads of the integrated circuit or module. By intentionally delaying some of the outputs from the integrated circuit or module, external skew is compensated for so that all data in the byte lane arrives at the destination at substantially the same time. In a preferred embodiment, the delay circuits are programmable to allow the integrated circuit or module to be freely tailored to environments having different skew considerations, such as different styles of connectors. | 2012-02-23 |
20120047389 | NON-VOLATILE MEMORY DEVICES FOR OUTPUTTING DATA USING DOUBLE DATA RATE (DDR) OPERATIONS AND METHODS OF OPERATING THE SAME - A non-volatile memory device is operated by outputting data in response to an alternating sequence of first and second edges of a read control signal, respectively. A determination is made whether the read control signal and a write control signal are in synchronization at one of the first edges. Output of the data is stopped at the second edge that follows the one of the first edges of the read control signal if the read control signal and the write control signal are in synchronization at the one of the first edges. | 2012-02-23 |
20120047390 | APPARATUS AND METHOD OF CONTROLLING A PROCESSOR CLOCK FREQUENCY - An apparatus and a method of controlling a processor clock frequency are provided. The apparatus comprises a hardware counter to count write accesses to a memory buffer during a predetermined period of time, a hardware comparator to compare a number of write accesses counted by the hardware counter with at least one predetermined threshold value, the hardware comparator further to generate a control signal, the control signal being dependent on a result of a comparison of a number of write accesses counted by the hardware counter with at least one predetermined threshold value performed by the hardware comparator, and a clock frequency setting circuit to set a clock frequency of a processor depending on the control signal. | 2012-02-23 |
20120047391 | SYSTEMS AND METHODS FOR AUTOMATED SUPPORT FOR REPAIRING INPUT MODEL ERRORS - Systems and associated methods for automated repair support for input model faults are described. Embodiments automate generation of fault repair support by producing one or more repair action suggestions for a given input model containing faults. Responsive to an indication of one or more faults within the model, embodiments utilize a fault index to ascertain the nature of faults within the model and to compile one or more repair action suggestions. Users can review the repair action suggestions, and preview the impact each of these suggestions will have on the model if implemented, and select an appropriate repair action for repairing a model containing faults. | 2012-02-23 |
20120047392 | DISASTER RECOVERY REPLICATION THROTTLING IN DEDUPLICATION SYSTEMS - Various embodiments for disaster recovery (DR) replication throttling in a computing environment by a processor device are provided. Communication is arrested between a source data entity and a replicated data entity at a location declared in a DR mode. The DR mode is negotiated to a central replication management component as a DR mode entry event. The DR mode entry event is distributed, by the central replication management component, to each member in a shared group. The DR mode is enforced using at least one replication policy. | 2012-02-23 |
20120047393 | DYNAMICALLY REASSIGNING A CONNECTED NODE TO A BLOCK OF COMPUTE NODES FOR RE-LAUNCHING A FAILED JOB - Methods, systems, and products for dynamically reassigning a connected node to a block of compute nodes for re-launching a failed job that include: identifying that a job failed to execute on the block of compute nodes because connectivity failed between a compute node assigned as at least one of the connected nodes for the block of compute nodes and its supporting I/O node; and re-launching the job, including selecting an alternative connected node that is actively coupled for data communications with an active I/O node; and assigning the alternative connected node as the connected node for the block of compute nodes running the re-launched job. | 2012-02-23 |
20120047394 | HIGH-AVAILABILITY COMPUTER CLUSTER WITH FAILOVER SUPPORT BASED ON A RESOURCE MAP - Embodiments of the invention relate to handling failures in a cluster of computer resources. The resources are represented as nodes in a dependency graph in which some nodes are articulation points and the removal of any articulation point due to a resource failure results in a disconnected graph. The embodiments perform a failover when a resource corresponding to an articulation point fails. The failover is to a local resource if the failed resource does not affect all local resources. The failover is to a remote resource if no local resource can meet all resource requirements of the failed resource, and to a remote resource running in a degraded mode if the remote resource cannot meet all of the requirements. | 2012-02-23 |
20120047395 | CONTROL METHOD FOR INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING SYSTEM, AND PROGRAM - An information processing system including a plurality of server apparatuses coupled to one another, wherein failover is executed. A management server is coupled to the server apparatuses, and is configured to, when detecting occurrence of a failure in an active server apparatus, execute failover from the active server apparatus to a standby server apparatus after turning on a power supply of the standby server apparatus. The management server is enabled to acquire information on the standby server apparatus after turning on the power supply of the standby server apparatus, turn off the power supply of the standby server apparatus after acquiring the information, and, based on the acquired information, judge whether failover to the standby server apparatus can be executed. | 2012-02-23 |
20120047396 | IDENTIFYING A DEFECT IN A DATA-STORAGE MEDIUM - An embodiment of a data-read path includes a defect detector and a data-recovery circuit. The defect detector is operable to identify a defective region of a data-storage medium, and the data-recovery circuit is operable to recover data from the data-storage medium in response to the defect detector. For example, such an embodiment may allow identifying a defective region of a data-storage disk caused, e.g., by a scratch or contamination, and may allow recovering data that was written to the defective region. | 2012-02-23 |
20120047397 | CONTROLLING APPARATUS, METHOD FOR CONTROLLING APPARATUS AND INFORMATION PROCESSING APPARATUS - A controlling apparatus for controlling an information processing apparatus, the controlling apparatus includes a first controller including a first data transfer unit that communicates data between the information processing apparatus, and a first processing unit that generates a command to instruct the first data transfer unit to communicate data between the information processing apparatus, and a second controller including a second data transfer unit that communicates data between the information processing apparatus, and a second processing unit that generates a command to instruct the second data transfer unit to communicate data between the information processing apparatus. | 2012-02-23 |
20120047398 | Detecting Soft Errors Via Selective Re-Execution - In one embodiment, the present invention includes a method for determining a vulnerability level for an instruction executed in a processor, and re-executing the instruction if the vulnerability level is above a threshold. The vulnerability level may correspond to a soft error likelihood for the instruction while the instruction is in the processor. Other embodiments are described and claimed. | 2012-02-23 |
20120047399 | COMPUTER TURN ON/OFF TESTING APPARATUS - A computer turning on/off testing apparatus for turning on a computer automatically includes a control module, a switch module, and a power supply module. The control module outputs control signals and receives a turn on signal from the computer to determine whether the computer turns on successfully. The switch module receives the control signals and turns on/off the computer according to the control signals. The power supply module provides power to the control module and the switch module. The control module stores a predetermined test time. The control module records abnormal information and test times when the computer turns on/off, and outputs the control signals to turn on the computer again when the computer cannot restart. The computer is turned on and off until a turning on/off time of the computer is equal to the predetermined test time. | 2012-02-23 |
20120047400 | COMPUTER STARTUP TEST APPARATUS - A computer startup test apparatus for turning on a computer automatically, includes a control module, a switch module, and a startup module. The control module is configured to output control signals, data signals and clock signals. The switch module is configured to receive the control signals, and turn on the computer according to the received control signals. The startup module is configured to receive the data signals and clock signals, and restarts the computer according to the received data signals and clock signals. The control module stores a predetermined test time. The control module records abnormal information and test times when the computer restarts, and outputs the control signals to turn on the computer using the switch module when the computer cannot restart. | 2012-02-23 |
20120047401 | TEST DEVICE AND TEST METHOD FOR TESTING COMPUTING DEVICE - A test method for restarting a computing device communicating with a remote computer. The computing device is shut down and awakened by the remote computer. A second hardware information of the computing device after restarting the operating system of the computing device is compared with initial hardware information of the computing device when the computing device is initial started. Test results are stored to a predetermined storage path and displayed on a screen after the test ends. | 2012-02-23 |
20120047402 | Method and Apparatus for Monitoring Interrupts During a Power Down Event at a Processor - In a particular embodiment, a method of monitoring interrupts during a power down event at a processor includes activating an interrupt monitor to detect interrupts. The method also includes isolating an interrupt controller of the processor from the interrupt monitor, where the interrupt controller shares a power domain with the processor. The method also includes detecting interrupts at the interrupt monitor during a power down time period associated with the power down event. | 2012-02-23 |
20120047403 | DATA PROCESSING SYSTEM - Disclosed is a data processing system capable of detecting a sign of abnormality in such a manner as to increase the degree of safety and availability of the system. The data processing system uses a prediction circuit that detects a sign of abnormality in accordance with a cumulative history of significant events encountered during the processing of CPUs. The prediction circuit retains latest notification timing information about periodic notification from the CPUs in association with the CPUs, acquires elapsed time from the latest notification timing at predetermined intervals, and successively retains history information corresponding to changes in the elapsed time from a target value in association with the CPUs. When the retained history information reaches a predetermined threshold value, the prediction circuit concludes that there is a sign of abnormality. | 2012-02-23 |
20120047404 | ELECTRONIC DEVICE AND METHOD FOR DETECTING POWER FAILURE TYPE - A method for detecting a power failure type of an electronic device sets a shutdown flag as a first value when the electronic device is turned on, modifies the shutdown flag to a second value if a shutdown status of the electronic device is detected, and modifies the shutdown flag to a third value when the electronic device keeps the shutdown status for a predetermined time. The method further determines the power failure type of the electronic device according to a value of the shutdown flag when the electronic device is turned on the next time. | 2012-02-23 |
20120047405 | METHOD FOR USING A COMPUTER NETWORK - The invention provides for a method for using a computer network ( | 2012-02-23 |
20120047406 | REDUNDANCY CONTROL SYSTEM AND METHOD OF TRANSMITTING COMPUTATIONAL DATA THEREOF - A method of transmitting computational data comprising: a step of generating first computational data and generating first generated data using a first generation algorithm for error detection on return; a step of generating second computational data and generating second generated data using a second generation algorithm for error detection; a step of mutually comparing the first/second computational data; a step of transmitting transmission data including coincident computational data and first/second generated data; in the receiving device, a step of generating computational data and third/fourth generated data from preset first/second generation algorithms; and a step of comparing the first/third generated data and the first/third generated data, and detecting error in the received computational data. | 2012-02-23 |
20120047407 | USING A VARIABLE TIMER FOR SENDING AN ERROR INDICATION - Upon receiving a particular data unit by a receiving layer of a wireless device, it is detected that a previous data unit earlier in sequence to the particular data unit has not yet been received by the receiving layer. A timer is started in response to the detecting, where the timer has a time-out period that is variable dependent upon a parameter associated with receipt of the particular data unit. Upon expiration of the timer based on the timeout period, the receiving layer generates an error indication. | 2012-02-23 |
20120047408 | SYSTEMS AND METHODS FOR MEMORY MANAGEMENT - Systems and methods for intelligently reducing the number of log-likelihood ratios (LLRs) stored in memory of a wireless communication device are described herein. In one aspect, the systems and methods described herein relate to selecting LLRs for storage based on a quality metric. In another aspect, the systems and methods described herein relate to improving communication quality in response to available memory capacity. | 2012-02-23 |
20120047409 | SYSTEMS AND METHODS FOR GENERATING DYNAMIC SUPER BLOCKS - Systems and methods are disclosed for generating dynamic super blocks from one or more grown bad blocks of a non-volatile memory (“NVM”). In some embodiments, a dynamic super block can be formed by striping together a subset of memory locations of grown bad blocks from one or more dies of a NVM. The subset of memory locations may be selected based on at least one reliability measurement of the subset of memory locations. In some embodiments, in response to detecting one or more access failures in a portion of the dynamic super block, the NVM interface can retire at least a portion of the dynamic super block. In some embodiments, the NVM interface can reconstruct a new dynamic super block from the dynamic super block by progressively increasing the size of the new dynamic super block. | 2012-02-23 |
20120047410 | STORAGE DEVICE, CIRCUIT BOARD, LIQUID RESERVOIR AND SYSTEM - A storage device according to some aspects of the invention includes a communication unit configured to perform processing for communication with a host apparatus; a storage unit configured to have a first memory area and a second memory area that store therein received data from the host apparatus, and memory area selection information; a memory control unit configured to select one of the first memory area and the second memory area as a memory area for reading, select the other one thereof as a memory area for writing, and perform control of reading and writing; and an increment determination unit configured to compare a value of data having been read out from the memory area for reading by the memory control unit and a value of the received data to determine a magnitude relation therebetween. | 2012-02-23 |
20120047411 | DETERMINING DATA VALID WINDOWS IN A SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT DEVICE - Embodiments of a system and method for testing an integrated circuit device are described herein. Testing is complemented by a determination of characteristics of a data valid window that identifies components of a response data signal from a device under test where the data signal can always be expected to be stable. In at least one embodiment, the method comprises: for each individual data bit region of one or more data bit regions of a second data signal, sampling the second data signal at a plurality of points of the individual data bit region to produce a plurality of sampled values for the second data signal; for each sampled value of the plurality of sampled values, determining whether the sampled value matches an expected bit pattern value corresponding to the sampled value; determining one or more characteristics of the data valid window that defines conditions under which a valid sample can be expected to be taken; and outputting a test outcome based on one or more characteristics of the data valid window. In some embodiments, the second data signal may be sampled at the plurality of points of the individual data bit region concurrently. In some embodiments, the determination of whether each sampled value of the plurality of sampled values matches the expected bit pattern value may be performed concurrently for all of the plurality of sampled values. | 2012-02-23 |
20120047412 | Apparatus and system for implementing variable speed scan testing - In an embodiment of the invention, variable test clock circuitry is provided within an integrated circuit desired to be tested. The variable test clock frequency implements a test clock control register that receives serial test data from a device tester and is configured to serially pass the received test data to scan test chains within the integrated circuit. The test clock control register stores test clock information. The test clock information is provided to a test clock generator where the test clock generator then produces test clock signals at a predetermined frequency. The test clock signal is then provided as a test clock frequency for the scan test chains within the integrated circuit. Methods are also disclosed for operating the variable test clock frequency. | 2012-02-23 |
20120047413 | Methods for implementing variable speed scan testing - In an embodiment of the invention, variable test clock circuitry is provided within an integrated circuit desired to be tested. The variable test clock frequency implements a test clock control register that receives serial test data from a device tester and is configured to serially pass the received test data to scan test chains within the integrated circuit. The test clock control register stores test clock information. The test clock information is provided to a test clock generator where the test clock generator then produces test clock signals at a predetermined frequency. The test clock signal is then provided as a test clock frequency for the scan test chains within the integrated circuit. Methods are also disclosed for operating the variable test clock frequency. | 2012-02-23 |
20120047414 | ADDRESS GENERATION APPARATUS AND METHOD FOR QUADRATIC PERMUTATION POLYNOMIAL INTERLEAVER - An address generation apparatus for quadratic permutation polynomial (QPP) interleaver receives several configurable parameters and uses a plurality of QPP units to compute and outputs a plurality of interleaving addresses according to a QPP function Π(i)=(f | 2012-02-23 |
20120047415 | REVERSE CONCATENATED ENCODING AND DECODING - Methods and systems for transmitting and receiving data include reverse concatenated encoding and decoding. Reverse concatenated decoding includes inner decoding the encoded stream with an inner decoder that uses a low-complexity linear-block code to produce an inner-decoder output stream, outer decoding the inner-decoder output stream with an outer decoder that uses a low-density parity-check code to produce an information stream, and iterating extrinsic bit reliabilities from the outer decoding for use in subsequent inner decoding to improve decoding performance. | 2012-02-23 |
20120047416 | BROADCASTING RECEIVER AND BROADCAST SIGNAL PROCESSING METHOD - A digital broadcasting system which is robust against an error when mobile service data is transmitted and a method of processing data are disclosed. The mobile service data is subjected to an additional coding process and the coded mobile service data is transmitted. Accordingly, it is possible to cope with a serious channel variation while applying robustness to the mobile service data. | 2012-02-23 |
20120047417 | OPERATION UNIT AND PROGRAM - In an embodiment, regarding an addition of a kb-bit number A and a b-bit random number r, element data of a pre-calculated table C′ is set based on a sum A | 2012-02-23 |
20120047418 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND STORAGE MEDIUM - An information processing apparatus comprising: a reception unit adapted to receive a packet containing first data to be stored in a storage unit, a first address indicating an address of second data held in the storage unit, and a second address indicating an address at which the first data is to be written in the storage unit; an access unit adapted to read out the second data from the storage unit based on the first address, and write the first data in the storage unit based on the second address; and a transmission unit adapted to replace the first data of the packet received by the reception unit with the second data read out by the access unit, and transmit the packet. | 2012-02-23 |
20120047419 | TRANSMISSION SYSTEM - A transmission system carrying out sending and receiving of OTU frames has a first transmission device carrying out the sending of an OTU frame, and a second transmission device carrying out the receiving of the OTU frame. The first transmission device calculates BIP-8 for an objective calculation range preset in the OTU frame, inserts the calculation result into the OTU frame, and sends the same. The second transmission device calculates BIP-8 from the received OTU frame for the same objective calculation range as the first transmission device, compares the calculation result with the BIP-8 sent from the first transmission device, and detects any presence of transmission error. The calculation range is set in terms of one of an area including OPU only and an area at least including an arbitrary byte of OTU/ODU overhead. | 2012-02-23 |
20120047420 | METHOD AND SYSTEM FOR DIRECTED DOCUMENTATION OF CONSTRUCTION PROJECTS - Methods and systems for directed creation of construction documentation are provided. Example embodiments provide a Directed Documentation System (a “DDS”), which directs, in a computer-assisted manner, the creation of a historical record of a portion or an entire construction project. In one embodiment, the DDS comprises a directed construction data organization process/component, a directed documentation data acquisition process/component, a construction documentation data retrieval process/component, and a construction documentation data distribution process/component. These components cooperate to direct the documentation of a construction project in a manner that insures that all desired aspects of the project are documented thoroughly and uniformly. This abstract is provided to comply with rules requiring an abstract, and it is submitted with the intention that it will not be used to interpret or limit the scope or meaning of the claims. | 2012-02-23 |
20120047421 | SYSTEM AND METHOD FOR CREATING AND DISPLAYING A TIMELINE PRESENTATION - A system and method for creating and displaying a timeline presentation. A timeline presentation enables a presenter to provide a dynamic and animated display of a timeline and associated information. Events may be added to a timeline by providing information about an event (e.g., date, time, and description) and associating the event with the timeline. Events may be associated with a multimedia file and visually represented using a variety of treatments. Events may be associated with an absolute point in time, a period of time, or a time relative to another event. A timeline may also include annotations, which provide information that may not necessarily be associated with a particular event. A timeline presentation dynamically displays events, annotations, and nested timelines in a pre-determined sequence. The disclosed system also allows a presenter to markup a timeline presentation to draw a viewer's attention to certain features of the timeline. | 2012-02-23 |
20120047422 | HOVERCARD PIVOTING FOR MOBILE DEVICES - Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for invoking execution of web based applications. In one aspect, a method includes receiving user input at a computing device, displaying a contact hovercard on a display of the computing device in response to the user input, the contact hovercard including first contact data and second contact data, the first contact data corresponding to a first web application and the second contact data corresponding to a second web application, the first web application and the second web application being executed on one or more servers, receiving user input selecting the first contact data, generating a user interface and accessing the first web application over a network in response to receiving the user input selecting the first contact data, and providing the first contact data as input to the first web application. | 2012-02-23 |
20120047423 | VIRTUAL HTML ANCHOR - A method allowing a reader of a document who is not the author of the document to reference and link to some specific portion or location in the document so that others may navigate directly to the specific portion of the document even where the author of the document has not provided an HTML anchor to the specific portion or location of the document is provided. | 2012-02-23 |
20120047424 | IMAGE ANNOTATION FOR IMAGE AUXILIARY INFORMATION STORAGE AND RETRIEVAL - Embodiments of the present invention provide a novel and non-obvious method, system and computer program product for image annotation for image auxiliary information storage and retrieval. In an embodiment of the invention, a method for image annotation for image auxiliary information storage and retrieval is provided. The method includes loading a digital image into memory of a computer and selecting separately stored auxiliary information for the digital image. A network location of the auxiliary information can be encoded. Finally, the encoding can be embedded into the digital image. | 2012-02-23 |
20120047425 | METHODS AND APPARATUSES FOR INTERACTION WITH WEB APPLICATIONS AND WEB APPLICATION DATA - A method of enabling content distribution for various electronic devices which comprises providing a content adaptive application for an electronic device, wherein the content adaptive application is designed to parse an abstraction schema to retrieve data or a data source, and format information. The content adaptive application further formats the data or data from the data source into at least one of a plurality of platform specific templates specified by the format information and displays at least one platform specific template including at least a portion of the data or data from the data source on a display of the electronic device. | 2012-02-23 |
20120047426 | SYSTEM, METHOD AND COMPUTER READABLE MEDIUM FOR RECORDING AUTHORING EVENTS WITH WEB PAGE CONTENT - A web page that includes content form fields may be modified to include an event observer module and an authored content module. The authored content module adds a hidden “events observed” field to the form fields. Events generated during the authoring of content by a user are recorded by the event observer module. When the content is submitted from a client browser to the web server, the events generated during the authoring of the content are added to the events observed field and submitted with the content. The web server uses the events to determine a DOM of the web page and compare the observed DOM with a stored DOM for that web page and that particular interaction. The page structure may be optionally modified by the web server to enhance the analysis of the DOM comparison. The web server analysis facilitates detection of non-human content submission at a client browser. | 2012-02-23 |
20120047427 | SYSTEM, METHOD AND COMPUTER READABLE MEDIUM FOR DETERMINING USER ATTENTION AREA FROM USER INTERFACE EVENTS - During an interaction with a web page, user interface events are recorded and augmented with page layout data from the document object model. An event stream is formed with the page layout data and communicated to an event server. The event server processes the event stream to determine a location at which the events were generated, which can be used to predict an area of a user's attention. | 2012-02-23 |
20120047428 | Method for Creating Browsable Document for a Client Device - This invention relates mobile servers and client devices ( | 2012-02-23 |
20120047429 | Methods for further adapting XSL to HTML document transformations and devices thereof - A method, computer readable medium and apparatus for further adapting XSL to HTML document transformations includes identifying with a web computing device one or more rules in an HTML document. An action associated with each of the identified one or more rules is identified with the web computing device. The identified actions are filtered with the web computing device based on one or more filtering rules when two or more of the identified actions have a match. The remaining identified actions after the filtering are applied with the web computing device to transform the one or more rules in the HTML document. The transformed HTML document is provided by the web computing device. | 2012-02-23 |
20120047430 | ORTHOGONAL TRANSFORMATION OF WEB PAGES - A multivariate web page testing system includes a content retrieval module configured to receive a web page request from a visitor's browser and determine corresponding HTML content corresponding to the web page in the web page request. The multivariate web page testing system further includes a content determination module configured to determine if the corresponding HTML content conforms to a preset standard. An adapter is configured to convert the corresponding HTML content to conform to the preset standard if the corresponding HTML content does not conform to the preset standard. The multivariate web page testing system further includes an experimental treatment determination module configured to determine an experimental treatment for the corresponding HTML content and an experimental treatment application module configured to apply the treatment to the corresponding HTML content to create orthogonally transformed HTML content. The orthogonally transformed HTML content is operable to be transmitted to the visitor's browser. | 2012-02-23 |
20120047431 | SYSTEM AND METHOD FOR CONTENT SELECTION FOR WEB PAGE INDEXING - An indexing system for documents such as web pages divides a document into elements, such as document object model elements. User attention data from prior interactions with the document are analyzed to determine those elements of a document that satisfy a threshold requirement of user attention. Elements meeting the user attention threshold requirement are added to a set of indexable content for the document. Furthermore, document sections are determined based on attention data and each section is indexed separately. Indexing is per section and based only on the indexable content, thereby enhancing the index relevance, increasing the efficiency of search engines and reducing spamdexing. | 2012-02-23 |
20120047432 | Aligning Content in an Electronic Document - Aligning the contents of document objects on an electronic document page. Organizing a page of document objects so textual content is aligned to natural eye scanning patterns promotes readership and usability. When a user creates a new island of text, the new text can be snapped into alignment with an existing island of text. Invisible guidelines that emanate from textual features in a document object can page. In response to placing a content insertion point (“IP”) on an electronic page with an existing document object, the IP can be automatically aligned to the content of the existing document object. A page with several arbitrarily positioned document objects can be automatically rearranged so that the contents of the document objects are each aligned to one another. | 2012-02-23 |
20120047433 | Document Reviewer System - A computer system for reviewing electronic documents is provided. The system comprises a computer processor implementing a method including sequentially displaying documents from the ordered list of documents on a monitor. The documents are displayed by automatically displaying pages from a user selected document in the ordered list in a page-by-page manner. After display of the last page of the user selected document, pages from the next document are automatically displayed in the ordered list in a page-by-page manner. | 2012-02-23 |
20120047434 | METHOD TO PREVIEW AN UNDO/REDO LIST - A method identifying an element in a document corresponding to an edit selected from a list of available edits to distinguish the selected edit from the other edits in the list. The identifying may reflect the type of edit, or otherwise demonstrate the change to the element effectuated by the edit. Multiple edits may be selected and temporarily highlighted or otherwise identified in chronological order to demonstrate the effect of multiple edits on the elements of the document. | 2012-02-23 |
20120047435 | SYSTEM FOR CONFIGURATION AND MANAGEMENT OF LIVE SOUND SYSTEM - A computing system automates the configuration and management of a live sound system that includes a processor and memory for building in a GUI of a display a representation of the live sound system for a venue. The system loads a venue template that includes loudspeaker arrays and related properties including a setup configuration of the loudspeaker arrays and tuning data for constituent loudspeakers that are operable to provide an audio coverage pattern for the venue. The system overlays on top of the representation of the loudspeaker arrays a wiring circuit representation indicating interconnections of the loudspeakers that define bandpass inputs for each array. The system generates a plurality of amplifiers in the representation to drive the arrays, and associates amplifier channels of the amplifiers with the bandpass inputs. The amplifier channels include representations of output channels of DSPs coupled with respective amplifier channels. The system loads tuning data into respective representation of the DSP and/or amplifiers based on configurations of the associated loudspeakers to complete virtual configuration. The representations of the devices and connections may be matched with physical devices of the live sound system and the tuning data sent down to the physical DSPs and/or amplifiers for their configuration. | 2012-02-23 |
20120047436 | METHOD AND SYSTEM FOR META-TAGGING MEDIA CONTENT AND DISTRIBUTION - A unique application within Video that allows for user generated Meta-tagging to be delivered in real time to individual clips is provided. This meta-tag creates its own tail based upon the user generated words population, which is searchable via a “spider network” that runs invisible behind the web pages of the site. These same “tagged” words are broadcast over various delivery networks including but not limited to live feeds from SMS, MMS, News Feeds within Community Web Sites, Video Sharing Web Sites, Widget applications any other forms of electronic communication that will be dropped in real time to identified users and friends of users. | 2012-02-23 |
20120047437 | Method for Creating and Navigating Link Based Multimedia - A method, in combination with or on a computer, for defining, editing, and jumping to predefined points in time in audio, video and other multimedia playback by selecting a point of interest from a scrolling list of choices, rendered with dynamic transparency if superimposed on motion graphics or video. Additionally, the present invention renders such a system to be easily used on a small screen while maximizing viewable area, as well as on large screen devices with various devices or human input. | 2012-02-23 |
20120047438 | CUSTOMIZED SYSTEM AND METHOD FOR WEBSITE USER DATA COLLECTION, ANALYSIS AND REPORTING FOR AN ENTIRE WEBSITE - The present invention relates in general to web site administration. In particular, the present invention relates to a system and method for collecting information and user reactions to an entire website and reporting to the website owner. | 2012-02-23 |