07th week of 2014 patent applcation highlights part 20 |
Patent application number | Title | Published |
20140042996 | Voltage Regulating Device - A voltage regulating device includes a power supply adapter, a voltage and current signal processing module, a control module, and a voltage regulating module. The power supply adapter supplies voltage to an electronic device. The voltage and current signal processing module detects the current and voltage supplied by the power supply adapter, and calculated the desired voltage adapted for the electronic device according to the detected current and voltage and a preset voltage for the electronic device. The control module generates a control signal according to the calculated desired voltage. The voltage regulating module regulates the voltage supplied by the power supply adapter according to the control signal, to cause the voltage supplied by the power supply adapter to adapt for the electronic device. As a result, the voltage regulating device can regulate the voltage supplied by the power supply adapter to adapt for the electronic device, which can be used conveniently. | 2014-02-13 |
20140042997 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER FEEDBACK MECHANISM FOR FIXED FEEDBACK VOLTAGE REGULATORS - An operational transconductance amplifier used in conjunction with a multiple chip voltage feedback technique allows multiple strings of LEDs and current sinks to be efficiently powered by a simple feedback oriented voltage regulator within an appliance. A connected series of differential amplifiers or multiplexors are used to monitor the voltages between the connected LEDs and the current sinks, in order to progressively determine the lowest voltage. The operational transconductance amplifier compares this voltage to a reference voltage and injects or removes current from the feedback node of a voltage regulator, thereby altering the voltage present at the feedback node. This causes the voltage regulator to adjust its output, ensuring that the current sinks of the LED strings have adequate voltage with which to function, even as the LEDs have different forward voltages and the strings are asynchronously enabled and disabled. | 2014-02-13 |
20140042998 | DC-DC CONVERTER - A DC-DC converter includes a high-side circuit supplied with a power supply voltage and a first internal reference voltage generated by a first regulator. The high-side circuit provides a current to an inductor, which is used for generating an output voltage. The first and second regulators each generate respective internal reference voltages. The second internal reference voltage is provided to a signal processing module, which controls the high side circuit so that the output voltage of the DC-DC converter corresponds to regulated target voltage level. The first and second regulators include a differential circuit comparing voltages and generating a corresponding comparison signal, a transistor for generating the internal reference voltage according to a gate voltage applied to its gate, and a circuit to change the gate voltage to reduce a signal amplitude of the comparison signal. | 2014-02-13 |
20140042999 | SWITCHED MODE ASSISTED LINEAR REGULATOR WITH AC COUPLING WITH CAPACITIVE CHARGE CONTROL - The disclosed switched mode assisted linear (SMAL) amplifier/regulator architecture may be configured as a SMAL regulator to supply power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator include configurations in which a linear amplifier and a switched mode converter (switcher) parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched mode converter are cooperatively controlled to supply load current. In one embodiment, the linear amplifier is AC coupled to the supply node, and the switched converter is configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control. In another embodiment, the amplifier includes separate feedback loops: an external relatively lower speed feedback loop may be configured for controlling signal path bandwidth, and an internal relatively higher speed feedback loop may be configured for controlling output impedance bandwidth of the linear amplifier. | 2014-02-13 |
20140043000 | CURRENT CONTROLLER HAVING PROGRAMMABLE CURRENT-CONTROL PARAMETERS AND HARDWARE-IMPLEMENTED SUPPORT FUNCTIONS - A current-control profile may be built from a sequence of phases in which the current is controlled in a defined manner. The electrical behavior of these phases may be configured within a list, which contains one entry, or slot, for each phase and which may be stored in a memory device. The order for stepping through the list is not hard-wired into the control circuit. Instead, such an order is part of the configuration for each entry, or slot, itself. Each entry/slot contains the information about the next phase, or the next possible phases depending upon the occurrence of any trigger events. In this way, the list of entries/slots is linked dynamically by the configuration thereby allowing for generation, in a flexible way, of current profiles with different characteristics and different numbers of phases and sequences. | 2014-02-13 |
20140043001 | Apparatus for Impedance Matching - An apparatus ( | 2014-02-13 |
20140043002 | CONTROL CIRCUIT WITH DEEP BURST MODE FOR POWER CONVERTER - A control circuit with deep burst mode for power converter according to the present invention comprises a load detection circuit and a PWM circuit. The load detection circuit generates a switching control signal in response to a feedback signal. The feedback signal is correlated to a load condition of the power converter. The PWM circuit generates a switching signal to regulate an output of the power converter in response to the switching control signal and the feedback signal. The control circuit performs a deep burst mode to switch the switching signal only one time during each deep burst period when the load condition of the power converter is a very light-load. Therefore, switching loss is reduced so that the power consumption of the power converter is also reduced. | 2014-02-13 |
20140043003 | Radio Frequency Identification Devices - Radio frequency identification (RFID) devices are provided including a contactless internal voltage generator configured to generate a rectification voltage responsive to a radio frequency (RF) input signal and an internal voltage responsive to the generated rectification voltage and a reference voltage; a clock generator configured to sense an amount of current to a sink path of the contactless internal voltage generator and to generate a clock signal using a variable resistance value, the variable resistance value based on the amount of current sensed; and an internal circuit driven by the internal voltage and the clock signal. | 2014-02-13 |
20140043004 | SYNCHRONOUS DC-DC CONVERSION - A synchronous DC-DC converter ( | 2014-02-13 |
20140043005 | DC-DC CONVERTER AND CONTROL METHOD FOR THE SAME - A DC-DC converter according to the present invention includes a power supply control circuit-that generates pulse signals, an output transistor that is controlled to be turned on and off based on the pulse signal, a rectification transistor-that is controlled to be turned on and of based on a control signal, a coil provided between a node between the output transistor and the rectification transistor, and an external output terminal, a comparator that compares a voltage of the node-with a reference voltage, a first control circuit that generates a control signal based on a comparison result of the comparator, and a second control circuit that generates the control signal based on a backward-current detection timing and a reference timing. | 2014-02-13 |
20140043006 | POWER SUPPLY SYSTEMS AND METHODS - Aspects include power supply systems. An error amplifier can generate an error voltage based on feedback associated with an output voltage to a reference voltage. A PWM generator can generate a PWM signal based on the error voltage. A power stage can generate the output voltage based on the PWM signal. The power stage can include a transconductance amplifier that generates a temperature-compensated sense current associated with a magnitude of an output current. An output voltage tuning circuit sets a desired magnitude of the output voltage based on at least one digital signal to adjust the reference voltage and the feedback voltage. An oscillator system generates a clock signal based on repeatedly charging and discharging a capacitor based on the clock signal and a comparator that compares the capacitor voltage and a second voltage having a magnitude that changes based on the state of the clock signal. | 2014-02-13 |
20140043007 | POWER SUPPLY APPARATUS AND METHOD, AND USER EQUIPMENT - Embodiments of the present invention provide a power supply apparatus and method, and a user equipment. In the embodiments of the present invention, charging protection for the battery electric core and a bypass function for the voltage boost circuit can be implemented through control that is performed on the switch device by the logic control circuit, so that additional impedance can be reduced and working efficiency can be improved. | 2014-02-13 |
20140043008 | METHODS AND APPARATUS FOR DYNAMIC VOLTAGE TRANSITION - Methods and apparatus for power regulation according to various aspects of the present invention may operate in conjunction with producing a voltage ramp starting at a first voltage and ending at a second voltage and compensating the voltage ramp according to a compensation parameter. The compensation parameter may be adapted to compensate for a circuit parameter. A voltage may then be generated according to the compensated voltage ramp. | 2014-02-13 |
20140043009 | SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY CIRCUIT - A semiconductor integrated circuit that includes: a capacitive element that has a first end connected to a first node and a second end connected to a second node of higher electrical potential than the first node; and a semiconductor element that has a source electrode, a drain electrode and a gate electrode respectively formed in a second conducting region, the second conducting region being formed with a different conducting type to a first conducting region, and the first conducting region formed on a substrate, with the source electrode and the second conducting region connected to the first node, and the first conducting region connected to the second node. | 2014-02-13 |
20140043010 | RECURSIVE DC-DC CONVERTER - In general, in one aspect, a direct-current to direct-current (DC-DC) converter that receive one or more of input voltages and generates one or more of output voltages. The DC-DC converter is capable of operating at one of a plurality of voltage conversion ratios and selection of the one of a plurality of voltage conversion ratios is based on an input voltage received, the DC-DC converter may include a plurality of capacitors, a plurality of inductors, and a plurality of switches which create a plurality of switched cells connected in cascade, in a stack, or in cascade and in a stack, wherein each switched cell is capable of operating in one of a plurality of modes. | 2014-02-13 |
20140043011 | Gem Tester - A gem tester for testing a gem under test and a kit including a horizontal recharging stand are disclosed. In one embodiment of the gem tester, an elongated body has a line-of-sight contour tapering from a bulbous end to a radially deviating frontal nose having a probe extending therefrom. Internal circuitry measures electrical and thermal conductivity of the gem under test in order to identify the type of gem under test and drive a color control signal in response thereto. A luminescent mounting extends about the contact to provide, in response to the control signal, a color indication of the identified gem type. | 2014-02-13 |
20140043012 | Apparatus and method for sampling a signal - The sampling of a signal is described using a sampling bridge, the sampling terminals of which are interconnected. | 2014-02-13 |
20140043013 | SENSOR CIRCUIT - A method of measuring signals related to a photodiode based sensor and calculating a corrected data value thereof is disclosed. A nominal reset voltage value of the photodiode may be measured. A knee point voltage may be applied to the photodiode and resets a voltage on the photodiode to the knee point voltage when the voltage on the photodiode falls below the knee point voltage. Applying the knee point voltage may extend the dynamic range of the sensor. An output voltage of the photodiode at end of an integration time of the photodiode may be measured. The knee point voltage may be applied again after the end of the integration time. A voltage value of the photodiode of the knee point voltage may be measured. The nominal reset voltage value, the output voltage of a sensor and the knee point voltage may be reported to calculate the corrected data value. | 2014-02-13 |
20140043014 | PHASE-LOCKED LOOP - A phase-locked loop and method for estimating a phase angle of a three-phase reference signal is disclosed, which includes an adaptive quadrature signal generator configured to calculate an estimated first state and an estimated second state of a model of an unbalanced three-phase system at a fundamental frequency of the reference signal on a basis of the reference signal and an estimated fundamental frequency; a reference frame transformation block configured to calculate a direct component and a quadrature component in a rotating reference frame synchronous with an estimated phase angle on a basis of the fundamental positive sequence component and the estimated phase angle, and configured to determine an estimate of an amplitude of the fundamental positive sequence component on the basis of the direct component; and an estimator configured to determine estimates of the estimated fundamental frequency and the estimated phase angle on the basis of the quadrature component. | 2014-02-13 |
20140043015 | ELECTRICAL CONDUCTOR PHASE IDENTIFICATION SYSTEM - A system for identifying an electrical phase of three conductors in a three-phase electrical system at an open end is provided. The system includes a transmitter and a receiver unit. The transmitter unit has three current transformers configured to removably couple with one of the three conductors adjacent the transformer. The transmitter unit further having a first communication device configured to transmit a phase identification signal indicating at least one electrical phase detected on one of the three conductors. The receiver unit has a first output lead configured to removably couple at the open end with a first conductor and a second output lead configured to couple with a second conductor. The receiver unit is configured to transmit a trace current onto the first output lead. The receiver further displays phase identification information in response to receiving the phase identification signal. | 2014-02-13 |
20140043016 | SYSTEM INCLUDING A MAGNETOELECTRIC DEVICE FOR POWERING A LOAD OR VISUALLY INDICATING AN ENERGIZED POWER BUS - A system includes a power bus, a capacitive divider and a magnetoelectric device. The capacitive divider includes a first capacitance element electrically connected in series with a second capacitance element. The first capacitance element is electrically interconnected with the power bus. The second capacitance element is electrically connected between the first capacitance element and ground. The capacitive divider causes a current to flow between the power bus and the ground when the power bus is energized. The current generates a magnetic field. The magnetoelectric device includes an input inputting the magnetic field and an output outputting a voltage. An indicator or a load is driven by the voltage of the output of the magnetoelectric device. | 2014-02-13 |
20140043017 | ELECTROMAGNETIC POSITION AND ORIENTATION SENSING SYSTEM - Magnetic tracking systems and methods for determining the position and orientation of a remote object. A magnetic tracking system includes a stationary transmitter for establishing a reference coordinate system, and at least one receiver. The remote object is attached to, mounted on, or otherwise coupled to the receiver. The transmitter can include a set of three mutually perpendicular coils having a common center point, or a set of three coplanar coils with separate centers. The receiver can include a set of three orthogonal coils. The position and orientation of the receiver and the remote object coupled thereto is determined by measuring the nine mutual inductances between the three transmitter coils and the three receiver coils. The magnetic tracking system provides reduced power consumption, increased efficiency, digital compensation for component variation, automatic self-calibration, automatic synchronization with no connections between transmitter and receiver, and rapid low-cost implementation. | 2014-02-13 |
20140043018 | SWITCHING VALVE FOR LIQUID CHROMATOGRAPHY - The invention relates to a switching valve for liquid chromatography having a stator in which multiple ports are formed. Each port is formed by in each case one duct which is connected at one end to in each case one connection port and which, at the other end, has a predetermined port opening cross section at a stator face surface of the stator. The switching valve includes a rotor which has a rotor face surface which interacts with the stator face surface and in which are formed at least one or more grooves. Depending on the rotational position of the rotor with respect to the stator, in at least one predetermined switching position, the switching valve connects respective predetermined port opening cross sections in a pressure-tight manner. The switching valve further includes a drive device for driving the rotor in rotation, and a device for detecting the rotational position of the rotor, which device generates a signal corresponding to the absolute or relative position of the rotor. | 2014-02-13 |
20140043019 | ANGLE SENSOR, GEAR WHEEL FOR AN ANGLE SENSOR AND METHOD FOR PRODUCING SUCH A GEAR WHEEL - An angle sensor for determining a rotation angle of a rotatable body, such as a steering column in a motor vehicle, includes a gear wheel. The orientation of a magnetic field generated by the gearwheel is configured to be detected by a magnetic field sensor. The gear wheel is comprised of a magnetisable material, such as hard ferrite, into which a magnetisation is introduced. The gear wheel is stronger in a central region than in an edge region in which the teeth are arranged. In order to weakly magnetise the edge region, which minimizes a negative influence of the teeth on the homogeneity of the generated magnetic field, the front face of the gear wheel is configured to be magnetized. The magnetisation process advantageously takes place at the same time as an injection moulding process to form the gearwheel. A method is implemented to produce the gear wheel. | 2014-02-13 |
20140043020 | ROTATOR FOR AN ANGLE SENSOR - A rotator for an angle sensor, includes a rotator body made from a resin material and having a boss portion that is formed in a hollow cylinder shape, a yoke formed in a ring shape and concentrically positioned in the boss portion, and a pair of magnets formed in an arc shape and located to face an inward facing surface of the yoke, wherein the magnets and the yoke are entirely located within the boss portion. | 2014-02-13 |
20140043021 | SIMULTANEOUS NON-CONTRAST MR ANGIOGRAPHY AND INTRAPLAQUE HEMORRHAGE (SNAP) MR IMAGING - Magnetic resonance (MR) spins are inverted by applying an inversion recovery (IR) radio frequency pulse ( | 2014-02-13 |
20140043022 | CONTRAST ENHANCED MAGNETIC RESONANCE ANGIOGRAPHY WITH CHEMICAL SHIFT ENCODING FOR FAT SUPPRESSION - The invention relates to a method of performing contrast enhanced first pass magnetic resonance angiography, the method comprising: acquiring ( | 2014-02-13 |
20140043023 | SYSTEM AND METHOD FOR ACCELERATED MAGNETIC RESONANCE IMAGING USING SPECTRAL SENSITIVITY - A system and method for accelerated magnetic resonance imaging (MRI) using spectral sensitivity information are provided. The MRI system is used to acquire k-space data from a subject that when positioned in the main magnetic field of the MRI system causes inhomogeneities in the main magnetic field. Spectral sensitivity information is derived from the acquired k-space data. In general, the spectral sensitivity information relates specific resonance frequencies to distinct spatial locations in the main magnetic field of the MRI system. One or more images of the subject may be reconstructed from the acquired k-space data using the produced spectral sensitivity information to spatially encode the acquired k-space data. By using the spectral sensitivity information to provide spatial-encoding, the data acquisition can be accelerated, for example, by undersampling k-space. In addition, using the provided system and method, clinically viable images can be obtained in the presence of severe off-resonance. | 2014-02-13 |
20140043024 | MULTIPLE EXCITATION BLADE ACQUISITION FOR MOTION CORRECTION IN MAGNETIC RESONANCE IMAGING - In an embodiment, a method includes performing a magnetic resonance (MR) data acquisition sequence including the acquisition of a plurality of blades of k-space data rotated about a section of k-space. The k-space data is representative of gyromagnetic material within a subject of interest, and each blade includes a plurality of encode lines defining a width of the respective blade. The acquisition of each blade includes receiving MR signal from echoes in two or more separate echo trains to fill at least a portion of the plurality of encode lines, and the echo trains are separated by an excitation pulse. | 2014-02-13 |
20140043025 | BLACK BLOOD MRI USING A STIMULATED ECHO PULSE SEQUENCE WITH FLOW SENSITIZATION GRADIENTS - A black blood magnetic resonance imaging sequence is performed using a magnetic resonance scanner. The sequence includes: applying a first flow sensitization gradient; applying a spoiler gradient after applying the first flow sensitization gradient; applying a second flow sensitization gradient after applying the spoiler gradient wherein the second flow sensitization gradient has area equal to the first flow sensitization gradient but of opposite polarity; applying a slice-selective radio frequency excitation pulse after applying the spoiler gradient; and performing a magnetic resonance readout after applying the second flow sensitization gradient and after applying the slice selective radio frequency excitation. The readout acquires magnetic resonance imaging data having blood signal suppression in the region excited by the slice-selective radio frequency excitation pulse. The magnetic resonance imaging data is suitably reconstructed to generate a black blood image that may be displayed. | 2014-02-13 |
20140043026 | SPATIALLY ENCODED PHASE-CONTRAST MRI - A method of collecting magnetic resonance data for imaging an object with a predetermined spin density being arranged in a static magnetic field, comprises the steps subjecting said object to at least one radiofrequency pulse and magnetic field gradients for creating spatially encoded magnetic resonance signals, including at least two settings of spatially encoding phase-contrast gradients differently encoding the phase of said magnetic resonance signals in at least one field of view in a predetermined spatial dimension, acquiring at least two magnetic resonance signals, each with one of said at least two settings of different spatially encoding phase-contrast gradients, and determining at least one mean spin density position of said object along said spatial dimension by calculating the phase difference between said signals. Furthermore, a control device and a magnetic resonance imaging (MRI) device implementing the method are described. | 2014-02-13 |
20140043027 | SLIP RING ASSEMBLY - A medical apparatus ( | 2014-02-13 |
20140043028 | METHOD AND APPARATUS FOR SHIMMING A SUPERCONDUCTING MAGNET - In a method and apparatus for shimming a superconducting magnet that has a number of magnet coils electrically connected in series between a first current connection and a second current connection and a superconducting switch connected in parallel with the magnet coils, between the first current connection and the second current connection, with the first current connection being electrically connected to an external current lead, a first solid-state switching device is electrically interposed between the external current lead and the magnet coils; a number of superconducting shim coils electrically connected between the first current connection and the second current connection through a further solid-state switching device. Superconducting switches are each connected in parallel with a respective superconducting shim coil. | 2014-02-13 |
20140043029 | Activation of Transmit/Receive Arrays for Decoupling During Transmission - A system for electromagnetic excitation of an object under examination during magnetic resonance tomography includes a radio frequency (RF) device for generating a radio-frequency signal and a plurality of antennas for emitting the radio-frequency signal. A signal connection exists between the output of the RF device and the plurality of antennas. A source impedance of the signal connection to the output of the RF device at a connection point of the plurality of antennas is significantly higher than the impedance of the plurality of antennas at the connection points, so that the plurality of antennas are fed in a current source feed mode if a radio-frequency signal is present. | 2014-02-13 |
20140043030 | METHOD FOR ADJUSTING MAGNETIC RESONANCE IMAGING APPARATUS AND SUPERCONDUCTIVE MAGNET EXCITATION DOCK - An adjustment method of a magnetic resonance imaging apparatus includes: a cooling and excitation step in which work of transporting a superconducting magnet to a facility different from a facility where the superconducting magnet is to be installed, cooling a superconducting coil of the superconducting magnet with a refrigerant, and supplying a current from an external power supply for excitation is repeated until a predetermined rated current flows; a demagnetization and transportation step of demagnetizing the superconducting coil and transporting the superconducting magnet to the facility where the superconducting magnet is to be installed in a state where the superconducting coil is cooled by the refrigerant; and an installation step of installing the superconducting magnet in the facility where the superconducting magnet is to be installed and supplying a predetermined rated current from an external power supply to the superconducting coil in order to excite the superconducting coil. | 2014-02-13 |
20140043031 | System and Device for Determining Electric Voltages - A method and to a system can be used for measuring electric voltages in batteries with a number of battery cells. A measuring circuit includes at least one digital analog converter that constitutes, in combination with a number of comparators, an analog digital converter to determine the electric voltages of the battery cells. The comparators compare a reference voltage generated by the digital analog converter with the electric voltage of the battery cells over a number of separate measuring channels to the individual battery cells. | 2014-02-13 |
20140043032 | SWITCH CIRCUIT, SELECTION CIRCUIT, AND VOLTAGE MEASUREMENT DEVICE - Provided is a technique that contributes to the improvement of voltage measurement accuracy and uniform current consumption of a battery in a voltage measurement device. Switch circuits (SWP and SWN) include switch elements (MP | 2014-02-13 |
20140043033 | APPARATUS AND METHOD FOR INSPECTING PCB-MOUNTED INTEGRATED CIRCUITS - A method and apparatus for testing the mounting of an integrated circuit on a printed circuit board using a ball grid array comprises directing an inclined laser beam from a line scan laser sensor at the integrated circuit, detecting the position of the lower edge of the integrated circuit from laser light backscattered from the integrated circuit and printed circuit board, determining through a trigonometric calculation the height of the integrated circuit above the printed circuit board following soldering of the ball grid array and comparing the height with reference data. The integrated circuit is deemed to have been successfully mounted to the printed circuit board if the height falls within a predetermined range. | 2014-02-13 |
20140043034 | METHOD AND DEVICE FOR DIAGNOSING A RESERVOIR CAPACITOR OF A VEHICLE PASSENGER PROTECTION SYSTEM, AND VECHICLE SAFETY SYSTEM INCORPORATING SUCH DEVICE - A method of measuring a capacitor value comprises the steps of loading the capacitor up to a given voltage value; obtaining a first measure of a time for discharging the capacitor by a fixed voltage drop, the discharge of the capacitor being caused by a first current; reloading the capacitor up to the given voltage value; obtaining a second measure of a time for discharging the capacitor by the fixed voltage drop, the discharge of the capacitor being caused by the first current and by a second current of known value added to said first current; and determining the capacitor value from the difference between the first measure and the second measure, based on the given voltage drop or the given time, respectively, and based further on the known value of the given second current. | 2014-02-13 |
20140043035 | METHOD OF LOCATING FAULTS ON A CABLE - This invention concerns methods and devices for calibrating a partial discharge measuring device and for locating faults on cables. In the method, calibration signals, which can include a band-limited white noise, are used with a periodically repeated signal course. By averaging over a predetermined period duration (T) of the calibration signal, it is possible, in the case of a partial discharge measurement, to recalibrate the measuring device continuously during the measurement, and additionally on cables to determine the fault location with great precision. | 2014-02-13 |
20140043036 | DETECTION CIRCUIT AND DETECTION METHOD - The present disclosure provides a detection circuit and a detection method. The detection circuit used for detecting an electrostatic discharge (ESD) protective device that is inversely soldered, the ESD protective device includes a first diode, a second diode, and a third diode; the cathodes of the first diode, the second diode and the third diode are mutually connected, and an anode of the third diode is coupled to a ground terminal of the circuit by a divider resistor. The detection circuit includes a comparator. The comparator is configured with a first input end connected to the reference voltage and a second input end coupled to the anode of the third diode, and an output end of the comparator is coupled to a warning device. | 2014-02-13 |
20140043037 | ANTENNA TESTING DEVICE AND ANTENNA TESTING UNIT THEREOF - An antenna testing unit is provided. The antenna testing unit includes a ground element and a radiator. The radiator includes a body, a first radiator unit and a second radiator unit. The body corresponds to the ground element. The first radiator unit is connected to the body, comprising a first wing shaped portion and a second wing shaped portion, wherein a shape of the first wing shaped portion is symmetrical to a shape of the second wing shaped portion. The second radiator unit is connected to the body, and comprises a first section and a second section, wherein the first section extends toward the first wing shaped portion, and the second section extends toward the second wing shaped portion. | 2014-02-13 |
20140043038 | TESTING SYSTEM AND TESTING METHOD FOR TOUCH DEVICE - A testing system for a touch device includes a touch simulation module, a control module and a determination module is provided. The touch simulation module includes multiple conductive elements respectively corresponding to multiple touch sensing regions of the touch device. The control module selectively provides a testing signal to one or multiple of the conductive elements. The determination module determines whether the touch device correctly responds a testing that the control module provides to the device under testing through the touch simulation module. | 2014-02-13 |
20140043039 | IMPEDANCE MEASUREMENT SYSTEM, IMPEDANCE MEASUREMENT METHOD AND PROGRAM - A condition input device inputs a measurement condition and the information of an electronic apparatus to be measured. A measurement operation program device selects a program that causes the electronic apparatus to perform an measurement operation based on the information of a measuring target object and the measurement condition. A voltage measurement device measures a voltage variation generated by the power source of the electronic apparatus. A wave form calculating device performs an arithmetic processing, such as a filtering processing or a time-frequency conversion (e.g. Fourier conversion) for the measured voltage variation to obtain the frequency characteristics of the voltage variation. An impedance calculating device calculates an impedance from the frequency characteristics of the voltage variation and the frequency characteristics of current and the condition of the measurement operation program. | 2014-02-13 |
20140043040 | Apparatus and method for detecting the abnormal soldering of an electrostatic discharge protection chip - The present invention provides an apparatus for detecting the abnormal soldering of an electrostatic discharge protection chip, comprising a connector, which is used for pluggable connection with a signal input terminal connector of an application specific integrated circuit chip (ASIC) of a liquid crystal display; a detecting circuit, which is set on the connector, used to detect if the electrostatic discharge protection chip is properly soldered on the ASIC and prompt when the abnormal soldering of the electrostatic discharge protection chip is detected. Accordingly, the present invention also provides a method for detecting the abnormal soldering of an electrostatic discharge protection chip. According to the present invention, the abnormal soldering of an electrostatic discharge protection chip can be detected quickly with high accuracy, which can save the cost of manpower and resources, as well as to reduce the loss resulted from the defective rate of the finished product assembly. | 2014-02-13 |
20140043041 | Arrangement and Method for Detecting Connection Loss at a Circuit Part having a Capacitive Behaviour - The disclosure relates to an arrangement for detecting connection loss at a circuit part which has a capacitive behaviour and is electrically connected to a useful signal source. The disclosure provides an evaluation circuit which is electrically connected to an input node of the circuit part having a capacitive behaviour and detects the pulsed useful signal (UNUTZ), output by the useful signal source, at the input node of the circuit part having a capacitive behaviour and evaluates the signal characteristics in order to detect connection loss. | 2014-02-13 |
20140043042 | Snoop Detection on Calibrated Bus - An electronic system having a high speed signaling bus requiring training (calibration) of a calibrated item in a driver circuitry or a receiver circuitry for reliable operation. At manufacturing or in a secure location, secure calibration coefficients are determined for the electronic system and are stored in a non-volatile storage. During operation, the high speed signaling bus may be re-calibrated, resulting in a new currently active calibration coefficient for the calibrated item. A coefficient watchdog checks a new coefficient value selected by the re-calibration at present environmental conditions such as voltage and temperature against the secure calibration coefficients. If the new calibration coefficient value is the same as a calibration coefficient value in an acceptably close secure calibration coefficient, the new calibration coefficient is accepted; if not, a potentially probed warning is created by the coefficient watchdog. | 2014-02-13 |
20140043043 | METHOD OF ANALYZING PATCHING PANELS - A method of analyzing patching among a first port of a first panel and ports of one or more other panels, comprising obtaining with respect to the first port of the first panel an indication of multiple concurrent patchings between the first port and each of two or more different ports of other panels, the two or more different ports including at least a second port and a third port; injecting a scan signal between the first port and the second port and sensing for a corresponding returned signal between the second and the third ports; determining that an indication of a patching between the first port and the second port is false when a returned signal corresponding to the scan signal is detected between the second and the third ports. | 2014-02-13 |
20140043044 | FUEL SENSOR BASED ON MEASURING DIELECTRIC RELAXATION - Fuel sensor ( | 2014-02-13 |
20140043045 | Method and Device for Measuring the Position of Segments with Absorbing Substances in Multi-segment Filter Rods of the Tobacco Processing Industry - A method and device for measuring the position of sections with an absorbing substance in multi-segment filter rods of the tobacco processing industry by measuring a varying shift of the resonance frequency A and/or spread of the resonance line B during movement of the rod in the longitudinal direction, using a microwave resonator, which has a field concentration in a spatial area, wherein this spatial area is smaller in the rod direction than the segment length to be determined, forming a difference quotient ΔA of the resonant frequency shift A and/or ΔB of the resonance line spread B relative to the longitudinal direction, determining local extreme values of the respective difference quotients, and assigning local extreme values as a position of a transition from a section with higher content of absorbing substance to a section without, or with lower content, of absorbing substance, and vice versa. | 2014-02-13 |
20140043046 | ELECTROMAGNETIC SCANNING IMAGER - In one aspect, the present invention provides an imager, preferably portable, that includes a source of electromagnetic radiation capable of generating radiation with one or more frequencies in a range of about 1 GHz to about 2000 GHz. An optical system that is optically coupled to the source focuses radiation received therefrom onto an object plane, and directs at least a portion of the focused radiation propagating back from the object plane onto an image plane. The imager further includes a scan mechanism coupled to the optical system for controlling thereof so as to move the focused radiation over the object plane. A detector optically coupled to the lens at the image plane detects at least a portion of the radiation propagating back from a plurality of scanned locations in the object plane, thereby generating a detection signal. A processor that is in communication with the detector generates an image of at least a portion of the object plane based on the detection signal. | 2014-02-13 |
20140043047 | OCCUPANT DETECTION SYSTEM AND METHOD - An occupant detection system and method that uses an isolation assembly to isolate electrically a power supply providing power to a heater element for heating a vehicle seat from a sensing circuit that uses the heater element as an electrode for electric field or capacitance type occupant detection. The isolation assembly includes a common mode choke that by itself provides sufficient isolation when the sensing circuit excitation signal frequency is high enough, and provides switches that infrequently interrupt electrical power to the heater element so a humidity level can be determined using a relatively low excitation signal frequency. Knowing the humidity level is desirable to adjust a threshold use to determine if the sensing circuit indicates that the seat is empty, or is occupied. | 2014-02-13 |
20140043048 | GRAIN BIN CAPACITIVE MOISTURE SENSOR SYSTEM AND METHOD - A data collector associated with a grain bin is in communication with a plurality of capacitive moisture cables hanging within the grain bin. Each capacitive moisture cable includes a plurality of sensor nodes positioned along the moisture cable. Each sensor node includes a sensor node microprocessor and a sensor node memory coupled to a temperature sensor, a reference capacitive sensor and a capacitive moisture sensor. A main controller is in communication with the data collector. The main controller memory is configured in a data structure comprising grain type data, temperature data, raw reference capacitance data, raw moisture capacitance data, node identification data, physical node positional data, and a calculated moisture content for each sensor node. A method of determining moisture contents of grain in a grain bin related to such a system is also included. | 2014-02-13 |
20140043049 | SENSING PLATFORM FOR QUANTUM TRANSDUCTION OF CHEMICAL INFORMATION - A system for determining chemistry of a molecule in a high background interfering liquid environment by application of an electronic signal at a biased metal-electrolyte interface is disclosed. One or more of a resonant exchange of energy between one or more electrons exchanged by the metal and the electrolyte and vibrating bonds of a molecular analyte, for example, may be sensed by measuring small signal conductivity of an electrochemical interface. | 2014-02-13 |
20140043050 | METHOD AND SYSTEM FOR PERFORMING TESTING OF PHOTONIC DEVICES - A photonics system includes a transmit photonics module and a receive photonics module. The photonics system also includes a transmit waveguide coupled to the transmit photonics module, a first optical switch integrated with the transmit waveguide, and a diagnostics waveguide optically coupled to the first optical switch. The photonics system further includes a receive waveguide coupled to the receive photonics module and a second optical switch integrated with the receive waveguide and optically coupled to the diagnostics waveguide. | 2014-02-13 |
20140043051 | INSPECTION APPARATUS, INSPECTION SYSTEM AND INSPECTION METHOD - An inspection apparatus for inspecting target objects includes multiple inspection cells corresponding to target objects, respectively, and a test-pattern wiring formed between the inspection cells. Each of the inspection cell includes a test pattern memory device which temporarily stores a test pattern, an inspection signal driver device which transmits an inspection signal to a respective one of the target objects based on the test pattern, a comparator device which compares an output signal from the respective one of the target objects with an expected value corresponding to the test pattern such that a test result is obtained, and a test result memory device which temporarily stores the test result, and the test-pattern wiring transmits the test pattern to the test pattern memory device of each of the inspection cells from an upstream side to a downstream side in the order that the target objects are inspected. | 2014-02-13 |
20140043052 | Integrated Chip with Heating Element and Reference Circuit - Some aspects of the present disclosure relate to an apparatus that includes an integrated chip having a bandgap reference circuit and one or more heating elements. The bandgap reference circuit is located within a subset of the integrated chip and outputs a reference voltage having a temperature dependence. The one or more of the heating elements vary the temperature of the subset of the integrated chip. | 2014-02-13 |
20140043053 | DOCKING DEVICE, DOCKING METHOD - A docking device for connecting a semiconductor probe to a semiconductor handler has in each case one probe-side and one handler-side connecting device, a handling device for handling a contact-making device and a coupling device for coupling the connecting devices. The coupling device has a first shifting device, which allows the translational and guided shifting of the probe-side connecting device relative to the handler-side connecting device towards and away from one another. | 2014-02-13 |
20140043054 | VERTICAL PROBES FOR MULTI-PITCH FULL GRID CONTACT ARRAY - A testing method (and the probes used) comprising providing one or more probes each comprising: a body portion which is substantially straight; an extended portion extending from the body portion and comprising at least two separate probe portions; and a tip portion at the opposite end of the extended portion; and contacting an object to be tested with the one or more probes. | 2014-02-13 |
20140043055 | CONTACT PROBE AND PROBE CARD - A contact probe electrically connects the tester side and an electrode pad of a circuit to be tested. This contact probe has a mounting portion on a base end portion mounted on a probe card, a contact portion on a distal end portion brought into contact with the electrode pad, and an arm portion between them elastically supporting the contact portion. The contact portion is provided on a lower end portion of a base portion integrally mounted on a distal end portion of the arm portion. The arm portion has a one-side arm piece supporting the base portion and allowing vertical movement of the base portion and the other-side arm piece supporting the base portion and adjusting an inclination angle of the base portion to reduce a scrub amount of the contact portion. The probe card uses the above-described contact probe. | 2014-02-13 |
20140043056 | EVALUATION METHOD FOR SOLAR MODULE AND MANUFACTURING METHOD FOR SOLAR MODULE - Provided is a method for evaluating a solar cell incorporated into a solar module. A PL evaluation step is performed. The PL evaluation step is a step for evaluating the solar cell to be evaluated among a plurality of solar cells ( | 2014-02-13 |
20140043057 | SEMICONDUCTOR APPARATUS AND TEST METHOD THEREOF - A semiconductor apparatus includes a test voltage application unit, a first pad and a second pad. The test voltage application unit is configured to apply a test voltage to first and second TSVs in response to a test mode signal. The first pad is configured to output a first test signal outputted from the first TSV. And the second pad is configured to output a second test signal outputted from the second TSV. | 2014-02-13 |
20140043058 | SEMICONDUCTOR MODULE - A semiconductor module is provided in a power system of an apparatus. The semiconductor module includes a semiconductor switch, a voltage applying device configured to apply a first voltage that is equal to or higher than a rated voltage of the apparatus to the semiconductor switch in an off-state in a case where the apparatus is not in practical use, and a leak detecting circuit configured to detect a leak current from the semiconductor switch. The rated voltage of the apparatus is a rated voltage when the apparatus is in practical use. | 2014-02-13 |
20140043059 | SECURE DIGEST FOR PLD CONFIGURATION DATA - A method for verifying that data is correctly loaded into an individual programmable logic device includes computing a reference digest of the data to be loaded into the individual programmable logic device, loading the data into the individual programmable logic device, computing inside the individual programmable logic device an as-programmed digest of the data that was loaded into the individual programmable logic device, reading the as-programmed digest out of the individual programmable logic device, comparing the as-programmed digest with the reference digest, and verifying the loaded data if the as-programmed digest matches the reference digest, and indicating an error if the as-programmed digest does not match the reference digest. | 2014-02-13 |
20140043060 | CONTROLLABLE POLARITY FET BASED ARITHMETIC AND DIFFERENTIAL LOGIC - A logic gate with three inputs A, B, and C, and one output implementing a function MAJ(A,B,C)=A*B+B*C+A*C comprising two mutually exclusive transmission gates (TGs) connected in series, based on two parallel double-gate controllable polarity devices, a polarity of each being controlled by input A and a conduction being controlled by input B, or vice-versa, in opposite polarities, and that route either an input A or C from one side of the transmission gates to the output. | 2014-02-13 |
20140043061 | COMPUTING MULTI-MAGNET BASED DEVICES AND METHODS FOR SOLUTION OF OPTIMIZATION PROBLEMS - A computing multi-magnet device and method for solving complex computational problems is provided. Embodiments include a first magnet, a second magnet, and an interconnect between and interconnecting the first and second magnets, the interconnect configured to allow the first and second magnets to communicate via a voltage or current applied to the first and second magnet and conducted by the interconnect. The scalability of computing multi-magnet device provides solutions to algorithms that have exponentially increasing complexity. | 2014-02-13 |
20140043062 | COMPACT VOLATILE/NON-VOLATILE MEMORY CELL - The invention concerns a memory device comprising at least one memory cell comprising: a first transistor ( | 2014-02-13 |
20140043063 | SEMICONDUCTOR DEVICE - A gate interconnection portion includes a first gate interconnection portion, a second gate interconnection portion, and a third gate interconnection portion. The first gate interconnection portion is formed in parallel to a Y axis direction toward a power supply interconnection and extends to a prescribed position within an element formation region. The second gate interconnection portion is formed in parallel to a direction obliquely bent with respect to the Y-axis direction from the first gate interconnection portion toward the power supply interconnection, and extends across a boundary between the element formation region and an element isolation insulating film, which is in parallel to an X axis direction. The third gate interconnection portion further extends in parallel to the Y-axis direction from the second gate interconnection portion toward the power supply interconnection. | 2014-02-13 |
20140043064 | DETECTION OF BAD CLOCK CONDITIONS - There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal. | 2014-02-13 |
20140043065 | DRIVER CIRCUIT, DRIVER ARCHITECTURE AND DRIVING METHOD THEREOF - A driver architecture includes multiple drivers connected in series. An (i) | 2014-02-13 |
20140043066 | GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME - A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage. | 2014-02-13 |
20140043067 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD AND OPERATING METHOD OF THE SAME - A semiconductor structure and a manufacturing method and an operating method of the same are provided. The semiconductor structure includes a substrate, a main body structure, a first dielectric layer, a first conductive strip, a second conductive strip, a second dielectric layer, and a conductive structure. The main body structure is formed on the substrate, and the first dielectric layer is formed on the substrate and surrounding two sidewalls and a top portion of the main body structure. The first conductive strip and the second conductive strip are formed on two sidewalls of the first dielectric layer, respectively. The second dielectric layer is formed on the first dielectric layer, the first conductive strip, and the second conductive strip. The conductive structure is formed on the second dielectric layer. | 2014-02-13 |
20140043068 | METHOD FOR DRIVING SEMICONDUCTOR DEVICE - To provide a driving method of a semiconductor device for reducing power consumption. In a method for driving a semiconductor device of one embodiment of the present invention, in a first period, a switch configured to control an electrical connection between a first wiring and a second wiring together with an n-channel transistor and a p-channel transistor is in an off state during a period in which the states of the n-channel transistor and the p-channel transistor gates of which are electrically connected to each other are switched between an on state and an off state. In a second period, the switch is set to be in an off state. The switch has a channel formation region in a semiconductor, band gap of which is higher than silicon and intrinsic carrier density of which is lower than silicon. | 2014-02-13 |
20140043069 | POWER SAVING DRIVER DESIGN - In an asymmetrically terminated communication system, the power consumed to transmit a particular bit value is adjusted based on whether the bit being output is the second, third, fourth, etc. consecutive bit with the same value after a transition to output the particular bit value. The adjustment of the power consumed to transmit the two or more consecutive bits with the same value may be made by adjusting the driver strength during the second, or subsequent, consecutive bits with the same value. The adjustment of the power consumed is performed on the bit value that consumes the most DC power and the other value is typically not adjusted. | 2014-02-13 |
20140043070 | CLASS RESONANT-H ELECTROSURGICAL GENERATORS - A generator for use with an electrosurgical device is provided. The generator has a gain stage electrically disposed between a first voltage rail and a second voltage rail, wherein the gain stage includes an input and an output. A voltage source operably coupled to the gain stage input and configured to provide an input signal thereto responsive to a drive control signal is also provided. The generator also has one or more sensors configured to sense an operational parameter of the amplifier and to provide a sensor signal corresponding thereto and a controller adapted to receive the sensor signal(s) and in response thereto provide a drive control signal to the voltage source. The generator has an amplifier output configured to supply an output voltage corresponding to the first voltage rail and the second voltage rail when the output of the gain stage falls between a voltage of the first voltage rail and a voltage of the second voltage rail and is configured to supply a peak voltage output when the voltage output is falls greater than the voltage of the first voltage rail or less than the voltage of the second voltage rail. | 2014-02-13 |
20140043071 | SELF-INITIALIZING ON-CHIP DATA PROCESSING APPARATUS AND METHOD OF SELF-INITIALIZING AN ON-CHIP DATA PROCESSING APPARATUS - An on-chip data processing apparatus has an operating supply voltage selected from a range of supply voltages and has voltage level detection circuitry configured to determine the level of the operating supply voltage. The voltage level detection circuitry comprises adaptive circuitry responsive to a variation in the reference voltage. Phase lock loop circuitry is configured to generate a source clock signal from the operating supply voltage, to receive the voltage level selection signal, to select a target frequency for the source clock signal in dependence on the voltage level selection signal, and to phase lock the source clock signal on the target frequency. Initialization circuitry is configured to initialize the on-chip data processing apparatus for data processing in dependence on the level of said operating supply voltage after the phase lock loop circuitry has phase locked the source clock signal on the target frequency. | 2014-02-13 |
20140043072 | SEMICONDUCTOR DEVICE AND POWER CONTROL METHOD THEREFOR - A semiconductor device comprises a plurality of circuit blocks, a plurality of local wirings which supply power to the plurality of circuit blocks, respectively, a global wiring which supplies the power to the plurality of local wirings, a plurality of first switches which are disposed between the plurality of local wirings, respectively, and the global wiring, and a second switch which is disposed between two local wirings. A power control unit controls open/close of the plurality of first switches and the second switch based on the potential difference between the two local wirings. | 2014-02-13 |
20140043073 | CLOCK SYNCHRONIZATION CIRCUIT AND SEMICONDUCTOR DEVICE - A clock synchronization circuit is configured to capture an input data bit according to an input clock signal, and to synchronize and output the input data bit. The clock synchronization circuit includes a clock buffer for generating an internal clock signal according to the input clock signal and transmitting the internal clock signal to a clock line. The clock synchronization circuit further includes a D flip-flop for capturing and outputting the input data bit at an edge timing of the internal clock signal. The clock buffer includes an inverter core portion and an electric current suppressing portion. The inverter core portion is configured to generate the internal clock signal through alternately supplying an electric current to the clock line and drawing the electric current from the clock line according to the input clock signal. The electric current suppressing portion is configured to suppress an amount of the electric current. | 2014-02-13 |
20140043074 | Frequency Tuning Based on Characterization of an Oscillator - Aspects of a method and system for frequency tuning based on characterization of an oscillator are provided. In this regard, a frequency of an oscillator in an integrated circuit may be controlled based on a first digital control word, a frequency of a tuned circuit may be controlled based on a second digital control word, and the second control word may be determined utilizing a mapping between the first control word and the second control word. The frequency of the oscillator and the tuned circuit may be controlled by adjusting a capacitance of the oscillator and tuned circuit, respectively. The mapping may be based on a relationship between the oscillator and the tuned circuit, such as logical and/or mathematical relationship between the capacitance of the oscillator and the capacitance of the tuned circuit and/or the relationship between the frequency of the oscillator and the frequency of the tuned circuit. | 2014-02-13 |
20140043075 | SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE - A semiconductor device includes a clock input circuit that receives an external clock signal, a PLL circuit for input timing control that performs phase adjustment between the external clock signal and a delayed clock signal to generate an internal clock signal used to acquire input data, and a delay circuit that delays the internal clock signal to output the internal clock signal that is delayed to a PLL circuit for input timing control as a delayed clock signal. The semiconductor device further includes a PLL circuit for output timing control that performs phase adjustment between the external clock signal and a delayed clock signal to generate an internal clock signal used to output output data, and a delay circuit that delays the internal clock signal to output the internal clock signal that is delayed to the PLL circuit for output timing control as a delayed clock signal. | 2014-02-13 |
20140043076 | Pulsed Gate Driver - A gate driver includes a control input receiving a control signal, an output to provide an amplified output signal to the gate, and controller. The controller produces an adaptive pulse train varying with the control signal. An adaptive incrementer produces a sequence of numbers that set a slew rate of the switch, and a look-up table is fed with the sequence of numbers, and associates the numbers produced by the adaptive incrementer with values representing the duty cycle of the output signal to control the slew rate of the switch. The switch can be driven at various intermediate levels, and allows gate drive conditions to adapted to abnormal system states by varying the control input signal. The adaptive response allows the slew rate to vary without replacing any gate driver circuit components. Because the gate current is provided adaptively, the delivery of gate current results in low power dissipation. | 2014-02-13 |
20140043077 | Method and System for Controlling HS-NMOS Power Switches with Slew-Rate Limitation - A method and system for limiting the slew rate of the output voltage of one or more high side (HS) NMOS power switches is disclosed. A circuit arrangement configured to control a first NMOS switch is described. The arrangement comprises voltage provisioning means configured to supply a gate voltage to a gate terminal of the first NMOS switch; current provisioning means configured to provide a current; a first control stage configured to provide and/or remove a connection between the gate terminal of the first NMOS switch and the voltage provisioning means, thereby switching the first NMOS switch to an on-state and/or an off-state, respectively; and a first feedback control link between an output terminal of the first NMOS switch and the current provisioning means configured to control the slew-rate of a voltage at the first output terminal. | 2014-02-13 |
20140043078 | OPTIMIZED FLIP-FLOP DEVICE WITH STANDARD AND HIGH THRESHOLD VOLTAGE MOS DEVICES - A flip-flop operating with standard threshold voltage MOS devices as compared with high threshold voltage MOS devices may have improved speed performance, but greater leakage current. Likewise, a flip-flop operating with high threshold voltage MOS devices may reduce the leakage current and have better power efficiency, but decreased speed and performance. An optimized flip-flop may include a combination of standard threshold voltage MOS devices and high threshold voltage MOS devices. The optimized flip-flop may have less leakage during stand-by mode as compared to a flip-flop with standard threshold voltage MOS devices. In addition, the optimized flip-flop may have better performance and speed as compared to a flip-flop with high threshold voltage MOS devices. | 2014-02-13 |
20140043079 | INTERCHANNEL SKEW ADJUSTMENT CIRCUIT - An interchannel skew adjustment circuit adjusts signal skew between a first channel and a second channel. The circuit includes a phase adjustment circuit configured to receive a signal of the first channel, delay the signal by a discretely variable delay amount, and output a delayed signal; a channel coupling circuit configured to receive the signal output from the phase adjustment circuit and a signal of the second channel, and detect a phase difference between these two signals; and a controller configured to control the delay amount in the phase adjustment circuit based on a result detected by the channel coupling circuit. This interchannel skew adjustment circuit adjusts the interchannel signal skew only at a sender or a receiver, thereby reducing the circuit area and the power consumption. | 2014-02-13 |
20140043080 | METHODS AND SYSTEMS FOR CONTROLLING A POWER CONVERTER - A line angle shift logic controller for use with a power generation system coupled to an electrical grid is disclosed. The line angle shift controller includes a line angle shift controller configured to receive a phase locked loop (PLL) error signal representative of a difference between a phase angle of the power generation system and a phase angle of the electrical grid, receive a threshold phase from the electrical grid, and generate a PLL shift signal based at least partially on the PLL error signal and the threshold phase. | 2014-02-13 |
20140043081 | SAMPLE-AND-HOLD CIRCUIT FOR GENERATING A VARIABLE SAMPLE DELAY TIME OF A TRANSFORMER AND METHOD THEREOF - A sample-and-hold circuit for generating a variable sample delay time of a transformer includes a discharge detection unit, a sample delay time generation unit, and a comparator. The discharge detection unit generates a first voltage according to a first turning-on signal and a first reference current. Length of the first turning-on signal is varied with a discharge time of a present period of the transformer. The sample delay time generation unit generates a second voltage according to the first turning-on signal and a second reference current. The comparator generates a sample signal to a control circuit of the transformer according to a first voltage corresponding to a previous period of the transformer and a second voltage corresponding to the present period of the transformer. The first reference current is K times the second reference current, and 02014-02-13 | |
20140043082 | CLOCK GENERATION METHOD AND SYSTEM - The clock generation method contains the following steps. In a pulse recognition step, an input pulse signal is first filtered to remove a shorter signal. Then, a width digitization calculation is conducted on the remaining pulse signal. Based on the width digitization calculation, a signal is recorded and a period of the recorded signal is determined. The value of the period is delivered to a gain module. In a step for verifying the input value to D/A converter, two values are input to a D/A converter from the gain module, and the output from the D/A converter is delivered to an oscillator. The gain module determines a desired input value from the gain module to the D/A converter. In a pulse generation step, the gain module inputs the desired input value to the D/A converter which in turn delivers to the oscillator for the generation of a corresponding clock. | 2014-02-13 |
20140043083 | PULSE GENERATOR - Provided is a pulse generator that generates a pulse signal with a preferred waveform and offers increased isolation for a period of time when the pulse signal is not output. | 2014-02-13 |
20140043084 | SIGNAL ELECTRIC POTENTIAL CONVERSION CIRCUIT - In a signal electric potential conversion circuit, a capacitor has one end receiving an input signal CIN, and the other end connected to a termination node N1. A conversion circuit receives a potential IN of the termination node N1. A connection element is provided between a power supply VDDH and the termination node N1, and an impedance of the connection element is reduced when the potential IN is lower than a first potential. Another connection element is provided between the termination node N1 and a ground power supply, and an impedance of the connection element is reduced when the potential IN is higher than a second potential. | 2014-02-13 |
20140043085 | Feedback Control Circuit for a Hall Effect Device - A feedback control circuit comprises an adjustable element, a main signal path and a feedback control loop. The adjustable element is configured to offset a signal in accordance with an offset control signal and output an offset signal. The main signal path comprises a first comparator to process the offset signal to output a main signal. The feedback control loop comprises a second comparator to process the offset signal to output a tracking signal, a first signal evaluator to evaluate the tracking signal and a first controller to output the offset control signal based on the evaluated tracking signal. The feedback control loop further comprises a second signal evaluator to detect a difference between a signal property of the main signal and the tracking signal and a second controller to control one of the comparators or the adjustable element such that the difference is reduced. | 2014-02-13 |
20140043086 | MIXER - A frequency converter, capable of obtaining resonance characteristics having a high Q factor and a high multiplication signal and having a narrow-band frequency selectivity function, is provided by the following configuration. A magnetoresistance effect element includes a pinned magnetization layer, a free magnetization layer, and a non-magnetic spacer layer disposed between the pinned magnetization layer and the free magnetization layer. In response to an input of a high frequency signal and a local signal, the magnetoresistance effect element generates a voltage signal (multiplication signal) by multiplying the signals by each other using a magnetoresistance effect. A magnetic field generated by a magnetic-field applying unit is applied to the free magnetization layer of the magnetoresistance effect element in a direction perpendicular to a film surface direction or by tilting an angle of the magnetic field from the film surface direction toward a direction perpendicular to the film surface direction. | 2014-02-13 |
20140043087 | HIGH ACCURACY BIPOLAR CURRENT MULTIPLIER WITH BASE CURRENT COMPENSATION - A bipolar current multiplier apparatus and method includes a group of negative feedback loop circuits for compensating base current loss, and multiple bipolar devices that communicate electronically with the negative feedback loop circuits, wherein the bipolar devices are responsive to base currents capable of being self-cancelled due to a presence of the negative feedback loop circuits, thereby ensuring that an output is stabilized over temperature and process variations while providing for a wide input dynamic range. In some embodiments, the bipolar current multiplier apparatus can be associated with a preamplifier for a hard disk drive to calculate the output power associated with a power driver that controls the flying height of read/write heads of the hard disk drive. | 2014-02-13 |
20140043088 | SEMICONDUCTOR DEVICE AND RECEIVER - According to one embodiment, there is provided a semiconductor device including a first amplifier and a second amplifier. The first amplifier has an input terminal to receive a first signal and an output terminal to output a second signal. The second amplifier is configured to receive the first signal and a correction data, to generate a correction signal according to the first signal and the correction data, and to output the generated correction signal to the output terminal of the first amplifier so as to add the first signal and the generated correction signal. | 2014-02-13 |
20140043089 | DIGITALLY CONTROLLED HIGH SPEED HIGH VOLTAGE GATE DRIVER CIRCUIT - The present invention relates to semiconductor technology. In particular, the present invention relates to high-speed, high voltage switching for a high voltage generator for an X-ray system. Switching elements, e.g. IGBTs or MOS-FETs, are employed for high-speed high voltage switching. However, circuit elements or parasitic elements at an input of the switching element limit the switching speed of the switching element. The present invention proposes applying a higher than allowed voltage to the input of the switching element, e.g. a voltage higher than the maximum allowed gate voltage of an IGBT or MOS-FET, to increase switching speed. A feedback loop is provided for save operation. thus, a switching circuit ( | 2014-02-13 |
20140043090 | OUTPUT BUFFER AND SIGNAL PROCESSING METHOD - An output buffer comprises a series connection of a first field effect transistor and a second field effect transistor, wherein the first field effect transistor is connected to a first supply potential terminal and the second field effect transistor is connected to a second supply potential terminal. An output terminal is connected to a common connection of the first transistor and the second transistor. The output buffer has a series connection of a resistive element and a capacitive element, wherein the capacitive element is connected to the output terminal, and a control circuit, to which an input signal is provided. The control circuit controls the transistors in such a way that turning off of a transistor is performed immediately, while turning on of a transistor is performed depending on the charging or discharging of the capacitive element, thus achieving a defined slew rate of the output signal at the output terminal. | 2014-02-13 |
20140043091 | Voltage Output Circuit and Apparatus for Selectively Outputting Negative Voltage Using the Same - An apparatus selectively outputs one negative voltage from among a plurality of negative voltages. The apparatus includes a first switching unit configured to perform a switching operation and output a first voltage-on signal and a first voltage-off signal according to a selection signal and a first negative voltage signal, and a second switching unit configured to perform a switching operation and to output a second voltage-on signal and a second voltage-off signal according to the selection signal and a second negative voltage signal. The apparatus also includes a driving unit to select and output one negative voltage signal from among the first and second negative voltage signals according to the first negative voltage signal, the second negative voltage signal, the first voltage-on signal, the first voltage-off signal, the second voltage-on signal, and the second voltage-off signal. | 2014-02-13 |
20140043092 | INPUT SWITCHES IN SAMPLING CIRCUITS - A switch may include a MOS transistor alternatively operating in an ON phase and an OFF phase, a first voltage level shifter, and a second voltage level shifter. The MOS transistor may include a source for receiving an input signal, a drain for connecting to a load, and a gate. The first voltage level shifter may be selectively coupled between the source and the gate during the ON phase, and the second voltage level shifter may be selectively coupled between the gate and the source during the OFF phase. | 2014-02-13 |
20140043093 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE - Direct-path current is reduced in a semiconductor device including CMOS circuits. One embodiment of the present invention is a method for driving a semiconductor device that includes a first CMOS circuit between power supply lines, a first transistor between the power supply lines, a second CMOS circuit between the power supply lines, and a second transistor between an output terminal of the first CMOS circuit and an input terminal of the second CMOS circuit. The first transistor and the second transistor each have lower off-state current than a transistor included in the first CMOS circuit. In a period during which the voltage of a first signal input to the first CMOS circuit is changed, a second signal is input to the first transistor and the second transistor to turn off the first transistor and the second transistor. | 2014-02-13 |
20140043094 | SEMICONDUCTOR DEVICE AND METHOD FOR DRIVING SEMICONDUCTOR DEVICE - A semiconductor device includes a first transistor having a p-channel type, a second transistor having an n-channel type, and a third transistor with low off-state current between a high potential power supply line and a low potential power supply line, and a source terminal and a drain terminal of the third transistor are connected so that the third transistor is connected in series with the first transistor and the second transistor between the high potential power supply line and the low potential power supply line, and the third transistor is turned off when both the first transistor and the second transistor are in conducting states. | 2014-02-13 |
20140043095 | VOLTAGE-STABILIZING CIRCUIT - A voltage-stabilizing circuit for stabilizing an output voltage of a power integrated circuit (IC) includes an electronic switch and an RC circuit. The RC circuit includes a resistor and a capacitor. A first terminal of the resistor receives an enable signal and is connected to a control terminal of the electronic switch. A second terminal of the resistor is grounded through the capacitor, and is further connected to an enable pin of the power IC. A first terminal of the electronic switch is connected to a node between the resistor and the capacitor. A second terminal of the electronic switch is grounded. | 2014-02-13 |