| 06th week of 2012 patent applcation highlights part 55 |
| Patent application number | Title | Published |
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| 20120036258 | STORAGE NETWORK SYSTEM, MANAGING APPARATUS, MANAGING METHOD AND PROGRAM - A management computer includes a memory storing toplogical information including identifiers of ports of computers, storage apparatuses, and switches. The management computer includes a processor, which is configured to: collect a plurality of performance information of the ports, and a plurality of access times from computer ports to the storage apparatuses; evaluate that a certain access time among the plurality of access times exceeds a predetermined allowable range; search a first access path to which the certain access time corresponds; search at least one second access path starting from a first computer port on the first access path; and search performance information of certain ports which are on the at least one second access path in order to display the searched performance information. | 2012-02-09 |
| 20120036259 | Use of Behavioral Portraits in Web Site Analysis - A method is provided for determining a website user behavioral portrait based on navigation on the website and dynamically reconfiguring web pages based on those portraits. In accordance with the method, data relating to the progress of a user through a website is recorded, and an ongoing behavioral portrait of the user is built based on the data. The portrait is then used to dynamically reconfigure web content. | 2012-02-09 |
| 20120036260 | Tracking Changes to Content on an External Source in an Online Social Network - In one embodiment, a method includes accessing a profile page of a user of an online social network, determining whether content on an external web site has been update by the user, and if the content on the external web site has been updated, then updating the profile page of the user to include the content. | 2012-02-09 |
| 20120036261 | COMMUNICATION MANAGEMENT UTILIZING DESTINATION DEVICE USER PRESENCE PROBABILITY - An apparatus, system and method for forwarding a communication from a communication receiving device to a destination device based upon the identity of the user of the destination device. | 2012-02-09 |
| 20120036262 | SYSTEM AND METHOD OF RESOURCE REPLICATION DELIVERY TO MULTIPLE LOCAL DESTINATIONS - A system and method are provided for streaming resource replication, registration and delivery. A nonlocal streaming resource is replicated in a local network as a local multicast resource. The local multicast source is registered on a resource management server with an entry which identifies the nonlocal resource and contains information for use in locally accessing the local multicast resource. When a local client of the local network requests access to the local multicast resource, the resource management server determines that the local client and the local multicast source are local to each other and provides a response for enabling direct local access by the local client to the local multicast resource. | 2012-02-09 |
| 20120036263 | System and Method for Monitoring and Controlling Access to Web Content - A system and a method are provided for controlling access to web pages. It includes receiving an input to access a web page, and then determining if the Web page is on a work list or a recreation list. The work list includes one or more web pages related to work and the recreation list includes one or more web pages related to recreation. If the web page is not on either list, then a request is issued for a categorization of the web page. Upon receiving the categorization, the web page is stored in the work list or the recreation list, and access is provided to the web page. | 2012-02-09 |
| 20120036264 | Efficient Storage and Retrieval of Resources for Rendering Structured Documents - In one embodiment, a method includes accessing a resource list associated with a structured document loaded by a client application executing within a client device; identifying a first set of resources referenced in the resource list that are stored within a storage space of the client device; retrieving the first set of resources from the storage space; loading the first set of resources into a model representation of the structured document generated by a client document-rendering application for rendering by the client document-rendering application; identifying a second set of resources referenced in the resource list that are not stored within the storage space of the client device; formulating and transmitting one or more requests for the second set of resources; receiving the second set of resources in response to the requests; and loading the second set of resources into the model representation for rendering by the client document-rendering application. | 2012-02-09 |
| 20120036265 | LATE RESOURCE LOCALIZATION BINDING FOR WEB SERVICES - Various embodiments provide a client-side approach to enable late-binding, at the client, of resources associated with linguistic strings that are retrieved from a data source that is secondary to a primary server. The client-side, late-binding approach can be performed in a manner that is generally imperceptible to users and which preserves user interface formatting and client functionality. | 2012-02-09 |
| 20120036266 | METHOD FOR ESTABLISHING DATA CONNECTION ON MOBILE NETWORK, MOBILE NETWORK, AND POLICY CONTROL ENTITY - A method for establishing data connections on a mobile network, a mobile network, and a policy control entity are disclosed. The method includes: establishing a data channel between a user equipment (UE) and a gateway (GW), and allocating an Internet Protocol (IP) address to the UE according to an address allocation request or a data channel setup request sent from the UE; and triggering the policy control entity to establish or update a policy control session according to the IP address. By using the mobile network and the policy control entity under the present invention, after the data channel is established between the UE and the GW, the GW may trigger the policy control entity to establish or update a policy control session. | 2012-02-09 |
| 20120036267 | STREAM RESERVATION PROTOCOL FOR BRIDGED NETWORKS - In one embodiment, a Talker device issues a Talker declaration for a stream. The Talker declaration has a declaration type that advertises the Talker device is offering the stream, and includes a stream ID that uniquely identifies the stream, an indication of resource requirements of the stream, and an indication of a priority of data frames belonging to the stream. The Talker device receives a Listener Declaration from a Listener device of one or more Listener devices. The Listener declaration includes the same stream ID as the Talker declaration and has a declaration type that indicates at least one Listener device is ready to receive the stream and that sufficient resources to meet the resource requirements of the stream have been allocated at one or more intervening bridges that received both the Talker declaration and the Listener declaration. In response the received Listener declaration, transmission of the stream is begun. | 2012-02-09 |
| 20120036268 | METHOD OF OPERATING INTERNET PROTOCOL ADDRESS AND SUBNET SYSTEM USING THE SAME - A method of operating an Internet protocol (IP) address allocates, creates, and processes an interface identifier (ID) of an IP address area. In the allocation, the IP address area includes a subnet prefix area and an Interface ID area, and certain bits of the Interface ID area are used as an index area of a subnet gateway. The allocation is implemented in order from the higher layer to the lower layer so that the Interface ID area is sequentially allocated from the higher bits for the index areas of the respective layers. The combination of the certain bits of the allocated Interface ID and the subnet prefix area of the IP address area is used as the subnet ID of the subnet layers. The lowest subnet gateway allocates the Interface ID to terminating equipment to access the IP network based on a format of the IP address. | 2012-02-09 |
| 20120036269 | COMMUNICATION SYSTEM - One of objects is to reduce a load in a session management and relay process on an SOAP-SIP adaptor for providing a 3PCC service. The SOAP-SIP adaptor (hereinafter the adaptor) receives a connection request message between a first terminal and a second terminal from a Web server, and establishes the sessions with each of the first terminal and the second terminal. After establishing the sessions with each of the first terminal and the second terminal, the adaptor sends a transfer request (REFER) of session to a call control device. Thereafter, the call control device manages session between the first terminal and the second terminal each having established the session with the adaptor. | 2012-02-09 |
| 20120036270 | IP Multimedia Subsystem User Identity Handling - A method of handling IP Multimedia Public Identity registration within an IP Multimedia Subsystem network. The method comprises receiving at a Call Session Control Function a SIP REGISTER message including a completed IP Multimedia Public Identity Attribute-Value-Pair and no IP Multimedia Private Identity. The method further comprises deriving at the Call Session Control Function an IP Multimedia Private Identity using the IP Multimedia Public Identity and sending a Cx query from the Call Session Control Function to a Home Subscriber Server, the query including the IP Multimedia Public Identity and the derived IP Multimedia Private Identity. The Home Subscriber Server identifies a subsubscription using the IP Multimedia Public Identity, and determines that the derived IP Multimedia Private Identity is not associated with said subscription. The HSS the identifies a default IP Multimedia Private Identity associated with subscription associated with said subscription, and returns a Cx response to said Call Session Control Function including said default IP Multimedia Private Identity. The Call Session Control Function uses the received, default IP Multimedia Private Identity to further handle said SIP message. | 2012-02-09 |
| 20120036271 | Network Initiated Alerts to Devices Using a Local Connection - Systems and techniques for managing local communication between a network access point and a host device. Upon connection by a host device to an access point, a local connection link is established between the access point and the host device. A network connection may be established between the access point and the host device, with the network connection being able to pass through the host device to enable communication with and beyond an access network to which the access point provides a connection. Local messages may be passed between the access point and the host device over the local connection link, separately from and independent of communication that may occur over the network connection. | 2012-02-09 |
| 20120036272 | Method and System for Handling Connection Setup in a Network - Certain embodiments of a method and system for handling connection setup in a network may comprise a network interface hardware device (NIHW) that may be operable to receive a services list and/or connection acceptance criteria from a first guest operating system running on a host system, receive a connection request from a second guest operating system running on the host system, and determine whether to allow establishment of the requested connection based on one or both of the services list and the connection acceptance criteria. The determination may be made prior to or during connection set up. The NIHW may maintain a connection state comprising information regarding set up of the requested connection. The services list may comprises one or more of a local network address, a local transport address, a network protocol, and a transport protocol. The communicated acceptance criteria may comprises packet filtering operations and/or security operations. | 2012-02-09 |
| 20120036273 | LOAD BALANCING SESSION INITIATION PROTOCOL (SIP) SERVERS - A device receives Session Initiation Protocol (SIP) requests that include registration information, and load balances a SIP call based on the registration information of the SIP requests. | 2012-02-09 |
| 20120036274 | System and method for adapting information content according to the capability of the access bearer - A communication system is adapted to provide access to application information on an application server utilizing a specific one of multiple radio access types. Access is provided via an access network using an access bearer. The capability of the specifically requested access bearer is sent to the application server to tailor the application information content according to the capability of the specific access bearer. The information content is then transmitted to the requesting device. | 2012-02-09 |
| 20120036275 | MESSAGE TRAFFIC INTERCEPTION SYSTEM - The present invention is a message traffic interception system including a computer-readable medium, a protocol independent execution manager module stored on the medium, the execution manager module having one or more scenario modules which can process an array of predetermined rules for intercepted message traffic, and an interface communication emulator module communicatively coupling protocol-specific message traffic to the execution manager. | 2012-02-09 |
| 20120036276 | STREAMING SERVICE GATEWAY AND METHOD FOR PROVIDING STREAMING SERVICE - A streaming service gateway includes a streaming service adapter, a transcoding module, and a streaming interface. The streaming service adapter communicates with at least one streaming server through at least one of a plurality of streaming protocols. The transcoding module transforms the streaming content from the streaming service adapter into a predetermined format. The streaming interface receives the streaming content with the predetermined format and provides the streaming content with the predetermined format to a streaming client device through a uniform streaming protocol. | 2012-02-09 |
| 20120036277 | Modified Stream Synchronization - A method and system for inter-destination synchronization of at least a first and a second stream is described, wherein the second stream is the output stream of a media stream modification unit using the first stream as an input stream. The method comprises the steps of: providing first arrival time information of a packet in the first stream arriving at a first synchronization point and second arrival time information of a packet in the second stream arriving at a second synchronization point; providing synchronization correlation information on the synchronicity relationship between said input stream and said output stream; and, calculating delay information on the basis of the first and second arrival time information and the synchronization correlation information. | 2012-02-09 |
| 20120036278 | METHOD AND SYSTEM FOR PACING, ACKING, TIMING, AND HANDICAPPING (PATH) FOR SIMULTANEOUS RECEIPT OF DOCUMENTS - A method for facilitating substantially simultaneous receipt of content included in at least one document by a plurality of intended recipients is disclosed. At least one portion of impactful content is delimited in the at least one document to define at least one impactful block (IBlock). A remaining portion of content is delimited to define at least one non-impactful block (NIBlock). The least one IBlock is transmitted to be received substantially simultaneously by the plurality of intended recipients. | 2012-02-09 |
| 20120036279 | DISTRIBUTED CONNECTIVITY VERIFICATION PROTOCOL REDUNDANCY - In one embodiment, a connectivity verification protocol (CVP) session for a particular virtual interface (VI) may operate on a particular group of two or more line cards (LCs) on a network device. The group of LCs may then transmit CVP session packets, at a reduced rate that is sufficient to maintain the CVP session based on a negotiated CVP full rate, onto the particular VI through ingress path processing on the network device. Ingress path processing, in particular, takes transmitted CVP session packets and egresses them onto an appropriate LC of the network device currently responsible for the VI egress. Also, in response to receiving CVP session packets for the VI on an LC of the network device currently responsible for the VI ingress, the receiving LC may forward the received CVP session packets to the particular corresponding group of LCs, which may then process the received CVP session packets. | 2012-02-09 |
| 20120036280 | DIGITALLY SHREDDING ON REMOVABLE DISK DRIVES - Embodiments provide unique and novel systems and methods for deleting data on removable disk drives. In embodiments, the removable disk drives store data that may be erased such that the data is considered destroyed but that allows the removable disk drive to be reused. The archiving system can determine which data should be erased. Then, the data is digitally shredded on sector boundaries of the removable disk drives such that the reclaimed memory cannot be read to decipher the erased data. In alternative embodiments, data is written across sector boundaries such that two or more files may occupy a single sector. A journal area, in embodiments, allows for copying the data in a sector with two or more files, digitally shredding the sectors in the removable disk drive, and rewriting the data that was not to be digitally shredded to the original location of the data. | 2012-02-09 |
| 20120036281 | APPARATUS AND METHOD FOR PACKET BASED STORAGE VIRTUALIZATION - The present invention provides a method and apparatus for data processing and virtualization. The method and apparatus are configured to receive communications, separate a command communication from a data communication, parallel process the command communication and the data communication, generate at least one virtual command based on the command communication, and generate virtual data according to the at least one virtual command. The apparatus can comprise a parallel virtualization subsystem configured to separate data communications from command communications and to parallel process the command communications and the data communications, to generate virtual commands and to generate virtual data according to a virtual command, and a physical volume driver coupled with the parallel virtualization subsystem, wherein the physical volume driver receives the virtual data and configures the virtual data. | 2012-02-09 |
| 20120036282 | SMART CARD DRIVEN DEVICE CONFIGURATION CHANGES - A smart card determines if the smart card has been inserted into a device, and retrieves a device identifier and at least one application configuration value from the device if the smart card has been inserted into the device. The smart card compares the retrieved device identifier and the at least one application configuration value with a device identifier and at least one application configuration value previously stored in the smart card. The smart card causes the retrieved device identifier and the at least one application configuration value to be sent to an Over The Air (OTA) server if the comparison indicates that the retrieved device identifier or the at least one application configuration value is different than the previously stored device identifier or the at least one application configuration value, so that the OTA server can supply application parameter changes to the mobile device for future device operation. | 2012-02-09 |
| 20120036283 | SUBMODULE AND METHOD FOR EXCHANGING PERIPHERAL DATA - A method for exchanging peripheral data and submodule, wherein a transfer means is embedded into an operating system of the submodule for the exchange of the peripheral data with a main module to accelerate a process of copying input/output data from a decentralized peripheral system to a superordinate level. | 2012-02-09 |
| 20120036284 | ELECTRONIC DEVICE AND DIGITAL INTERFACE DETERMINING METHOD OF CONNECTED EXTERNAL DEVICE - [Object] To determine the digital interface of a connected external device at a circuit, whereby the operation of a data transmission unit can be switched in accordance with the digital interface of the connected external device. | 2012-02-09 |
| 20120036285 | VIDEO DEVICE - A video device includes a signal generating circuit configured for generating video signals; an internal resistor connected to the output port of the signal generating circuit and matching with an external resistor of an external device; a detecting circuit connected to two ends of the internal resistor through two input ports thereof, and configured for detecting voltages of the two ends of the internal resistor and outputting a voltage difference therebetween; a controlling circuit connected to the output port of the detecting circuit, and configured for determining whether or not the external device is connected to the video device according to the voltage deference, and outputting a controlling signal to the signal generating circuit; an auxiliary detecting circuit connected to the output port of the controlling circuit, and configured for generating an auxiliary detecting signal transmitted to the internal resistor. | 2012-02-09 |
| 20120036286 | DATA TRANSFER SYSTEM AND DATA TRANSFER METHOD - An efficient transfer of data including a plurality of data sections is achieved. In a data transfer system including a first DMA | 2012-02-09 |
| 20120036287 | STORAGE DEVICES WITH BI-DIRECTIONAL COMMUNICATION TECHNIQUES AND METHOD OF FORMING BI-DIRECTIONAL COMMUNICATION LAYER BETWEEN THEM - A storage device includes a storage media storing an information structure for establishing a bidirectional communication layer and a controller configured to send the information structure to an external device according to an information structure read/write command. A layer for a bidirectional communication between the storage device and the external device is formed according to the information structure. | 2012-02-09 |
| 20120036288 | SYSTEMS AND METHODS FOR USING A SHARED BUFFER CONSTRUCT IN PERFORMANCE OF CONCURRENT DATA-DRIVEN TASKS - Disclosed herein are techniques to execute tasks with a computing device. A first task is initiated to perform an operation of the first task. A buffer construct that represents a region of memory accessible to the operation of the first task is created. A second task is initiated to perform of an operation of the second task that is configured to be timed to initiate in response to the buffer construct being communicated to the second task from the first task. | 2012-02-09 |
| 20120036289 | Data Flow Control Within and Between DMA Channels - In one embodiment, a direct memory access (DMA) controller comprises a transmit circuit and a data flow control circuit coupled to the transmit circuit. The transmit circuit is configured to perform DMA transfers, each DMA transfer described by a DMA descriptor stored in a data structure in memory. There is a data structure for each DMA channel that is in use. The data flow control circuit is configured to control the transmit circuit's processing of DMA descriptors for each DMA channel responsive to data flow control data in the DMA descriptors in the corresponding data structure. | 2012-02-09 |
| 20120036290 | METHOD AND SYSTEM FOR INPUT/OUTPUT PADS IN A MOBILE MULTIMEDIA PROCESSOR - Methods and systems for a low noise amplifier with tolerance to large inputs are disclosed and may include generating at least one control signal that controls a plurality of directional modes of at least one contact pad on a mobile multimedia processor (MMP) in an integrated circuit. Selectable modes may include: bidirectional, input, and an output mode. Each of the modes includes a bypass mode and a processing mode that may be controlled by the generated control signal. Received data may be processed by circuitry in the MMP when the processing mode may be enabled. Received data may be passed through the MMP without being processed by the MMP when the bypass mode may be enabled. An additional signal may be generated to dynamically pull-down a potential of the at least one contact pad and/or to pull-up a potential of said at least one contact pad. | 2012-02-09 |
| 20120036291 | STREAM PRIORITY - A system, method and apparatus for prioritizing transactions is disclosed. I/O devices may generate transactions with a stream identifier. A transaction classifier may assign a priority to a transaction based upon a stream identifier of the transaction. An arbiter may select a transaction for processing based upon priorities assigned to the transaction. | 2012-02-09 |
| 20120036292 | POLLING IN A VIRTUALIZED INFORMATION HANDLING SYSTEM - A software thread is dispatched for causing the system to poll a device for determining whether a condition has occurred. Subsequently, the software thread is undispatched and, in response thereto, an interrupt is enabled on the device, so that the device is enabled to generate the interrupt in response to an occurrence of the condition, and so that the system ceases polling the device for determining whether the condition has occurred. Eventually, the software thread is redispatched and, in response thereto, the interrupt is disabled on the device, so that the system resumes polling the device for determining whether the condition has occurred. | 2012-02-09 |
| 20120036293 | PCI EXPRESS ENHANCEMENTS AND EXTENSIONS - A method and apparatus for enhancing/extending a serial point-to-point interconnect architecture, such as Peripheral Component Interconnect Express (PCIe) is herein described. Temporal and locality caching hints and prefetching hints are provided to improve system wide caching and prefetching. Message codes for atomic operations to arbitrate ownership between system devices/resources are included to allow efficient access/ownership of shared data. Loose transaction ordering provided for while maintaining corresponding transaction priority to memory locations to ensure data integrity and efficient memory access. Active power sub-states and setting thereof is included to allow for more efficient power management. And, caching of device local memory in a host address space, as well as caching of system memory in a device local memory address space is provided for to improve bandwidth and latency for memory accesses. | 2012-02-09 |
| 20120036294 | COMPUTER INTEGRATED DISPLAY INTEGRATED DISPLAY AND CONTROL METHOD OF THE SAME - A computer integrated display and a control method of the same, the computer integrated display including at least one built-in universal serial bus (USB) device, a USB controller to control the built-in USB device, a USB output connector which is connected to a USB cable, a switch, and a controller to control the switch to connect the built-in USB device to the USB controller or the USB output connector. Accordingly, a function of a built-in USB device is provided to an external device communicatively coupled to the computer integrated display and a control method of the same. | 2012-02-09 |
| 20120036295 | CONTROLLED DEVICE - The controlled device includes: an external terminal; a memory; a processor for controlling the memory according to a control signal received via the external terminal; a plurality of buses forming a first transmission path connecting the external terminal and the memory via the processor, and a second transmission path connecting the external terminal and the memory directly by bypassing the processor; and a switching unit for switching a transmission state to either a first transmission state in which one or more of the buses forming the first transmission path are caused to transmit the control signal from the external terminal to the processor according to a first protocol, or a second transmission state in which one or more of the buses forming the second transmission path are caused to transmit data directly between the external terminal and the memory according to a second protocol capable of transmitting data at a higher rate than the first protocol. | 2012-02-09 |
| 20120036296 | INTERCONNECT THAT ELIMINATES ROUTING CONGESTION AND MANAGES SIMULTANEOUS TRANSACTIONS - A method, apparatus, and system are described, which generally relate to an integrated circuit having an interconnect. The flow control logic for the interconnect applies a flow control splitting protocol to permit transactions from each initiator thread and/or each initiator tag stream to be outstanding to multiple channels in a single aggregate target at once, and therefore to multiple individual targets within an aggregate target at once. The combined flow control logic and flow control protocol allows the interconnect to manage simultaneous requests to multiple channels in an aggregate target from the same thread or tag at the same time. | 2012-02-09 |
| 20120036297 | HYBRID IN-VEHICLE INFOTAINMENT NETWORK - A hybrid in-vehicle infotainment network includes a core high-speed network having a number of high-speed nodes, each of which may be connected to at least one other high-speed node via a high-speed backbone link. At least some high-speed nodes may be hybrid nodes. Hybrid nodes may communicate with one or more low-speed devices via one or more low-speed links. Each hybrid node, along with any connected low-speed devices, forms a respective local low-speed network. In some embodiments, hybrid nodes may conform with a 1394 specification for high-speed backbone link communications and may conform with a universal serial bus (USB) specification for low-speed link communications. Communications via the high-speed backbone links and the low-speed links may use a common application layer having defined therein a same maximum packet size and a same set of commands and vendor-specific identifiers. | 2012-02-09 |
| 20120036298 | INTERRUPT SOURCE CONTROLLER WITH SCALABLE STATE STRUCTURES - A data processing system includes a processor core, a system memory, coupled to the processor core, that includes an interrupt data structure including a plurality of entries each associated with a respective one of a plurality of interrupts. An input/output (I/O) subsystem including at least one I/O host bridge and a plurality of partitionable endpoints (PEs) each having an associated PE number. The I/O host bridge, responsive to receiving a message signaled interrupt (MSI) including at least a message address, determines from the message address a system memory address of a particular entry among the plurality of entries in the interrupt data structure, accesses the particular entry, and, based upon contents of the particular entry, validates authorization of an interrupt source to issue the MSI and presents an interrupt associated with the particular entry for service. | 2012-02-09 |
| 20120036299 | Secure Information Processing - Apparatus, systems, and methods may operate to receive from a requesting device, at a memory device, a request to access a memory domain associated with the memory device, and to deny, by the memory device, the request if the memory domain comprises any part of a secure domain, and the requesting device has not asserted a secure transfer indication. Additional operations may include granting the request if the memory domain comprises some part of the secure domain and the requesting device has asserted the secure transfer signal, or if the memory domain comprises only a non-secure domain. Additional apparatus, systems, and methods are disclosed. | 2012-02-09 |
| 20120036300 | CONTROLLER AND ELECTRIC CONTROL UNIT INCLUDING THE SAME - A controller capable of inhibiting storage of prescribed information associated with a control operation when the control operation cannot be normally performed, and resuming the storage immediately after the control operation has again become able to be normally performed. The controller includes determining means for determining whether or not the control operation can be normally performed on the basis of a power level of electrical power supplied to the controller, write-inhibiting means for setting a storage area for storing the information to a write-inhibited area in cases where it is determined that the control operation cannot be normally performed, and releasing means for releasing, as an interrupt process higher in priority than any other process, the write inhibited area in cases where it is determined after the setting of the storage area to the write-inhibited area that the control operation can be normally performed. | 2012-02-09 |
| 20120036301 | PROCESSOR SUPPORT FOR FILLING MEMORY REGIONS - Techniques are disclosed relating to distributing workloads between processors and/or processing elements. A computer system having at least first and second processing elements may cause a request to initialize one or more memory regions to be handled by the second processing element. Initialization may be accomplished by the second processing element directly accessing a memory that includes the specified memory region to be initialized. Thus, while the second processing element is causing the memory region to be initialized, the first processing element is free to perform other computational tasks. A cache associated with the first processing element may be undisturbed as a result of the second processing element performing the initialization, which may avoid displacement of data from the cache. | 2012-02-09 |
| 20120036302 | DETERMINATION OF ONE OR MORE PARTITIONABLE ENDPOINTS AFFECTED BY AN I/O MESSAGE - A data processing system includes a processor core, a system memory including a first data structure including a plurality of entries mapping requester identifiers (IDs) to partitionable endpoint (PE) numbers, and an input/output (I/O) subsystem including a plurality of PEs each having an associated PE number, where each of the plurality of PEs including one or more requesters each having a respective requester ID. An I/O host bridge, responsive to receiving an I/O message including a requester ID and an address, determines a PE number by reference to a first entry from the first data structure, and responsive to determining the PE number, accesses a second entry of the second data structure utilizing the PE number as an index and validates the address by reference to the accessed entry in the second data structure. The I/O host bridge, responsive to successful validation, provides a service indicated by the I/O message. | 2012-02-09 |
| 20120036303 | APPARATUS AND METHODS FOR OPTICALLY-COUPLED MEMORY SYSTEMS - Optically-coupled memory systems are disclosed. In one embodiment, a system memory includes a carrier substrate, and a controller attached to the carrier substrate and operable to transmit and receive optical signals, and first and second memory modules. The module substrate of the first memory module has an aperture formed therein, the aperture being operable to provide an optical path for optical signals between the controller and an optical transmitter/receiver unit of the second memory module. | 2012-02-09 |
| 20120036304 | INJECTION OF I/O MESSAGES - A data processing system includes a processor core, a system memory coupled to the processor core, an input/output adapter (IOA), and an input/output (I/O) host bridge coupled to the processor core and to the IOA. The I/O host bridge includes a register coupled to receive I/O messages from the processor core, a buffer coupled to receive I/O messages from the IOA, and logic coupled to the register and to the buffer that services I/O messages received from the register and from the buffer. | 2012-02-09 |
| 20120036305 | DETERMINATION VIA AN INDEXED STRUCTURE OF ONE OR MORE PARTITIONABLE ENDPOINTS AFFECTED BY AN I/O MESSAGE - A data processing system includes a processor core, a system memory including a first data structure including entries mapping requester identifiers (IDs) to partitionable endpoint (PE) numbers and a second data structure, and an input/output (I/O) subsystem including an I/O bridge and a plurality of PEs each including one or more requesters each having a respective requester ID. The I/O host bridge, responsive to receiving an I/O message including a requester ID, determines a PE number by reference to a first entry from the first data structure, and responsive to determining the PE number, accesses a second entry of the second data structure utilizing the PE number as an index, where the second entry indicating one or more of the plurality of PEs affected by the message. The I/O host bridge services the I/O message with reference to each of the plurality of PEs indicated by the second entry. | 2012-02-09 |
| 20120036306 | SWITCHING CIRCUIT, INFORMATION PROCESSING APPARATUS, AND SWITCHING CIRCUIT CONTROL METHOD - A switching circuit connected to an I/O device having a plurality of functions, the switching circuit comprising: a processing unit that includes tables, each of which corresponds to one of the function of the I/O device, when the processing unit receives a packet that instructs to add a function to the I/O device, configured to select the table that contains a bus number of a destination of the received packet, and configured to notify a number of the selected table; and a filter configured to change a function number of the destination of the received packet to the number of the table notified from the processing unit. | 2012-02-09 |
| 20120036307 | COMPUTER ARCHITECTURE WITH SELF-CONTAINED MODULES - The invention relates to the structure, data links and the interconnection of the main logical sections of a computer. The computer architecture consists of N self-contained modules that are connected with the aid of switches to the bus of one or N terminals via a bus corresponding to each module, each module comprises a central processor, a main memory, drives, input-output devices, peripheral items, a bus and a software. The specific features of the other variants of a computer architecture are that the software to be loaded for execution in the main memory of the module is stored entirely or in part on drives which, during the operation of the module, are in a hardware “read-only” mode and in that the software is loaded in the core memory of the module either in advance prior to the operation of the module, or in the module core memory during the operation thereof or in part in the core memory of the module prior to the module operation and in part in the core memory of the module during the operation thereof. The technical result is the protection of the computer against viruses and unauthorized copying of the software. | 2012-02-09 |
| 20120036308 | SUPPORTING A SECURE READABLE MEMORY REGION FOR PRE-BOOT AND SECURE MODE OPERATIONS - In one embodiment, the present invention includes a method for determining whether an address map of a system includes support for a read only region of system memory, and if so configuring the region and storing protected data in the region. This data, at least some of which can be readable in both trusted and untrusted modes, can be accessed from the read only region during execution of untrusted code. Other embodiments are described and claimed. | 2012-02-09 |
| 20120036309 | COORDINATED GARBAGE COLLECTION FOR RAID ARRAY OF SOLID STATE DISKS - An optimized redundant array of solid state devices may include an array of one or more optimized solid-state devices and a controller coupled to the solid-state devices for managing the solid-state devices. The controller may be configured to globally coordinate the garbage collection activities of each of said optimized solid-state devices, for instance, to minimize the degraded performance time and increase the optimal performance time of the entire array of devices. | 2012-02-09 |
| 20120036310 | DATA PROCESSING DEVICE - A data processing device is provided enabling faster read access to data in an on-chip EEPROM with relative ease, without increasing the area occupied by the chip and its power consumption. The on-chip nonvolatile memory included in the data processing device is provided with a pre-read cache which latches all or part of data, once having been read to bit lines from an array of nonvolatile memory cells by selecting a row address, and a selecting circuit which selects a portion of the data latched by the pre-read cache by selecting a portion of columns. Control is performed to retain address information for data latched by the pre-read cache, inhibit latching new data into the pre-read cache for read access to data in the nonvolatile memory according to the same address as the retained address information, and cause the selecting circuit to select the data latched by the pre-read cache. | 2012-02-09 |
| 20120036311 | CACHE AND DISK MANAGEMENT METHOD, AND A CONTROLLER USING THE METHOD - A cache and disk management method is provided. In the cache and disk management method, a command to delete all valid data stored in a cache, or specific data corresponding to a (*portion? part of the valid data may be transmitted to a plurality of member disks. That is, all of the valid data or the specific data may exist in the cache only, and may be deleted from the plurality of member disks. Accordingly, the plurality of member disks may secure more space, an internal copy overhead may be reduced, and more particularly, solid state disks may achieve better performance. | 2012-02-09 |
| 20120036312 | Wear Leveling Technique for Storage Devices - A method for managing wear levels in a storage device having a plurality of data blocks, the method comprising moving data to data blocks having higher erasure counts based on a constraint on static wear levelness that tightens over at least a portion of the lives of the plurality of data blocks. | 2012-02-09 |
| 20120036313 | METHOD FOR CONTROLLING MEMORY CARD AND METHOD FOR CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY - A method for controlling a memory card which includes a nonvolatile semiconductor memory whose memory area includes a plurality of write areas is disclosed. A first area which is a part of the plurality of write areas is set in accordance with management executed by a first file system. The first file system sequentially writes data along a direction in which addresses of the plurality of write areas increase. A second area which is a part of the plurality of write areas is set in accordance with management executed by a second file system. The second file system writes data in an order which does not depend on the addresses. | 2012-02-09 |
| 20120036314 | MEMORY DEVICES HAVING PROGRAMMABLE ELEMENTS WITH ACCURATE OPERATINGPARAMETERS STORED THEREON - A system with a memory device having programmable elements used to configure a memory system. More specifically, programmable elements, such as antifuses, located on a memory device are programmed during fabrication with measured operating parameters corresponding to the memory device. Operating parameters may include, for example, operating current values, operating voltages, or timing parameters. The memory device is incorporated into a system. Once the memory device is incorporated into a system, the programmable elements may be accessed by a processor such that the memory system can be configured to optimally operate in accordance with the operating parameters measured for the memory device in the system. | 2012-02-09 |
| 20120036315 | Morphing Memory Architecture - A memory circuit comprises a memory array including a plurality of memory cells, multiple word lines, and at least one bit line. Each of the memory cells is coupled to a unique pair of a bit line and a word line for selectively accessing the memory cells. The memory circuit further includes at least one control circuit coupled to the word lines and operative to selectively change an operation of the memory array between a first data storage mode and at least a second data storage mode as a function of at least one control signal supplied to the control circuit. In the first data storage mode, each of the memory cells is allocated to a corresponding stored logic bit, and in the second data storage mode, at least two memory cells are allocated to a corresponding stored logic bit. | 2012-02-09 |
| 20120036316 | EMBEDDED-DRAM PROCESSING APPARATUS AND METHODS - An embedded-DRAM processor architecture includes a DRAM array, a set of register files, set of functional units, and a data assembly unit. The data assembly unit includes a set of row-address registers and is responsive to commands to activate and deactivate DRAM rows and to control the movement of data throughout the system. A pipelined data assembly approach allowing the functional units to perform register-to-register operations, and allowing the data assembly unit to perform all load/store operations using wide data busses. Data masking and switching hardware allows individual data words or groups of words to be transferred between the registers and memory. Other aspects of the disclosure include a memory and logic structure and an associated method to extract data blocks from memory to accelerate, for example, operations related to image compression and decompression. | 2012-02-09 |
| 20120036317 | STORAGE SYSTEM AND STORAGE ACCESS METHOD AND PROGRAM - A system has a data structure in which a value can be obtained from a key. In a write access, a first pair and a second pair are stored respectively in a volatile storage device. The first pair is saved in a nonvolatile storage device before returning a response, and the second pair is saved in the first storage device at any time with the second pair saved in the volatile storage device. In a read access in which a value is obtained from a key, it is determined that data is not stored normally if the second pair is not found in processing in which after obtaining the hash value of the value from the first pair, the second pair is read. | 2012-02-09 |
| 20120036318 | EFFICIENT REWRITE TECHNIQUE FOR TAPE DRIVES - A method for efficiently rewriting data to tape is disclosed herein. In one embodiment, such a method includes writing a data set to tape, the data set comprising S sub data sets of fixed size, each sub data set comprising N code word interleaves (CWIs). The method further includes reading the data set while writing it to the tape to identify faulty CWIs. While reading the data set, the method buffers the faulty CWIs (such as by storing, identifying, and/or marking the faulty CWIs) for later retrieval. When the end of the data set is reached, the method writes corrected versions of the faulty CWIs to the end of the data set. A corresponding apparatus is also disclosed and claimed herein. | 2012-02-09 |
| 20120036319 | COMMONALITY FACTORING FOR REMOVABLE MEDIA - Systems and methods for commonality factoring for storing data on removable storage media are described. The systems and methods allow for highly compressed data, e.g., data compressed using archiving or backup methods including de-duplication, to be stored in an efficient manner on portable memory devices such as removable storage cartridges. The methods include breaking data, e.g., data files for backup, into unique chunks and calculating identifiers, e.g., hash identifiers, based on the unique chunks. Redundant chunks can be identified by calculating identifiers and comparing identifiers of other chunks to the identifiers of unique chunks previously calculated. When a redundant chunk is identified, a reference to the existing unique chunk is generated such that the chunk can be reconstituted in relation to other chunks in order to recreate the original data. The method further includes storing one or more of the unique chunks, the identifiers and/or the references on the removable storage medium. | 2012-02-09 |
| 20120036320 | SYSTEM AND METHOD FOR PERFORMING A CONSISTENCY CHECK OPERATION ON A DEGRADED RAID 1E DISK ARRAY - A system and method for performing a consistency check operation on a degraded RAID 1E disk array is disclosed. In one embodiment, in a method for performing a consistency check on a degraded RAID 1E disk array, a read request is sent to a first row in all mirror sets having no missing disks. Then, an exclusive—OR (XOR) operation is performed on the first row in all the mirror sets having no missing disks for determining data consistency between a pair of disks in the mirror set. Further, data on a mirrored disk in all the mirror sets having no missing disks is updated based on the outcome of the performed XOR operation. | 2012-02-09 |
| 20120036321 | SYSTEM AND METHOD FOR PROVIDING IMPLICIT UNMAPS IN THINLY PROVISIONED VIRTUAL TAPE LIBRARY SYSTEMS - The present invention is a system and method which allows for a VTL system that supports thin provisioning to implicitly unmap unused storage. Such unmap operations may occur even though the VTL system does not receive any explicit unmap requests from its initiators. For example, if a system administrator knows that once a virtual tape drive of the VTL system has been partially overwritten, all previously written data sets on that virtual tape drive will never again be accessed, the system administrator may configure the VTL system so that it unmaps the entire remainder of the virtual tape drive on the first data overwrite. | 2012-02-09 |
| 20120036322 | RAID DEVICES, SYSTEMS, AND METHODS - The invention is directed to a storage device utilizing laptop storage drives and rackmount server adapted to use the same. The storage device includes a body and drive software. The drive and internal portions of the body are adapted to form contact fits. The software of the storage device provides an electronic interface that permits operations of advantageous RAID configurations. | 2012-02-09 |
| 20120036323 | STORAGE APPARATUS AND CONFIGURATION SETTING METHOD - This storage apparatus has a plurality of physical devices for storing data sent from a host system, and includes a physical device group setting unit for setting a physical device group from the plurality of physical devices based on a policy file which lists matters to be operated and set by an administrator as parameters in advance, and information on the physical devices, a first logical device setting unit for setting a first logical device from the physical device group based on information on the physical device group and the policy file set with the physical device group setting unit, and a second logical device setting unit for setting a second logical device from the first logical device based the information on the first logical device and the policy file set with the first logical device setting unit. | 2012-02-09 |
| 20120036324 | METHOD AND SYSTEM FOR REVISITING PRIOR NAVIGATED PAGES AND PRIOR EDITS - A system and method for navigating or editing may include storing multiple forward or redo stacks and a single back or undo stack. The forward or undo stacks may include separate stacks for each page from which navigation occurs to a page of lower hierarchical level or for each operation for which another operation is subsequently performed. Positions of references in the forward or redo stacks may be modified in response to navigations or edits to place a last navigated page or operation at the top of the stack. The timing of such movement of references may be optimized. | 2012-02-09 |
| 20120036325 | MEMORY COMPRESSION POLICIES - Techniques are disclosed for managing memory within a virtualized system that includes a memory compression cache. Generally, the virtualized system may include a hypervisor configured to use a compression cache to temporarily store memory pages that have been compressed to conserve memory space. A “first-in touch-out” (FITO) list may be used to manage the size of the compression cache by monitoring the compressed memory pages in the compression cache. Each element in the FITO list corresponds to a compressed page in the compression cache. Each element in the FITO list records a time at which the corresponding compressed page was stored in the compression cache (i.e. an age). A size of the compression cache may be adjusted based on the ages of the pages in the compression cache. | 2012-02-09 |
| 20120036326 | EFFICIENTLY SYNCHRONIZING WITH SEPARATED DISK CACHES - In a method of synchronizing with a separated disk cache, the separated cache is configured to transfer cache data to a staging area of a storage device. An atomic commit operation is utilized to instruct the storage device to atomically commit the cache data to a mapping scheme of the storage device. | 2012-02-09 |
| 20120036327 | DYNAMIC LOOK-AHEAD EXTENT MIGRATION FOR TIERED STORAGE ARCHITECTURES - A method for migrating extents between extent pools in a tiered storage architecture maintains a data access profile for an extent over a period of time. Using the data access profile, the method generates an extent profile graph that predicts data access rates for the extent into the future. The slope of the extent profile graph is calculated and used to determine whether the extent will reach a migration threshold within a specified “look-ahead” time. If so, the method calculates a migration window that allows the extent to be migrated prior to reaching the migration threshold. In certain embodiments, the method determines the overall performance impact on the source extent pool and destination extent pool during the migration window. If the overall performance impact is below a designated impact threshold, the method migrates the extent during the migration window. A corresponding apparatus and computer program product are also disclosed herein. | 2012-02-09 |
| 20120036328 | DYNAMIC CACHE REDUCTION UTILIZING VOLTAGE WARNING MECHANISM - An interface controller of a storage device configured to manage a write cache of the storage device responsive to changes in a voltage supply provided to the storage device. In one implementation, the interface controller reduces the size of the write cache responsive to the voltage supply dropping at or below a first threshold. The interface controller further disables write permissions to the write cache responsive the voltage supply dropping at or below a second threshold, wherein the second threshold is lower in magnitude that the first threshold. The interface controller periodically receives the voltage supply responsive to transmitting sequential requests to a servo firmware of the storage device. | 2012-02-09 |
| 20120036329 | LOCK MECHANISM TO ENABLE ATOMIC UPDATES TO SHARED MEMORY - A system and method for locking and unlocking access to a shared memory for atomic operations provides immediate feedback indicating whether or not the lock was successful. Read data is returned to the requestor with the lock status. The lock status may be changed concurrently when locking during a read or unlocking during a write. Therefore, it is not necessary to check the lock status as a separate transaction prior to or during a read-modify-write operation. Additionally, a lock or unlock may be explicitly specified for each atomic memory operation. Therefore, lock operations are not performed for operations that do not modify the contents of a memory location. | 2012-02-09 |
| 20120036330 | COMPUTER SYSTEM AND DATA MIGRATION METHOD - With a computer system having a host computer and first and second storage apparatuses, the second storage apparatus virtualizes first logical units in the first storage apparatus and provides them as second logical units to the host computer, collects configuration information about each first logical unit, and sets each piece of the collected configuration information to each corresponding second logical unit. The host computer adds a path to the second logical units and deletes a path to the first logical units. The second storage apparatus copies data stored in the first logical units to a storage area provided by the second storage device and associates the storage area with the second logical units. | 2012-02-09 |
| 20120036331 | METHOD FOR BACKUP STORAGE DEVICE SELECTION - A method and system for backing up computer data uses a network device to select a storage device in a manner that enhances at least one parameter associated with the backup process. | 2012-02-09 |
| 20120036332 | ACTIVE-ACTIVE REMOTE CONFIGURATION OF A STORAGE SYSTEM - A method for data storage, including configuring a first logical volume on a first storage system and a second logical volume on a second storage system. The second logical volume is configured as a mirror of the first logical volume, so that the first and second logical volumes form a single logical mirrored volume. The method also includes receiving at the second storage system a command submitted by a host to write data to the logical mirrored volume, and transferring the command from the second storage system to the first storage system without writing the data to the second logical volume. On receipt of the command at the first storage system, the data is written to the first logical volume. Subsequent to writing the data to the first logical volume, the data is mirrored on the second logical volume. | 2012-02-09 |
| 20120036333 | TRIANGULAR ASYNCHRONOUS REPLICATION - Storing recovery data includes providing chunks of data to a remote destination, where each chunk of data represents data written before a first time and after a second time and where the second time for one of the particular chunks corresponds to a first time for a subsequent one of the particular chunks, providing synchronous data to a local destination, and providing an indicator to the local destination in connection with creation of a new chunk of data for storage at the remote destination. The local destination may maintain a plurality of maps, where each of the maps associates synchronous data being provided thereto with a specific chunk of data. In response to receiving an indicator in connection with creation of a new chunk of data, the local destination may point to a new map. There may be two maps or more than two maps. | 2012-02-09 |
| 20120036334 | ACCESS TO SHARED MEMORY SEGMENTS BY MULTIPLE APPLICATION PROCESSES - A system configures page tables to cause an operating system to copy original page data in a data store when any one of the application processes makes a first write request for the original page data. The system detects a page fault from a memory management unit receiving a first write request from one of the application processes and creates the copy in physical memory to allow the application process to modify the page data copy. The other application processes have read access to the original page data. The system replaces the original page data in the data store with the page data copy in response to receiving a first synchronization request from the application process and updates a page table for one of the other application processes to configure access to the replaced page data in response to receiving a second synchronization request from the one other application process. | 2012-02-09 |
| 20120036335 | Timing control circuit - A timing control circuit comprises at least three current control units coupled in parallel between a first circuit and a second circuit node. The current control units each have an active mode and an inactive mode. The current control units are responsive to a timing trigger event to pass current whose magnitude is dependent on how many of the current control units are in the active mode. The current control units comprise a plurality of groups. Current control units within a same group are responsive to a change in a bit of a control value corresponding to that group to switch together between the active and inactive modes, such that the magnitude of the current is dependent on which of the groups are in the active mode. The signal timing in the associated circuit is varied in dependence on the magnitude of the current. | 2012-02-09 |
| 20120036336 | INFORMATION PROCESSOR - The present invention provides an information processing apparatus and an integrated circuit which realize parallel execution of different processing systems, and which do not require the provision of a dedicated memory storing instructions for common processing The information processing apparatus comprises: a plurality of processor elements; an instruction memory storing a first program and a second program; and an arbiter interposed between the processor elements and the instruction memory, the arbiter receiving, from each of the processor elements, a request for an instruction, from among instructions included in the first program and the second program, and controlling access to the instruction memory by the processor elements, wherein the arbiter arbitrates requests made by the processor elements when the requests are (i) simultaneous requests for different instructions included in one of the first program and the second program or (ii) simultaneous requests for an instruction included in the first program and an instruction included in the second program, and when two or more of the processor elements simultaneously request a same instruction included in one of the first program and the second program, the arbiter, when judging that the instruction memory is available to the two or more processor elements, outputs the same instruction to the two or more processor elements. | 2012-02-09 |
| 20120036337 | Processor on an Electronic Microchip Comprising a Hardware Real-Time Monitor - A processor on an electronic microchip is capable of executing mathematical processes, each of said processes being associated with a priority, and includes means for the management of the processes, the means for the management of the processes taking the form of hardware, the management of the processes comprising the activation and the suspension of the processes and the management of the execution of the processes according to their priorities. | 2012-02-09 |
| 20120036338 | FACILITATING PROCESSING IN A COMPUTING ENVIRONMENT USING AN EXTENDED DRAIN INSTRUCTION - An extended DRAIN instruction is used to stall processing within a computing environment. The instruction includes an indication of the one or more processing stages at which processing is to be stalled. It also includes a control that allows processing to be stalled for additional cycles, as desired. | 2012-02-09 |
| 20120036339 | ASYNCHRONOUS ASSIST THREAD INITIATION - A method of data processing includes a processor of a data processing system executing a controlling thread of a program and detecting occurrence of a particular asynchronous event during execution of the controlling thread of the program. In response to occurrence of the particular asynchronous event during execution of the controlling thread of the program, the processor initiates execution of an assist thread of the program such that the processor simultaneously executes the assist thread and controlling thread of the program. | 2012-02-09 |
| 20120036340 | Data processing apparatus and method using checkpointing - A data processing apparatus and method of data processing are provided. The data processing apparatus comprises execution circuitry configured to execute a sequence of program instructions. Checkpoint circuitry is configured to identify an instance of a predetermined type of instruction in the sequence of program instructions and to store checkpoint information associated with that instance. The checkpoint information identifies a state of the data processing apparatus prior to execution of that instance of the predetermined type of instruction, wherein the predetermined type of instruction has an expected long completion latency. If the execution circuitry does not complete execution of that instance of the predetermined type of instruction due to occurrence of a predetermined event, the data processing apparatus is arranged to reinstate the state of the data processing apparatus with reference to the checkpoint information, such that the execution circuitry is then configured to recommence execution of the sequence of program instructions at that instance of the predetermined type of instruction. | 2012-02-09 |
| 20120036341 | DATA PROCESSING APPARATUS, FOR EXAMPLE USING MODES - Embodiments of the invention relate to a data processing apparatus including a processor adapted to operate under control of an executable comprising instructions, and in any of a plurality of operating modes including a non-privileged mode and a privileged mode, the apparatus comprising: means for storing a plurality of stacks; a first stack pointer register for storing a pointer to an address in a first of said stacks; a second stack pointer register for storing a pointer to an address in a second of said stacks, wherein said processing apparatus is adapted to use said second stack pointer when said processor is operating in either the non-privileged mode or the privileged mode; and means for transferring operation of said processor from the non-privileged mode to the privileged mode in response to at least one of said instructions. Embodiments of the invention also relate to a method of operating a data processing apparatus. | 2012-02-09 |
| 20120036342 | METHOD AND APPARATUS FOR HANDLING LANE CROSSING INSTRUCTIONS IN AN EXECUTION PIPELINE - The present invention provides a method and apparatus for handling lane-crossing instructions in an execution pipeline. One embodiment of the method includes conveying bits of an instruction from a register to an execution stage in a pipeline along a first data path that includes a lane crossing stage configured to change a first mapping of the register to the execution stage to a second mapping. The method also includes concurrently conveying the bits along a second data path from the register to the execution stage that bypasses the lane crossing stage. The method further includes selecting the first or second data path to provide the bits to the execution stage. | 2012-02-09 |
| 20120036343 | ELECTRONIC APPARATUS AND METER OPERABLE DURING PROGRAM UPDATING - There are provided an electronic apparatus and a meter which are operable during the updating of an operating program and firmware. The electronic apparatus operable during program updating includes an operation unit performing a preset operation, a micro controller controlling an operation result of the operation unit to be stored according to a predetermined period of storing time, and controlling a program received from the outside to be stored, an update controller allowing the program stored during the predetermined period of storing time to be updated in the micro controller, and a storing unit storing the program and the operation result under control of the micro controller. | 2012-02-09 |
| 20120036344 | CONTEXT-SENSITIVE USER DEVICE CONTROL PROFILE - A method including receiving control profile information that controls one or more operations of a user device during an event associated with a user; generating a control profile based on the control profile information; controlling the one or more operations of the user device based on the control profile for a duration of the event; and automatically setting the user device to a previous state or a new state after the event transpires. | 2012-02-09 |
| 20120036345 | EMBEDDED DEVICE AND FILE CHANGE NOTIFICATION METHOD OF THE EMBEDDED DEVICE - A file change notification method of an embedded device that includes a first operating system (OS) and a second OS. The first OS corresponds to a first central processing unit (CPU) and connects to a storage system, the second OS corresponds to a second CPU for sharing with the configuration file via a network file system (NFS). The method monitors the configuration file stored in the storage system, determines whether the configuration file has been modified, and generates a notification message to notify a first application program that the configuration file has been changed. The method further sends the notification message from the first OS to the second OS through a communication network, and notifies a second application program that the configuration file has been changed when the notification message is received from the first OS. | 2012-02-09 |
| 20120036346 | PARTIAL HIBERNATION RESTORE FOR BOOT TIME REDUCTION - Checkpoint snapshots of segments of system memory are taken while an operating system is booting in a computer system. The segments of system memory are stored in non-volatile memory as hibernation files. In response to detecting a request for a system reboot of the OS, an affected hibernation file, which corresponds to an affected segment of system memory that will change during the system reboot of the OS, is identified. A restoration of the system memory via a wake-up from hibernation is then initiated. The wake-up from hibernation proceeds until the affected hibernation file is reached, such that initial steps in the system reboot are bypassed. Thereafter, subsequent steps, which are after the bypassed initial steps in the system reboot, are executed. | 2012-02-09 |
| 20120036347 | PROVIDING FAST NON-VOLATILE STORAGE IN A SECURE ENVIRONMENT - In one embodiment, a peripheral controller coupled to a processor can include a storage controller. This storage controller can control access to a non-volatile storage coupled to the peripheral controller. The storage may include both secure and open partitions, and the storage controller can enable access to the secure partition only when the processor is in a secure mode. In turn, during unsecure operation such as third party code execution, visibility of the secure partition can be prevented. Other embodiments are described and claimed. | 2012-02-09 |
| 20120036348 | DECRYPTION AND PRINT FLOW CONTROL SYSTEM AND METHOD - A method and system for determining a data file's security classification, special handling instructions, and disposition, with the additional option of subsequently adding material to the print image contained within the document, is disclosed. The method and system provide control of sensitive information contained in print documents, wherein a first file is encrypted. A second document accompanies the first document containing information for decrypting the first document, control redaction, and/or provide for addition of content or restrictions as to which rendering device the first document may print on. The rendering device, upon receipt of both first and second documents, communicates with a host computer that determines the first document's classification and disposition. The host computer then processes the second document, sending decryption information over a secure line from the second document to the rendering device to enable decryption and modification of the first document, followed by rendering. | 2012-02-09 |
| 20120036349 | DATEBASE SERVER, CUSTOMER TERMINAL AND PROTECTION METHOD FOR DIGITAL CONTENTS - A customer terminal is provided. The customer terminal includes a receiving module and a decryption module. The receiving module receives an encrypted digital content from a database server connected thereto. A predetermined encryption key encrypts the encrypted digital content. The decryption module decrypts the encrypted digital content utilizing hardware information from the customer terminal. A database server and a protection method are also provided to prevent an unauthorized customer terminal from copying digital contents. | 2012-02-09 |
| 20120036350 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM - An information processing apparatus includes a data processing unit which generates content to be distributed to a client; and a communication unit which sends the content generated by the data processing unit, wherein the data processing unit combines a plurality of watermarking record blocks, each of which is obtained by embedding watermarking data into a block as section data of the content, generates content in which different watermarking data sequences are set in units of distribution processing with respect to the clients, and sends the generated content to the clients through the communication unit. | 2012-02-09 |
| 20120036351 | CONFIGURABLE MEMORY ENCRYPTION WITH CONSTANT PIPELINE DELAY IN A MULTI-CORE PROCESSOR - Described embodiments provide a method of coordinating debugging operations in a network processor. The network processor has one or more processing modules. A system cache of the network processor requests a data transfer between the system cache and at least one external memory. A memory interface of the network processor selects an encrypted data pipeline or a non-encrypted data pipeline based on whether the processed data transfer request includes an encrypted operation. If the data transfer request includes an encrypted operation, the memory interface provides the data transfer to the encrypted data pipeline and checks whether a debug indicator is set for the data transfer request. If the debug indicator is set, the memory interface disables encryption/decryption of the encrypted data pipeline. The data transfer request is performed by the encrypted data pipeline to the at least one external memory. | 2012-02-09 |
| 20120036352 | Anonymization of Personal Data - A method for anonymization of personal data is provided for protecting the privacy of a user while sharing user information with a third party. The method includes receiving from a user a domain name address associated with an intended website and an Internet Protocol (IP) address associated with the user and determining that the domain name address is an invalid domain name. The method may further include encrypting the IP address associated with the user by translating the IP address into a unique identifier, with the encryption being a one-way hashing process, and then sending the unique identifier and the invalid domain name address to the third party. The method may further include receiving, from the third party, the unique identifier and a third party content, with the third party content being based on the invalid domain name; decrypting the unique identifier by translating the unique identifier back into the IP address, associating the third party content with the IP address, and based on the IP address, providing the third party content to the user. | 2012-02-09 |
| 20120036353 | TAG GENERATION METHOD IN BROADCAST ENCRYPTION SYSTEM - A tag generation method for generating tags used in data packets in a broadcast encryption system is provided. The method includes detecting at least one revoked leaf node; setting a node identification (node ID) assigned to at least one node among nodes assigned node IDs at a layer 0 and to which the at least one revoked leaf node is subordinate, to a node path identification (NPID) of the at least one revoked leaf node at the layer 0; generating a tag list in the layer 0 by combining the NPID of each of the at least one revoked leaf nodes at the layer 0 in order of increment of node IDs of the corresponding at least one revoked leaf nodes; and generating a tag list in a lowest layer by repeatedly performing the setting and generation operation down to the lowest layer. | 2012-02-09 |
| 20120036354 | Wireless communication system, terminal, method for reporting status of terminal, and progam - A wireless communication system includes a plurality of terminals connected to at least one wireless network on the basis of authority of security configuration parameters shared by the plurality of terminals. Each of the plurality of terminals revokes security configuration parameters of the terminal itself or security configuration parameters of another terminal in accordance with an agreement with said another terminal. | 2012-02-09 |
| 20120036355 | Method and system for encrypting and decrypting transaction in power network - Disclosed herein is a method and system for universally encrypting and decrypting a transaction which is a functional unit in a power network, while reducing a system load. When a transmitting node encrypts a transaction, the serial number of the transaction corresponding to each piece of data included in the transaction is present, and data is selected either using a predetermined criterion or randomly, and is then encrypted. The transaction serial number is added to the encrypted data. A receiving node selects data to be decrypted using the transaction serial number or a predetermined criterion. Through this operation, encryption has been conducted from the standpoint of the transaction, but only part of the data is encrypted based on a probability from the standpoint of the data, so that a system load is reduced, thus enabling efficient encryption and decryption technologies to be implemented. | 2012-02-09 |
| 20120036356 | Method for Accessing Nominative Data Such As a Customised Medical File From a Local Generation Agent - A process of accessing to a customized computer file, comprising data of technical nature such as medical data as well as highly confidential nominative data. The process comprises the implementation of a generation agent of the customized computer file (DMN) contained in a storage device ( | 2012-02-09 |
| 20120036357 | CRYPTOGRAPHIC METHOD AND APPARATUS - A method of formatting data for transmission to another party including the step of incorporating in the data a flag indicative of the absence of data for authentication of the sender. An authentication tag length is also included to permit variable length tags to be used. | 2012-02-09 |
