| 05th week of 2021 patent applcation highlights part 69 |
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| 20210036678 | STRUCTURES, ACOUSTIC WAVE RESONATORS, DEVICES AND SYSTEMS TO SENSE A TARGET VARIABLE, INCLUDING AS A NON-LIMITING EXAMPLE CORONA VIRUSES - Techniques for improving Bulk Acoustic Wave (BAW) resonator structures are disclosed, including fluidic systems, oscillators and systems that may include such devices. A bulk acoustic wave (BAW) resonator may comprise a substrate and a first layer of piezoelectric material. The bulk acoustic wave (BAW) resonator may comprise a top electrode. A sensing region may be acoustically coupled with the top electrode of the bulk acoustic wave (BAW) resonator. | 2021-02-04 |
| 20210036679 | ACOUSTIC WAVE DEVICE, MULTIPLEXER, AND COMMUNICATION APPARATUS - An acoustic wave device includes a substrate, a multilayer film on the substrate, an LT layer configured by a single crystal of LiTaO | 2021-02-04 |
| 20210036680 | PHASING LINE HOLDERS - Systems and methods for phasing line holders are described herein. In certain embodiments, an apparatus includes a groove in a conductive body. Additionally, the apparatus includes a phasing line for electrically coupling a plurality of components, the phasing line extending through the groove. Further, the apparatus includes a holder inserted into the groove, the holder maintaining the phasing line at a specific position in relation to a plurality of groove surfaces, wherein a plurality of holder surfaces apply sufficient pressure to the plurality of groove surfaces to secure the holder within the groove. | 2021-02-04 |
| 20210036681 | ELASTIC WAVE DEVICE - An elastic wave device includes a support substrate, a piezoelectric layer disposed on the support substrate, and an IDT electrode disposed on a piezoelectric layer and including first and second electrode fingers that are interdigitated. A region where the first and second electrode fingers overlap each other as seen in a direction of propagation of elastic waves is an excitation region. Edge portions where an acoustic velocity is lower than an acoustic velocity in a central portion are disposed on opposite sides of a central portion in the excitation region. A first busbar and second busbar include inner busbar portions, central busbar portions, and outer busbar portions. First and second offset electrode fingers extend from the inner busbar portions toward the leading ends of the second electrode fingers or first electrode fingers. | 2021-02-04 |
| 20210036682 | INTEGRATED RADIO FREQUENCY (RF) FRONT-END MODULE (FEM) - Embodiments may relate to a radio frequency (RF) front-end module (FEM) that includes an acoustic wave resonator (AWR) die. The RF FEM may further include an active die coupled with the package substrate of the RF FEM. When the active die is coupled with the package substrate, the AWR die may be between the active die and the package substrate. Other embodiments may be described or claimed. | 2021-02-04 |
| 20210036683 | BULK-ACOUSTIC WAVE RESONATOR - A bulk-acoustic wave resonator includes: a substrate; a lower electrode disposed on the substrate; a piezoelectric layer at least partially covering the lower electrode; and an upper electrode at least partially covering the piezoelectric layer. On a surface of the bulk-acoustic wave resonator, a centroid of an active area in which the lower electrode, the piezoelectric layer, and the upper electrode all overlap each other is aligned with a center of a rectangle defining an aspect ratio of the active area. The active area has a shape of a polygon symmetrical with respect to at least one axis passing through the center of the rectangle defining the aspect ratio. The aspect ratio is greater than or equal to 2 and less than or equal to 10. | 2021-02-04 |
| 20210036684 | BAW RESONATOR WITH IMPROVED POWER DURABILITY AND HEAT RESISTANCE AND RF FILTER COMPRISING A BAW RESONATOR - A BAW resonator (BAWR) with improved power durability and improved heat resistance is provided. The resonator comprises a layer stack with a piezoelectric material (PM) between a bottom electrode (ELI) and a top electrode (EL | 2021-02-04 |
| 20210036685 | INTEGRATED FILTER STACK FOR A RADIO FREQUENCY (RF) FRONT-END MODULE (FEM) - Embodiments may relate to a radio frequency (RF) front-end module (FEM) that includes a first acoustic wave resonator (AWR) die coupled with a package substrate. The RF FEM may also include a second AWR die coupled with the first AWR die. The first AWR die may be between the package substrate and the second AWR die. Other embodiments may be described or claimed. | 2021-02-04 |
| 20210036686 | MEMS RESONATOR ARRAY ARRANGEMENT - A microelectromechanical resonator, including a support structure, a resonator element suspended to the support structure, the resonator element including a plurality of sub-elements, and an actuator for exciting the resonator element into a resonance mode. The sub-elements are dimensioned such that they are dividable in one direction into one or more fundamental elements having an aspect ratio different from 1 so that each of the fundamental elements supports a fundamental resonance mode, which together define a compound resonance mode of the sub-element. The sub-elements are further coupled to each other by connection elements and positioned with respect to each other such that the fundamental elements are in a rectangular array configuration, wherein each fundamental element occupies a single array position, and at least one array position of the array configuration is free from fundamental elements. | 2021-02-04 |
| 20210036687 | FILTER CIRCUIT AND COMPOSITE FILTER DEVICE - A filter circuit includes a plurality of first resonators provided in a series arm, a plurality of second resonators provided in a parallel arm, and at least one or more third resonators that are electrically connected in series with each other and are electrically connected in parallel with the first resonators in the series arm. An anti-resonant frequency of the third resonators is lower than an anti-resonant frequency of the second resonators. A combined capacitance of the at least one or more third resonators electrically connected in series with each other is smaller than an electrostatic capacitance of the second resonators. | 2021-02-04 |
| 20210036688 | Reconfigurable Feed-Forward for Electrical Balance Duplexers (EBD) - Systems, methods, and devices for reducing insertion loss and/or swapping transmitter (TX) and receiver (RX) frequencies in an electrical balance duplexer (EBD) used in a transceiver device for frequency division duplexing (FDD) applications are provided. Feed-forward receiver path from the antenna to a low noise amplifier (LNA) and a feed-forward path from the antenna to a power amplifier (PA) of the EBD may be used for reducing insertion loss of the RX and TX signals. In some embodiments, switches may be used to selectively alter operational modes for varied levels of isolation and/or swapping of TX and RX frequencies. | 2021-02-04 |
| 20210036689 | POWER MANAGERS FOR AN INTEGRATED CIRCUIT - Systems and methods manage power in an integrated circuit using power islands. The integrated circuit includes a plurality of power islands wherein a power consumption of each power island within the plurality of power islands is independently controlled within each of the power islands. A power manager determines a target power level for one power island of the plurality of power islands. The power manager then determines an action to change a consumption power level of the one power island of the plurality of power islands to the target power level. The power manager performs the action to change the consumption power level of the one power island of the plurality of power islands to the target power level. | 2021-02-04 |
| 20210036690 | AUTONOMOUS DUTY CYCLE CALIBRATION - Several embodiments of electrical circuit devices and systems with clock distortion calibration circuitry are disclosed herein. In one embodiment, an electrical circuit device includes clock distortion calibration circuitry to calibrate a clock signal. The clock distortion calibration circuitry is configured to determine when one or more duty cycle calibration (DCC) conditions are met. When the DCC condition(s) are met, the clock distortion calibration circuitry is configured adjust a trim value associated with at least one of first and second duty cycles of first and second voltage signals, respectively. In some embodiments, the clock distortion calibration circuitry is configured to calibrate at least one of the first and the second duty cycles of the first and the second voltage signals using the adjusted trim value to account for duty cycle distortion encountered across various voltages and/or temperatures while the electrical circuit devices and/or systems remain in a powered on state. | 2021-02-04 |
| 20210036691 | RING OSCILLATOR AND METHOD FOR CONTROLLING START-UP OF RING OSCILLATOR - A ring oscillator includes at least one oscillator stage having a first output and a second output and a start-up circuit. The start-up circuit includes a plurality of AC coupling capacitors receiving the first output and the second output, and a plurality of switches connected to the AC coupling capacitors. The start-up circuit is configured to provide a differential start-up voltage to at least one node of the oscillator using the plurality of switches and the AC coupling capacitors. | 2021-02-04 |
| 20210036692 | Frequency Generation in a Quantum Controller - A system comprises time-tracking circuitry and phase parameter generation circuitry. The time-tracking circuitry is operable to generate a time-tracking value corresponding to time elapsed since a reference time. The phase parameter generation circuitry operable to: receive the time-tracking value; receive a control signal that conveys a frequency parameter corresponding to a desired frequency of an oscillating signal; and generate a plurality of phase parameters used for generation of an oscillating signal, wherein the generation of the plurality of phase parameters is based on the time-tracking value and the frequency parameter such that the oscillating signal maintains phase continuity across changes in the frequency parameter. | 2021-02-04 |
| 20210036693 | PULSE WIDTH MODULATION CONTROL CIRCUIT AND CONTROL METHOD OF PULSE WIDTH MODULATION SIGNAL - A pulse width modulation control circuit and a control method of a pulse width modulation signal are provided. A counter circuit generates a count value according to a phase-locked loop clock, and resets the count value according to a transition point of a synchronization signal. A comparison circuit compares the count value with a duty ratio set value, and sets the pulse width modulation signal to a high level while the count value is less than the duty ratio set value. | 2021-02-04 |
| 20210036694 | COMPARATOR CIRCUITRY - A comparator circuitry includes an input pair circuit, a load circuit, and a compensation circuit. The input pair circuit is configured to compare a first input signal with a second input signal, in order to control a first bias current. The load circuit is coupled to the input pair circuit, and is configured to output an output signal having a first level from a first output terminal of the load circuit in response to the first bias current. The compensation circuit is coupled to the input pair circuit and the load circuit, and is configured to drain a compensation current from the first output terminal to a voltage source during a period that the load circuit generates the output signal having a first level, in which the voltage source is configured to provide a voltage having a second level. | 2021-02-04 |
| 20210036695 | CLAMP CIRCUIT AND POWER MODULE USING THE SAME - The present disclosure mainly provides a clamping circuit, coupled to a first end and a second end of a switching transistor through a first node and a second node, comprising: an RCD circuit, comprising a first resistor and a first capacitor connected in parallel between the second node and a third node, and a diode having a negative electrode coupled to the third node; and a first stabilivolt diode, having a negative electrode coupled to the first node and a positive electrode coupled to a positive electrode of the diode at a fourth node. | 2021-02-04 |
| 20210036696 | OVERCURRENT PROTECTION FOR POWER TRANSISTORS - Support circuitry for a power transistor includes a feedback switching element and switching control circuitry. The feedback switching element is coupled between a Kelvin connection node and a second power switching node. The switching control circuitry is configured to cause the feedback switching element to couple the Kelvin connection node to the second power switching node after the power transistor is switched from a blocking mode of operation to a conduction mode of operation and cause the feedback switching element to isolate the Kelvin connection node from the second power switching node before the power transistor is switched from the conduction mode of operation to the blocking mode of operation. | 2021-02-04 |
| 20210036697 | GATE DRIVE CIRCUIT - A gate drive circuit includes a driver for driving a gate of a switching element, a peak voltage detector, and a drive capacity calculator. The peak voltage detector detects a peak voltage at a main terminal of the switching element when the switching element is OFF. The drive capacity calculator calculates a voltage difference value between the detected peak voltage and an allowable voltage value at the main terminal of the switching element, where the allowable voltage is based on the specifications of the switching element. The drive capacity calculator changes a drive capacity of the driver to gradually decrease the difference between the detected peak voltage and the allowable voltage. | 2021-02-04 |
| 20210036698 | POWER SUPPLY SYSTEM - A power supply system includes: a semiconductor switch ( | 2021-02-04 |
| 20210036699 | OVERCURRENT DETECTION REFERENCE COMPENSATION SYSTEM OF SWITCHING ELEMENT FOR INVERTER AND OVERCURRENT DETECTION SYSTEM USING THE SAME - An overcurrent detection reference compensation system of a switching element for an inverter and an overcurrent detection system using the same can correct an overcurrent detection reference used to detect an overcurrent of a switching element according to a temperature of the switching element. | 2021-02-04 |
| 20210036700 | SEMICONDUCTOR DEVICE - A semiconductor device includes an inverter circuit having a first switching element and a second switching element, a first control circuit, a second control circuit, and a limiting unit. The first switching element is supplied with a power supply voltage. The second switching element includes a first terminal connected to the first switching element, a second terminal connected to ground, and a control terminal. The first control circuit controls the first switching element. The second control circuit controls the second switching element. The limiting unit reduces fluctuation in voltage between the second terminal and the control terminal based on voltage fluctuation at the second terminal of the second switching element. | 2021-02-04 |
| 20210036701 | POWER-ON RESET CIRCUIT - An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal. | 2021-02-04 |
| 20210036702 | POWER SEQUENCING IN AN ACTIVE SILICON INTERPOSER - An apparatus that includes an interposer, first power connectors that are disposed on a first surface and that receive respective power inputs from one or more power sources, second power connectors that are disposed on the second surface and that receive a respective third power connecter of an integrated circuit when the integrated circuit is mounted on the second surface of the interposer, a plurality of switches formed within the interposer, control circuitry formed within the interposer, and a sequencer circuit coupled to the control input of the control circuitry and that generates a different values for a control input signal that causes the control logic of the control circuitry to generate a corresponding set of switch signals, and the plurality of different values for the control input signal are generated according to a predefined sequence to provide power to the integrated circuit according to power up sequence. | 2021-02-04 |
| 20210036703 | HIGH-SENSITIVITY CAPACITIVE SENSOR CIRCUIT - A high-sensitivity capacitive sensor circuit having improved sensitivity by implementing a plurality of detection units using charging and discharging, has: an oscillation unit for generating a control clock; a first charge/discharge unit connected to a sensing it electrode, which generates a sensing signal while being charged/discharged according to the control clock; a second charge/discharge unit connected in parallel to the first charge/discharge unit, which generates a reference signal while being charged/discharged according to the control clock; and a detection unit for detecting a change in the capacitance on the side of the sensing unit electrode by comparing the sensing signal from the first charge/discharge unit with the reference signal from the second charge/discharge unit. The first charge/discharge unit includes: a first capacitor connected at one end thereof to the sensing unit electrode, which is charged/discharged according to the control clock; a first constant-current source for supplying a predetermined amount of constant-current to the first capacitor, which charges the first capacitor; and a first switch for controlling the first capacitor such that, according to the control clock, the first capacitor is repetitively charged and discharged every half cycle of the clock. The second charge/discharge unit includes: a second capacitor which is charged/discharged according to the control clock; a second constant-current source for supplying a predetermined amount of constant-current to the second capacitor so as to charge the second capacitor; and a second switch for controlling the second capacitor such that, according to the control clock, the second capacitor is repetitively charged and discharged every half cycle of the clock. | 2021-02-04 |
| 20210036704 | VOLTAGE LEVEL SHIFTER - A circuit includes first through fifth transistors. The first transistor has a first control input and first and second current terminals. The second transistor has a second control input and third and fourth current terminals. The third transistor has a third control input and fifth and sixth current terminals. The third control input is coupled to the third current terminal, and the fifth current terminal is coupled to a supply voltage node. The fourth transistor has a fourth control input and seventh and eighth current terminals. The fourth control input is coupled to the first current terminal, and the seventh current terminal coupled to the supply voltage node. The fifth transistor has a fifth control input and ninth and tenth current terminals. The fifth control input is coupled to the first control input, and the tenth current terminal coupled to the second current terminal. | 2021-02-04 |
| 20210036705 | POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES - A device may include a fabric die coupled to an active interposer. The fabric die may include programmable logic fabric and configuration memory that programs the programmable logic fabric. The programmable logic fabric of the fabric die may access at least a portion of the active interposer to perform an operation. As discussed herein, different power management techniques associated with the active interposer may be used to improve operation of the device. | 2021-02-04 |
| 20210036706 | FAST LOCKING SEQUENCE FOR PHASE-LOCKED LOOPS - Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation. | 2021-02-04 |
| 20210036707 | SERIAL DATA RECEIVER WITH SAMPLING CLOCK SKEW COMPENSATION - An apparatus includes a receiver buffer, a phase compensation circuit, a data sampler circuit, and an error sampler circuit. The receiver buffer may generate an equalized signal on a signal node using an input signal received via a channel. The phase compensation circuit may, in response to an initiation of a training mode, replace the equalized signal on the signal node with a reference signal. The data sampler circuit may sample, using a data clock signal, the reference signal to generate a plurality of data samples. The error sampler circuit may sample, using an error clock signal, the reference signal to generate a plurality of errors samples. The phase compensation circuit may also adjust a phase difference between the data clock signal and the error clock signal using at least some of the plurality of data samples and at least some of the plurality of error samples. | 2021-02-04 |
| 20210036708 | TECHNIQUES IN PHASE-LOCK LOOP CONFIGURATION IN A COMPUTING DEVICE - Embodiments of the present disclosure describe methods, apparatuses, and systems for phase-lock loop (PLL) configuration and realization to provide various reference clock frequencies to computing core(s) and processor(s), and other benefits. A post digitally-controlled oscillator (DCO) divider (PDIV) of the PLL may be configured with a dedicated PDIV threshold value corresponding to a dedicated target reference frequency. | 2021-02-04 |
| 20210036709 | INTEGRATED CIRCUIT, METHOD, AND ELECTRONIC DEVICE FOR REDUCING EMI OF SIGNAL - An integrated circuit according to an embodiment of the disclosure may include a plurality of function blocks, a spread spectrum clock (SSC) generator that generates a spread spectrum clock based on a frequency modulation rate value, a clock distribution circuit that distributes the generated spread spectrum clock into the plurality of function blocks, a memory that stores predetermined frequency modulation rate values respectively corresponding to the plurality of function blocks, and a control circuit, and the control circuit may be configured to generate the spread spectrum clock based on a smaller frequency modulation rate value among a first frequency modulation rate value and a second frequency modulation rate value respectively corresponding to a first function block and a second function block, which are operating, from among the plurality of function blocks. Moreover, various embodiment found through the present disclosure are possible. | 2021-02-04 |
| 20210036710 | DIGITAL FREQUENCY SYNTHESIZER WITH ROBUST INJECTION LOCKED DIVIDER - A phased-locked loop (PLL) circuit with an injection locked digital digitally controlled oscillator (ILD) that has an ILD control input element, an ILD injection input element and an ILD output element. The PLL circuit also includes an adaptive control unit (ACU), wherein the ACU is configured to receive an error signal and is configured to output an ILD control word. The ILD control input element is configured to receive the ILD control word, and the ILD control word may set a natural oscillation frequency of the ILD. The ILD is further configured to output a first output signal from the ILD output element, where the natural oscillation frequency may set a frequency of the first output signal. | 2021-02-04 |
| 20210036711 | DIGITAL TO ANALOG CONVERTER DEVICE AND CALIBRATION METHOD - A digital-to-analog converter (DAC) device includes a current-steering DAC circuitry and a calibration circuitry. The current-steering DAC circuitry generates a first signal according to multiple least significant bits of an input signal, and generates a second signal according to multiple most significant bits of the input signal. The calibration circuitry performs a non-binary search algorithm to generate a calibration signal in response to a comparison result of the first signal and the second signal, in order to calibrate the current-steering DAC circuitry according to the calibration signal. | 2021-02-04 |
| 20210036712 | BIT STRING CONVERSION - Systems, apparatuses, and methods related to bit string conversion are described. A memory resource and/or logic circuitry may be used in performance of bit string conversion operations. The logic circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, the memory resource can receive data comprising a bit string having a first quantity of bits that correspond to a first level of precision. The logic circuitry can determine that the bit string having the first quantity of bits has a particular data pattern and alter the first quantity of bits to a second quantity of bits that correspond to a second level of precision based, at least in part, on the determination that the bit string has the particular data pattern. | 2021-02-04 |
| 20210036713 | Guaranteed Data Compression - Lossy methods and hardware for compressing data and the corresponding decompression methods and hardware are described. The lossy compression method comprises dividing a block of pixels into a number of sub-blocks and then analysing, for each sub-block, and selecting one of a candidate set of lossy compression modes. The analysis may, for example, be based on the alpha values for the pixels in the sub-block. In various examples, the candidate set of lossy compression modes comprises at least one mode that uses a fixed alpha channel value for all pixels in the sub-block and one or more modes that encode a variable alpha channel value. | 2021-02-04 |
| 20210036714 | TECHNIQUES FOR DETERMINING COMPRESSION TIERS AND USING COLLECTED COMPRESSION HINTS - Tiers of compression algorithms may be determined using compression information collected regarding compression ratios achieved for data sets using compression algorithms. Each tier may meet specified criteria regarding expected compression ratios achieved for a specified portion or number of data sets. Compression algorithms of each tier may be implemented by a different hardware device that may include hardware accelerators for the algorithms of the tier. Different tiers, and thus different hardware devices, achieve different levels of compression. A recommendation may be provided using compression information collected, such as from one of the hosts, regarding which hardware device to use for compression. The recommendation may be to purchase a license to use or whether to purchase a particular hardware device for compression. Compression information may be collected by a host that issues tagged I/Os providing a hint regarding what compression algorithm to use for the particular I/O operation data. | 2021-02-04 |
| 20210036715 | TRANSMITTING APPARATUS AND SIGNAL PROCESSING METHOD THEREOF - A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding, an interleaver configured to interleave the LDPC codeword, and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver performs interleaving by dividing the LDPC codeword into a plurality of groups, rearranging an order of the plurality of groups in group units, and dividing the plurality of rearranged groups based on a modulation order according to the modulation method. | 2021-02-04 |
| 20210036716 | FAST FAIL SUPPORT FOR ERROR CORRECTION IN NON-VOLATILE MEMORY - Disclosed are devices, systems and methods for improving fast fail support for error correction in non-volatile memory. An exemplary method includes (a) receiving a codeword from a read operation in a fast fail mode, (b) initially configuring a maximum number of iterations (N | 2021-02-04 |
| 20210036717 | METHOD AND APPARATUS FOR ENCODING AND DECODING LOW DENSITY PARITY CHECK CODES - An encoding apparatus is provided. The encoding includes a low density parity check (LDPC) encoder which performs LDPC encoding on input bits based on a parity-check matrix to generate an LDPC codeword formed of 64,800 bits, in which the parity-check matrix includes an information word sub-matrix and a parity sub-matrix, the information word sub-matrix is formed of a group of a plurality of column blocks each including 360 columns, and the parity-check matrix and the information word sub-matrix are defined by various tables which represent positions of value one (1) present in every 360-th column. | 2021-02-04 |
| 20210036718 | CODEWORD BIT SELECTION FOR RATE-COMPATIBLE POLAR CODING - Various aspects of the present disclosure generally relate to wireless communication. In some aspects, an encoding device may determine a least reliable subset of information bits included in a set of information bits that includes a predefined active set of information bits to be encoded; may determine a codeword bit to be added to a codeword based at least in part on the least reliable subset of information bits, wherein adding the codeword bit to the codeword improves reliability of the least reliable subset of information bits; may add the codeword bit to the codeword; and may transmit the codeword. Numerous other aspects are provided. | 2021-02-04 |
| 20210036719 | ERROR CORRECTION CIRCUIT, MEMORY CONTROLLER HAVING ERROR CORRECTION CIRCUIT, AND MEMORY SYSTEM HAVING MEMORY CONTROLLER - An error correction circuit using a BCH code may include a decoder performing at least one of a first error correction decoding using a first error correction capability or a second error correction decoding using a second error correction capability and an encoder generating a codeword based on a message and a generation matrix corresponding to the first error correction capability and generating an additional parity based on the codeword and one or more rows of a parity check matrix corresponding to the second error correction capability, wherein a syndrome vector generated based on a read vector corresponding to the codeword is used during the first error correction decoding and an additional syndrome generated based on the additional parity is used during the second error correction decoding, and wherein the one or more rows are extended from a parity check matrix corresponding to the first error correction capability. | 2021-02-04 |
| 20210036720 | ECC DECODERS HAVING LOW LATENCY - An error correction code (ECC) decoder includes a syndrome calculation block and a path controller. The syndrome calculation block is configured to perform a syndrome calculation for generating a syndrome from a codeword. The path controller is configured to output data transmitted through first to third paths. The first path is a path for transmitting the codeword to the path controller when no error is detected. The second path includes a single-error decoding logic circuit, and the single-error decoding logic circuit corrects a single error of the codeword to transmit the corrected codeword to the path controller through the second path. The third path includes a multi-error decoding logic circuit, and the multi-error decoding logic circuit corrects at least two errors of the codeword to transmit the corrected codeword to the path controller. | 2021-02-04 |
| 20210036721 | PACKET DETECTOR/DECODER FOR A RADIO TRANSMISSION SYSTEM - Embodiments provide a data receiver, wherein the data receiver is configured to receive a broadband signal, wherein the broadband signal includes at least two partial data packets that are distributed in time and/or frequency, wherein the data receiver is configured to perform detection of the at least two partial data packets in the broadband signal and to provide at least one detection parameter for the detected partial data packets, wherein the data receiver is configured to perform decoding of the detected partial data packet by using the at least one detection parameter, wherein the data receiver is configured to perform or process detection and decoding separately from one another. | 2021-02-04 |
| 20210036722 | APPARATUS AND METHOD FOR DETERMINING REFLECTION COEFFICIENT OF ANTENNA - Disclosed is an electronic device. Other various embodiments as understood from the specification are also possible. The electronic device may include an antenna, a communication module including a transceiver, and a control circuit. The control circuit may be configured to radiate a first signal generated from the transceiver through the antenna, to obtain at least part of a second signal obtained by combining a forward signal delivered from the communication module to the antenna and a reverse signal reflected from the antenna, and to determine a reflection coefficient for the antenna based on at least part of the first signal and at least part of the second signal. | 2021-02-04 |
| 20210036723 | COMMUNICATION SYSTEM AND COMMUNICATION METHOD - A communication system with a first input port and a second input port includes a first antenna, a second antenna, a first diplexer, a second diplexer, a third diplexer, a fourth diplexer, a first coupler, and a second coupler. The first diplexer has a common terminal coupled to the first input port. The second diplexer has a common terminal coupled to the second input port. The third diplexer has a common terminal coupled to the first antenna. The fourth diplexer has a common terminal coupled to the second antenna. Each of the first diplexer, the second diplexer, the third diplexer, and the fourth diplexer has a first terminal and a second terminal which are coupled between the first coupler and the second coupler. | 2021-02-04 |
| 20210036724 | POWER DETECTORS WITH ENHANCED DYNAMIC RANGE - Apparatus and methods for power detection with enhanced dynamic range are provided. In certain embodiments, a front end system includes a power amplifier that amplifies a radio frequency (RF) input signal to generate an RF output signal, a directional coupler that generates a sensed RF signal based on sensing the RF output signal from the power amplifier, and a power detector that processes the sensed RF signal to generate a detection signal indicating an output power of the power amplifier. Additionally, the power detector includes two or more detection paths providing different amounts of gain to the sensed RF signal from the directional coupler. | 2021-02-04 |
| 20210036725 | RECEIVER AND RECEIVING METHOD - A receiver includes a synchronous detection unit, an elimination unit, and an envelope detection unit. The synchronous detection unit synchronously detects a received signal to generate an I-component and a Q-component. The elimination unit eliminates a noise from the I-component based on the Q-component that is generated by the synchronous detection unit. The envelope detection unit envelope-detects the I-component where the noise is eliminated by the elimination unit and the Q-component to generate an output signal. | 2021-02-04 |
| 20210036726 | DYNAMIC SENSITIVITY CONTROL IN A NEAR-FIELD COMMUNICATION RECEIVER - Disclosed is a method for sensitivity control in a near-field communication, NFC, device operating in a receiving mode. The method comprises calculating a threshold value, using a threshold value calculating unit, as a function of a determined current received signal strength indicator, RSSI, value, optionally a determined current gain control, GC, value, and further optionally a so-called margin value that is a product-specific parameter, and applying the calculated threshold value as a threshold parameter to a threshold comparison unit, which is configured to receive, as input. a first time-derivative signal derived from a combined output signal that is determined as a function of a digital I-channel signal output and a digital Q-channel signal output of an I&Q demodulating block, to compare the first time-derivative signal with the applied threshold parameter, and to provide a binary output that is indicative of whether the input first time-derivative signal is greater than the applied threshold parameter or not. | 2021-02-04 |
| 20210036727 | INTERFERENCE DETECTION AND SUPPRESSION IN NON-COORDINATED SYSTEMS - A data receiver is configured to receive a signal, the signal comprising interferences of an interference-infested transmission channel, the data receiver being configured to form a histogram of receive information of a signal portion of the received signal and to determine mean receive information and/or a noise measure from the histogram. | 2021-02-04 |
| 20210036728 | WEARABLE DEVICE - The present invention provides a wearable device comprising a mechanical watch movement located within a watch housing, and first and second straps connected to the watch housing, such that the device is suitable for wearing on a user's wrist. The first strap has a coin cell located in a cavity, and the second strap has a first electronic communication device located in a cavity. The coin cell and the electronic communication device are connected by a flexible circuit board. Advantageously, this may provide a wearable device having the functionality to interact with a remote security system of a vehicle, such as a keyless entry system or a keyless go system. | 2021-02-04 |
| 20210036729 | Safe Case with Security Choke Point Control - In accordance with some embodiments, an apparatus that controls security choke points on a personal communication device is provided. The apparatus includes a housing arranged to hold a second device. The apparatus receives a first input and classifies the first input. The apparatus then determines which of a combination of one or more sensors on the second device that the first input is directed to based on an input type classification associated with the first input. The apparatus further disables a first combination of the one or more sensors on the second device in accordance with determining that the first input corresponds to a first input type classification. | 2021-02-04 |
| 20210036730 | PROTECTIVE CASE FOR ELECTRONIC DEVICE - A protective case for an electronic device includes an outer shell and an inner cushion liner. The inner cushion liner is attached to an inner surface of the outer shell. The inner cushion layer is configured to receive the electronic device when the electronic device is installed in the protective case and is configured to contact and cover at least portions of the back and sides of the installed electronic device. The inner cushion liner comprises a first material for cushioning the installed electronic device as well as one or more regions of a second material configured to be in proximity to one or more antennas or antenna regions of the installed electronic device, respectively. The second material has a lower dielectric constant than the first material in at least a preferred frequency range of the electronic device. | 2021-02-04 |
| 20210036731 | Method for Adjusting an Impedance of a Tunable Matching Network - Example embodiments relate to methods for adjusting an impedance of a tunable matching network, One embodiment includes a method for adjusting an impedance of a tunable matching network (TMN) connected between an antenna and a transceiver front-end. The TMN includes a receive path to provide signals from the antenna to a receiver during a receive (Rx) mode and a transmit path to provide signals from a transmitter to the antenna during a transmit (Tx) mode. The method includes tuning the TMN. The method also includes measuring values of an output DC-offset at the receiver while tuning the TMN. The output DC-offset is caused by a coupling between the transmitter and the receiver. Further, the method includes determining a maximum value of the output DC-offset from the measured output DC-offset values. Additionally, the method includes adjusting the impedance of the TMN by tuning the TMN to the output DC-offset maximum value. | 2021-02-04 |
| 20210036732 | CAPACITOR ARCHITECTURE FOR WIRELESS COMMUNICATION TAG - Embodiments of the present disclosure generally relate to a wireless identification tag configured to collect and store ambient energy for use in delayed transmission, and system and methods for use thereof. In one implementation, the tag may include a receiver for receiving ambient energy; a first capacitor for storing the ambient energy; and a second capacitor for collecting and storing the ambient energy. The second capacitor may have lower capacitance than the first capacitor. The tag may also include an inductor interconnecting the first capacitor and the second capacitor. The tag may also include circuitry configured such that ambient energy received by the receiver is initially stored in the second capacitor and subsequently transferred to and stored in the first capacitor. The tag may also include a transmitter electrically connected to first capacitor, to enable the energy stored in the first capacitor to power the transmitter. | 2021-02-04 |
| 20210036733 | SPUR MANAGEMENT IN MILLIMETER WAVE COMMUNICATIONS - Systems and methods to detect spurious responses (spurs) in association with mmWave wireless communications are described. Such spurs may originate internal to the receiver (internal spurs) or external to the receiver (external spurs) originated in the transmitter. Embodiments operate to identify received mmWave wireless communication signal spurs in symbols, or portions thereof, which do not have transmissions directed to the receiving device. mmWave spur detection implementations of embodiments can detect spurs in real-time operation of the receiving device. Such real-time spur detection facilitates operation by the receiving device to perform spur removal in real-time operation of the receiving device, thus enabling removal of both internal spurs and external spurs as well as dynamically adapting to different scenarios that cause different spurs. Other aspects and features are also claimed and described. | 2021-02-04 |
| 20210036734 | PACKET CORRELATOR FOR A RADIO TRANSMISSION SYSTEM - A data receiver is configured to receive a signal including a plurality of partial data packets, wherein the plurality of partial data packets each include part of a data packet, wherein the data receiver includes a multi-stage correlator that is configured to perform multi-stage correlation to detect the partial data packets in the received signal, wherein a second correlation stage of the multi-stage correlator operates based on correlation results of a first correlation stage of the multi-stage correlator. | 2021-02-04 |
| 20210036735 | CROSSTALK REDUCTION IN RECEIVER INDUCTIVE LOOP USING CAPTURING LOOP IN TRANSMITTING INDUCTIVE LOOP - An inductively coupled multi-channel digital isolator where the transmitter and receiver inductive loops of a given channel are coplanar. In the case where two adjacent channels flow data in opposite directions, the receiver inductive loops of a given channel include a large, generally conventional loop portion and a small loop portion that is located inside the transmitter inductive loops of the adjacent channels. The sizes of the small loop portion and the conventional loop portion are generally in the ratio of the magnetic flux in the conventional loop portion to the magnetic flux in the transmitter inductive loop. This size relationship results in the voltage of the small loop portion being very close but opposite in sign to the voltage in the conventional loop portion. As a result, there is minimal crosstalk from the transmitter inductive loop of one channel to the receiver inductive loop of the adjacent channel. | 2021-02-04 |
| 20210036736 | ANTENNA, WIRELESS COMMUNICATION DEVICE, WIRELESS COMMUNICATION SYSTEM, VEHICLE, MOTORCYCLE, AND MOVABLE BODY - A wireless communication system includes a first wireless communication device installed on an installation surface of a vehicle and a second wireless communication device. The first wireless communication device includes an antenna and a sensor. The antenna includes a first conductor, a second conductor, one or more third conductors, a fourth conductor, and a feeding line. The first wireless communication device transmits a signal from the antenna to the second wireless communication device, based on information detected by the sensor. | 2021-02-04 |
| 20210036737 | SYNTHETIC ANALOG-TO-DIGITAL CONVERTER (ADC) FOR LEGACY TWACS METERS - An electrical meter (M) installed at a facility (F) supplied electrical power by a utility's (U) electrical distribution system (EDS) utilizes a two-way automatic communications system (TWACS) for receiving messages from the utility sent over the electrical distribution system using the TWACS. An improvement to the meter comprises reconfiguring existing components installed in the meter to function as an analog-to-digital (ADC) converter so to facilitate processing of powerline waveforms (WF) propagated through the electrical distribution system by application of a signal based detection algorithm. This improves detection of signal elements comprising a message sent via the TWACS and by other means and incorporated in the electrical waveforms thereby reducing occurrence of a false synchronization with the message elements so a content of a message is readily ascertained by the meter. | 2021-02-04 |
| 20210036738 | PROTOCOL FOR MULTI-MASTER COMMUNICATION COORDINATION ON SHARED MEDIA CHANNEL - A method and computer readable medium for communication on a shared media. In one embodiment, the method comprises holding a token by a first coordinator on a virtual ring, only a token-holding coordinator is permitted to transmit data associated with a first service level; transmitting data associated with the first service level, by the first coordinator, to device(s) on a first local domain; passing, by the first coordinator, the token to a second coordinator; periodically transmitting data associated with the first service level, by the second coordinator, to device(s) on a second local domain; receiving, by a third coordinator while the second coordinator holds the token, a message to transmit data associated with a second service level to device(s) of a third local domain; and transmitting, by the third coordinator while the second coordinator is not transmitting, the data associated with the second service level. | 2021-02-04 |
| 20210036739 | ELECTRONIC LABEL APPARATUS, INDUCTIVE BASE STATION, ELECTRONIC LABEL SYSTEM AND METHOD OF LOCATING ELECTRONIC LABEL APPARATUS - An electronic label apparatus comprises: an inductive communication unit which communicates wirelessly using inductive signals; a processor; memory including a computer program code; and a power source which supplies electric power to the inductive communication unit, the processor, and the memory for enabling their operation. The processor, the memory, the computer program code and the power source with the electric power cause the electronic label apparatus at least to: receive a plurality of inductive signals of known transmission powers from known locations; measure signal powers of the received inductive signals; and determine information about a location of the electronic label apparatus based on the measured signal powers, the known transmission signal powers and the known locations. | 2021-02-04 |
| 20210036740 | POWER SUPPLY CIRCUIT THAT SOURCES ENERGY FROM AN NFC ANTENNA - A power supply circuit is described herein which is capable of sourcing energy from an NFC antenna. In one embodiment, the circuit comprises a rectifier circuit configured to be coupled to an NFC antenna for receiving an antenna voltage, a filter coupled to an output of the rectifier circuit and configured to provide the rectified and smoothed antenna voltage as supply voltage, and a current limiting device coupled between the filter and an output node and configured to limit an output current provided at the output node dependent on a control signal. Further, the power supply circuit comprises a control circuit configured to receive the supply voltage and a reference voltage and to generate the control signal dependent on a difference between the reference voltage and the supply voltage. | 2021-02-04 |
| 20210036741 | BEAMFORMING METHOD AND ELECTRONIC DEVICE THEREFOR - Disclosed is an electronic device including housing, a first antenna array positioned on the housing and/or inside the housing, a second antenna array spaced from the first antenna array and positioned on the housing and/or inside the housing, at least one wireless communication circuit electrically connected to the first antenna array and the second antenna array, and at least one communication processor transmitting and/or receiving a signal through the at least one wireless communication circuit, using beamforming. In addition, various embodiments as understood from the specification are also possible. | 2021-02-04 |
| 20210036742 | ESTABLISHING WIRELESS COMMUNICATION BETWEEN A TRAIN AND BASE STATIONS - Methods and systems are provided for establishing wireless communication between moving objects and land-based networks. A plurality of virtual antenna arrays may be established for communication between a transportation object and a communication network. Each virtual antenna array includes antenna(s) of at least one network transceiver of the communication network that is in proximity to the transportation object or its path, and antenna(s) of at least one transceiver from a plurality of transceivers in the transportation object. Each virtual antenna array differs from an adjacent virtual antenna array at least in having one or both of a different network transceiver of the communication network or a different transceiver from the plurality of transceivers. Operations of the plurality of virtual antenna arrays may be managed, with the managing including switching to an adjacent one of the plurality of virtual antenna arrays based on movement of the transportation object. | 2021-02-04 |
| 20210036743 | SIGNALING TO ASSIST WAVEFORM SELECTION - Methods, systems, and devices for wireless communications are described. A user equipment (UE) may transmit, to a base station, feedback information that indicates delay spread information. The UE may receive control signaling that indicates to use a first waveform of a set of different waveforms for a first data transmission via a first beam based on the feedback information. The UE may then communicate the first data transmission via the first beam using the first waveform | 2021-02-04 |
| 20210036744 | DISTRIBUTED MIMO LONG TRAINING FIELD METHOD AND SYSTEM - Various embodiments relate to a method for processing received distributed multiple-input and multiple-output (DMIMO) OFDM signals from a plurality of transmitters, including: performing an initial carrier frequency offset (CFO) correction; receiving a plurality of OFDM symbols; re-constructing the channel every N symbols based upon a channel estimate for each transmitter and an estimate of residual CFO for each of the transmitters based upon the long term fields (LTF), wherein N is an integer; and equalizing the received OFDM symbols using the re-constructed channel. | 2021-02-04 |
| 20210036745 | PRECODING CONFIGURATION - Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, configuration information indicating that the UE is to compress a precoding matrix indicator in connection with channel state information reporting, wherein the precoding matrix indicator is to be compressed based at least in part on a quantization dependency between transmission layers or an orthogonality relationship between the transmission layers, and wherein the configuration information is associated with a type II, higher rank codebook for multiple input multiple output configuration. The UE may transmit, to a base station (BS), the compressed precoding matrix indicator to the base station based at least in part on receiving the configuration information. The UE and BS may use a communication configuration based at least in part on a precoding matrix indicator recovered from the compressed precoding matrix indicator. Numerous other aspects are provided. | 2021-02-04 |
| 20210036746 | DETERMINING A PRECODER FOR PTRS PORTS - Apparatuses, methods, and systems are disclosed for determining a precoder for PTRS ports. One method ( | 2021-02-04 |
| 20210036747 | PRE-CODING METHOD AND PRE-CODING DEVICE - Disclosed is a precoding method comprising the steps of: generating a first coded block and a second coded block with use of a predetermined error correction block coding scheme; generating a first precoded signal z1 and a second precoded signal z2 by performing a precoding process, which corresponds to a matrix selected from among the N matrices F[i], on a first baseband signal s1 generated from the first coded block and a second baseband signal s2 generated from the second coded block, respectively; the first precoded signal z1 and the second precoded signal z2 satisfying (z1, z2) | 2021-02-04 |
| 20210036748 | METHODS AND APPARATUS FOR CONFIGURING RURAL WIDEBAND MULTI-USER MULTI-INPUT MULTI-OUTPUT ANTENNA ARRAY SYSTEMS - An antenna array and method for a multi-user multi-input multi-output antenna array system including at least two receive antennas at a receive area, where the receive antennas are spaced from each other on the order of symbol wavelengths, at least two transmit antennas at a transmit area with at least one transmit antenna spaced from the other at least two transmit antennas on the order of symbol wavelengths, and wherein the antenna array is optimized for multi-user performance for rural areas. | 2021-02-04 |
| 20210036749 | CODEBOOK DESIGN FOR VIRTUALIZED ACTIVE ANTENNA SYSTEM (AAS) - Systems and methods are disclosed herein that related to determining and using a codebook in a virtualized Active Antenna System (AAS). In some embodiments, a first radio node that is configured to communicate with a second radio node comprises a radio interface and processing circuitry configured to transform a first codebook that is in a non-virtualized antenna domain to a second codebook that is in a virtualized antenna domain based on a port to antenna mapping matrix used to transform a signal from the virtualized antenna domain to the non-virtualized antenna domain prior to transmission of the signal in a corresponding virtualized cell or sector. The processing circuitry is further configured to receive a transmit signal from the second radio node to thereby provide a received signal and perform Precoding Matrix Indication (PMI) estimation based on the received signal using the second codebook in the virtualized antenna domain. | 2021-02-04 |
| 20210036750 | BATCH-BASED FEEDBACK IN NEW RADIO - Methods, systems, and devices for wireless communications are described. According to one or more aspects, a device, such as a user equipment (UE), may receive downlink control information, and may determine assignment information for processing batch-based feedback based on the downlink control information. The UE may determine the batch-based feedback for a batch of downlink transmissions (for example, transmissions associated with packets of information) that are configured to be processed together by the UE. The UE may receive a downlink transmission from the base station, and may construct a codebook based on assignment information and the downlink transmission. In some examples, the UE may determine acknowledgment feedback for the downlink transmission based on the codebook. The UE may transmit the acknowledgment feedback to the base station. | 2021-02-04 |
| 20210036751 | METHOD AND APPARATUS FOR MEASURING AND REPORTING BEAMS IN A BEAMFORMING BASED SYSTEM - The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). Disclosed is a method of reporting beam measurement state information by a User Equipment (UE). The method may include: measuring beam state information by using a first reception chain and a second reception chain; controlling beam state information on the first reception chain to correspond to beam state information on the second reception chain; calculating state information on each beam based on the controlled beam state information on the first reception chain and beam state information on the second reception chain; and reporting state information on one or more beams. | 2021-02-04 |
| 20210036752 | BEAM RECOVERY FOR ANTENNA ARRAY - The described technology is generally directed towards beam recovery for an antenna array. One or more recovery beams or recovery beam patterns can be defined for an antenna array, and in response to a failure, the antenna array can be restored to a defined recovery beam or recovery beam pattern. Techniques for defining recovery beams and recovery beam patterns for the antenna array, selecting a recovery beam or recovery beam pattern for the antenna array, and entering a selected recovery beam or recovery beam pattern by the antenna array are also disclosed. | 2021-02-04 |
| 20210036753 | METHOD AND APPARATUS FOR TRANSMITTING OR RECEIVING SIGNALS IN WIRELESS COMMUNICATION SYSTEM - Provided are a method and apparatus for transmitting or receiving signals in a wireless communication system. An electronic device in the wireless communication system includes: a transceiver; and at least one processor, wherein the transceiver comprises an antenna module and a metasurface module, wherein the antenna module comprises a plurality of antennas, wherein the at least one processor is configured to generate first beams for the plurality of antennas, transmit the first beams to the metasurface module from the plurality of antennas, generate second beams based on the first beams through the metasurface module, and transmit the second beams to another electronic device, and wherein the metasurface module is arranged to receive the first beams generated for the plurality of antennas. | 2021-02-04 |
| 20210036754 | TAILORED BEAM MANAGEMENT OF BEAMFORMED TRANSMISSION - A method includes communicating, between a first device and a second device, a scheduling control message indicative of first time-frequency resources for a first uplink reference signal transmission from the second device to the first device and further indicative of second time-frequency resources for a second uplink reference signal transmission from the second device to the first device. Wherein the first uplink reference signal transmission is associated with a receive beam having a first opening angle. Wherein the second uplink reference signal transmission is associated with a receive beam having a second opening angle. The first opening angle is smaller than the second opening angle. Furthermore the first uplink reference signal transmission is beam swept at the first device, and the second uplink reference signal transmission is not beam swept at the first device. | 2021-02-04 |
| 20210036755 | METHOD FOR REPORTING CHANNEL STATE INFORMATION, USER EQUIPMENT, AND BASE STATION - The present disclosure relates to a method for reporting channel state information, a terminal, and a base station. A resource for an aperiodic channel state information reference signal (CSI-RS) is determined by the terminal according to an information for triggering an aperiodic channel state information (CSI) report sent by the base station, wherein the information for triggering the aperiodic CSI report indicates the resource for the aperiodic CSI-RS, and the aperiodic CSI report derived according to the aperiodic CSI-RS on the resource for the aperiodic CSI-RS is sent by the terminal to the base station. The base station transmits a CSI-RS only when the terminal needs to report the aperiodic CSI. | 2021-02-04 |
| 20210036756 | OVERHEAD REDUCTION FOR CHANNEL STATE INFORMATION - Certain aspects of the present disclosure provide techniques for reducing overhead for channel state information (CSI). Certain aspects provide a method for wireless communication. The method generally includes receiving a channel state information reference signal (CSI-RS), determining one or more feedback components associated with a CSI feedback type based on the CSI-RS, identifying that a payload of the one or more feedback components is to be compressed, compressing the payload, and reporting the compressed payload. | 2021-02-04 |
| 20210036757 | METHOD OF TRANSMITTING SECONDARY CELL BEAM FAILURE RECOVERY REQUEST INFORMATION AND RELATED DEVICE - A method of transmitting secondary cell (SCell) beam failure recovery request (BFRQ) information in a beam failure recovery (BFR) procedure for a user equipment (UE) is disclosed. The method comprises receiving, from a base station (BS), at least one scheduling request (SR) resource configuration and at least one SR configuration, triggering a first SR-for-BFR procedure for requesting an uplink (UL) resource according to a first of the at least one SR configuration and corresponding to an SR-for-BFR transmission, wherein one of the at least one SR resource configuration indicates a first physical uplink control channel (PUCCH) resource for the SR-for-BFR transmission, and transmitting, to the BS, uplink control information (UCI) on a second PUCCH resource, wherein a payload of the UCI includes an indication associated with the SR-for-BFR transmission. | 2021-02-04 |
| 20210036758 | ADAPTIVE BEAM SELECTION IN A WIRELESS COMMUNICATION SYSTEM - A method implemented by a user equipment for adjusting a coverage enhancement (CE) level according to which the user equipment operates in a wireless communication system is presented. The method comprises determining a difference between a device-calculated CE level calculated by the user equipment and a network-derived CE level received from a radio network node. The method further comprises adjusting, by the difference, an updated device-calculated CE level calculated after the device-calculated CE level, to obtain an adjusted CE level and operating according to the adjusted CE level. | 2021-02-04 |
| 20210036759 | APPARATUS AND METHOD FOR TRANSMITTING OR RECEIVING SIGNAL USING BEAMFORMING IN WIRELESS COMMUNICATION SYSTEM - The disclosure relates to a pre-5 | 2021-02-04 |
| 20210036760 | APPARATUS AND METHOD FOR BEAM ALIGNMENT BASED ON LOCATION INFORMATION IN WIRELESS COMMUNICATION SYSTEM - A method for beam alignment through location recognition in a wireless communication system and an apparatus therefor are provided. The method includes a first process of configuring a beam set including beams based on relative location information of a terminal, a second process of receiving reference signals (RSs) from the terminal by using the beams, and a third process of determining an optimal beam from among the beams included in the beam set, and the third process includes configuring a window including adjacent beams in the beam set, measuring beams within the window by using the RSs, determining a local optimal beam from among the measured beams, and re-configuring a window based on the local optimal beam. | 2021-02-04 |
| 20210036761 | REPEATER DEVICE AND REPEATING METHOD - In a repeater device: a communication device receives position information of a forwarding source device and a forwarding destination device using a first communication scheme; based on the position information of the forwarding source device, a moving mechanism moves the repeater device to a position at which it is capable of communicating with the forwarding source device using a second communication scheme; the communication device receives data from the forwarding source device using the second communication scheme; a storage device stores the data; based on the position information of the forwarding destination device received by the communication device, the moving mechanism moves the repeater device to a position at which it is capable of communicating with the forwarding destination device using the second communication scheme, and the communication device transmits the data stored in the storage device to the forwarding destination device using the second communication scheme. | 2021-02-04 |
| 20210036762 | ACCESS PROCEDURE OF SMART DIRECTIONAL REPEATERS - Aspects of the present disclosure provide apparatus, methods, processing systems, and computer readable mediums to enhance the functionality of directional repeaters (wireless devices that relay directional wireless signals). For example, aspects of the present disclosure may help enable repeaters to provide greater assistance in an access procedure, for example, by generating and sending SSBs without (or with limited) gNB involvement and monitoring for RACH-related transmissions. | 2021-02-04 |
| 20210036763 | TECHNIQUES FOR SIDELINK RELAY - In an aspect, the present disclosure includes a method, apparatus, and computer readable medium for wireless communications for receiving, by a relay node via a first link, one or more first transport block portions of a first transport block; attempting to decode each of the first transport block portions; encoding each successfully decoded first transport block portions to define one or more second transport block portions; and transmitting, via a second link, the one or more second transport block portions. | 2021-02-04 |
| 20210036764 | CONTROL METHOD FOR SMART REPEATERS - Aspects of the present disclosure provide apparatus, methods, processing systems, and computer readable mediums to enhance the functionality of directional repeaters (wireless devices that relay directional wireless signals). For example, by adding even limited capability to buffer digital samples, repeater functionality may be enhanced to provide better coverage and make more efficient use of time, frequency, and spatial resources. | 2021-02-04 |
| 20210036765 | METHOD, SYSTEM AND APPARATUS FOR RESOURCE ALLOCATION IN MULTI-HOP SYSTEMS - An apparatus comprising at least one processor and at least one memory including computer code for one or more programs, the at least one memory and the computer code configured, with the at least one processor, to cause the apparatus at least to support for a determined period at least one hop within a multi-hop self-backhaul communications, wherein the determined period comprises: a first part within which information for controlling dynamic allocation between backhaul and access links within resource slots is passed between the apparatus and at least one further apparatus in the multi-hop self-backhaul communications; and a second part within which a dynamic slot pattern is implemented based on the information for controlling dynamic allocation between backhaul and access links within resource slots is passed between the apparatus and at least one further apparatus in the multi-hop self-backhaul communications. | 2021-02-04 |
| 20210036766 | A Method and An Apparatus for Use in a Satellite Communications Network - A method is provided for off-loading MAC (medium access control) functionalities that were previously carried out by satellites, and carry out these functionalities by control gateways that are located on the ground, and by implementing that to simplify the operation and maintenance of the satellite communications network. | 2021-02-04 |
| 20210036767 | Multi-Pathway Satellite Communication Systems and Methods - Systems and methods for controlling satellites are provided. In one example embodiment, a computing system can obtain a request for image data. The request can be associated with a priority for acquiring the image data. The computing system can determine an availability of a plurality of satellites to acquire the image data based at least in part on the request. The computing system can select from among a plurality of communication pathways to transmit an image acquisition command to a satellite based at least in part on the request priority. The plurality of communication pathways can include a communication pathway via which the image acquisition command is indirectly communicated to the satellite via a geostationary satellite. The computing system can send the image acquisition command to the selected satellite via the selected communication pathway. Data from the satellite can be relayed to ground-based stations via one or more relay satellites. | 2021-02-04 |
| 20210036768 | A Method for Implementing Beam Hopping in a Satellite Communications Network - A method is provided for conveying communications within a satellite communication network, by implementing a beam hopping technique for communicating with half-duplex user terminals. | 2021-02-04 |
| 20210036769 | SPECTRUM SHARING FOR A TERRESTRIAL-SATELLITE HYBRID ENVIRONMENT - Various arrangements for spectrum sharing among a terrestrial network and a non-terrestrial network are presented herein. A first bandwidth part having a first frequency range for may be assigned use for communication between one or more UE of a plurality of UE and a terrestrial cellular network when a high signal strength is present. A second bandwidth part having a second frequency range may be assigned for use for communication between one or more UE of the plurality of UE and the terrestrial cellular network when a low signal strength is present. A third bandwidth part having a third frequency range can be assigned for use for communication between one or more UE of the plurality of UE and a non-terrestrial network. The third bandwidth part can overlap with the first bandwidth part but not the second bandwidth part. | 2021-02-04 |
| 20210036770 | CHANGING ANTENNA DIRECTION BASED ON SATELLITE BLOCKAGE DETECTION - A system comprises a computer including a processor and a memory. The memory stores instructions executable by the processor such that the computer is programmed to change a satellite antenna direction from a first sky segment to a second sky segment, to change the satellite antenna direction to return to the first sky segment upon updating segment blockage status data including a location and a score of the second sky segment, and to change the satellite antenna direction to a third sky segment based at least in part on the segment blockage status data. | 2021-02-04 |
| 20210036771 | METHOD FOR DETERMINING A MAXIMUM TRANSMISSION POWER OF A NON-GEOSTATIONARY SATELLITE - A method for determining a maximum transmission power (Pmax, PR, PO) of a non-geostationary satellite (NGSO | 2021-02-04 |
| 20210036772 | Multi-Pathway Satellite Communication Systems and Methods - Systems and methods for controlling satellites are provided. In one example embodiment, a computing system can obtain a request for image data. The request can be associated with a priority for acquiring the image data. The computing system can determine an availability of a plurality of satellites to acquire the image data based at least in part on the request. The computing system can select from among a plurality of communication pathways to transmit an image acquisition command to a satellite based at least in part on the request priority. The plurality of communication pathways can include a communication pathway via which the image acquisition command is indirectly communicated to the satellite via a geostationary satellite. The computing system can send the image acquisition command to the selected satellite via the selected communication pathway. | 2021-02-04 |
| 20210036773 | DEVICE AND METHOD FOR INSERTING QUADRUPLET AND DEVICE AND METHOD FOR EXTRACTING QUADRUPLET - The invention relates to inserting reference signals in a radio signal to be transmitted over a wireless communication system, the radio signal being emitted according to a specific SS-STBC scheme, the method comprising, inserting the reference signals to transmit them in the radio signal such as samples of these reference signals are in specific positions in the SS-STBC symbol. | 2021-02-04 |
| 20210036774 | OPTICAL TRANSMISSION DEVICE, OPTICAL RECEPTION DEVICE, AND OPTICAL COMMUNICATION METHOD - An optical communication method includes: outputting light of a frequency allocated to an own device; separating the output light into mutually orthogonal polarized waves, modulating an in-phase component and a quadrature component in each of the polarized waves, and outputting an optical signal acquired by polarization synthesis of modulated component waves; acquiring information on a reception state of the optical signal in an optical reception device being a transmission destination of the optical signal; and controlling, based on the information on the reception state, a frequency of the light to be output, and adjusting a frequency offset being a difference between the frequency of the light to be output and a frequency of local oscillation light for use in coherent detection of the optical signal by the optical reception device. | 2021-02-04 |
| 20210036775 | IDENTIFYING AND SEGMENTING PERFORMANCE ISSUES OVER OPTICAL NETWORKS AND IN-PREMISES INTERFACES WITH INTEGRATED WORKFLOWS - Disclosed are an apparatus and testing methods for performing testing operations over multiple types of links and through multiple potential points of failure to segment sources of problems, which may relate to reported or actual instances of service disruption in a network communication environment. The apparatus may perform service layer testing directly via an optical link, in addition to via Ethernet service layer testing. The apparatus may further conduct tests on other layers as well, including the physical layer, the network layer, and the link layer. To facilitate efficient testing, the apparatus may integrate programmable workflow profiles that specify tests to be conducted, and may interface with a cloud platform for sharing results of the tests, providing end-to-end testing of various components and types of links (whether optical or electrical, including wired and wireless links). Results of the tests may provide guidance to resolve detected problems. | 2021-02-04 |
| 20210036776 | DYNAMICALLY SELECTING A CHANNEL MODEL FOR OPTICAL COMMUNICATIONS - A system for transmitting data over an optical communication path is configured to receive data to be encoded in a bitstream for transmission using an optical communication path and encodes the received data to obtain a bitstream. The system is further configured to determine that the bitstream includes a sequence of consecutive bits, and obtain a power level at which to transmit a portion of the bitstream based on a count of the consecutive bits in the sequence. The system may be configured to selectively activate a light source at a power level according to a modulation scheme to optically transmit the portion of the bitstream at the power level. | 2021-02-04 |
| 20210036777 | OPTICAL COMMUNICATION NETWORK FOR PICO SATELLITES - A digital communication system comprising: an optical receiver comprising a detector configured to receive a laser optical signal from an optical transmitter; a curved mirror; an optical detector associated with said curved mirror; and an automated tracking system configured to: (i) determine a desired orientation of said optical receiver in relation to said optical transmitter, based, at least in part, on detecting a celestial location of said optical transmitter, (ii) move said optical receiver to said orientation, and (iii) continuously adjust said orientation to maximize a measured strength of said received optical signal. | 2021-02-04 |
