| 05th week of 2016 patent applcation highlights part 69 |
| Patent application number | Title | Published |
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| 20160036357 | MOTOR DRIVING CIRCUIT OF EPB SYSTEM FOR REDUCING DARK CURRENT - Disclosed is a motor driving circuit of an EPB system which may reduce dark current. The present invention provides a motor driving circuit, including: a motor which includes two power input terminals to be applied with a battery power and a ground power; an H-bridge circuit which alternatively applies the battery power and the ground power to the two power input terminals in response to four motor driving signals applied from an ECU to drive the motor; an activating transistor which is connected between the battery power and the H-bridge circuit and is activated in response to a fail-safe control signal applied from the ECT to apply the battery power to the H-bridge circuit; and two monitoring units which are connected to corresponding input terminals of two power input terminals of the motor to distribute a voltage level which is applied to the motor and output monitoring signals. | 2016-02-04 |
| 20160036358 | CONSTRUCTION MACHINE - A construction machine includes: a swing structure; an electric motor that drives the swing structure; an operating device that outputs an operating signal according to an operating amount and an operating direction; an inverter device that controls the electric motor based on a control signal generated based on the operating signal; a position sensor that detects an actual speed of the electric motor; and a second controller that determines whether at least one of a first condition and a second condition is satisfied. The first condition is satisfied when a sign of a value computed by subtracting the actual speed from a target speed of the electric motor that defined by the control signal; and the second condition is satisfied when a difference between the target speed and the actual speed is greater than a first reference value, and when the acceleration is greater than a second reference value. | 2016-02-04 |
| 20160036359 | INVERTER APPARATUS - An inverter apparatus includes an inverter circuit, a capacitor, and a control unit. In the first control mode, the control unit shifts a phase of at least one of PWM signals of three phases such that a time period during which polarities of output voltages of three phases are the same is shorter in the first control mode than the time period in the second control mode; and controls the inverter circuit so as to supply a direct current to the three-phase AC motor as a d-axis current by outputting the PWM signals of three phases, each having a phase after the phase shift processing. In the second control mode, the control unit controls the inverter circuit so as to supply an alternating current to the three-phase AC motor by outputting the PWM signals of three phases, each having a phase before the phase shift processing. | 2016-02-04 |
| 20160036360 | MOTOR CONTROL DEVICE, AIR CONDITIONER, WASHING MACHINE AND REFRIGERATOR - A motor control device driving a motor via an inverter circuit includes a current sensing element, a PWM signal generation unit and a current detection unit. The PWM signal generation unit is configured to generate three-phase PWM signals in a manner such that the current detection unit is capable of detecting two-phase currents at two fixed time-points within a carrier period of the PWM signal. A duty of one of the three-phase PWM signals is increased/decreased to both phase lag side and phase lead side with reference to any phase. A duty of another phase PWM signal is increased/decreased to both phase lag side and phase lead side with reference to any phase away one half of the carrier period from the reference phase. A duty of the other phase PWM signal is increased/decreased to either phase lag side or phase lead side with reference to any phase. | 2016-02-04 |
| 20160036361 | SYSTEM AND METHOD FOR STARTING A MOTOR - A motor controller coupled to a motor is provided. The motor controller is configured to transmit a first instruction to the motor to perform a first start attempt utilizing at least one parameter in a first set of parameters. The motor controller is additionally configured to receive feedback associated with the first start attempt from the motor, and transmit, in response to the feedback, a second instruction to the motor to perform a second start attempt utilizing at least one parameter in a second set of parameters, wherein the second set of parameters differ from the first set of parameters. | 2016-02-04 |
| 20160036362 | STEPPING MOTOR DRIVING DEVICE AND IMAGE FORMING APPARATUS - A stepping motor driving device includes a table, a driving pulse control part, an interpolation number indicating part and a driving part. The table stores thinned data which is thinned from original data and designates a pulse width of a driving pulse relating to a slow-up control or a slow-down control of a stepping motor. The driving pulse control part sequentially reads the thinned data from the table at predetermined intervals, to interpolate the thinned data in accordance with a given interpolation number so as to generate interpolated data and to output the driving pulse with the pulse width designated by the thinned data or the interpolated data by sequentially using the thinned data and the interpolated date at predetermined intervals. The interpolation number indicating part indicates the interpolation number to the driving pulse control part. The driving part drives the stepping motor in accordance with the driving pulse. | 2016-02-04 |
| 20160036363 | SYSTEMS UTILIZING A CONTROLLABLE VOLTAGE AC GENERATOR SYSTEM - An electrical system for a motorized system can include a controllable voltage AC generator configured to be connected to a power generation unit shaft and configured to convert rotational energy to electrical energy, wherein the controllable voltage AC generator is configured to output a desired voltage irrespective of a change in a rotational speed of the controllable voltage AC generator, and an AC bus operative to connect the controllable voltage AC generator to an AC electrical device. | 2016-02-04 |
| 20160036364 | MOTOR CONTROL DEVICE, AND METHOD AND DEVICE FOR ESTIMATING MAGNETIC FLUX OF ELECTRIC MOTOR - A motor control device is provided, which includes a power converter for applying output voltage according to a voltage command to an electric motor, a magnetic flux estimator for estimating a vector of stator magnetic flux of the electric motor based on a difference between the output voltage and a voltage drop caused by a coil resistance of the electric motor, and a phase estimator for estimating a phase of the stator magnetic flux based on the vector of the stator magnetic flux estimated by the magnetic flux estimator. The magnetic flux estimator includes a variable low-pass filter for applying a low-pass filter to the difference at a cut-off frequency according to a frequency of the output voltage, and a phase adjuster for retarding at least one of an output phase of the variable low-pass filter and a phase of the difference before inputted into the variable low-pass filter. | 2016-02-04 |
| 20160036365 | Electromechanical power system | 2016-02-04 |
| 20160036366 | TORQUE RIPPLE AND RADIAL FORCE REDUCTION IN DOUBLE-ROTOR SWITCHED RELUCTANCE MACHINES - A double-rotor switched reluctance machine includes a stator, a first rotor, and a second rotor. The stator and the first rotor operate as a first electric machine and the stator and the second rotor operate as a second electric machine. Each electric machine has an output torque profile that fluctuates periodically between a maximum and a minimum instantaneous torque. The double-rotor switched reluctance machine is configured so that when the first and second electric machines are operated at a common electrical frequency, the first and second maximum instantaneous torques are temporally offset, thereby reducing the overall torque ripple of the switched reluctance machine. Additionally, or alternatively, a double-rotor switched reluctance machine is configured so that the first and second rotors are radially offset from each other to reduce a net radial force imposed on the stator by the operation of the first and second electric machines. | 2016-02-04 |
| 20160036367 | VARIABLE SPEED GENERATOR AND MOTOR - A system for supplying power to a motor driven pump. The system includes a variable speed electrical generator driven by an engine and a variable frequency drive connected to the output of the generator. The motor is powered by the output of the variable frequency drive. The system also includes a controller for changing the frequency of the output of the variable frequency drive and thereby changing the speed of the motor and the pump. | 2016-02-04 |
| 20160036368 | SYSTEM AND METHOD OF CONTROLLING PARALLEL INVERTER POWER SUPPLY SYSTEM - A method of controlling a pair of inverters connected in parallel and providing power to a motor. The speed of the motor is adjusted by varying the amplitude or frequency of the voltage supplied by each of the inverters to the motor. The method includes providing a system controller for controlling the frequency of the voltage supplied by each of the inverters. The frequency or amplitude setpoint of the voltage provided by each of the inverters is changed by sending a command signal from the system controller to each of the inverters in order to change the speed of the motor. The frequency or amplitude setpoint is controlled by a slew rate limiter. | 2016-02-04 |
| 20160036369 | DRIVE DEVICE - A drive device for controlling an electric motor, including a processor, and a non-transitory storage medium containing program instructions, execution of which by the process causes the drive device to provide functions of a customization unit and a core unit. The customization unit receives, from an external device, a command value designating an operating state of the electric motor, converts the command value using a predetermined reference value, and outputs the converted command value. The core unit receives the converted command value from the customization unit, recovers a physical quantity from the received converted command value, and controls the electric motor in accordance with the recovered physical quantity. | 2016-02-04 |
| 20160036370 | MOTOR DRIVING APPARATUS, MOTOR SYSTEM, AND CORRECTION CIRCUIT THEREOF - The motor driving apparatus according to an exemplary embodiment in the present disclosure may include: a controlling unit outputting a digital code; a converting unit converting the digital code into an analog driving signal; and a correction unit changing the analog driving signal at a predetermined ratio using a plurality of resistors. | 2016-02-04 |
| 20160036371 | ELECTRIC POWER STEERING SYSTEM AND VEHICLE CONTROL SYSTEM INCLUDING THE ELECTRIC POWER STEERING SYSTEM - An electric power steering system includes an electric power steering device. The electric power steering device includes an electric motor, a controller controlling the motor, and two power supply connectors that assist a steering operation of a vehicle. The electric power steering system also includes a first power supply supplying power to a first connector, a second power supply supplying power to a second connector and to other in-vehicle devices other than the electric power steering device, and a power switcher provided en route to the controller, to electrically connect the first power supply to the controller when power supply from the first power supply is normal, and to electrically connect the second power supply to the controller when the power supply from the first power supply is abnormal. | 2016-02-04 |
| 20160036372 | PHOTOVOLTAIC SYSTEMS AND RELATED TECHNIQUES - Photovoltaic systems and related techniques are provided. A method for commissioning a photovoltaic (PV) system may include obtaining data describing an arrangement of two or more components of the PV system; performing a test of the PV system, wherein performing the test includes determining whether the PV system complies with at least one PV system criterion based, at least in part, on at least a portion of the data describing the arrangement of the two or more components of the PV system; and in response to determining that the PV system complies with the at least one PV system criterion, activating the PV system and/or notifying a user of the PV system that the PV system complies with the at least one PV system criterion. The method may further include sending information associated with the PV system to a regulatory entity and/or an operator of an electrical grid. | 2016-02-04 |
| 20160036373 | PHOTOVOLTAIC SYSTEMS AND RELATED TECHNIQUES - Photovoltaic systems and related techniques are provided. A method for commissioning a photovoltaic (PV) system may include obtaining data describing an arrangement of two or more components of the PV system; performing a test of the PV system, wherein performing the test includes determining whether the PV system complies with at least one PV system criterion based, at least in part, on at least a portion of the data describing the arrangement of the two or more components of the PV system; and in response to determining that the PV system complies with the at least one PV system criterion, activating the PV system and/or notifying a user of the PV system that the PV system complies with the at least one PV system criterion. The method may further include sending information associated with the PV system to a regulatory entity and/or an operator of an electrical grid. | 2016-02-04 |
| 20160036374 | SOLAR CELL SUPPORT ASSEMBLY - A solar cell support assembly includes: a first supporting ( | 2016-02-04 |
| 20160036375 | TRANSPORTABLE HYBRID POWER SYSTEM - A transportable, deployable power system comprising a hybrid power box containing solar panels, wind turbine(s), fuel cells, fuel reformers, and other energy sources. The system could also include waste water and potable water inlet and outlet ports for water treatment. It will also allow for shelf mounted solar and wind turbine installation for disaster recovery, backup power for telecommunication, military power, Homeland Security power, off grid homes and water and wastewater packaging domestically and internationally. The present invention is ideal for any situation requiring immediate power and/or water treatment, such as remote construction sites or in emergency situations. The hybrid power box can be mounted to a standard shipping truck, train, or ship, and transported over land to the desired location. | 2016-02-04 |
| 20160036376 | Techniques for Optimizing Photo-Voltaic Power Via Inductive Coupling - Techniques for optimizing power production from photo-voltaic systems using, e.g., inductive coupling, are provided. In one aspect, a method of optimizing photo-voltaic generated power from a string of photo-voltaic devices is provided. The method includes the step of: providing corrective power to at least one photovoltaic device in the string of photo-voltaic devices to boost performance of the at least one photovoltaic device and thereby increase overall the photo-voltaic generated power from the string of photo-voltaic devices, wherein the corrective power is from about 1% to about 5%, and ranges therebetween, of the photo-voltaic generated power from the string of photo-voltaic devices. A system for optimizing photo-voltaic generated power from a string of photo-voltaic devices and a method for use thereof are also provided. | 2016-02-04 |
| 20160036377 | Junction Box for Snap Together Electrical Connections to Photovoltaic Panels - A junction box adapted to provide an electrical connection to an electrical wire attached to a photovoltaic panel. The junction box has a lower portion which has an entry slot to allow entry of the wire into the junction box and a raised protrusion over which the wire is bent and formed to be substantially in the same shape as the raised protrusion. The junction box also has a clamp adapted to be attachable to said lower portion, whereby the clamp holds the wire in place for providing the electrical connection. The wire is preferably bus ribbon. The lower portion preferably has an elastic polymeric element disposed between the raised portion and the wire. The raised protrusion may have an elastic polymeric element. | 2016-02-04 |
| 20160036378 | HYBRID PHOTOVOLTATIC AND PHOTO-THERMAL SOLAR PANEL - A hybrid photovoltaic/photo-thermal panel has at least one photovoltaic cell mounted on and in thermally conductive communication with an evaporator, the evaporator being a single piece of thermally conductive material having a first outer surface configured for mounting photovoltaic cells thereon, an uninsulated second outer surface exposed to ambient air and the single piece of thermally conductive material having fluid flow channels formed therein configured to permit flow of refrigerant from at least one fluid inlet to at least one fluid outlet in the evaporator. Heat generated by the at least one photovoltaic cell or from the ambient energy of the surrounding air or other source of heat is absorbed by the refrigerant. The panel may be part of a system including a compressor for circulating refrigerant through the channels and a condenser for extracting heat from the refrigerant. The hybrid system has an increased coefficient of performance for utilizing full spectrum solar energy for both power and heating, plus environmental energy heating during poor or non-existent light conditions. | 2016-02-04 |
| 20160036379 | HYBRID SOLAR THERMAL AND PHOTOVOLTAIC SYSTEM WITH TERMAL ENERGY CATURE SUBSYSTEM - A hybrid photovoltaic and solar thermal system for generating electrical energy and providing heated water for storage or immediate use. The system includes photovoltaic solar panels, each attached to base with an open top, a bottom, and sides. A base cover is connected to the base sides to define a fluid reservoir. A fluid inlet disposed in each side of the bases provide water to the reservoir from a water supply. A fluid outlet disposed in the sides of each base discharges heated water from the reservoirs through a discharge pipe connected to hot water storage tanks. | 2016-02-04 |
| 20160036380 | CIRCUITS AND METHODS FOR LIMITING OPEN CIRCUIT VOLTAGE OF PHOTOVOLTAIC STRINGS - A photovoltaic string may include an open circuit voltage limiter that conducts current in one direction to provide a limiter voltage less than an open circuit voltage of the photovoltaic string, and that conducts current in the other direction. One or more open circuit voltage limiters may be connected across the photovoltaic string or across selected groups of solar cells of the photovoltaic string. The limiter voltage may be greater than a maximum power point voltage but less than the open circuit voltage of the photovoltaic string. | 2016-02-04 |
| 20160036381 | PHOTOVOLTAIC SYSTEMS AND RELATED TECHNIQUES - Photovoltaic systems and related techniques are provided. A method for commissioning a photovoltaic (PV) system may include obtaining data describing an arrangement of two or more components of the PV system; performing a test of the PV system, wherein performing the test includes determining whether the PV system complies with at least one PV system criterion based, at least in part, on at least a portion of the data describing the arrangement of the two or more components of the PV system; and in response to determining that the PV system complies with the at least one PV system criterion, activating the PV system and/or notifying a user of the PV system that the PV system complies with the at least one PV system criterion. The method may further include sending information associated with the PV system to a regulatory entity and/or an operator of an electrical grid. | 2016-02-04 |
| 20160036382 | LOW POWER WIDE TUNING RANGE OSCILLATOR - A wide tuning range oscillator system uses multiple active cores with cross-coupled transistors and multiple tapped inductors having windings that can be connected to circuit nodes. These active cores are connected to a pair of symmetric tapping points and are switched ON/OFF by biasing elements. Biasing schemes and the topology of the individual cross-coupled cores may be different from each other. The tapping points are symmetrically arranged around the center point of the inductor. One or more of the active cores may be enabled for tuning the center frequency of the oscillator system. | 2016-02-04 |
| 20160036383 | CRYSTAL OSCILLATION CIRCUIT - A crystal oscillation circuit is provided with a crystal oscillator, an inverter unit coupled in parallel with the crystal oscillator and including a plurality of inverters, a current supply unit that supplies current to at least a first inverter of the plurality of inverters a signal converter that supplies current to at least a last inverter of the plurality of inverters and outputs a voltage to an external circuit, and a current controller that makes the current supply unit provide current corresponding to a voltage level of the output voltage of the signal converter. The crystal oscillation circuit is capable of reducing power consumption. | 2016-02-04 |
| 20160036384 | SPIN OSCILLATOR DEVICE - The present invention relates to using spin transfer torque underneath a nanocontact on a magnetic thin film with perpendicular magnetic anisotropy (PMA), provides generation of dissipative magnetic droplet solitons and report on their rich dynamical properties. Micromagnetic simulations identify a wide range of automodulation frequencies including droplet oscillatory motion, droplet “spinning”, and droplet “breather” states. The droplet can be controlled using both current and magnetic fields, and is expected to have applications in spintronics, magnonics, and PMA-based domain-wall devices. | 2016-02-04 |
| 20160036385 | FREQUENCY DOWN-CONVERSION - Apparatus and methods concern down-converting a radio frequency (RF) signal. As an example, one apparatus includes a first mixer and a second mixer. The first mixer down-converts an RF signal to produce a first intermediate frequency (IF) signal. The second mixer down-converts the first IF signal to produce a second IF signal having a plurality of phase components. The down-converter also includes a plurality of summing circuits. Each of the summing circuits is configured to combine various ones of the phase components of the second IF signal to produce a respective phase component of a third IF signal. The number of phase components in the third IF signal is different from the number of phase components in the second IF signal. | 2016-02-04 |
| 20160036386 | DYNAMIC BIAS CURRENT ADJUSTMENT FOR POWER AMPLIFIERS - In one embodiment, a circuit comprises a power amplifier. The circuit further comprises a memory that stores bias current values corresponding to a plurality of frequencies across a frequency band for setting the bias of a power amplifier based on selected frequencies, and a controller configured to provide at least one bias current value corresponding to a selected frequency from the memory to the power amplifier in response to a frequency selection signal. The bias current value at each frequency may be selected to maximize power efficiency or minimize adjacent channel leakage-power ratio of the power amplifier at said frequency. In one embodiment, the memory further stores bias current values corresponding to the plurality of frequencies across the frequency band at a plurality of temperatures for setting the bias of a power amplifier based on a temperature of the power amplifier and on selected frequencies. | 2016-02-04 |
| 20160036387 | OUTPUT STAGE FOR CLASS AB AMPLIFIER - The invention relates to a class AB amplifier for receiving an input current and generating an amplified output current and having first and second output transistors connected to provide the output current, wherein if the input current is less than a threshold the first output transistor is enabled and the second output transistor is disabled, and if the input current exceeds a threshold the second output transistor is enabled. | 2016-02-04 |
| 20160036388 | Adaptive Envelope Tracking for Biasing Radio Frequency Power Amplifiers - An RF PA is designed to operate efficiently for average powers when biased at the system supply voltage, and uses an envelope tracking power supply to boost the bias voltage to maintain good efficiency at higher powers. As a result, for a majority of the time when transmitting average power signals, the RF PA bias voltage is the system-wide supply voltage (e.g. 3.4V in cell phones), which eliminates the need for stepping down voltages. The bias voltage is boosted during the less frequent times when higher power is needed. As a result, only a boost type of DC voltage converter is needed. The efficiency of the RF PA is therefore increased because voltage conversion is required less frequently and only when higher power RF signals are transmitted. | 2016-02-04 |
| 20160036389 | ENVELOPE TRACKING WITH LOW FREQUENCY LOSS CORRECTION - A low frequency loss correction circuit that improves the efficiency of a power amplifier at near-DC low frequencies The low frequency loss correction circuit can include a signal error detection circuit configured to produce an error signal in response to detecting one or more frequency components of a tracking signal below a cutoff frequency that are substantially attenuated through a capacitive path. The low frequency loss correction circuit can include a drive circuit configured to convert the error signal into a low frequency correction signal, and provide the low frequency correction signal to a voltage supply line, the low frequency correction signal including at least some of the one or more frequency components of the tracking signal below a cutoff frequency that are substantially attenuated through the capacitive path. | 2016-02-04 |
| 20160036390 | MULTI-MODE INTEGRATED POWER AMPLIFIER - A method and apparatus are disclosed for transmitting communication signals through a multi-mode power amplifier. For at least some embodiments, a communication signal may be amplified by an amplifier of the multi-mode power amplifier selected based on a desired transmit output power. The output of the selected amplifier may be coupled through a configurable inductive element to an antenna. The inductive element may be configured as a balun or as an inductive load element based on an operating mode of the multi-mode power amplifier. | 2016-02-04 |
| 20160036391 | SOURCE OR EMITTER FOLLOWER BUFFER CIRCUIT AND METHOD WITH MIRRORED CURRENT - In one aspect, a buffer circuit comprises a source or emitter follower input stage and output stage. A load is provided between the stages which comprises a representation of an output load of the buffer circuit. This improves the circuit linearity whilst enabling a high input impedance to be obtained. | 2016-02-04 |
| 20160036392 | DUAL-BAND AMPLIFIER - An apparatus includes: a first amplifier stage configured to receive an input signal through a first gate inductor and a first source inductor; and a second amplifier stage configured to receive the input signal through the first gate inductor in series with a second gate inductor and the first source inductor in series with a second source inductor. | 2016-02-04 |
| 20160036393 | LINEARIZED GATE CAPACITANCE IN POWER AMPLIFIERS - An apparatus includes: a plurality of amplification stages, each stage comprising a cascode transistor; and a bridge circuit coupled between gate terminals of cascode transistors in two adjacent stages of the plurality of amplification stages, the bridge circuit including a plurality of diodes. | 2016-02-04 |
| 20160036394 | POWER AMPLIFIER TIME-DELAY INVARIANT PREDISTORTION METHODS AND APPARATUS - An embodiment of the invention is a time-delay invariant predistortion approach to linearize power amplifiers in wireless RF transmitters. The predistortion architecture is based on the stored-compensation or memory-compensation principle by using a combined time-delay addressing method, and therefore, the architecture has an intrinsic, self-calibrating time-delay compensation function. The predistortion architecture only uses a lookup table to conduct both the correction of non-linear responses of a power amplifier and the compensation of any time-delay effects presented in the same system. Due to the time-delay invariant characteristic, the predistortion design has a wider dynamic range processing advantage for wireless RF signals, and therefore can be implemented in multi-carrier and multi-channel wireless systems. | 2016-02-04 |
| 20160036395 | APPARATUS AND METHODS FOR OVERDRIVE PROTECTION OF RADIO FREQUENCY AMPLIFIERS - Provided herein are apparatus and methods for overdrive protection of radio frequency (RF) amplifiers. In certain configurations, an RF amplifier includes a plurality of amplification stages and an overdrive detection circuit. The overdrive detection circuit determines whether or not the RF amplifier is in an overdrive condition based on a current of an input amplification stage. Additionally, when the overdrive detection circuit detects an overdrive condition, the overdrive detection circuit controls an impedance of one or more feedback circuits of one or more amplification stages subsequent to the input amplification stage in a signal path of the RF amplifier to reduce the RF amplifier's gain. The overdrive protection schemes herein can be used to limit large current and voltage swing conditions manifesting within amplification transistors of the RF amplifier. | 2016-02-04 |
| 20160036396 | Power Amplifier, and Method of the Same - A power amplifier comprises a first inductor, a second inductor, a capacitor, a first MOS transistor, a second MOS transistor and a current source. The first and the second inductors are both connected to a first power supply. The first inductor and the second inductor form a differential inductor. The capacitor is connected to the first inductor at a first terminal of and to the second inductor at a second terminal. A drain of the first MOS transistor is connected to the first terminal of the capacitor. A drain of the second MOS transistor is connected to the second terminal of the capacitor. A first terminal of the current source is connected to sources of both the first and the second MOS transistors. A second terminal of the current source is connected to a second power supply. The current source outputs a variable current based on a bias voltage input. | 2016-02-04 |
| 20160036397 | SEMICONDUCTOR AMPLIFIER CIRCUIT - According to one embodiment, a semiconductor amplifier circuit includes: a first amplifier circuit including first and second P-type transistors; a second amplifier circuit including first and second N-type transistors; and first to seventh current mirror circuits. The first and second current mirror circuits are connected to drains of the first and second P-type transistors. The third and fourth current mirror circuits are connected to drains of the first and second N-type transistors. The sixth current mirror circuit is connected to the first, fourth and fifth current mirror circuits. The seventh current mirror circuit is connected to the second, third and fifth current mirror circuits. | 2016-02-04 |
| 20160036398 | VOLTAGE MODE POWER COMBINER FOR RADIO FREQUENCY LINEAR POWER AMPLIFIER - A radio frequency (RF) power combining amplifier circuit has a circuit input and a circuit output. A first amplifier is connected to the circuit input and to a first bias input. A first output matching network is connected to an output of the first amplifier and to the circuit output. A second amplifier is connected to the circuit input and to a second bias input. A second output matching network is connected to an output of the second amplifier, and to the circuit output. A voltage level of an input signal applied to the circuit input, together with the respective first bias input and the second bias input, selectively activates the first amplifier and the second amplifier. | 2016-02-04 |
| 20160036399 | LIMITING DRIVER FOR SWITCH-MODE POWER AMPLIFIER - A switch-mode RFPA driver includes first and second field-effect transistors (FETs) arranged in a totem-pole-like configuration. The switch-mode RFPA driver operates to generate a switch-mode RFPA drive signal having a generally square-wave-like waveform from an input RF signal having a generally sinusoidal-like waveform. According to one embodiment of the invention, to maximize high-frequency operation and avoid distorting the switch-mode RFPA drive signal, the switch-mode RFPA driver is designed so that its output can be connected directly to the input of the switch-mode RFPA to be driven, i.e., without using or requiring the use of an AC coupling capacitor. The first and second FETs of the switch-mode RFPA driver are designed and configured to limit and control the upper and lower magnitude levels of the switch-mode RFPA drive signal to levels suitable for switching the switch-mode RFPA directly, obviating any need for DC biasing at the input of the switch-mode RFPA. | 2016-02-04 |
| 20160036400 | INTEGRATED CIRCUIT CHIP FOR RECEIVER COLLECTING SIGNALS FROM SATELLITES - An integrated circuit chip includes a first single-ended-to-differential amplifier configured to generate a differential output associated with an input of said first single-ended-to-differential amplifier; a second single-ended-to-differential amplifier arranged in parallel with said first single-ended-to-differential amplifier; a first set of switch circuits arranged downstream of said first single-ended-to-differential amplifier; a second set of switch circuits arranged downstream of said second single-ended-to-differential amplifier; and a first differential-to-single-ended amplifier arranged downstream of a first one of said switch circuits in said first set and downstream of a first one of said switch circuits in said second set. | 2016-02-04 |
| 20160036401 | CONTROL KNOB DEVICE - A control knob device that may be used in a vehicle to control audio volume or the like includes a shaft connected with a knob cap, an elastic member pressed by the shaft to be elastically deformed, and a switch located adjacent to the elastic member. The switch includes a switch part configured to output a signal upon a deformation of the elastic member. A deformable member deformed by a load greater than that when the elastic member is deformed and the switch outputs the signal, is configured to change a relative position between the knob cap and the shaft. | 2016-02-04 |
| 20160036402 | SYSTEM AND METHOD FOR DIGITAL SIGNAL PROCESSING IN DEEP DIVING ENVIRONMENT - The present invention relates to a system for processing of an audio signal relating to a diver in a deep diving environment. The system comprises an input device structured to receive the signal, a pitch changing module configured to change the pitch of the received signal, a plurality of processing modules collectively configured to process the pitch changed signal and produce a processed signal. The present invention is further directed to a method for processing of an audio signal relating to a diver in a deep diving environment. | 2016-02-04 |
| 20160036403 | MULTIPLE-PORT SIGNAL BOOSTERS - A signal booster is disclosed that includes a first interface port, a second interface port, a downlink signal splitter device, an uplink signal splitter device, a main booster and a first front-end booster. The downlink signal splitter device can communicate a downlink signal from the first interface port to a plurality of interface ports. The uplink signal splitter device can communicate an uplink signal from the plurality of interface ports to the first interface port. The main booster can include a main downlink amplification path and a main uplink amplification path. The first front-end booster can include a first front-end downlink amplification path and a first front-end uplink amplification path. | 2016-02-04 |
| 20160036404 | EQUALIZATION FILTER COEFFICIENT DETERMINATOR, APPARATUS, EQUALIZATION FILTER COEFFICIENT PROCESSOR, SYSTEM AND METHODS - An equalization filter coefficient determinator continuously or quasi-continuously fades between a plurality of different equalizer settings in dependence on one or more setting parameters, to obtain a current set of equalization filter target coefficients describing a current equalizer setting. A number of setting parameters is smaller than a number of equalization filter target coefficients of current set of equalization filter target coefficients. | 2016-02-04 |
| 20160036405 | IMPROVED DYNAMIC COMPRESSOR WITH "RELEASE" FEATURE - A dynamic range compressor includes an input terminal for receiving input signal to be compressed, an amplifier unit for amplifying the signal to be compressed by an amplification factor, for deriving a compressed output signal, an output terminal for supplying the compressed output signal, a first envelope detector unit for deriving a first envelope signal from the input signal, and an amplifier control unit for generating an amplifier control signal in dependence of an envelope signal. Further including a second envelope detector unit for deriving a second envelope signal from the input signal, a first signal level prediction unit for generating a first prediction signal from the first envelope signal, a second signal level prediction unit for generating a second prediction signal from the second envelope signal, and a signal combination unit for combining the first and second prediction signals to generate a combined prediction signal. | 2016-02-04 |
| 20160036406 | INTEGRATED MICROELECTROMECHANICAL SYSTEM DEVICES AND METHODS FOR MAKING THE SAME - Integrated Microelectromechanical System (“MEMS”) devices and methods for making the same. The integrated MEMS device comprises a substrate ( | 2016-02-04 |
| 20160036407 | CIRCUIT WITH AN RC-FILTER - A circuit ( | 2016-02-04 |
| 20160036408 | SNAP-ON COAXIAL CABLE BALUN AND METHOD FOR TRAPPING RF CURRENT ON OUTSIDE SHIELD OF COAX AFTER INSTALLATION - Apparatus and method for a radially attachable RF trap attached from a side to a shielded RF cable. In some embodiments, the RF trap creates a high impedance on the outer shield of the RF cable at a frequency of RF signals carried on at least one inner conductor of the cable. In some embodiments, an RF-trap apparatus for blocking stray signals on a shielded RF cable that has a peripheral shield conductor and a inner conductor for carrying RF signals includes: a case; an LC circuit having a resonance frequency equal to RF signals carried on the inner conductor; projections that pierce and connect the LC circuit to the shield conductor; and an attachment device that holds the case to the cable with the LC circuit electrically connected to the shield conductor of the shielded RF cable. | 2016-02-04 |
| 20160036409 | PRINTED DIPLEXER - A printed diplexer is printed on a PCB, having at least two input terminals respectively connected to at least two end portions thereof, having the output terminal connected at a center portion thereof, and configured to output a signal inputted from the at least two input terminals to the output terminal. | 2016-02-04 |
| 20160036410 | SURFACE ACOUSTIC WAVE DEVICE - A surface acoustic wave device includes, on a substrate, functional electrode units each including at least one IDT electrode, wiring electrodes connected to the functional electrode units, insulation films provided between the wiring electrode and the substrate, and a support member that surrounds the functional electrode units and at least a portion of the wiring electrodes. A thickness of the support member is larger than a thickness of the insulation films, and the insulation films and the support member are made of the same material. | 2016-02-04 |
| 20160036411 | VIBRATION DEVICE, ELECTRONIC APPARATUS, AND MOBILE OBJECT - A vibration device which is possible to secure the fixing of a vibrating element and to reduce deterioration in characteristics of the vibrating element includes a substrate, a plurality of elastic members each of which includes a connection portion connected to a first surface of the substrate, and a support portion extending from the connection portion to a position separated from the connection portion, and a vibrating element that is supported at the support portion, in which the vibrating element is supported by the plurality of elastic members via three or more support portions. | 2016-02-04 |
| 20160036412 | ULTRASONIC DEVICE AND PROBE AS WELL AS ELECTRONIC APPARATUS AND ULTRASONIC IMAGING APPARATUS - An acoustic matching layer is formed on individual ultrasonic transducer elements on a base. Electric conductors are arranged between adjacent ultrasonic transducer elements, the electric conductors being connected to electrodes of the ultrasonic transducer elements. Protective films overlap the electric conductors. The protective films have smaller moisture permeability than the acoustic matching layer. Wall portions are arranged on the protective films, the wall portions separating portions of the acoustic matching layer that are respectively located on adjacent ultrasonic transducer elements from each other at least in a part of a height range with respect to a height direction from the base, and having an acoustic impedance that is different from the acoustic impedance of the acoustic matching layer. | 2016-02-04 |
| 20160036413 | RESONATOR ELEMENT, RESONATOR, RESONATOR DEVICE, OSCILLATOR, ELECTRONIC DEVICE, AND MOBILE OBJECT - A resonator element includes a quartz crystal substrate having a main surface along a plane including an X-axis and a Z′-axis, and a thickness in a Y′-axis direction. The quartz crystal substrate includes a vibrating portion including a side along the X-axis, a side along the Z′-axis, and a peripheral portion having a thickness smaller than that of the vibrating portion, which is provided along an outer edge of the vibrating portion. The vibrating portion includes a first portion and a second portion having a thickness smaller than that of the first portion, which is provided on at least an outer edge on a +X side of the X-axis and an outer edge on a −X side thereof, among outer edges of the first portion. When Z is a length of the quartz crystal substrate along the Z′-axis, and t is a thickness of the first portion, 11| 2016-02-04 | |
| 20160036414 | ELASTIC WAVE DEVICES - An elastic wave device that can be downsized. Certain examples of the elastic wave device include a substrate, an IDT electrode provided above the substrate, a wiring electrode provided above the substrate and connected to the IDT electrode, a sealing body sealing an excitation space in which the IDT electrode excites an elastic wave, and a sealing wall provided above the wiring electrode and forming a part of the sealing body. An outer periphery of the wiring electrode includes a protrusion. In one example, the wiring electrode includes a first wiring electrode provided on an upper surface of the substrate and a second wiring electrode provided on an upper surface of the first wiring electrode, an outer periphery of the second wiring electrode being provided with the protrusion. | 2016-02-04 |
| 20160036415 | ELASTIC WAVE FILTERS AND DUPLEXERS USING SAME - An elastic wave filter including a substrate, a signal line disposed on the substrate and connecting a first signal terminal to a second signal terminal, a plurality of series resonators connected to the signal line in series, and a plurality of parallel resonators connected to the signal line. At least one of the series resonator having an anti-resonant frequency closest to the passband of the filter among the plurality of series resonators, and/or the parallel resonator having a resonant frequency closest to the passband of the filter among the plurality of parallel resonators, is covered with a dielectric film that is relatively thicker than a dielectric film covering the other series and/or parallel resonators. | 2016-02-04 |
| 20160036416 | ELASTIC WAVE DEVICE WITH INTEGRATED INDUCTOR - An elastic wave device includes an interdigital transducer (IDT) electrode disposed on an upper surface of a piezoelectric substrate, a wiring electrode disposed on the upper surface of the piezoelectric substrate and connected to the IDT electrode, and a first insulator layer disposed on the upper surface of the piezoelectric substrate. The first insulator layer seals the IDT electrode and the wiring electrode and includes a first resin and a first filler. A resin layer including no filler is provided on an upper surface of the first insulator layer. An inductor electrode is disposed on an upper to surface of the resin layer. A second insulator layer is disposed on the upper surface of the resin layer and covers the inductor electrode. A terminal electrode is disposed on an upper surface of the second insulator layer. A connecting electrode electrically connects the wiring electrode, the terminal electrode, and the inductor electrode. | 2016-02-04 |
| 20160036417 | CALIBRATION CIRCUIT, INTEGRATED CIRCUIT HAVING CALIBRATION CIRCUIT, AND CALIBRATION METHOD - A calibration circuit for calibrating a device to be calibrated includes a variable current generator, a circuit component, and a control unit. The variable current generator generates a variable current responsive to variations of a supply voltage relative to a predetermined voltage level. The circuit component is a copy of at least one portion of the device to be calibrated and is coupled between the variable current generator and the supply voltage. The control unit is coupled to the variable current generator and the circuit component, and generates, based on a voltage dependent on the variable current and the circuit component, at least one calibration signal for adjusting an adjustable electrical parameter of the circuit component and the device to be calibrated. | 2016-02-04 |
| 20160036418 | TRANSMISSION DRIVE CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - Provided is a transmission drive circuit which can reduce distortions of a transmission signal and transmission noise, and is isolable from a signal line. A transmission drive circuit | 2016-02-04 |
| 20160036419 | METHOD AND APPARATUS FOR CALIBRATING CMOS INVERTER - A circuit and method for calibrating CMOS (complementary metal-oxide semiconductor) inverters are provided. In a circuit, a first tunable CMOS inverter, controlled by a control signal, receives a first voltage from a first circuit node and outputs a second voltage to a second circuit node. A second tunable CMOS inverter, controlled by the control signal, receives the second voltage from the second circuit node and outputs the first voltage to the first circuit node. A resistor couples the first circuit node to the second circuit node. A switch, controlled by a reset signal, conditionally shorts the first circuit node to the second circuit node. A finite state machine receives the first voltage and the second voltage and outputs the reset signal and the control signal, wherein the control signal is adjusted based on a difference between the first voltage and the second voltage. | 2016-02-04 |
| 20160036420 | SKEW CALIBRATION CIRCUIT AND OPERATION METHOD OF THE SKEW CALIBRATION CIRCUIT - A skew calibration circuit may include a data delay unit receiving first data and a first code, and output delayed first data as second data by delaying the first data according to the first code; a clock delay unit receiving a first clock signal and a second code, and output delayed first clock signal as second clock signal by delaying the first clock signal according to the second code; a multiplexer receiving a clock signal and output the clock signal or an inverted clock signal of the clock signal as a first clock signal in response to a selection signal; and a control logic unit receiving the second data and the second clock signal and control the first code, the second code and the selection signal in response to the second data and the second clock signal. | 2016-02-04 |
| 20160036421 | ELECTRONIC DEVICE AND CLOCK CONTROL METHOD THEREOF - A user terminal device and a display method thereof are provided. A method for controlling a clock according to an exemplary embodiment includes generating a clock, generating a comparison clock corresponding to a frequency of an external alternating current (AC) power source, counting a number of clock cycles according to the comparison clock, and controlling a generation period of the clock according to the counted number of clock cycles. | 2016-02-04 |
| 20160036422 | CROSS-POINT SHIFTING TECHNIQUES - This disclosure describes techniques for shifting the cross-point of a digital signal in an optical transmitter. The cross-point shifting techniques may use multiple differential transconductors with their common polarity outputs coupled together to shift the cross-point of a signal. Using multiple differential transconductors in this manner may increase the balance between the positive and negative polarities of the resulting cross-point shifted signal relative to other types of cross-point shifting techniques, which may improve the quality of an optical signal generated by an optical transmitter. | 2016-02-04 |
| 20160036423 | INTERPOLATION APPARATUS FOR ENCODER, CONTROLLING METHOD OF INTERPOLATION APPARATUS FOR ENCODER, NON-TRANSITORY STORAGE MEDIUM STORING CONTROLLING PROGRAM OF INTERPOLATION APPARATUS FOR ENCODER AND ENCODER - An AD converter acquires first and second input values. A first multiplication unit multiplies a first tangent value, which is based on a first boundary angle based on a phase range of a reference value, by the reference value to calculate a first threshold value. A second multiplication unit multiplies a second tangent value, which is based on a second boundary angle based on the phase range, by the reference value to calculate a second threshold. A comparison unit determines whether the comparison value is within a particular phase range specified by the first and the second thresholds. The comparison unit determines magnitude of the comparison value when the comparison value is not within the particular phase range. A phase estimation unit updates the particular phase range to a phase range adjacent to a direction corresponding to the result of determination. | 2016-02-04 |
| 20160036424 | POWER EFFICIENT MULTIPLEXER - A power efficient multiplexer. In accordance with a first embodiment, a power efficient multiplexer comprises a transmission gate structure for selectively passing one of a plurality of input signals and a stacked inverter circuit for inverting the one of a plurality of input signals. Both the stacked inverter and the transmission gate provide beneficial reductions in static power consumption in comparison to conventional multiplexer designs. | 2016-02-04 |
| 20160036425 | BUFFER CONTROL CIRCUIT AND MULTI-CHIP PACKAGE INCLUDING THE SAME - A buffer control circuit includes: an activation control block suitable for generating a buffer activation control signal by detecting a first input of a repeatedly provided chip select signal; and a buffer suitable for buffering the chip select signal in response to the buffer activation control signal after the generation of the buffer activation control signal. | 2016-02-04 |
| 20160036426 | Delay-locked Loop Arrangement and Method for Operating a Delay-locked Loop Circuit - Delay-locked loop arrangement comprising a steering unit and a delay-locked loop circuit. The steering unit is configured to generate a reference clock signal and a main clock signal wherein the reference clock signal and the main clock signal feature a first frequency during a performance mode of operation. The reference clock signal and the main clock signal feature a second frequency being lower than the first frequency and a phase delay with respect to each other during a sleep mode of operation. The delay-locked loop circuit is configured to generate an error signal depending on a comparison of the reference clock signal and a feedback signal. Furthermore, the delay-locked loop circuit generates the feedback signal depending on the error signal and on the main clock signal. | 2016-02-04 |
| 20160036427 | PHOTOREPEATED INTEGRATED CIRCUIT WITH COMPENSATION OF THE PROPAGATION DELAYS OF SIGNALS, NOTABLY OF CLOCK SIGNALS - Integrated circuits of large size produced by photorepetition of several mutually identical partial patterns are provided, more precisely to the compensation of propagation delays of signals (notably of clock signals) from one partial circuit to the following whereas the signals concerned must reach the various partial circuits simultaneously for proper operation of the whole. The compensation circuit provided in each partial circuit comprises a main transmission line for a master clock signal and a compensation line with multiple outputs, as well as a multiplexer for selecting one of the outputs, the output selected being different in the various partial circuits. The multiplexer provides a local clock signal in each partial circuit and these clock signals are synchronous despite the propagation delays. | 2016-02-04 |
| 20160036428 | Fine-Grained Power Gating in FPGA Interconnects - Systems and methods for power gating in logic and/or computing circuitry in accordance with embodiments of the inventions are disclosed. In one embodiment, a multiplexer for fine-grain power gating includes a first supply voltage and a second supply voltage, a plurality of inputs, a plurality of selection inputs, a selection circuitry configured to select one of the plurality of inputs, where one of the plurality of inputs is the first supply voltage and one of the selection inputs is a power gating enable input, an output inverter stage including a PMOS transistor and an NMOS transistor, where at least one input to the inverter stage is provided to the gates of the PMOS and NMOS transistors and selection of the power gating enable signal applies the first supply voltage to the gate of the PMOS transistor and places the PMOS transistor in a cutoff mode of operation. | 2016-02-04 |
| 20160036429 | POWER GATING - A circuit and method for power gating is provided. The circuit includes a switch circuit and a modulation oscillator. The switch circuit is connected between a circuit module and a power network having a target level. The switch circuit receives a control signal at its control signal input terminal to gate a connection between the circuit module and the power network under the control of the control signal. The switch circuit is connected to the circuit module at a first node. A modulation oscillator enabling signal input terminal is connected to a gating signal for enabling the modulation oscillator, a modulation oscillator control signal input terminal is connected to the first node, and an modulation oscillator output terminal is connected to the control signal input terminal of the switch circuit. The oscillation signal outputted from the modulation oscillator is modulated by the level of the first node. | 2016-02-04 |
| 20160036430 | INTELLIGENT GATE DRIVE UNIT - An intelligent gate drive unit and related method for controlling one or more semiconductor switches of one or more power modules, the intelligent gate drive unit comprises at least a gate driver and an analog measuring circuit, wherein the gate driver facilitates control of the one or more semiconductor switches and wherein the analog measuring circuit facilitates measuring the switch voltage when the one or more semiconductor switches are in a conducting mode. | 2016-02-04 |
| 20160036431 | Electronic Circuit Including A Switch Having An Associated Breakdown Voltage And A Method Of Using The Same - An electronic device can include a switch coupled to a switching node. In an embodiment, the switch has a breakdown voltage is less than 2.0 times the designed operating voltage. In another embodiment, the electronic device can further include another switch, wherein both switches are coupled to each other at a switching node. The switches can have different breakdown voltages. In a particular embodiment, either or both switches can include a field-effect transistor and a zener diode that are connected in parallel. The zener diode can be designed to breakdown at a relatively lower fraction of the designed operating voltage as compared to a conventional device. Embodiments can be used to reduce voltage overshoot and ringing at the switching node that may occur after changing the states of the first and second switches. Processes of forming the electronic device can be implemented without significant complexity. | 2016-02-04 |
| 20160036432 | WIDE INPUT RANGE, LOW OUTPUT VOLTAGE POWER SUPPLY - This disclosure describes techniques for generating relatively low regulated power supply voltages over a relatively wide range of input voltages. The techniques for generating the regulated voltages may include using at least two different pass transistors to regulate an output voltage of a voltage regulator. Both the turn-on threshold voltage and the maximum drain-to-source voltage rating of the first pass transistor may be greater than the corresponding characteristics of the second pass transistor. Using two different pass transistors with two different turn-on threshold voltages and two different maximum drain-to-source voltage ratings may increase the range of voltages over which a voltage regulator can generate a relatively low output voltage relative to the range of voltages that would be allowable if a single type of pass transistor were used. | 2016-02-04 |
| 20160036433 | DRIVING DEVICE AND SWITCHING CIRCUIT CONTROL METHOD - A driving device includes a switching circuit configured to have switching elements disposed on a high side and a low side, the switching element including a first electrode, a second electrode, and a reverse conducting element disposed between the first electrode and the second electrode; and a determination part configured to determine whether to permit the switching element to turn on, based on a result obtained by detecting a voltage between the first electrode and the second electrode, in a period during which the switching elements on both sides are off. | 2016-02-04 |
| 20160036434 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes a power domain area on a semiconductor substrate, that includes a circuit block for executing a predetermined function, a first power source line that receives an external power source voltage, a second power source line that is connected to the circuit block, a first power switch circuit in a peripheral area of the power domain area, that connects the first power source line and the second power source line in response to a first enable signal, and a second power switch circuit in the power domain area, that connects the first power source line and the second power source line in response to a second enable signal. | 2016-02-04 |
| 20160036435 | A GATE DRIVE CIRCUIT FOR A SEMICONDUCTOR SWITCH - The present application is directed to drive arrangement for semiconductor switches and in particular to a method of driving the gate of a switch with pulses corresponding to turn-on and turn-off commands through separate turn-on and turn-off transformers. The application provides a fail safe reset feature, a more efficient turn-on circuit and an energy recovery circuit for recovering energy from the gate upon turn-off. The application also provides a novel arrangement for assembling multiple pulse transformers on a circuit board. | 2016-02-04 |
| 20160036436 | ACTIVE DIODE DRIVER - An active diode driver for operating a switch of an active rectifier using an active diode is provided. The active diode driver may first control a soft turn-on of the switch and secondly control a hard turn-on of the switch, thereby making it possible for the switch to be softly turned-on. | 2016-02-04 |
| 20160036437 | MULTIFUNCTIONAL SWITCH - In the case of a multifunctional switch ( | 2016-02-04 |
| 20160036438 | NONVOLATILE MEMORY DEVICES WITH ON DIE TERMINATION CIRCUITS AND CONTROL METHODS THEREOF - Non-volatile memory devices including on-die termination circuits connected to an input/output circuit and an on-die termination control logic detecting a preamble of a strobe signal based on a command and a control signal and activating the on-die termination within the preamble period. | 2016-02-04 |
| 20160036439 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - According to one embodiment, a semiconductor integrated circuit device includes a first line to which a voltage is applied; a first circuit operating based on a data; a second circuit capable of retaining the data; a third circuit between the first line and the first circuit and capable of shutting off a supply of the voltage to the first circuit; and a fourth circuit including a resistor element, the resistor element connected between the first line and the second circuit. The fourth circuit supplies the voltage to the second circuit via the resistor element in a period in which the third circuit shut off the supply of the voltage to the first circuit. | 2016-02-04 |
| 20160036440 | CLOCK STATE CONTROL FOR POWER SAVING IN AN INTEGRATED CIRCUIT - Sequential logic elements may consume less static power in response to a first state of a clock signal than in response to a second state of a clock signal (the first and second state may be either low or high depending on the type of sequential logic). This can be exploited to reduce static power consumption of an integrated circuit by controlling the level of a clock signal so that is in the first state for a greater amount of time than the second state. | 2016-02-04 |
| 20160036441 | Output Signal Generation Circuitry for Converting an Input Signal From a Source Voltage Domain Into an Output Signal for a Destination Voltage Domain - Output signal generation circuitry | 2016-02-04 |
| 20160036442 | LEVEL SHIFTING APPARATUS AND METHOD OF USING THE SAME - A level shifting apparatus includes a first capacitor, a first side of the first capacitor configured to receive a first voltage. The level shifting apparatus further includes an edge detector configured to receive the first voltage. The level shifting apparatus further includes an output inverter connected to a second side of the first capacitor, the output inverter configured to output an voltage-level shifted signal of the level shifting apparatus. The level shifting apparatus further includes a latch loop configured to receive feedback the output signal to an input of the output inverter, wherein the edge detector is configured to selectively interrupt feedback of the output signal to the input of the output inverter. | 2016-02-04 |
| 20160036443 | FAST LOW POWER LEVEL SHIFTERS - In one embodiment, a method for increasing speed of a differential input pair, The method comprises applying a first boost current to a first input of the differential input pair during a transition of a first signal applied to the first input; storing the first boost current; ending the application of the first boost current in response to the stored first boost current exceeding a first threshold; applying a second boost current to a second input of the differential input pair during a transition of a second signal applied to the second input; storing the second boost current; and ending the application of the second boost current in response to the stored second boost current exceeding a second threshold. | 2016-02-04 |
| 20160036444 | FAST VOLTAGE DOMAIN CONVERTERS WITH SYMMETRIC AND SUPPLY INSENSITIVE PROPAGATION DELAY - In one embodiment, a circuit comprises a phase interpolator that converts a single-ended input to a pair of symmetric differential signals within a first voltage domain. The circuit further comprises a comparator that converts the symmetric differential signals into single-ended output in a second different voltage domain. In one embodiment, the single ended output of the comparator is configured to be coupled to drive a switching driver in a switching regulator. In one embodiment, the interpolator comprises a first inverter, a second inverter, and a third inverter connected in series. The interpolator further comprises a first resistor and a second resistor connected in series. The second inverter provides a first output signal. Outputs of the first inverter and the third inverter are connected by the series connected resistors. A node between the resistors provides a second output signal. The first and second output signals are inverted and symmetric. | 2016-02-04 |
| 20160036445 | Receiver Circuitry and Method for Converting an Input Signal From a Source Voltage Domain Into an Output Signal for a Destination Voltage Domain - The present invention provides a receiver circuit and method for receiving an input signal from a source voltage domain and converting the input signal into an output signal for a destination voltage domain. The source voltage domain operates from a supply voltage that exceeds a stressing threshold of components within the receiver circuitry, and the receiver circuitry is configured to operate from the supply voltage of the source voltage domain. The receiver circuitry comprises first internal signal generation circuitry configured to convert the input signal into a first internal signal in a first voltage range, and second internal signal generation circuitry configured to convert the input signal into a second internal signal in a second voltage range. Signal evaluation circuitry establishes a logic high voltage threshold and a logic low voltage threshold dependent on the supply voltage, and employs the first and second internal signals in order to detect based on the logic high voltage threshold and logic low voltage threshold when the input signal transitions between a logic low level and a logic high level (in either direction). Output generation circuitry then generates the output signal in dependence on the detection performed by the signal evaluation circuitry. The first voltage range and the second voltage range are such that the first internal signal and second internal signal will not exceed the stressing threshold of components in the signal evaluation circuitry. The receiver circuitry is able to reliably detect transitions in the input signal in situations where the supply voltage of the source voltage domain exceeds the stressing threshold of the receiver's components, but without overstress of the receiver's components. | 2016-02-04 |
| 20160036446 | CROSS POINT SWITCH - A cross point switch, in accordance with one embodiment, includes a plurality of tri-state repeaters coupled to form a plurality of multiplexers. Each set of corresponding tri-state repeaters in the plurality of multiplexers share a front end module such that delay through the cross point switch due to input capacitance is reduced as compared to conventional cross point switches. | 2016-02-04 |
| 20160036447 | RECONFIGURABLE LOGIC DEVICE - [Problem] To be able to provide a reconfigurable logic device having a small area and enhanced reprogramming characteristics. | 2016-02-04 |
| 20160036448 | ELECTRONIC DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME - An electronic device includes a control logic portion suitable for generating a hold control signal based on a count enable signal, and a counting portion suitable for performing a counting operation while a latch operation stops during a counting section and performing the latch operation while the counting operation stops during a holding section based on the hold control signal and a counting clock signal. | 2016-02-04 |
| 20160036449 | SIGNAL GENERATOR AND CONTROLLING METHOD THEREOF - There is provided a signal generator including: a signal data transmitter selectively transmitting sample data obtained by sampling a reference signal at a predetermined frequency or a preset peak value, based on a variation section of the reference signal; and a signal outputter converting the sample data or the peak value transmitted from the signal data transmitter into an analog form and outputting an output signal having a target frequency. | 2016-02-04 |
| 20160036450 | METHOD OF OPTIMIZING DISPATCH OF VARIABLE SPEED ENGINE-GENERATOR SETS - A method of optimizing the dispatch of generators connected to an electrical grid. At least one of the gensets is a variable-speed genset. The optimum dispatch for each load condition is continuously updated by changing the load distribution slightly, testing for performance improvement and updating the distribution set points if improvement is found. Alternatively, the power system may be controlled so that the optimum dispatch for each load condition is determined with the use of an online model that is continuously updated with actual operational data to thereby determine the optimum dispatch. | 2016-02-04 |
| 20160036451 | METHOD FOR PPL AND CDR DESIGNS FOR ACHIEVING SPECIFIC BANDWIDTH AND PHASE MARGIN REQUIREMENTS - A method for designing a PLL or CDR circuit, either of which may contain a loop with a voltage controlled oscillator or other frequency controlled source. For each of a set of values of a gain parameter and a first capacitor of the loop filter of this loop, an analytic solution is employed to find a value for a resistor and a second capacitor of the loop filter. Values of the resistor and second capacitor that meet a design criterion are selected from among the calculated values. | 2016-02-04 |
| 20160036452 | LOOP PARAMETER SENSOR USING REPETITIVE PHASE ERRORS - A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL. | 2016-02-04 |
| 20160036453 | PHASE LOCK LOOP WITH DYNAMIC LOCK RANGES - A phase look loop (PLL) device has a dynamic lock range that is based on a temperature measured during a calibration process. The PLL device includes a calibration circuit configured to receive a temperature reading corresponding to a junction temperature of the PLL device during the calibration process. Based on this temperature reading, the calibration circuit initiates a preset procedure that presets a control voltage of a voltage control oscillator in the PLL device. The preset procedure implements a calibration function defined by a slope with a numerator component and a denominator component. The numerator component corresponds to a range of the control voltage, whereas the denominator component corresponds to a range of ambient temperatures within which the PLL device operates. | 2016-02-04 |
| 20160036454 | ALL-DIGITAL PHASE-LOCKED LOOP (ADPLL) WITH REDUCED SETTLING TIME - Settling time may be reduced or eliminated for a phase-locked loop (ADPLL). An oscillator model provides proper settings that are applied to compensate both the frequency response and the phase response. A hardware device may include a Digital Controlled Oscillator (DCO); and a DCO model device with a processor, wherein the processor is configured to calculate a frequency for the DCO by searching for the frequency based upon operational parameters of the DCO, compare the calculated frequency to a measured frequency, and compensate, based upon the comparison, an ADPLL to decrease a settling time. | 2016-02-04 |
| 20160036455 | SYSTEM AND METHOD FOR CLOCK GENERATION WITH AN OUTPUT FRACTIONAL FREQUENCY DIVIDER - A system and a method generate clock signals using an output divider with modulus steps of half-integers (i.e., the output circuit includes a divider which divides by one or more of 2, 2.5, 3, 3.5, 4 . . . ). | 2016-02-04 |
| 20160036456 | Method and Apparatus for Non-Uniform Analog-to-Digital Conversion - A method and apparatus for converting an analog input into a final digital output. A first digital output is generated in response to receiving an analog input at a first converter. A second digital output is generated in response to receiving the analog input at a second converter. The first digital output is output to form the final digital output when an amplitude of the analog input is within a first portion of an overall range of amplitudes for the analog input and the second digital output is output to form the final digital output when the amplitude is within a second portion of the overall range of amplitudes. | 2016-02-04 |
