| 05th week of 2012 patent applcation highlights part 48 |
| Patent application number | Title | Published |
|---|
| 20120028339 | METHODS OF PRODUCING BIOFUELS FROM AN ALGAL BIOMASS - A method for producing biofuels is provided. A method of making biofuels includes dewatering substantially intact algal cells to make an algal biomass, extracting neutral lipids from the algal biomass, and esterifying the neutral lipids with a catalyst in the presence of an alcohol. The method also includes separating a water soluble fraction comprising glycerin from a water insoluble fraction comprising fuel esters and distilling the fuel esters under vacuum to obtain a C16 or shorter fuel esters fraction, a C16 or longer fuel ester fraction, and a residue comprising carotenoids and omega-3 fatty acids. The method further includes hydrogenating and deoxygenating at least one of (i) the C16 or shorter fuel esters to obtain a jet fuel blend stock and (ii) the C16 or longer fuel esters to obtain a diesel blend stock. | 2012-02-02 |
| 20120028340 | KINETIC RESOLUTION OF (4S) -- 4- PHENYL -- 3- [(5RS)-5-(4-FLUROPHENYL)-5-HYDROXYPENTANOYL] --1,3-OXAZOLIDIN-2-ONE TO THE (5S) ISOMER VIA LIPASECATALYZED ENANTIOSELECTIVE ESTERIFICATION OF THE (5R) ISOMER - A process for synthesis of 4S-phenyl-3-[(5S)-5-(4-fluorophenyl)-5-hydroxypentanoyl]-1,3 oxazolidin 2-one comprising resolution of 4S-phenyl-3-[(5RS)-5-(4-fluorophenyl)-5-hydroxypentanoyl]-1,3 oxazolidin 2-one by selective esterification of 4S-phenyl-3-[(5R)-5-(4-fluorophenyl)-5-hydroxypentanoyl]-1,3 oxazolidin 2-one using appropriate esterification reagent in an organic solvent in presence of Lipase enzyme at a temperature ranging from 0° to 100° C., and further isolation. | 2012-02-02 |
| 20120028341 | PETROLEUM BIOPROCESSING TO PREVENT REFINERY CORROSION - The present invention relates to the bioupgrading of crude oil is directed to a process for decreasing the acidity of an acidic crude oil, comprising contacting an acidic crude oil with a mixture nitrogen containing compounds selected from the group comprising ammonia, ammonia hydroxide, amines and the salts thereof, and in the presence of lipase enzyme, under conditions of suitable temperature and pressure sufficient to form the corresponding amide. The resulting naphthenic acid derived amides can then be processed normally in a refinery using such processes as cracking or hydrotreating and converted to hydrocarbon, ammonia and carbon dioxide without causing damage to the refinery infrastructure. This enzyme process is done at reduced temperatures (40-60° C.) and pressures requiring less energy. | 2012-02-02 |
| 20120028342 | SLIP CHIP DEVICE AND METHODS - A device is described having a first surface having a plurality of first areas and a second surface having a plurality of second areas. The first surface and the second surface are opposed to one another and can move relative to each other from at least a first position where none of the plurality of first areas, having a first substance, are exposed to plurality of second areas, having a second substance, to a second position. When in the second position, the plurality of first and second areas, and therefore the first and second substances, are exposed to one another. The device may further include a series of ducts in communication with a plurality of first second areas to allow for a substance to be disposed in, or upon, the plurality of second areas when in the first position. | 2012-02-02 |
| 20120028343 | SAMPLE PROCESSING APPARATUS - There is provided a sample processing apparatus capable of detecting the push-up type sample container including a recess on the outer side of the bottom portion of the container and performing an appropriate sample processing while alleviating the load of the user with a simple configuration. | 2012-02-02 |
| 20120028344 | IMMUNODIAGNOSTIC TEST CARDS HAVING INDICATING INDICIA - An immunodiagnostic test card includes a plurality of transparent chambers wherein each chamber includes a quantity of testing material that combines with a patient sample, when mixed, to produce an agglutination reaction. A plurality of indicia are disposed to aid in the manufacture and determining the usability of the cards prior to test and also in objectively grading the agglutination reactions that are formed or lack of agglutination. | 2012-02-02 |
| 20120028345 | SOLID STATE FERMENTATION (SSF) SYSTEM - The present invention relates to a solid state fermentation system. The system comprises a fermenter module having plural port means for allowing inlet and outlet of substrate to be fermented and control module being operatively inter-engaged with said fermenter module in a manner so as to provide control of fermentation parameters. | 2012-02-02 |
| 20120028346 | Microalgae Photobioreactor - A bioreactor is provided for circulating a fluid medium. To reduce manufacturing and maintenance expenses, the bioreactor is formed from two sheets of transparent plastic. Structurally, each sheet has first and second edges extending in an axial direction between proximal and distal ends. To form the bioreactor, the sheets are sealed to one another along their respective first edges, distal ends, and second edges. Also, the sheets are sealed to one another along an axially-extending boundary positioned between the first and second edges. As a result, a substantially U-shaped channel is defined between the first and second sheets. Further, two side-by-side openings to the channel are defined by the proximal ends of the sheets. Also, the bioreactor includes a conduit interconnecting the first opening and the second opening. A pump is positioned in the conduit to circulate the fluid medium through the channel. | 2012-02-02 |
| 20120028347 | AGENT FOR SUPPRESSING REPLICATION OF HIV AND USE THEREOF - It is an object of the present invention to provide an agent for suppressing the replication of HIV, which comprises a human CD4-recognizing antibody. The object is solved by an agent for suppressing the replication of human immunodeficiency virus, which comprises, as an active ingredient, an antibody described in (1) below: | 2012-02-02 |
| 20120028348 | MULTIPLE RNA POLYMERASE III PROMOTER EXPRESSION CONSTRUCTS - Expression constructs comprising at least two different RNA polymerase III promoters, wherein each promoter is operably linked to a nucleic acid sequence encoding an RNA effector molecule, are disclosed herein. Further provided are expression constructs comprising multiple polymerase III promoters operably linked to sequences encoding short hairpin RNA molecules, which may comprise single and/or multiple fingers. The provided constructs are useful for in vivo delivery of RNA molecules effective in gene silencing, including of viral genes including HBV and HCV. | 2012-02-02 |
| 20120028349 | Sorting Chamber - A sorting chamber ( | 2012-02-02 |
| 20120028350 | BONE MARROW TARGETING PEPTIDES - A peptide for targeting bone marrow consists of about 5 to about 25 amino acids and includes an amino acid sequence that targets the peptide to bone marrow. | 2012-02-02 |
| 20120028351 | GENERATION AND MAINTENANCE OF STEM CELLS - The present invention provides for the generation and maintenance of pluripotent cells by culturing the cells in the presence of an ALK5 inhibitor. | 2012-02-02 |
| 20120028352 | Microcarriers for Stem Cell Culture - We disclose a particle comprising a matrix coated thereon and having a positive charge, the particle being of a size to allow aggregation of primate or human stem cells attached thereto. The particle may comprise a substantially elongate, cylindrical or rod shaped particle having a longest dimension of between 50 μm and 400 μm, such as about 200 μm. It may have a cross sectional dimension of between 20 μm and 30 μm. The particle may comprise a substantially compact or spherical shaped particle having a size of between about 20 μm and about 120 μm, for example about 65 μm. We also disclose a method of propagating primate or human stem cells, the method comprising: providing first and second primate or human stem cells attached to first and second respective particles, allowing the first primate or human stem cell to contact the second primate or human stem cell to form an aggregate of cells and culturing the aggregate to propagate the primate or human stem cells for at least one passage. A method of propagating human embryonic stem cells (hESCs) in long term suspension culture using microcarriers coated in Matrigel or hyaluronic acid is also disclosed. We also disclose a method for differentiating stem cells. | 2012-02-02 |
| 20120028353 | HEPATIC STELLATE CELL PRECURSORS AND METHODS OF ISOLATING SAME - The present invention relates to precursor cells to hepatic stellate cells, compositions comprising same and methods of isolating same. The surface antigenic profile of the precursors is MHC class Ia negative, ICAM-1 | 2012-02-02 |
| 20120028354 | SYSTEMS AND METHODS FOR MAKING HEPATOCYTES FROM EXTRAHEPATIC SOMATIC STEM CELLS AND USE THEREOF - A method for preparing isolated hepatocytes is disclosed. The method comprises: a) culturing mesenchymal stem cells (MSCs) in a medium comprising hepatic growth factor (HGF) to cause the MSCs to differentiate toward hepatocytes, wherein the MSCs are isolated from bone marrow or umbilical cord blood; b) culturing cells from a) in a medium comprising HGF and oncostatin M (OSM) to facilitate the cell differentiation toward hepatocytes; and c) culturing cells from b) in a medium comprising OSM to cause the differentiated cells to mature into hepatocytes, and thereby producing the isolated hepatocyte cells. | 2012-02-02 |
| 20120028355 | CULTURE MEDIUM FOR EPITHELIAL STEM CELLS AND ORGANOIDS COMPRISING SAID STEM CELLS - The invention relates to a method for culturing epithelial stem cells, isolated tissue fragments comprising the epithelial stem cells, or adenoma cells, and culturing the cells or fragments in the presence of a Bone Morphogenetic Protein (BMP) inhibitor, a mitogenic growth factor, and a Wnt agonist when culturing epithelial stem cells and isolated tissue fragments. The invention further relates to a cell culture medium comprising a BMP inhibitor, a mitogenic growth factor, and a Wnt agonist, to the use of the culture medium, and to crypt-villus organoids, gastric organoids and pancreatic organoids that are formed in the culture medium. | 2012-02-02 |
| 20120028356 | TRANSFECTION WITH MICRO EXPLOSION ENACTED BY COATED DRY ICE PARTICLES - Disclosed is a transfection method, which includes the steps of: (a) adhering the gene fragments to dry ice particles; (b) adding the dry ice particles into the medium/liquid that contains target cells; and (c) transporting the gene fragments into the target cells via the micro explosion/sublimation of the dry ice particles. In addition, the gene fragments can also adhere first to nanoparticles, which can then adhere to dry ice particles. Subsequently, gene fragments enter cells by micro explosion/sublimation. The present invention can be applied in transgenic research on prokaryotic, eukaryotic, plant and animal cells and in the development of new species in agriculture. | 2012-02-02 |
| 20120028357 | AAV VECTORS PRODUCED IN INSECT CELLS - The present invention relates to the production of adeno-associated viral vectors in insect cells. The insect cells therefore comprise a first nucleotide sequence encoding the adeno-associated virus (AAV) capsid proteins, whereby the initiation codon for translation of the AAV VP1 capsid protein is a non-ATG, suboptimal initiation codon. The insect cell further comprises a second nucleotide sequence comprising at least one AAV inverted terminal repeat (ITR) nucleotide sequence; a third nucleotide sequence comprising a Rep52 or a Rep40 coding sequence operably linked to expression control sequences for expression in an insect cell; and, a fourth nucleotide sequence comprising a Rep78 or a Rep68 coding sequence operably linked to expression control sequences for expression in an insect cell. The invention further relates to adeno-associated viral vectors with an altered ratio of the viral capsid proteins that provides improved infectivity of the viral particles. | 2012-02-02 |
| 20120028358 | METHOD FOR INCREASING RETROVIRAL INFECTIVITY - The present invention is directed to methods for enhanced retroviral delivery of a nucleic acid to a target cell in vitro, ex vivo or in vivo, which involves increasing infectivity of a retrovirus carrying a transgene of interest to a target cell. In one particular aspect the invention relates to a method for increasing retroviral infectivity of target cells comprising culturing packaging cells transfected with retroviral vector containing a transgene of interest in medium containing a glucocorticoid receptor agonist or analog or derivative thereof present in the medium in an amount effective to increase titer of propagated retrovirus; and subsequently culturing a target cell in medium comprising the propagated retrovirus from a) and a glucocorticoid receptor antagonist or analog or derivative thereof present in the medium in an amount effective to increase target cell sensitivity to infection by the propagated retrovirus. | 2012-02-02 |
| 20120028359 | PRODUCTION PROCESS OF GENDER-SPECIFIC SERUM AND BIOMARKER USING THE SERUM - The present invention relates to a production process of a gender-specific serum and a biomarker using the serum. More specifically, the present invention uses a fatty acid that exhibits a specific expression pattern in a gender-specific serum as a biomarker not only for diagnosis of obesity or a disease related to obesity, but also for diagnosis of meat quality since the fatty acid promotes differentiation of muscle derived stem cells into adipose cells. In addition, the present invention can establish a research system studying the effects of steroid hormones on the cell culture by using sera separated from blood that is collected from individual mammal carcasses being disposed, and provide important clues for discovering a gene associated with the synthesis of steroid hormone and for developing treatments for human diseases. Further, the present invention may contribute to increased profits derived from producing high quality sera, a reduced cost with treatment for carcass wastes, and promotion of the eco-industry for reducing environmental hormones. | 2012-02-02 |
| 20120028360 | Apparatus and Method for Combustion Analysing a Sample - Apparatus and method for combustion analysing a sample comprising determining incomplete combustion in a combustion analyser having a combustion chamber. A sample is supplied to the combustion chamber and combusted to produce combustion products. A target gas characteristic of incomplete combustion of the sample is detected in the combustion products by a target gas sensor. The target gas may be carbon monoxide, methane, methanal and/or methanol, among others. Whether incomplete combustion of the sample has occurred may be determined. A signal indicative of incomplete combustion is output from the target gas sensor and the combustion products can be directed to waste using a valve disposed upstream of the target gas sensor. | 2012-02-02 |
| 20120028361 | Method for determining number of drops - A method for determining the number of drops metered with a drop frequency into a reactor, especially in a high temperature decomposition system for analyzers, wherein a gas stream is flowing through the reactor. There exists in the reactor a temperature, which is greater than the boiling temperature of the liquid, and a drop metered into the reactor transforms at least partially into the gas phase following entry into the reactor, especially due to heat transfer from contact with a surface within the reactor, especially directly after contact with the surface within the reactor. With a sampling rate, which is greater than the drop frequency, a sequence of pressure signals dependent on pressure within the reactor is registered, and, from the sequence of pressure signals or from values derived therefrom, the number of drops metered into the reactor is ascertained. | 2012-02-02 |
| 20120028362 | 2-QUINOXALINOL SALEN COMPOUNDS AND USES THEREOF - Disclosed are 2-quinoxalinol salen compounds and in particular 2-quinoxalinol salen Schiff-base ligands. The disclosed 2-quinoxalinol salen compounds may be utilized as ligands for forming complexes with cations, and further, the formed complexes may be utilized as catalysts for oxidation reactions. The disclosed 2-quinoxalinol salen compounds also may be conjugated to solid supports and utilized in methods for selective solid-phase extraction or detection of cations. | 2012-02-02 |
| 20120028363 | METAL POROUS MATERIAL, METHOD FOR PREPARING THE SAME AND METHOD FOR DETECTING NITROGEN-CONTAINING COMPOUNDS - The invention provides a metal porous material, a method for preparing the same, and a method for detecting nitrogen-containing compounds. The method for fabricating metal porous material includes: mixing a siloxane, a metal or metallic compound, and water, to obtain a mixture after stirring; modifying the mixture to a pH value of less than 7; subjecting the mixture to a first dry treatment to obtain a solid; after polishing the solid to obtain a powder, subjecting the powder to a second dry treatment. It should be noted that the method is free of any annealing or calcination process. | 2012-02-02 |
| 20120028364 | Stop-Flow Analytical Systems and Methods - Analytical systems and methods are provided for simultaneously dispensing metered volumes of fluids at different rates and mixing the fluids to generate a mixed sample having the fluids in proportion to the different rates at which they were dispensed. In some cases two or more of the fluids are premixed prior to mixing with other fluids. In some cases a use composition and diluent are simultaneously dispensed at different rates and premixed to form a diluted sample. One or more reagents may be mixed with the diluted sample and the sample mixture can be analyzed to determine characteristics of the use composition. | 2012-02-02 |
| 20120028365 | PORTABLE BIOCHEMICAL TESTING APPARATUS AND OPERATING METHOD THEREOF - A portable biochemical testing apparatus and operating method thereof are disclosed. The portable biochemical testing apparatus includes a light source module, a sample module, a photoconductive material layer, a touch module, and a control module. At least one sample is disposed in the sample module. The photoconductive material layer is disposed between the sample module and the light source module. The touch module generates a driving signal according to a touch action of the user to drive the light source module to emit a light. When the light is emitted to the photoconductive material layer, the photoconductive material layer will generate a photoelectric driving effect. The at least one sample is affected by the photoelectric driving effect and generates a change corresponding to the touch action. | 2012-02-02 |
| 20120028366 | FLOW CYTOMETER AND FLUIDIC LINE ASSEMBLY WITH MULTIPLE INJECTION NEEDLES - A flow cytometer is provided which includes an interrogation flow cell and a plurality of assay fluidic lines extending into the interrogation flow cell. A method of operating such a flow cytometer includes priming the interrogation flow cell with a sheath fluid and injecting different assay fluids into a flow of the sheath fluid through the plurality of fluidic lines. A fluidic line assembly is provided which includes a plurality of capillary tubes coupled to a base section configured for coupling to an interrogation flow cell assembly of a flow cytometer. The capillary tubes are dimensionally configured such that when the fluidic line assembly is arranged within the flow cytometer and fluid is dispensed from one or more of the capillary tubes at a given pressure differential with respect to an encompassing sheath fluid within the interrogation flow cell the fluid is substantially centrally aligned within the interrogation flow cell. | 2012-02-02 |
| 20120028367 | REMOVING POLYPEPTIDES FROM STOOL - This document provides methods and materials involved in removing polypeptides (e.g., high abundance polypeptides) from stool samples. For example, methods and materials for preparing a stool sample for detecting polypeptides of low abundance are provided. | 2012-02-02 |
| 20120028368 | SAMPLE PRETREATMENT AND EXTRACTION - A method for pretreating and extracting a liquid sample by sorbing an aqueous liquid sample, including an organic analyte and an acid or a base, in a solid sorbent material, and at least partially neutralizing the acid or base by reaction with neutralizing ions retained on a support surface, and contacting the liquid sample-sorbed sorbent material at elevated temperature and pressure with an organic solvent to extract the analyte into said solvent, preferably in a vessel having an extraction chamber with a zirconium metal interior surface. | 2012-02-02 |
| 20120028369 | QUANTIFYING LOCAL INFLAMMATORY ACTIVITY AND ITS USE TO PREDICT DISEASE PROGRESSION AND TAILOR TREATMENTS - This invention relates to a method of predicting progression of an inflammatory condition in a subject, which involves providing a medium comprising hyaluronan or a fragment thereof; contacting the medium with a fluid sample from a subject with an inflammatory condition, where the fluid sample comprises proteins or proteoglycans and a transfer agent; incubating the fluid sample with the medium under conditions effective for the transfer agent in the fluid sample to mediate transfer of heavy chains from the proteins or proteoglycans to the hyaluronan or a fragment thereof to form a complex; detecting, using an antibody, occurrence levels of the complex; and comparing occurrence levels of the complex from said detecting to a reference standard to predict progression of an inflammatory condition in the subject. Also disclosed are methods of tailoring treatment of an inflammatory condition and quantifying local inflammatory activity in a body fluid. | 2012-02-02 |
| 20120028370 | REAGENT FOR ASSAYING D-DIMER AND KIT OF REAGENT FOR ASSAYING D-DIMER - The present invention provides a reagent for assaying D-dimer which includes carriers sensitized to first and second monoclonal antibodies which react with D-dimer, but have different reactivity to D-dimer in which the first monoclonal antibody reacts with high- and low-molecular fractions of D-dimer, the second monoclonal antibody reacts with the high-molecular fraction, but reactivity of the second monoclonal antibody with the low-molecular fraction is different from that of the first monoclonal antibody and a kit of reagent for assaying D-dimer. | 2012-02-02 |
| 20120028371 | METHOD AND KIT FOR DETECTING THE EARLY ONSET OF RENAL TUBULAR CELL INJURY - A method and kit for detecting the early onset of renal tubular cell injury, utilizing NGAL as an early urinary biomarker. NGAL is a small secreted polypeptide that is protease resistant and consequently readily detected in the urine following renal tubule cell injury. NGAL protein expression is detected predominantly in proximal tubule cells, in a punctate cytoplasmic distribution reminiscent of a secreted protein. The appearance of NGAL in the urine is related to the dose and duration of renal ischemia and nephrotoxemia, and is diagnostic of renal tubule cell injury and renal failure. NGAL detection is also a useful marker for monitoring the nephrotoxic side effects of drugs or other therapeutic agents. | 2012-02-02 |
| 20120028372 | RAPID DETECTION AND IDENTIFICATION OF ENERGETIC MATERIALS WITH SURFACE ENHANCED RAMAN SPECTROMETRY (SERS) - In one embodiment, a system includes a plurality of metal nanoparticles functionalized with a plurality of organic molecules tethered thereto, wherein the plurality of organic molecules preferentially interact with one or more analytes when placed in proximity therewith. According to another embodiment, a method for detecting analytes includes contacting a fluid having one or more analytes of interest therein with a plurality of metal nanoparticles, each metal nanoparticle having a plurality of organic molecules tethered thereto, and detecting Raman scattering from an analyte of interest from the fluid, the analyte interacting with one or more of the plurality of organic molecules. In another embodiment, a method includes chemically modifying a plurality of cyclodextrin molecules at a primary hydroxyl moiety to create a chemical handle, and tethering the plurality of cyclodextrin molecules to a metal nanoparticle using the chemical handle. Other systems and methods for detecting analytes are also described. | 2012-02-02 |
| 20120028373 | Bi-layer hard mask for the patterning and etching of nanometer size MRAM devices - A composite hard mask is disclosed that prevents build up of metal etch residue in a MRAM device during etch processes that define an MTJ shape. As a result, MTJ shape integrity is substantially improved. The hard mask has a lower non-magnetic spacer, a middle conductive layer, and an upper sacrificial dielectric layer. The non-magnetic spacer serves as an etch stop during a pattern transfer with fluorocarbon plasma through the conductive layer. A photoresist pattern is transferred through the dielectric layer with a first fluorocarbon etch. Then the photoresist is removed and a second fluorocarbon etch transfers the pattern through the conductive layer. The dielectric layer protects the top surface of the conductive layer during the second fluorocarbon etch and during a substantial portion of a third RIE step with a gas comprised of C, H, and O that transfers the pattern through the underlying MTJ layers. | 2012-02-02 |
| 20120028374 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - A ferroelectric capacitor provided with a ferroelectric film ( | 2012-02-02 |
| 20120028375 | INSPECTION METHOD OF LIGHT-EMITTING DEVICE AND PROCESSING METHOD AFTER INSPECTION OF LIGHT-EMITTING DEVICE - The present invention relates to a method for inspecting a light-emitting device, the method including performing a light emission test of (A) a light-emitting device including a lead frame having mounted and packaged thereon a plurality of light-emitting elements or (B) a light-emitting device obtained by resin encapsulating and packaging the light-emitting device (A), by applying a current to the plurality of light-emitting elements and judging each light-emitting element as passed or failed, in which arrangement of the plurality of light-emitting elements in the light-emitting device is set as in the following (α): (α) In a lead frame having a lattice form including a plurality of rows and a plurality of columns with a plurality of intersection points formed thereby, a plurality of light-emitting elements are disposed between the adjacent intersection points in each row, the adjacent light-emitting elements in each row are connected to each other so that positive electrode terminals or negative electrode terminals thereof face each other, and a positive-side power supply channel or a negative-side power-supply channel in the lead frame works as a common channel between a certain column and a column adjacent thereto. | 2012-02-02 |
| 20120028376 | Method of Controlling Critical Dimensions of Trenches in a Metallization System of a Semiconductor Device During Etch of an Etch Stop Layer - When forming metal lines and vias in complex metallization systems of semiconductor devices, an additional control mechanism for adjusting the final critical dimension may be implemented in the last etch process for etching through the etch stop layer after having patterned the low-k dielectric material. To this end, the concentration of a polymerizing gas may be controlled in accordance with the initial critical dimension obtained after the lithography process, thereby efficiently re-adjusting the final critical dimension so as to be close to the desired target value. | 2012-02-02 |
| 20120028377 | USING OPTICAL METROLOGY FOR WITHIN WAFER FEED FORWARD PROCESS CONTROL - A method of controlling the polishing of a substrate includes polishing a substrate on a first platen using a first set of parameters, obtaining first and second sequences of measured spectra from first and second regions of the substrate with an in-situ optical monitoring system, generating first and second sequences of values from the first and second sequences of measured spectra, fitting first and second linear functions to the first and second sequences of values, determining a difference between the first linear function and the second linear function, adjusting at least one parameter of a second set of parameters based on the difference, and polishing the substrate on a second platen using the adjusted parameter. | 2012-02-02 |
| 20120028378 | METHOD FOR FORMING PATTERN AND A SEMICONDUCTOR DEVICE - According to one embodiment, a pattern forming method comprises transferring a pattern formed in a surface of a template to a plurality of chip areas in a semiconductor substrate under different transfer conditions. Furthermore, the transferring the pattern formed in the surface of the template to the plurality of chip areas in the semiconductor substrate under the different transfer conditions comprises transferring the pattern formed in the surface of the template to the semiconductor substrate at least twice under each identical transfer condition. Moreover, the pattern forming method comprises dividing each of the plurality of chip areas into a plurality of areas, determining an optimum condition for each set of corresponding divided areas in the plurality of chip areas, and transferring the pattern onto the semiconductor substrate using the optimum transfer condition determined for each divided area. | 2012-02-02 |
| 20120028379 | METHODS AND APPARATUSES FOR CONTROLLING GAS FLOW CONDUCTANCE IN A CAPACITIVELY-COUPLED PLASMA PROCESSING CHAMBER - Apparatuses are provided for controlling flow conductance of plasma formed in a plasma processing apparatus that includes an upper electrode opposite a lower electrode to form a gap therebetween. The lower electrode is adapted to support a substrate and coupled to a RF power supply. Process gas injected into the gap is excited into the plasma state during operation. The apparatus includes a ground ring that concentrically surrounds the lower electrode and has a set of slots formed therein, and a mechanism for controlling gas flow through the slots. | 2012-02-02 |
| 20120028380 | DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE AND METHOD FOR PRODUCING THE FILM, AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE - The present invention relates to a dicing tape-integrated film for semiconductor back surface, which includes: a dicing tape including a base material having an asperities-formed surface, and a pressure-sensitive adhesive layer laminated on the base material, and a film for semiconductor back surface laminated on the pressure-sensitive adhesive layer of the dicing tape, in which the dicing tape has a haze of at most 45%. | 2012-02-02 |
| 20120028381 | SOLAR BATTERY PANEL INSPECTION APPARATUS, METHOD OF INSPECTING SOLAR BATTERY PANEL, AND METHOD OF MANUFACTURING SOLAR BATTERY PANEL - A solar battery panel inspection apparatus is an apparatus for inspecting a solar battery panel including a transparent insulating substrate having a main surface, and a transparent electrode layer, a semiconductor photoelectric conversion layer and a back electrode layer which are sequentially stacked and having an outer circumferential insulating region in which the main surface is exposed, to check the insulation performance of the outer circumferential insulating region. The solar battery panel inspection apparatus includes the first terminal to be brought into contact with the back electrode layer; the second terminal to be brought into contact with a region of or in proximity to an outer circumferential edge of the outer circumferential insulating region; one or more third terminals to be brought into contact with the outer circumferential insulating region between the first terminal and the second terminal; a voltage application unit for applying a voltage each between two terminals selected from these terminals; and a current detection unit detecting a current flowing between the two terminals to which a voltage is applied. | 2012-02-02 |
| 20120028382 | SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR CHIP, AND METHOD FOR THE PRODUCTION THEREOF - A semiconductor device having a semiconductor chip having an active surface with flip-chip contacts and a passive surface is disclosed. In one embodiment, the flip-chip contacts are surrounded by an electrically insulating layer as underfill material, the layer having a UV B-stageable material. The UV B-stageable material is applied on the active surface of the semiconductor wafer. | 2012-02-02 |
| 20120028383 | PROCESSING METHOD OF SILICON SUBSTRATE AND LIQUID EJECTION HEAD MANUFACTURING METHOD - A processing method of a silicon substrate including forming a second opening in a bottom portion of a first opening using a patterning mask having a pattern opening by plasma reactive ion etching. The reactive ion etching is performed with a shield structure formed in or on the silicon substrate, the shield structure preventing inside of the first opening from being exposed to the plasma. | 2012-02-02 |
| 20120028384 | METHOD FOR MANUFACTURING A LIQUID-EJECTION HEAD - A method for manufacturing a liquid-ejection head having a plurality of nozzles arranged to eject liquid includes: preparing a substrate having a first layer, a second layer, and a third layer stacked in this order, the second layer more resistant than the third layer to etching by an etching method to be used on the third layer; partially etching the third layer by the etching method to expose the second layer; and removing the exposed second layer at least in part to expose some area on the top surface of the first layer, opening a first one of the nozzles down from the exposed area of the top surface, and opening a second one of the nozzles down from the top surface of the third layer. | 2012-02-02 |
| 20120028385 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR SUBSTRATE OF LIQUID CRYSTAL DISPLAY PANEL - A manufacturing method of thin film transistor substrate of a liquid crystal display panel includes following steps. A substrate is provided. Then, a transparent conducting layer and an opaque conducting layer are formed on the substrate. Thereafter, the transparent conducting layer and the opaque conducting layer are patterned by a gray-tone mask to form at least one storage capacitor electrode. Next, a first insulating layer is formed on the storage capacitor electrode. Then, at least one gate electrode is formed on the substrate. Subsequently, at least one gate insulating layer, a patterned semiconductor layer, a source electrode, a drain electrode, and a second insulating layer are formed sequentially on the gate electrode. Moreover, at least one pixel electrode is formed on the first insulating layer and the second insulating layer. A part of the pixel electrode overlaps a part of the storage capacitor electrode to form a storage capacitor. | 2012-02-02 |
| 20120028386 | Method of manufacturing organic light emitting display - A method of manufacturing an organic light-emitting display device, the method including forming a thin film transistor (TFT); forming a planarization layer on the TFT; forming an opening in the planarization layer; and forming an organic light emitting diode that is electrically connected to the TFT through the opening, wherein forming the opening in the planarization layer includes forming a photosensitive layer on the planarization layer, and irradiating light on the photosensitive layer such that the light has a focus point offset from a surface of the planarization layer to control a gradient of the opening. | 2012-02-02 |
| 20120028387 | DUAL PANEL TYPE ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD FABRICATING THE SAME - An organic electroluminescent device includes: a switching element and a driving element connected to each other on a substrate including a pixel region; a planarization layer on the switching element and the driving element, the planarization layer having a substantially flat top surface; a cathode on the planarization layer, the cathode connected to the driving element; an emitting layer on the cathode; and an anode on the emitting layer. | 2012-02-02 |
| 20120028388 | METHOD FOR PRODUCING LIGHT-EMITTING DIODE DEVICE - A method for producing a light-emitting diode device includes a step of preparing a sealing layer by sealing in a light-emitting diode with a sealing material; a step of preparing a fluorescent layer by allowing a phosphor-containing resin composition containing phosphor and silicone resin to reach its B-stage; and a step of bonding the fluorescent layer to the surface of the sealing layer. | 2012-02-02 |
| 20120028389 | METHOD FOR MANUFACTURING DISPLAY DEVICE - A method of manufacturing a display device is disclosed. In one embodiment, the method includes: i) forming a semiconductor layer where a plurality of crystallized areas and a plurality of noncrystallized areas are alternately arranged on a substrate, ii) aligning the substrate based on a difference in contrast ratio between the crystallized and noncrystallized areas and iii) performing a photo process or a photolithography process. | 2012-02-02 |
| 20120028390 | THIN FILM DEPOSITION APPARATUS AND METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DISPLAY DEVICE WITH THE SAME - A thin film deposition apparatus that may prevent a patterning slit sheet from sagging and increase a tensile force of the patterning slit sheet, and a method of manufacturing an organic light-emitting display device using the same. | 2012-02-02 |
| 20120028391 | METHOD OF FABRICATING DISPLAY DEVICE - To improve the use efficiency of materials and provide a technique of fabricating a display device by a simple process. The method includes the steps of providing a mask on a conductive layer, forming an insulating film over the conductive layer provided with the mask, removing the mask to form an insulating layer having an opening; and forming a conductive film in the opening so as to be in contact with the exposed conductive layer, whereby the conductive layer and the conductive film can be electrically connected through the insulating layer. The shape of the opening reflects the shape of the mask. A mask having a columnar shape (e.g., a prism, a cylinder, or a triangular prism), a needle shape, or the like can be used. | 2012-02-02 |
| 20120028392 | ELECTROPHORETIC DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating an electrophoretic display device includes forming a gate line along a direction, a gate electrode extending from the gate line, a common line parallel to the gate line, and a first storage electrode extending from the common line on a substrate, forming a gate insulating layer on an entire surface of the substrate including the gate line, the gate electrode, the common line and the first storage electrode, forming a semiconductor layer, a data line, and source and drain electrodes through a mask process, wherein the semiconductor layer is disposed over the gate electrode, the data line crosses the gate line to define a pixel region, the source electrode extends from the data line, and the drain electrode is spaced apart from the source electrode over the semiconductor layer. | 2012-02-02 |
| 20120028393 | VAPOR DEPOSITION APPARATUS AND PROCESS FOR CONTINUOUS DEPOSITION OF A DOPED THIN FILM LAYER ON A SUBSTRATE - An apparatus and related process are provided for vapor deposition of a sublimated source material as a doped thin film on a photovoltaic (PV) module substrate. A receptacle is disposed within a vacuum head chamber and is configured for receipt of a source material supplied from a first feed tube. A second feed tube can provide a dopant material into the deposition head. A heated distribution manifold is disposed below the receptacle and includes a plurality of passages defined therethrough. The receptacle is indirectly heated by the distribution manifold to a degree sufficient to sublimate source material within the receptacle. A distribution plate is disposed below the distribution manifold and at a defined distance above a horizontal plane of a substrate conveyed through the apparatus to further distribute the sublimated source material passing through the distribution manifold onto the upper surface of the underlying substrate. | 2012-02-02 |
| 20120028394 | IMAGE SENSOR AND METHOD FOR FABRICATING SAME - An image sensor includes an epi-layer of a first conductivity type formed in a substrate, a photodiode formed in the epi-layer, and a first doping region of a second conductivity type formed under the photodiode to separate the first doping region from the photodiode. | 2012-02-02 |
| 20120028395 | VAPOR DEPOSITION PROCESS FOR CONTINUOUS DEPOSITION AND TREATMENT OF A THIN FILM LAYER ON A SUBSTRATE - An integrated apparatus is provided for vapor deposition of a sublimated source material as a thin film on a photovoltaic module substrate and subsequent vapor treatment. The apparatus can include a load vacuum chamber, a first vapor deposition chamber; and a second vapor deposition chamber that are integrally connected such that substrates being transported through the apparatus are kept at a system pressure less than about 760 Torr. A conveyor system can be operably disposed within the apparatus and configured for transporting substrates in a serial arrangement into and through load vacuum chamber, into and through the first vapor deposition chamber, and into and through the second vapor deposition chamber at a controlled speed. Processes are also provided for manufacturing a thin film cadmium telluride thin film photovoltaic device. | 2012-02-02 |
| 20120028396 | Method of manufacturing a silicon-based semiconductor device by essentially electrical means - Proposed is the method for forming selective emitters, field-induced emitters, back-surface field regions, and contacts to the functional regions of a solar cell by essentially electrical means and without conventional thermal diffusion and masking processes. The process includes forming conductive layers on both sides of an intermediate solar-cell structure, performing electrical and thermal treatment by passing electrical current independently through the front-side conductive layer and the back-side conductive layer, thus forming the selective emitters, the selective BSF regions, selective emitter contact regions, and contacts to the selective BSF regions. The obtained structure is then subjected to pulse electrical treatment by applying a voltage pulse or pulses between the front and back conductive layers to form the field-induced emitter and the field-induced BSF region. After the conductive layers are removed, a final solar cell is obtained. The proposed method can significantly simplify manufacturing, reduce cost, and increase throughput in the field of semiconductor fabrication. | 2012-02-02 |
| 20120028397 | ULTRA-THIN QUAD FLAT NO-LEAD (QFN) PACKAGE - An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package having a leadframe with lead terminals formed by recesses from both the top and bottom surfaces and substantially aligned contact areas formed on either the top or bottom surfaces. A die is electrically connected to the plurality of lead terminals and a molding compound encapsulates the leadframe and die together so as to form the ultra-thin QFN package. Accordingly, the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package. The present disclosure also provides an ultra-thin Optical Quad Flat No-Lead (OQFN) semiconductor chip package, a stacked semiconductor module comprising at least two QFN semiconductor chip packages, and a method for manufacturing an ultra-thin Quad Flat No-Lead (QFN) semiconductor packages. | 2012-02-02 |
| 20120028398 | SYSTEMS AND METHODS FOR CHARGING SOLAR CELL LAYERS - Systems and methods of the present invention can be used to charge a charge-holding layer (such as a passivation layer and/or antireflective layer) of a solar cell with a positive or negative charge as desired. The charge-holding layer(s) of such a cell can include any suitable dielectric material capable of holding either a negative or a positive charge, and can be charged at any suitable point during manufacture of the cell, including during or after deposition of the passivation layer(s). A method according to one aspect of the invention includes disposing a solar cell in electrical communication with an electrode inside a chamber. The solar cell includes an emitter, a base, a first passivation layer adjacent the emitter, and a second passivation layer adjacent the base. Gas is injected into the chamber and a plasma (with photons having an energy level of at least about 3.1 eV) is generated using the gas. One or more of the first passivation layer and the second passivation layer is charged to a predetermined polarity, wherein the charging includes applying a direct current voltage pulse to the electrode for a predetermined period of time. | 2012-02-02 |
| 20120028399 | LASER PROCESSING FOR HIGH-EFFICIENCY THIN CRYSTALLINE SILICON SOLAR CELL FABRICATION - Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films. | 2012-02-02 |
| 20120028400 | CCD SENSORS WITH MULTIPLE CONTACT PATTERNS - A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations. | 2012-02-02 |
| 20120028401 | Methods for Manufacturing Arrays for CMOS Imagers - Methods of fabricating complementary metal-oxide-semiconductor (CMOS) imagers for backside illumination are disclosed. In one embodiment, the method may include forming at a front side of a substrate a plurality of high aspect ratio trenches having a predetermined trench depth, and forming at the front side of the substrate a plurality of photodiodes, where each photodiode is adjacent at least one trench. The method may further include forming an oxide layer on inner walls of each trench, removing the oxide layer, filling each trench with a highly doped material, and thinning the substrate from a back side opposite the front side to a predetermined final substrate thickness. In some embodiments, the substrate may have a predetermined doping profile, such as a graded doping profile, that provides a built-in electric field suitable to guide the flow of photogenerated minority carriers towards the front side. | 2012-02-02 |
| 20120028402 | CCD SENSORS WITH MULTIPLE CONTACT PATTERNS - A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations. | 2012-02-02 |
| 20120028403 | CCD SENSORS WITH MULTIPLE CONTACT PATTERNS - A pixel array in an image sensor includes multiple pixels. The pixel array includes vertical shift registers for shifting charge out of the pixel array. The vertical shift registers can be interspersed between the pixels, such as in an interline image sensor, or the photosensitive areas in the pixels can operate as vertical shift registers. The pixels are divided into blocks of pixels. One or more electrodes are disposed over each pixel. Conductive strips are disposed over the electrodes. Contacts are used to connect selected electrodes to respective conductive strips. The contacts in at least one block of pixels are positioned according to one contact pattern while the contacts in one or more other blocks are positioned according to a different contact pattern. The different contact patterns reduce or eliminate visible patterns in the contact locations. | 2012-02-02 |
| 20120028404 | METHODS OF TEMPORALLY VARYING THE LASER INTENSITY DURING SCRIBING A PHOTOVOLTAIC DEVICE - Methods for laser scribing a film stack including a plurality of thin film layers on a substrate are provided. A pulse of a laser beam is applied to the film stack, where the laser beam has a power that varies as a function of time during the pulse according to a predetermined power cycle. For example, the pulse can have a pulse lasting about 0.1 nanoseconds to about 500 nanoseconds. This pulse of the laser beam can be repeated across the film stack to form a scribe line through at least one of the thin film layers on the substrate. Such methods are particularly useful in laser scribing a cadmium telluride thin-film based photovoltaic device. | 2012-02-02 |
| 20120028405 | METHOD AND MATERIAL FOR PROCESSING IRON DISILICIDE FOR PHOTOVOLTAIC APPLICATION - A method for providing a semiconductor material for photovoltaic devices, the method includes providing a sample of iron disilicide comprising approximately 90 percent or greater of a beta phase entity. The sample of iron disilicide is characterized by a substantially uniform first particle size ranging from about 1 micron to about 10 microns. The method includes combining the sample of iron disilicide and a binding material to form a mixture of material. The method includes providing a substrate member including a surface region and deposits the mixture of material overlying the surface region of the substrate. In a specific embodiment, the mixture of material is subjected to a post-deposition process such as a curing process to form a thickness of material comprising the sample of iron disilicide overlying the substrate member. In a specific embodiment, the thickness of material is characterized by a thickness of about the first particle size. | 2012-02-02 |
| 20120028406 | HYBRID PHOTOVOLTAIC CELLS AND RELATED METHODS - Embodiments of the present invention involve photovoltaic (PV) cells comprising a semiconducting nanorod-nanocrystal-polymer hybrid layer, as well as methods for fabricating the same. In PV cells according to this invention, the nanocrystals may serve both as the light-absorbing material and as the heterojunctions at which excited electron-hole pairs split. | 2012-02-02 |
| 20120028407 | MULTI-LAYER N-TYPE STACK FOR CADMIUM TELLURIDE BASED THIN FILM PHOTOVOLTAIC DEVICES AND METHODS OF MAKING - Thin film photovoltaic devices are provided that generally include a transparent conductive oxide layer on the glass, a multi-layer n-type stack on the transparent conductive oxide layer, and a cadmium telluride layer on the multi-layer n-type stack. The multi-layer n-type stack generally includes a first layer and a second layer, where the first layer comprises cadmium and sulfur and the second layer comprises cadmium and oxygen. The multi-layer n-type stack can, in certain embodiments, include additional layers (e.g., a third layer, a fourth layer, etc.). Methods are also generally provided for manufacturing such thin film photovoltaic devices. | 2012-02-02 |
| 20120028408 | DISTRIBUTOR HEATER - A vapor distributor assembly may include a carbon fiber heating element. | 2012-02-02 |
| 20120028409 | METHODS OF FORMING AN ANISOTROPIC CONDUCTIVE LAYER AS A BACK CONTACT IN THIN FILM PHOTOVOLTAIC DEVICES - Thin film photovoltaic devices are generally provided. The device can include a transparent conductive oxide layer on a glass substrate, an n-type thin film layer on the transparent conductive layer, and a p-type thin film layer on the n-type layer. The n-type thin film layer and the p-type thin film layer form a p-n junction. An anisotropic conductive layer is applied on the p-type thin film layer, and includes a polymeric binder and a plurality of conductive particles. A metal contact layer can then be positioned on the anisotropic conductive layer. | 2012-02-02 |
| 20120028410 | METHODS OF FORMING GERMANIUM-ANTIMONY-TELLURIUM MATERIALS AND A METHOD OF FORMING A SEMICONDUCTOR DEVICE STRUCTURE INCLUDING THE SAME - A method of forming a material. The method comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material. | 2012-02-02 |
| 20120028411 | Embedded Wafer-Level Bonding Approaches - A method includes providing a carrier with an adhesive layer disposed thereon; and providing a die including a first surface, a second surface opposite the first surface. The die further includes a plurality of bond pads adjacent the second surface; and a dielectric layer over the plurality of bond pads. The method further includes placing the die on the adhesive layer with the first surface facing toward the adhesive layer and dielectric layer facing away from the adhesive layer; forming a molding compound to cover the die, wherein the molding compound surrounds the die; removing a portion of the molding compound directly over the die to expose the dielectric layer; and forming a redistribution line above the molding compound and electrically coupled to one of the plurality of bond pads through the dielectric layer. | 2012-02-02 |
| 20120028412 | SEMICONDUCTOR APPARATUS, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE - A semiconductor apparatus having a through electrode, a semiconductor package, and a method of manufacturing the semiconductor package are provided. The method of includes preparing a substrate including a buried via, the buried via having a first surface at a first end, and the buried via extending from a first substrate surface of the substrate into the substrate; planarizing a second substrate surface of the substrate opposite the first substrate surface to form a through via by exposing a second via surface at a second end of the buried via opposite the first end; forming a conductive capping layer on the exposed second via surface of the through via; and recessing the second substrate surface so that at least a first portion of the through via extends beyond the second substrate surface. | 2012-02-02 |
| 20120028413 | METHOD FOR MANUFACTURING BALL GRID ARRAY PACKAGE STACKING SYSTEM - A method for manufacturing a ball grid array package stacking system includes: providing a base substrate; coupling an integrated circuit to the base substrate; coupling a stacking substrate over the base substrate; mounting a heat spreader, having an access port, around the base substrate and the stacking substrate; and coupling a stacked integrated circuit to the stacking substrate through the access port. | 2012-02-02 |
| 20120028414 | METHOD OF MANUFACTURING SEMICONDUCTOR CHIP - A method of manufacturing a semiconductor chip including an integrated circuit and a through-electrode penetrating a semiconductor layer includes the steps of preparing a first substrate including a release layer and a semiconductor layer formed on the release layer; forming an integrated circuit in the semiconductor layer; forming, in the semiconductor layer, a hole or groove having a depth that does not reach the release layer; filling the hole or the groove with an electrical conductor; bonding a second substrate to the semiconductor layer to form a bonded structure; separating the bonded structure at the release layer to prepare the second substrate to which the semiconductor layer is transferred; and removing at least a portion of the reverse surface side of the semiconductor layer exposed by the separation to expose the bottom of the electrical conductor. | 2012-02-02 |
| 20120028415 | DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE, AND PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE - The present invention relates to a dicing tape-integrated film for semiconductor back surface including: a dicing tape including a base material and a pressure-sensitive adhesive layer laminated in this order, and a film for semiconductor back surface provided on the pressure-sensitive adhesive layer of the dicing tape, where the pressure-sensitive adhesive layer has a thickness of from 20 μm to 40 μm. | 2012-02-02 |
| 20120028416 | FILM FOR FLIP CHIP TYPE SEMICONDUCTOR BACK SURFACE AND ITS USE - The present invention relates to a film for flip chip type semiconductor back surface, which is to be disposed on a back surface of a semiconductor element flip chip-connected onto an adherend, the film for flip chip type semiconductor back surface including an adhesive layer and a protective layer laminated on the adhesive layer, in which the protective layer is constituted of a heat-resistant resin having a glass transition temperature of 200° C. or more or a metal. | 2012-02-02 |
| 20120028417 | SEMICONDUCTOR COMPONENT WITH CELL STRUCTURE AND METHOD FOR PRODUCING THE SAME - A semiconductor component comprises a semiconductor body comprising a first component electrode arranged on one of the surfaces of the semiconductor body, a second component electrode arranged on one of the surfaces of the semiconductor body, and a component control electrode arranged on one of the surfaces of the semiconductor body. In this case, active semiconductor element cells are arranged in a first active cell array of the semiconductor body, the semiconductor element cells comprising a first cell electrode, a second cell electrode and a cell control electrode and also a drift path between the cell electrodes. At least the component control electrode is arranged on a partial region of the semiconductor body and a second active cell array is additionally situated in the partial region of the semiconductor body below the component control electrode. | 2012-02-02 |
| 20120028418 | DICING TAPE-INTEGRATED FILM FOR SEMICONDUCTOR BACK SURFACE, AND PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE - The present invention relates to a dicing tape-integrated film for semiconductor back surface, which includes: a dicing tape including a base material layer, a first pressure-sensitive adhesive layer and a second pressure-sensitive adhesive layer stacked in this order, and a film for semiconductor back surface stacked on the second pressure-sensitive adhesive layer of the dicing tape, in which a peel strength Y between the first pressure-sensitive adhesive layer and the second pressure-sensitive adhesive layer is larger than a peel strength X between the second pressure-sensitive adhesive layer and the film for semiconductor back surface, and in which the peel strength X is from 0.01 to 0.2 N/20 mm, and the peel strength Y is from 0.2 to 10 N/20 mm. | 2012-02-02 |
| 20120028419 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - There is provided a low-cost semiconductor device that commercial and quality-assured (inspected) chip size packages can be stacked and has a small co-planarity value and a high mounting reliability. A semiconductor device in which a flexible circuit substrate is adhered to at least a part of a lateral side of a semiconductor package, and the flexible circuit substrate, which is on a side facing solder balls of the semiconductor package, is folded at a region inside of an edge of the semiconductor package (FIG. | 2012-02-02 |
| 20120028420 | METHOD FOR REUSE OF WAFERS FOR GROWTH OF VERTICALLY-ALIGNED WIRE ARRAYS - Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide. | 2012-02-02 |
| 20120028421 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SF | 2012-02-02 |
| 20120028422 | THIN FILM TRANSISTOR FORMED ON FLEXIBLE SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A thin film transistor (“TFT”) includes a poly silicon layer formed on a flexible substrate and including a source region, a drain region, and a channel region, and a gate stack formed on the channel region of the poly silicon layer, wherein the gate stack includes first and second gate stacks, and a region of the poly silicon layer between the first and second gate stacks is an off-set region. A method of manufacturing the TFT is also provided. | 2012-02-02 |
| 20120028423 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes: forming a channel layer; forming an electron supply layer on the channel layer; forming a cap layer made of gallium nitride on the electron supply layer; and performing an oxygen plasma treatment to an upper surface of the cap layer at a power density of | 2012-02-02 |
| 20120028424 | MANUFACTURE METHOD OF A SPLIT GATE NONVOLATILE MEMORY CELL - A split gate nonvolatile memory cell is provided with a first diffusion region, a second diffusion region, and a channel region formed between the first and second diffusion regions, including a first channel region having a predetermined dopant concentration. The first channel region is positioned apart from the first and second diffusion regions. | 2012-02-02 |
| 20120028425 | METHODS FOR FABRICATING TRENCH METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTORS - A trench metal oxide semiconductor field effect transistor (MOSFET) can be fabricated in an upward direction. A trench bottom doping (TBD) process and/or a trench bottom oxide (TBO) process can be performed after formation of a substrate and a first epitaxial (epi) layer. Poly seal can be performed after the formation of TBO layers and before a merged epitaxial lateral overgrowth (MELO) step to improve quality and purity of a second epi layer formed in the MELO step. Plasma dry etching with an end point mode can be performed according to the locations of TBO layers to improve the uniformity of trench depth. | 2012-02-02 |
| 20120028426 | Inverted-trench grounded-source FET structure using conductive substrates, with highly doped substrates - This invention discloses an inverted field-effect-transistor (iT-FET) semiconductor device that includes a source disposed on a bottom and a drain disposed on a top of a semiconductor substrate. The semiconductor power device further comprises a trench-sidewall gate placed on sidewalls at a lower portion of a vertical trench surrounded by a body region encompassing a source region with a low resistivity body-source structure connected to a bottom source electrode and a drain link region disposed on top of said body regions thus constituting a drift region. The drift region is operated with a floating potential said iT-FET device achieving a self-termination. | 2012-02-02 |
| 20120028427 | Split gate with different gate materials and work functions to reduce gate resistance of ultra high density MOSFET - This invention discloses a trenched metal oxide semiconductor field effect transistor (MOSFET) cell. The trenched MOSFET cell includes a trenched gate opened from a top surface of the semiconductor substrate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate. The trenched gate further includes at least two mutually insulated trench-filling segments each filled with materials of different work functions. In an exemplary embodiment, the trenched gate includes a polysilicon segment at a bottom portion of the trenched gate and a metal segment at a top portion of the trenched gate. | 2012-02-02 |
| 20120028428 | Vertical type semiconductor device and method of manufacturing a vertical type semiconductor device - A vertical pillar semiconductor device may include a substrate, a group of channel patterns, a gate insulation layer pattern and a gate electrode. The substrate may be divided into an active region and an isolation layer. A first impurity region may be formed in the substrate corresponding to the active region. The group of channel patterns may protrude from a surface of the active region and may be arranged parallel to each other. A second impurity region may be formed on an upper portion of the group of channel patterns. The gate insulation layer pattern may be formed on the substrate and a sidewall of the group of channel patterns. The gate insulation layer pattern may be spaced apart from an upper face of the group of channel patterns. The gate electrode may contact the gate insulation layer and may enclose a sidewall of the group of channel patterns. | 2012-02-02 |
| 20120028429 | METHOD OF FORMING A NON-VOLATILE ELECTRON STORAGE MEMORY AND THE RESULTING DEVICE - The invention provides a method of forming an electron memory storage device and the resulting device. The device comprises a gate structure which, in form, comprises a first gate insulating layer formed over a semiconductor substrate, a self-forming electron trapping layer of noble metal nano-crystals formed over the first gate insulating layer, a second gate insulating layer formed over the electron trapping layer, a gate electrode formed over the second gate insulating layer, and source and drain regions formed on opposite sides of the gate structure. | 2012-02-02 |
| 20120028430 | METHOD AND STRUCTURE TO IMPROVE FORMATION OF SILICIDE - A method begins with a structure having: a gate insulator on a silicon substrate between a gate conductor and a channel region within the substrate; insulating sidewall spacers on sidewalls of the gate conductor; and source and drain regions within the substrate adjacent the channel region. To silicide the gate and source and drain regions, the method deposits a metallic material over the substrate, the gate conductor, and the sidewalls, and performs a first heating process to change the metallic material into a metal-rich silicide at locations where the metallic material contacts silicon. The method removes the sidewall spacers, and performs a second heating process to change the metal-rich silicide into silicide having a lower metallic concentration than the metal-rich silicide. The silicide thus formed avoids being damaged by the spacer removal process. | 2012-02-02 |
| 20120028431 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE USING A NITROGEN CONTAINING OXIDE LAYER - The present invention provides a method for forming a semiconductor device, as well as a semiconductor device. The method for manufacturing a semiconductor device, among others, includes providing a gate structure ( | 2012-02-02 |
| 20120028432 | METHODS OF FORMING A BIPOLAR TRANSISTOR - A bipolar transistor, comprising a collector, a base and an emitter, in which the collector comprises a relatively heavily doped region, and a relatively lightly doped region adjacent the base, and in which the relatively heavily doped region is substantially omitted from an intrinsic region of the transistor. | 2012-02-02 |
| 20120028433 | METHOD FOR MANUFACTURING SOLID ELECTROLYTIC CAPACITOR - A dielectric layer is formed in the surface of an anode body which is composed of a sintered body, a semiconductor layer composed of an electrically-conductive polymer is formed on the dielectric layer, and then an electric conductor layer is formed on the semiconductor layer with an electrically-conductive paste which contains a dispersant to obtain a solid electrolytic capacitor element: The electric conductor layer of the solid electrolytic capacitor element is electrically connected to a cathode terminal using the electrically-conductive paste which contains a dispersant, and the anode body is electrically connected to an anode terminal through a lead wire by welding. The solid electrolytic capacitor element connected to the terminals is immersed in a solvent, and then the solid electrolytic capacitor element is encapsulated with a resin to obtain a solid electrolytic capacitor. | 2012-02-02 |
| 20120028434 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING ACID DIFFUSION - A method of manufacturing a semiconductor device includes forming a resist pattern on a first region on a substrate, bringing a descum solution including an acid source into contact with the resist pattern and with a second region of the substrate, decomposing resist residues remaining on the second region of the substrate by using acid obtained from the acid source in the descum solution and removing the decomposed resist residues and the descum solution from the substrate. | 2012-02-02 |
| 20120028435 | SEMICONDUCTOR DEVICE INCLUDING DUMMY GATE PART AND METHOD OF FABRICATING THE SAME - In a reliable semiconductor device and a method of fabricating the semiconductor device, a difference in height between upper surfaces of a cell region and a peripheral region (also referred to as a level difference) is minimized by optimizing dummy gate parts. The semiconductor device includes a semiconductor substrate including a cell region and a peripheral region surrounding the cell region, a plurality of dummy active regions surrounded by a device isolating region and formed apart from each other, and a plurality of dummy gate parts formed on the dummy active regions and on the device isolating regions located between the dummy active regions, wherein each of the dummy gate parts covers two or more of the dummy active regions. | 2012-02-02 |
| 20120028436 | METHOD FOR FABRICATION OF A SEMICONDUCTOR DEVICE AND STRUCTURE - A method of manufacturing a semiconductor wafer, the method including: providing a base wafer including a semiconductor substrate, metal layers and first alignment marks; transferring a monocrystalline layer on top of the metal layers, wherein the monocrystalline layer includes second alignment marks; and performing a lithography using at least one of the first alignment marks and at least one of the second alignment marks. | 2012-02-02 |
| 20120028437 | TRENCH-FILLING METHOD AND FILM-FORMING SYSTEM - A method of filling a trench comprises heating a semiconductor substrate having a trench formed therein and an oxide film formed at least on the sidewall of the trench and supplying an aminosilane gas to the surface of the substrate so as to form a seed layer on the semiconductor substrate, heating the semiconductor substrate having the seed layer formed thereon and supplying a monosilane gas to the surface of the seed layer so as to form a silicon film on the seed layer, filling the trench of the semiconductor substrate, which has the silicon film formed thereon, with a filling material that shrinks by burning, and burning the semiconductor substrate coated by the filling material filling the trench in an atmosphere containing water and/or a hydroxy group while changing the filling material into a silicon oxide and changing the silicon film and the seed layer into a silicon oxide. | 2012-02-02 |
| 20120028438 | METHOD FOR SEPARATING A LAYER SYSTEM COMPRISING A WAFER - A method for mechanically separating a laminar structure from a carrier assembly is disclosed. The method can include providing a layered system comprising the carrier assembly, having a first carrier, and the laminar structure, having a wafer and optionally a second, stretchable carrier, and creating a mechanical stress in the interface region between carrier assembly and the laminar structure, so that the laminar structure is separated from the carrier assembly. The method also includes:
| 2012-02-02 |
