| 05th week of 2012 patent applcation highlights part 23 |
| Patent application number | Title | Published |
|---|
| 20120025838 | SUNLIGHT SIMULATOR - A sunlight simulator and solar cell measuring device consisting of detecting device is disclosed, in which the housing is a closed space consisting of an opening gate, the closed space is internally installed with a light source which is used to emit a light toward the opening gate, and a splitting unit is installed on the travelling path of the light for dividing the light into a first light-beam and a second light-beam, herein the first light-beam is projected onto the solar cell under measurement located at the opening gate as a solar cell measuring device; in addition, a detecting device is installed on the travelling path of the second light-beam for receiving the second light-beam, and then a signal can be outputted by the detecting device in order to monitor the irradiation variation of the light emitted by the light source, thus ensuring the precision of the solar cell measurement. | 2012-02-02 |
| 20120025839 | APPARATUS FOR MEASURING CONDUCTIVE PATTERN ON SUBSTRATE - An embodiment of the invention provides an apparatus for measuring a conductive pattern on a substrate, which includes: a first electro-optical modulator surrounding at least one first detecting roller; transmission rollers for transferring the substrate and allowing direct contact of the substrate and the first electro-optical modulator; a voltage supplier for providing a bias between the first electro-optical modulator and the substrate; and a first image detecting system for receiving a first detecting light reflected from a first surface of the substrate. | 2012-02-02 |
| 20120025840 | APPRATUS FOR MEASURING GROUND LEAKAGE CURRENT IN AN UNGROUNDED DIRECT CURRENT POWER SYSTEM, AND METHOD FOR SAME - Provided a ground leakage current measurement apparatus in an ungrounded DC power system including main and auxiliary electric lines includes: a switching unit configured to perform switching to supply measurement power to a main ground resistor and an auxiliary ground resistor by using power of the electric lines; a measurement unit connected between the switching unit and the ground and configured to measure at least one of main and auxiliary ground leakage currents; and a control unit configured to control the switching unit to discriminate a main ground leakage current operation and an auxiliary ground leakage current operation of the measurement unit. | 2012-02-02 |
| 20120025841 | CAPACITANCE MEASUREMENT IN MICROCHIPS - A measurement system for determining the capacitance of a device-under-test in an integrated circuit is disclosed. In one aspect, the measurement system has a reference circuit and a test circuit. Each circuit has first and second diodes that are switched in accordance with a clock cycle to charge and discharge the associated circuit. A method takes average current measurements for each circuit at one voltage level and processes them so that the capacitance of a device-under-test connected to the test circuit can accurately and reliably be determined. Two voltage levels may be used and adjustments are made for voltage threshold of the diodes and also their resistance. | 2012-02-02 |
| 20120025842 | METHOD FOR MONITORING A POWER COUPLER FOR A PLUG-IN ELECTRIC VEHICLE - A method for monitoring a power coupler for a plug-in electric vehicle during a charging process, where the method may perform one of several alerts in the event that the vehicle stops receiving power. In an exemplary embodiment, the method performs a theft alert when the power coupler is physically unplugged or disconnected (this is intended to dissuade people from stealing the power coupler), and it performs a power loss alert when there is a loss of electrical power at the wall (this is intended to notify the vehicle owner when there is a power outage, a tripped circuit breaker, or any other condition that prevents the vehicle from being charged). By distinguishing between possible theft situations and simple power loss situations, the method can perform or issue an alert that is better tailored to the particular conditions that triggered it. | 2012-02-02 |
| 20120025843 | LENS CONNECTOR-TESTING DEVICE - Provided is a lens connector-testing device including a base, a circuit tester, a probe, and a positioning unit. The positioning unit includes a positioning housing, a lift block, an insulating plate, a press spring, a latch member and a supporting seat. The positioning housing has a lift-guiding groove. The insulating plate is fixedly connected to an upper end of the lift block. A lower end of the lift block is slidably received in the lift-guiding groove. A holding space is defined between the insulating plate and the positioning housing. The supporting seat is disposed on the positioning housing and has at least one electrical contact. The latch member has a fixing section, a hooking section, and a pressing section. The lift block has a projecting portion matched with the hooking section of the latch member. The press spring is located between the pressing section and the positioning housing. | 2012-02-02 |
| 20120025844 | CONNECTION DIAGNOSTIC APPARATUS FOR GROUND FAULT DETECTOR - A connection diagnostic apparatus for a ground fault detector including an oscillator connected via a coupling capacitor to an electric circuit with a first connection line and a second connection line, and a voltage detector for detecting a voltage value between the oscillator and the coupling capacitor is provided with a first relay and a second relay provided in the first connection line and the second connection line, and a programmable controller. The programmable controller determines a connected state of the ground fault detector based on a change amount of a voltage value detected by the voltage detector when the first relay is turned on or off and determines the connected state of the ground fault detector based on a change amount of a voltage value detected by the voltage detector when the second relay is turned on or off. | 2012-02-02 |
| 20120025845 | SHORT CIRCUIT DETECTION IN AN INKJET PRINTHEAD - A short detection apparatus, system and method detect short circuits in an inkjet printhead using a comparison of measured current consumption and an estimate of current consumption based on print data. The apparatus includes a current sensor to measure current consumed by the printhead to eject a droplet of ink, a current estimator to estimate a current consumption of the printhead due to print data provided to the printhead, and a comparator to compare the measured consumed current to the estimated consumed current. A short circuit in the printhead is indicated when the comparison exceeds a predetermined threshold. | 2012-02-02 |
| 20120025846 | ON-CHIP TESTING USING TIME-TO-DIGITAL CONVERSION - A method and system for testing the functionality of a through-silicon-via in an integrated circuit is disclosed. In one aspect, the functionality is tested by measuring its capacitance from one side only. The capacitance of the TSV can be determined by measuring a timing delay introduced in a measurement circuit due to the presence of the TSV. The timing delay is determined by comparing the timing of measurement signal from the measurement circuit with the timing of a reference signal provided by a reference circuit. The comparison is carried out using a digital timing measurement circuit, such as a time-to-digital converter. | 2012-02-02 |
| 20120025847 | METHOD AND SYTEM FOR MEASURING A TIME CONSTANT OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT PROVIDED WITH SUCH A SYSTEM - A method and system for measuring a time constant RC of an integrated electronic circuit is provided. This integrated circuit may be made up of a first hardware component and of a second hardware component wherein one of the hardware components is a resistive element and the other is a capacitive element. The first and the second hardware components are connected to an inverting input of an operational amplifier of an integrator of a delta-sigma modulator. A DC voltage is applied to the modulator input. The output signal Q | 2012-02-02 |
| 20120025848 | Device for Transmitting and/or Receiving Electromagnetic RF Signals, and Measurement Instrument and Machine-Tool Monitoring Device with such a Device - A device for transmitting and/or receiving electromagnetic RF signals, in particular a UWB antenna, has a planar, ultra-wideband antenna structure made of a plurality of dipole elements. Each dipole element comprises two poles having substantially elliptical base shapes. A measuring machine, in particular a locating and/or material identifying device for identifying objects encased in a medium and/or for identifying material parameters, in particular the moisture of a material, has at least one UWB sensor comprising at least one device for transmitting electromagnetic RF signals. A machine tool monitoring device has a detecting device for detecting the presence of a material type, in particular of tissue, in a machine tool working area, and has a working mechanism wherein the detecting device comprises a sensor unit having at least one device for transmitting electromagnetic RF signals. | 2012-02-02 |
| 20120025849 | INTRUSION DETECTION AND TRACKING SYSTEM - In one aspect, a method to detect an object in an area includes forming a wireless network among a plurality of nodes, each of the nodes being configured to generate an electromagnetic field (EMF) in the area and determining changes in the EMF between two nodes based on: a first difference in received signal strength values between a previously determined received signal strength value and a currently determined received signal strength value, a second difference in received signal strength values between the currently determined received signal strength value and an average received signal strength value and a third difference in link quality values between a previously determined link quality value and a currently determined link quality value. The method further comprises detecting the object based on the changes in the EMF. | 2012-02-02 |
| 20120025850 | DEVICE FOR MEASURING DISTANCE BETWEEN HEADREST AND HEAD, METHOD FOR MEASURING DISTANCE BETWEEN HEADREST AND HEAD, HEADREST POSITION ADJUSTING DEVICE, AND HEADREST POSITION ADJUSTING METHOD - A headrest position adjusting device | 2012-02-02 |
| 20120025851 | CAPACITIVE SENSORS - The present disclosure includes capacitive sensors and methods of forming capacitive sensors. One capacitive sensor includes a first substrate structure having a first dielectric material formed thereon and electrodes of a first electrode array formed on the first dielectric material. The sensor includes a second substrate structure facing the first substrate structure and having a second dielectric material formed thereon and electrodes of a second electrode array formed on the second dielectric material. The sensor includes a removed portion of the first dielectric material forming a recess between adjacent electrodes of the first electrode array, and the first substrate structure is moveable with respect to the second substrate structure. | 2012-02-02 |
| 20120025852 | ELECTRONIC CIRCUIT FOR THE EVALUATION OF INFORMATION FROM VARIABLE ELECTRIC RESISTANCE SENSORS - The solution concerns an electronic circuit for information evaluation from variable electric resistance sensors, where this sensor is formed by a matrix composed of columns and rows. At least one row and one column of the matrix is connected to a circuit which is formed by a parallel combination of a capacitor and a resistor to which a row switch is connected in series, and parallel to that is connected a serial combination consisting of terminals for connecting a variable electric resistance sensor and a column switch. The so formed connection of elements is connected to a power supply. The common point of parallel combination of the capacitor and the resistor is connected over a wave-shaping circuit to a counter. The row switch is connected to one output of a timing block to whose other output is connected a column switch. | 2012-02-02 |
| 20120025853 | SOLID STATE SENSOR FOR METAL ION DETECTION AND TRAPPING IN SOLUTION - A device, apparatus and method for trapping metal ions and detecting metal ion contamination in a solution provide a semiconductor device formed on a semiconductor substrate and including an N-well formed over a P-type substrate and at least a contact portion of the N-well in electrical contact with the solution. When the semiconductor device is optically illuminated, a P/N junction is formed as a result of photovoltaic phenomena. Metal ions from the solution migrate to the contact area due to the voltage created at the P/N junction. The semiconductor device includes a conductive structure with conductive features separated by a gap and therefore in an initially electrically open state. When the ions migrate to the contact area, they precipitate, at least partially bridging the gap and creating conductance through the conductive structure. The conductance may be measured to determine the amount of metal ion contamination. | 2012-02-02 |
| 20120025854 | CURRENT MONITOR FOR SENSING THE CURRENT IN A CURRENT PATH AND CORRESPONDING CONTROL DEVICE - A current monitor for sensing the current in a current path includes a resistive sensing element in a section of the current path and a current mirror circuit having a first semiconductor device and a second semiconductor device. Both semiconductor devices electrically interconnect with each other for copying the current in the second semiconductor device to the first semiconductor device. The first semiconductor device is electrically connected to an electric reference potential and to a current input side of the section via a resistive equivalence element in a first current branch. The second semiconductor device is electrically connected to the electric reference potential and to a current output side of the section in a second current branch. The current monitor further includes a constant current source for keeping the current in the second current branch independent from the potential difference between the potential of the current output side of the section and the reference potential. | 2012-02-02 |
| 20120025855 | DISPLAY DEVICE HAVING REPAIR AND DETECT STRUCTURE - A display device having repair and detect structure includes a substrate, a pixel array, a first shorting bar and a first repair line. The pixel array disposed on the substrate includes a plurality of data lines and a plurality of gate lines. The first shorting bar disposed on the substrate is connected to the gate lines for testing the gate lines, and the first shorting bar includes a first shorting segment. The first repair line is disposed on the substrate for repairing at least one of the data lines. The first shorting segment of the first shorting bar is electrically connected to the first repair line. Furthermore, another repair and detect structure of a display device is disclosed, wherein the first shorting bar includes a first shorting segment, the first repair line includes a first repair segment, and the first shorting segment overlaps with the first repair segment. | 2012-02-02 |
| 20120025856 | TEMPERATURE CONTROL DEVICE AND TEMPERATURE CONTROL METHOD - Pressing an electronic device ( | 2012-02-02 |
| 20120025857 | MANIPULATOR OF ROBOT - An exemplary manipulator of a robot includes a fastening seat defining two guiding grooves, a driving mechanism disposed on the fastening seat, two transmitting plates respectively received in the two guiding grooves and cooperating with the driving mechanism, and two detecting bars each fixedly connecting with a corresponding transmitting plate. A detecting pin is fixed on each of the detecting bars. Under a driving action of the driving mechanism on the transmitting plates, the transmitting plates are activated to slide in the guiding grooves to cause the detecting bars to move close to or apart from each other, whereby a distance between the two detecting pins is automatically regulated. | 2012-02-02 |
| 20120025858 | PROBE CARD HOLDING APPARATUS - A probe card holding apparatus is provided and may be configured to hold a probe card in a test head. The probe card may include a clamp head formed at a center part of a back surface of the probe card, and a holding device provided at the test head and configured to engage with the clamp head. | 2012-02-02 |
| 20120025859 | COMBINED PROBE HEAD FOR A VERTICAL PROBE CARD AND METHOD FOR ASSEMBLING AND ALIGNING THE COMBINED PROBE HEAD THEREOF - A combined probe head being disposed in a space transformer of a vertical probe card is provided, in which the combined probe head is used for differentiating or segmenting a layout area of the probes in the vertical probe card. The combined probe head may include a locating plate and sub-probe heads. The locating plate may include fixed portions. Each sub-probe head may include corresponding sub-dies and probes inserted between the sub-dies, and each sub-probe head is assembled and fixed in the corresponding fixed portion. Therefore, the layout area of the probes in the vertical probe card can be respectively differentiated or segmented from the sub-probe heads in order to avoid mutual interference under repair process. In addition, a related method for assembling and aligning the above mentioned combined probe head is provided. | 2012-02-02 |
| 20120025860 | Burn-in socket and testing fixture using the same - A burn-in socket for carrying an electronic device to let the electronic device electrically connect to a circuit board via the burn-in socket is provided. The electronic device has a body and at least a lead. The burn-in socket comprises a frame and a carrier, the frame has an opening and a plurality of first aligning portions, wherein the opening fits onto the contour of the body, and the first aligning portions surrounds the opening. The carrier has a plurality of second aligning portions. The frame is assembled to the carrier with the conjunction of the first aligning portions and the second aligning portions. The body is capable of fitting into the opening to let the lead electrically connect to the circuit board via the carrier. | 2012-02-02 |
| 20120025861 | TEST SOCKET AND TEST DEVICE HAVING THE SAME - A test device is provided. The test device includes a first via which transmits a supply voltage, a second via which transmits a ground voltage, a test board including a plurality of test signal vias for transmitting a plurality of test signals, a capacitor disposed on an upper part of the test board and connected between the first via and the second via, and a test socket which electrically connects a device under test (DUT) with the test board. The test socket includes a first region including a flat lower surface bordering the test board, a second region including an uneven lower surface, a plurality of first contactors which are disposed in the first region and which are connected to the plurality of vias, and two second contactors which are disposed in the second region and which are connected to two terminals of the capacitor. | 2012-02-02 |
| 20120025862 | Test Structure for ILD Void Testing and Conduct Resistance Measurement in a Semiconductor Device - In complex semiconductor devices, the contact characteristics may be efficiently determined on the basis of a test structure which includes a combination of interconnect chain structures and a comb structure including gate electrode structures. Consequently, an increased amount of measurement information may be obtained on the basis of a reduced overall floor space of the test structure. In this manner, the complex manufacturing sequence for forming a contact level of a semiconductor device may be quantitatively estimated and monitored. | 2012-02-02 |
| 20120025863 | SOLDER JOINT INSPECTION - An integrated circuit includes an electronic circuit in a housing and a first contacting device for soldering the circuit to a corresponding second contacting device of a circuit board. The first and second contacting devices are each divided into a first section and a second section, the sections of one of the contacting devices being fixedly electrically connected to each other, and the sections of the other contacting device being selectively connectable to a device for resistance determination. | 2012-02-02 |
| 20120025864 | CIRCUIT TESTING DEVICE AND METHOD FOR IMPLEMENTING SAME - The invention relates to a device for testing a circuit made up of a printed circuit board on which components, preferably dummy components, are assembled by means of solder connections. The testing device comprises an enclosure for subjecting the circuit under test to a schedule of thermo-mechanical and/or vibration constraints. The testing device comprises a hardware portion comprising bridges of electrical resistors, a software portion comprising means for setting a detection criterion representing damage to one or more solder connections and for displaying the results of the test, an input/output interface for converting each electrical resistor measurement of the tested chains of solder connections into data that can be used by the software portion, and adjustment means for modifying a criterion for detecting damage to the solder connections. | 2012-02-02 |
| 20120025865 | INPUT CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE - According to one embodiment, an input circuit includes an input buffer, a control unit, a holding unit, a feedback unit. The input buffer receives a signal input from an outside. The input buffer includes a plurality of CMOS inverters connected in parallel. The plurality of CMOS inverters includes a plurality of PMOS transistors and a plurality of NMOS transistors. The control unit selects one or more PMOS transistors from the plurality of PMOS transistors so as to enter an operable state. The control unit selects one or more NMOS transistors from the plurality of NMOS transistors so as to enter an operable state. The holding unit holds a level of a signal transferred from the input buffer in synchronization with a clock signal. The holding unit outputs the held signal level. The feedback unit feeds the level of the signal output from the holding unit back to the control unit. | 2012-02-02 |
| 20120025866 | SEMICONDUCTOR DEVICE - A semiconductor device includes a slew rate controller configured to receive a mode register set signal and data and to activate a driving strength control signal for controlling the driving strength of a driving unit using the data in response to a code value of the mode register set signal. The driving unit is configured to pull a data output terminal up and down in response to the driving strength control signal. | 2012-02-02 |
| 20120025867 | Device for storing pulse latch with logic circuit - A device for storing pulse latch with logic circuit and thus having signal maintaining function is provided, wherein the device is composed of a data signal, a scan data input signal, a stored signal, a choosing data input signal, a time clock signal, a restoring signal, a first signal channel, a scan latch, a second signal channel, a pulse latch, a normal output signal, an output signal, a first OR gate, a second OR gate, a third OR gate, a AND gate and an inverter connecting to one another. The device may store the data when being switch off and restore the data when being switch on again. | 2012-02-02 |
| 20120025868 | Asynchronous Logic Automata - A family of self-timed, charge-conserving asynchronous logic elements that interact with their nearest neighbors permits design and implementation of circuits that are asynchronous at the bit level. The elements pass information by means of state tokens, rather than voltages. Each cell is self-timed, so no hardware non-local connections are needed. An asynchronous logic element comprises a set of edges for asynchronous communication with at least one neighboring cell, the edges receiving state tokens from neighboring logic elements and transferring output state tokens to neighboring logic elements, and circuitry configured to perform, when the circuitry inputs contain valid tokens and the circuitry outputs are empty, a logic operation utilizing received tokens as inputs, thereby producing an output token reflecting the result of the logic operation. | 2012-02-02 |
| 20120025869 | NON-VOLATILE FIELD PROGRAMMABLE GATE ARRAY - A non-volatile memory device includes a first metal-oxide-semiconductor (CMOS) device coupled to a bit line and a word line and a second CMOS device coupled to the first CMOS device. The second CMOS device is also coupled to a complementary bit line and a complementary word line. The first and second CMOS devices are complementary to one another. An output node is coupled between the first CMOS device and the second CMOS device. A method of programming a non-volatile field programmable gate array (NV-FPGA) includes coupling an information handling system to the FPGA, performing a block erase of a plurality of memory cells in the FPGA, verifying that the block erase is successful, programming an upper page of the FPGA, verifying that the upper page programming is successful, programming a lower page of the FPGA and verifying that the lower page programming is successful. | 2012-02-02 |
| 20120025870 | METHOD AND APPARATUS FOR VOLTAGE LEVEL SHIFTING WITH CONCURRENT SYNCHRONIZATION - Methods and apparatus provide for voltage level shifting with concurrent synchronization. The apparatus includes level shifting logic that in response to a non-level shifted clock signal from a first voltage domain, provides level shifted concurrently synchronous differential data signals in a second voltage domain based on pre-level shifted differential data signals from the first voltage domain. The first voltage domain may be, for example, a core logic voltage domain in which core logic operates. The second voltage domain may be, for example, an input/output (I/O) voltage domain in which an I/O buffer operates. The voltage level of the level shifted concurrently synchronous differential data signals is shifted from the pre-level shifted differential data signals, and the timing of the level shifted concurrently synchronous differential data signals is concurrently referenced to the non-level shifted clock signal. | 2012-02-02 |
| 20120025871 | SEMICONDUCTOR DEVICE AND METHOD FOR OPERATING THE SAME - A semiconductor device includes a first buffer element configured to buffer a first mode signal inputted from the outside of the semiconductor device, and a second buffer element configured to buffer a second mode signal inputted from the outside by being enabled in response to an output signal of the first buffer element. | 2012-02-02 |
| 20120025872 | Buffer Enable Signal Generating Circuit And Input Circuit Using The Same - An input circuit comprises a buffer enable signal generating circuit for generating a buffer enable signal having an predetermined enable period in response to an external command, and a buffer circuit for buffering and outputting the external command and an external address signal in response to the buffer enable signal. | 2012-02-02 |
| 20120025873 | SEMICONDUCTOR DRIVE DEVICE - When there is a short circuit failure between the gate and emitter of a main switching element such as an IGBT, the temperature of a turn-on gate resistor or turn-off gate resistor is detected by a thermistor, and a drive circuit is protected by turning off a turn-on gate drive switching element or a turn-off gate drive switching element. Furthermore, instead of detecting the temperature of the turn-on gate resistor or turn-off gate resistor, a thermistor is connected in series with the turn-on gate drive switching element or turn-off gate drive switching element, the resistance change corresponding to a change in temperature of the thermistor is detected, and the drive circuit is protected by turning off the turn-on gate drive switching element or turn-off gate drive switching element. | 2012-02-02 |
| 20120025874 | SEMICONDUCTOR DEVICE HAVING SWITCHING ELEMENT AND FREE WHEEL DIODE AND METHOD FOR CONTROLLING THE SAME - A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate. | 2012-02-02 |
| 20120025875 | APPARATUS FOR DRIVING VOLTAGE CONTROLLED SWITCHING ELEMENTS - An apparatus is provided to drive a voltage controlled switching element having a conduction control terminal. In the apparatus, it is determined whether or not voltage at the conduction control terminal is at a first voltage which is lower than a second voltage and which is equal to or more than a threshold voltage. The second voltage is a voltage provided when the switching element is in a normal on-state thereof. The threshold voltage is voltage at which the switching element is switched on. When it is determined that the voltage at the conduction control terminal is at the first voltage, the switching element is forcibly switched off. | 2012-02-02 |
| 20120025876 | Current Driving Circuit and Display Device Using The Current Driving Circuit - A current drive circuit which can improve a rate for signal writing and a driving rate of an element even when a signal current is small, and a display device using the current drive circuit are provided. The current drive circuit for supplying a signal current to a node of a driven circuit through a signal line includes a precharge function for supplying a precharge voltage to the node through the signal line and the precharge function includes a supply function for supplying the precharge voltage to the node and the signal line prior to supplying the signal current. | 2012-02-02 |
| 20120025877 | LATCH STRUCTURE, FREQUENCY DIVIDER, AND METHODS FOR OPERATING SAME - A latch includes three circuits. The first circuit drives a first output (QB) to a first level when a first input (D) and a first clock phase (CK) are both low, to a second level when D and CK are both high, and provides high impedance (HI-Z) when different logic levels are applied to D and CK. The second circuit drives a second output (Q) to the first level when a third input (DB) and a complimentary clock phase (CKB) are both low, to the second level when DB and CKB are both high, and provides HI-Z when different logic levels are applied to DB and CKB. The third circuit maintains voltages of Q and QB when the first and second circuits provide HI-Z at Q and QB. Odd-number dividers constructed with such latches produce 50% duty cycle operation without restricting output pulse widths to integer multiples of input periods. | 2012-02-02 |
| 20120025878 | SEMICONDUCTOR DEVICE AND DRIVING METHOD THEREOF - A semiconductor device includes a plurality of synchronization clock generators configured to generate a plurality of synchronization clock signals by mixing phases of first and second source clock signals having an identical frequency, a first clock transmission path configured to sequentially apply the first source clock signal to the plurality of synchronization clock generators by transferring the first source clock signal in a forward direction, a second clock transmission path configured to sequentially apply the second source clock signal to the plurality of synchronization clock generators by transferring the second source clock signal in a backward direction, and a plurality of data output units configured to synchronize a plurality of data with the plurality of synchronization clock signals and outputting the synchronized plurality of data. | 2012-02-02 |
| 20120025879 | PLL CIRCUIT, METHOD FOR OPERATING PLL CIRCUIT AND SYSTEM - A PLL circuit includes: a first counter to accumulate a frequency command word in response to a reference clock signal and to generate a first counted value; a second counter to count an output clock signal and generate a second counted value; a time measuring circuit to measure an interval between a transition edge of the reference clock signal and a transition edge of the output clock signal to output a third counted value; a phase difference normalizing circuit to multiply the third counted value by a normalizing coefficient to generate a first phase difference; an operating circuit to subtract a value obtained by subtracting the first phase difference from the second counted value from the first counted value to generate a phase difference signal; and an oscillator to change a frequency of the output clock signal based on the phase difference signal. | 2012-02-02 |
| 20120025880 | Fractional Spur Reduction Using Controlled Clock Jitter - In one embodiment, an apparatus includes a jitter generator configured to receive a reference clock; add jitter to the reference clock; and output the reference clock with the included jitter to a phase lock loop (PLL). The PLL is used to generate a local oscillator (LO) signal for a transceiver. A jitter controller outputs a signal to the jitter generator to control a characteristic of the jitter added to the reference clock. The reference clock with the added jitter is used to reduce a fractional spur caused by a radio frequency (RF) attacker coupling into the PLL. | 2012-02-02 |
| 20120025881 | HIGH FREQUENCY QUADRATURE PLL CIRCUIT AND METHOD - A method includes phase-shifting an output signal of a phase lock loop (PLL) circuit by applying an injection current to an output of a charge pump of a the PLL circuit. A circuit includes: a first phase lock loop (PLL) circuit and a second PLL circuit referenced to a same clock; a phase detector circuit that detects a phase difference between an output signal of the first PLL circuit and an output signal of the second PLL circuit; and an adjustable current source that applies an injection current to at least one of the first PLL circuit and the second PLL circuit based on an output of the phase detector circuit. | 2012-02-02 |
| 20120025882 | CALIBRATION FOR PHASE-LOCKED LOOP - A method for calibrating a bandwidth of a phase-locked loop begins with detecting an error signal generated by the phase-locked loop in response to a stimulus signal. The difference between the integral of the error signal and a nominal value thereof is computed, and the bandwidth of the phase-locked loop is adjusted based on the computed difference. | 2012-02-02 |
| 20120025883 | LOCK DETECTION CIRCUIT AND PHASE-LOCKED LOOP CIRCUIT INCLUDING THE SAME - A phase-locked loop circuit including a lock detector is provided comprising a delay circuit including a load capacitor, and a bias circuit configured to generate a constant reference current, wherein the load capacitor is charged or discharged with a current whose level is dependent upon the reference current. | 2012-02-02 |
| 20120025884 | Method and Apparatus for Conveying and Reproducing Multiple Independent Timebases Using a Shared Reference Clock, Clock Snapshots and a Packet Network - Disclosed are methods and systems of conveying and reproducing independent timebases in a network. The methods include distributing a common measurement clock and a common measurement clock counter to a plurality of cards in a master chassis in the network. Distributed master clock counters are locked to an external input signal in each of the plurality of cards. Periodic snapshots of a count value generated by the master clock counter are taken. A counter speed of the master clock counter is analyzed to create a future snapshot of the count value. The future snapshot of the count value is transmitted from the master chassis to at least one receiving chassis in the network. The association between master counters and slave counters is programmable by various means including modifying the routing of the snapshot packets. | 2012-02-02 |
| 20120025885 | MULTI-BIT INTERLACED LATCH - A multi-bit interlace latch includes a first and second latch that each have redundant active feedback paths to reduce the incidence of soft-errors. The first and second latches have active circuitry that includes nodes that are susceptible to radiation-induced soft errors. Active circuitry from the second latch is interlaced between active circuitry of the first latch to increase the isolation between critical nodes of the first latch. While the second latch circuit increases isolation between critical nodes of the first latch, the first latch may also benefit the second latch by increasing the isolation between critical nodes of the first latch as well. | 2012-02-02 |
| 20120025886 | SWITCH CONTROL DEVICE - The present invention relates to a switch control device. | 2012-02-02 |
| 20120025887 | CLOCK DRIVER FOR A CAPACITANCE CLOCK INPUT - A circuit that produces a clocking signal for a low to medium capacitance input of a device includes a drive gate connected to a common-base bi-polar driver circuit. The output of the drive gate is connected to an emitter of an NPN bi-polar transistor through one coupling capacitor and to an emitter of a PNP bi-polar transistor through another coupling capacitor. The transistors are connected in a common-base configuration with the collectors of the transistors connected together. One voltage is connected to the base of the PNP transistor. Another voltage is connected to the base of the NPN transistor. A diode is connected in parallel with the base-emitter of the PNP transistor. Another diode is connected in parallel with the base-emitter of the NPN transistor. A damping resistor is connected between the collectors of the transistors and the low to medium capacitance clock input of the device. | 2012-02-02 |
| 20120025888 | Drive Strength Control of Phase Rotators - A phase rotator includes a phase selector stage operative to receive a clock signal and output a first phase and a second phase of the clock signal, a slew rate control stage including a first pass gate circuit operative to control a slew rate of the first phase of the clock signal and a second pass gate circuit operative to control a slew rate of the second phase of the clock signal, and a phase blending stage operative to combine the first phase with the second phase of the clock signal and output a phase rotated signal. | 2012-02-02 |
| 20120025889 | ASSESSMENT OF ON-CHIP CIRCUIT BASED ON EYE-PATTERN ASYMMETRY - During an asymmetry testing mode of an integrated circuit, the asymmetry of an on-chip I/O circuit is tested. In particular, a transmitter circuit in the integrated circuit transmits electrical signals, which are associated with a predefined data pattern, to a receiver circuit in the integrated circuit via a communication channel (such as a differential pair of signal lines). Then the integrated circuit generates an eye pattern using the received electrical signals, and determines an asymmetry of the eye pattern about a common reference level of the received electrical signals. Furthermore, the integrated circuit performs remedial action based on the determined asymmetry. For example, the integrated circuit may compare the determined asymmetry with a predefined asymmetry criterion and, if the asymmetry exceeds the predefined asymmetry criterion, may output a result of the comparison that indicates a failure of the asymmetry test. | 2012-02-02 |
| 20120025890 | Circuitry and method for preventing base-emitter junction reverse bias in comparator differential input transistor pair - A differential input circuit ( | 2012-02-02 |
| 20120025891 | Bipolar transistor anti-saturation clamp using auxiliary bipolar stage, and method - An output stage ( | 2012-02-02 |
| 20120025892 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device provided with a first circuit block BLK | 2012-02-02 |
| 20120025893 | SWITCHED CAPACITOR CIRCUIT - A switched capacitor circuit includes a capacitor and switches located on an input side and an output side of the capacitor. The switched capacitor circuit also includes an operational amplifier of a later stage which receives an output of the capacitor, wherein a current value of a current supplied to the operational amplifier is switched according to at least one open/closed state of at least one of the switches. | 2012-02-02 |
| 20120025894 | Multi-Mode Output Transmitter - A multi-mode output transmitter includes a pair of driving circuits and a pair of common circuits. Each of the driving circuits includes an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET), and each of the common circuits includes a p-channel MOSFET. In one transmission mode, one of the pair of common circuits and one of the pair of driving circuits complementarily conduct; and in another transmission mode, the pair of common circuits simultaneously conduct to provide termination resistors. | 2012-02-02 |
| 20120025895 | POWER SUPPLY UNIT AND ELECTRONIC APPARATUS USING THE SAME - An electronic apparatus capable of saving power is provided. The electronic apparatus includes a buffer, a central processing unit (CPU), and a power supply unit. The power supply unit includes a mechanical switch circuit, a first switch circuit, and a second switch circuit. The first switch circuit is capable of being turned on by the mechanical switch circuit to receive power from a power input port and providing power to the buffer. The second switch circuit is capable of being turned on by the mechanical switch circuit to receive power from the power input port through the first switch circuit and providing power to the CPU, and the CPU being operable to generate a control signal to turn off the second switch circuit to interrupt the power provided to the CPU. | 2012-02-02 |
| 20120025896 | POWER SUPPLY SELECTOR AND POWER SUPPLY SELECTION METHOD - In the field of electronic technologies, a power supply selector and a power supply selection method are provided. The power supply selector includes: a first selection module, configured to select a power supply from multiple candidate power supplies; a control module, coupled to the first selection module, and configured to use the power supply selected by the first selection module as a power supply, and compare voltages of the multiple candidate power supplies to generate a control signal of each candidate power supply; and a second selection module, coupled to the control module, and configured to select a power supply for output in the multiple candidate power supplies under the control of the control signal of each candidate power supply. The technical solution is used to select a power supply from multiple candidate power supplies. | 2012-02-02 |
| 20120025897 | DRIVE UNIT FOR DRIVING VOLTAGE-DRIVEN ELEMENT - A drive unit comprises a first connector, second connector, switching element, and controller. The first connector is configured to be connected with a gate resistor of a voltage-driven element. The second connector is configured to be connected with a driving power source. A first input-output terminal of the switching element is connected to the first connector, and a second input-output terminal thereof is connected to the second connector. The controller is connected to a control terminal of the switching element, and controls a voltage input to the control terminal of the switching element. The controller has an error amplifier, reference power source, and switch. One input terminal of the error amplifier is connected to the reference power source, an other input terminal thereof is connected to the first connector, and an output terminal thereof is connected to the control terminal of the switching element. One end of the switch is connected to the second connector, and an other end thereof is connected to the control terminal of the switching element. | 2012-02-02 |
| 20120025898 | Circuit Device - A circuit device includes an option pad, a first power source pad, and a first ground pad, wherein the option pad, the first power source pad, and the first ground pad are formed over various portions of a top surface of the circuit device, and a function of the circuit device is determined by coupling the option pad with one of the first power source pad and the first ground pad through a wire bond. | 2012-02-02 |
| 20120025899 | TUNABLE TRANSCONDUCTANCE-CAPACITANCE FILTER WITH COEFFICIENTS INDEPENDENT OF VARIATIONS IN PROCESS CORNER, TEMPERATURE, AND INPUT SUPPLY VOLTAGE - A transconductance-capacitance (G | 2012-02-02 |
| 20120025900 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF - A semiconductor device includes a first internal voltage driving unit configured to drive an internal voltage, a second internal voltage driving unit configured to drive the internal voltage in an operation period corresponding to an enable signal, a current amount detection unit configured to detect amount of current supplied by the first internal voltage driving unit, and a current amount comparison unit configured to compare the amount of detected current by the current amount detection unit with amount of a reference current, and determine whether or not to activate the enable signal in response to a comparison result. | 2012-02-02 |
| 20120025901 | SENSOR NODE VOLTAGE CLAMPING CIRCUIT AND METHOD - A voltage clamping circuit includes a current source having a fixed current source and a variable current source and a variable resistor receiving current from the current source. The variable resistor varies its resistance in response to an environmental operating condition. The voltage clamping circuit also includes an amplifier configured to compare a sensor node voltage with a reference voltage, the sensor node voltage being in communication with the voltage drop across the variable resistor. The amplifier is configured and connected to provide a control output to control the variable current source to modify current output from the variable current source to at least in part prevent the sensor node voltage from exceeding a reference voltage when certain operating conditions are present. | 2012-02-02 |
| 20120025902 | ELECTRONIC DEVICE WITH POWER SAVING FUNCTION AND OPERATING METHOD THEREOF - In an electronic device with power saving function, when the power saving function of the electronic device is active, the electronic device detects the distance between any object in a proximal area of the electronic device and the electronic device and stores the detected distance as an original distance, and then periodically detects the distance between the object and the electronic device, and stores the detected distance as a current distance. The electronic device is put into power saving mode if an difference between the original distance and the current distance does not fall into the predetermined range. | 2012-02-02 |
| 20120025903 | Sampling of Multiple Data Channels Using a Successive Approximation Register Converter - Provided is a method for performing analog to digital conversion of a plurality of analog signal channels. The method may comprise successively processing each analog signal channel of a plurality of analog signal channels. The processing of an analog signal channel of the plurality of analog signal channels may comprise: selecting the analog signal channel from the plurality of analog signal channels, generating an analog output signal corresponding to an analog input signal transmitted over the selected analog signal channel, and sampling the analog output signal using a successive approximation register (SAR) converter. Sampling the analog output signal using a SAR converter may comprise sampling the analog output signal a specific number of times to produce a respective plurality of digital samples corresponding to the selected analog input signal. | 2012-02-02 |
| 20120025904 | AREA-OPTIMIZED ANALOG FILTER WITH BANDWIDTH CONTROL BY A QUANTIZED SCALING FUNCTION - A programmable active frequency-selective circuit includes a first capacitor having a fixed value and a second capacitor having a value defined by a product of a parameter and a plurality of switchable capacitors, wherein the parameter is defined by a gain, a bandwidth mode, and a process resolution. The parameter may be stored in a form of a look-up table and enables a user or manufacturer to program the gain, select the bandwidth mode and tune the process. The frequency-selective circuit may include a differential input and a differential output having a first feedback path connected across a positive output terminal to a negative input terminal and a second feedback path connected across a negative output terminal and a positive input terminal. | 2012-02-02 |
| 20120025905 | Multiple circuit blocks with interblock control and power conservation - A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off. | 2012-02-02 |
| 20120025906 | Systems and Methods of RF Power Transmission, Modulation, and Amplification, Including Embodiments for Compensating for Waveform Distortion - Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion. | 2012-02-02 |
| 20120025907 | POWER AMPLIFIER - There is provided a power amplifier capable of supplying variable bias to an amplifier circuit by accurately transferring the envelope components of an input signal during the supply of active bias power to the amplifier circuit. The power amplifier includes: an envelope detector detecting an envelope of an input signal; a bias power generator including at least one P-type MOSFET and one N-type MOSFET connected to each other in an inverter manner between a driving power terminal supplying driving power having a preset voltage level and a reference bias power terminal supplying preset reference bias power to generate bias power varied according to detection results from the envelope detector; and an amplifier amplifying the input signal according to the bias power level from the bias power generator. | 2012-02-02 |
| 20120025908 | AUTOMATIC GAIN CONTROL - An automatic gain controller is disclosed. The AGC includes an input for monitoring a signal associated with an amplifier and a gain control circuit for controlling the gain of the amplifier in response to the monitored signal, wherein the gain control circuit is adapted to control the gain of the amplifier in accordance with a gain control function having continuously variable attack and release time constants, both of which depend on the amplitude of the monitored signal. | 2012-02-02 |
| 20120025909 | DISTORTION COMPENSATION APPARATUS AND APPARATUS AND METHOD FOR TRANSMITTING SIGNAL - A distortion compensation apparatus and an apparatus and method for transmitting a signal are provided. The distortion compensation apparatus can extract precise distortion information by adding an additional signal to an input signal during the compensation of distortion in a nonlinear apparatus, and can linearize the nonlinear properties of the nonlinear apparatus using the distortion information. The apparatus for transmitting a signal can output a signal linearized by the same method as that used by the distortion compensation apparatus. | 2012-02-02 |
| 20120025910 | Switching amplifier with enhanced supply rejection and related method - Disclosed is a switching amplifier having an enhanced supply rejection. The switching amplifier comprises a digital modulator that provides a modulated signal. The switching amplifier further comprises a closed-loop analog driver that is coupled to the digital modulator. As disclosed, the closed-loop analog driver is configured to re-modulate a modulation signal that corresponds to the modulated signal. An output stage of the switching amplifier is driven by the re-modulated signal, thereby providing enhanced supply rejection. In one embodiment, the modulated signal is produced by a digital pulse-width modulator (PWM) circuit of a Class-D amplifier, and has a pulse rate substantially less than a clock rate of the digital PWM circuit. In one embodiment, the switching amplifier is implemented as an audio amplifier in a mobile communication device such as a cellular telephone. | 2012-02-02 |
| 20120025911 | Low Noise Amplifier with Current Bleeding Branch - An LNA circuit for providing a wide range of gain while maintaining the output headroom. In a radio frequency (RF) receiver, the signal received by the receiver may be extremely small. For a transmitter in a short distance, the received signal may be relatively strong. A low power amplifier usually is used to amplify the input signal. The LNA has to be designed to accommodate a wide range of gain. A convention LNA circuit supporting a wide range of gain often suffers from reduced output headroom due to increased current through the load resistor. The present invention discloses the use of current bleeding branch to allow a portion of current to flow through the current bleeding branch and consequently reduces the current that would have flown through the load resistor. Consequently, the voltage across the load resistor may be maintained low to allow adequate output headroom. | 2012-02-02 |
| 20120025912 | DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit can reduce consumption current and the circuit size while improving a power supply rejection ratio. The differential amplifier circuit includes a power supply line and an input part that includes an input circuit and an active load. The input circuit includes two differential input elements, and the active load includes two transistors connected to the two differential input elements. The input part generates a differential signal in response to an input signal given to the two differential input elements. The differential amplifier circuit also includes an amplifying part for generating an output voltage generating signal by amplifying the differential signal. The differential amplifier circuit also includes an output part for generating an output voltage based on the output voltage generating signal and a power supply voltage. The differential amplifier circuit includes a noise permitting part located between control terminals of the two transistors and the power supply line. | 2012-02-02 |
| 20120025913 | Envelope amplifier - An envelope amplifier includes an amplifier unit, a comparator unit and an output unit. The amplifier unit is made up of a first output section that outputs a first current in response to an amplitude of an input envelope signal, and a second output section. The second output section outputs a second current of a current value proportionate to a current value of the first current. Absolute value of the current value of the second current is greater than that of a current value of the first current. Comparator unit compares the current value of the first current. The output unit sums a current via an inductor derived from a current sustained or broken in response to a compared result of the comparator unit to the second current to deliver the resulting sum current at an output end. The first current is configured to be terminated without being delivered to the output unit (FIG. | 2012-02-02 |
| 20120025914 | CMOS POWER AMPLIFIER - A CMOS power amplifier includes: a first MOS transistor connected between a first power terminal and a first output stage and having a gate connected to an input stage; a second MOS transistor connected between the first output stage and a ground and having a gate connected to the input stage; a switching circuit unit connecting or separating a feedback line between the input stage and the first output stage to select a linear amplifying operation or a non-linear amplifying operation; and a resistor formed at the feedback line between the input stage and the first output stage to determine a linear amplification gain when the feedback line is turned on. | 2012-02-02 |
| 20120025915 | DOHERTY AMPLIFIER - A Doherty amplifier includes: an input distributor; a coupler; a plurality of Doherty circuit connected between the input distributor and the coupler; wherein each of Doherty circuits has a carrier amplifier, a peaking amplifier, a distributor distributing a input signal to the carrier amplifier and the peaking amplifier, and a combiner that transforms an output impedance of the carrier amplifier and combines outputs of the carrier amplifier and the peaking amplifier. | 2012-02-02 |
| 20120025916 | DOHERTY AMPLIFIER - An amplifier includes a Doherty amplifier composed of a distributor distributing an input signal to two signals, a carrier amplifier that receives one of the two signals and has a first FET, a peaking amplifier that receives the other one of the two signals and has a second FET, and a combiner that transforms an output impedance of the carrier amplifier and combines outputs of the carrier amplifier and the peaking amplifier, and a voltage controller that changes at least one of a gate voltage and a drain voltage supplied to at least one of the first FET and the second FET in accordance with a frequency of the input signal when the frequency of the input signal varies. | 2012-02-02 |
| 20120025917 | Efficient amplification stage - This is disclosed an amplification stage including a first amplifier stage, a second amplifier stage, and a power supply unit, in which the output of the first stage provides the input to the second stage, and the power supply unit provides a power supply for both amplifier stages, wherein the voltage of the power supply is continuously varied in dependence of the amplitude of the signal being amplified. | 2012-02-02 |
| 20120025918 | APPARATUS AND METHOD FOR CALIBRATING TIMING MISMATCH OF EDGE ROTATOR OPERATING ON MULTIPLE PHASES OF OSCILLATOR - An exemplary calibration apparatus for calibrating timing mismatch of an edge rotator operating on multiple phases of an oscillator includes a capturing block arranged to capture phase error samples, and a calibrating block arranged to adjust timing of said edge rotator according to said phase error samples. An exemplary calibration method for calibrating timing mismatch of an edge rotator operating on multiple phases of an oscillator includes the following steps: capturing phase error samples, and adjusting timing of said edge rotator according to said phase error samples. | 2012-02-02 |
| 20120025919 | Synchronization of multiple high frequency switching power converters in an integrated circuit - A phase locked loop is used to synchronize the switching frequency of a high frequency switching power converter to a clock signal. A switching power converter integrated circuit is a tile-based power management unit and includes an oscillator and multiple tiles of switching power converters. The oscillator generates a clock signal having a clock frequency. A first switching power converter includes a switch and a phase locked loop and switches at a first frequency. The switch has a gate that receives a gate signal. The phase locked loop synchronizes the first frequency to a first integer multiple of the clock frequency. A second switching power converter switches at a second frequency that is a second integer multiple of the clock frequency. The first frequency is synchronized to a multiple of the clock frequency when a second edge of the gate signal coincides with a first edge of the clock signal. | 2012-02-02 |
| 20120025920 | Oscillator with Ohmically Adjustable Oscillation Frequency - An oscillator with adjustable oscillation frequency includes an active device showing a negative input resistance at a terminal, an oscillator circuit coupled to the terminal of the active device showing the negative input resistance, and an element with adjustable ohmic resistance by which the oscillation frequency of the oscillator is adjustable. | 2012-02-02 |
| 20120025921 | Low Noise VCO Circuit Having Low Noise Bias - A low noise VCO circuit for an LC VCO circuit comprising MOS varactors is disclosed. The LC VCO circuit usually comprises an LC tuning circuit coupled with a pair of cross-coupled transistors used as a negative impedance element. A pair of varactors is used to provide fine tuning by applying a control voltage to the varactor. Since the varactor is also coupled to the pair of cross-coupled transistor, the process variation and temperature change may affect the bias voltage coupled to the pair of varactors. Therefore, a bias circuit usually is used to alleviate the impact of process variation and temperature change associated with the pair of transistor. Nevertheless, the bias voltage typically is implemented by providing a current flowing through a resistor, wherein the current is generated by a current source. The noise associated with the current source will affect the performance of the VCO circuit. A low noise VCO circuit is disclosed which utilizes a low noise bias circuit. The low noise bias circuit comprises a current source, a load device and a voltage divider wherein the load device is coupled to the voltage divider in parallel. The load device may be implemented using a bipolar transistor or a diode-connected MOS device. | 2012-02-02 |
| 20120025922 | MICRO-ELECTRO-MECHANICAL-SYSTEM (MEMS) RESONATOR AND MANUFACTURING METHOD THEREOF - A micro-electro-mechanical-system resonator, includes: a substrate; a fixed electrode formed on the substrate; and a movable electrode, arranged facing the fixed electrode and driven by an electrostatic attracting force or an electrostatic repulsion force that acts on a gap between the fixed electrode and the movable electrode. An internal surface of a support beam of the movable electrode facing the fixed electrode has an inclined surface. | 2012-02-02 |
| 20120025923 | VIBRATOR ELEMENT, VIBRATOR, OSCILLATOR, AND ELECTRONIC DEVICE - A vibrator element includes: a base having a mounting surface; a vibrating arm which is extended from the base and has a first surface and a second surface that faces the first surface and is positioned on the mounting surface side, and which performs flexural vibration in a direction normal to the first and second surfaces; and a laminated structure which is provided on at least one of the first and second surfaces of the vibrating arm, and which includes at least a first electrode, a second electrode, and a piezoelectric layer disposed between the first and second electrodes, in which the vibrating arm is warped toward the mounting surface side. | 2012-02-02 |
| 20120025924 | PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME - Two transmission lines are formed adjacent to each other at spacing on an upper surface of a base insulating layer, and a ground conductor layer is formed on a lower surface of the base insulating layer. The ground conductor layer is arranged to be opposite to at least part of one transmission line and at least part of the other transmission line in a width direction of the two transmission lines. When a width of one transmission line, a width of the other transmission line, a spacing between the two transmission lines and a width of the ground conductor layer in an arbitrary cross section perpendicular to the two transmission lines are referred to as W | 2012-02-02 |
| 20120025925 | COMMON MODE NOISE SUPPRESSION CIRCUIT - A common mode noise suppression circuit applicable to differential signal transmission performs common mode noise suppression with respect to differential signals transmitted by a transmission line. An inductance-capacitance resonant structure is formed based on electromagnetic coupling combining a ground structure to suppress common mode noise of differential mode signals at broadband meanwhile keeping low loss of the differential mode signals at broadband via differential transmission lines. By this, the common mode noise suppression circuit performs broadband suppression with related to the common mode noise within frequency scope of several GHzs without affecting the differential mode signals and improves manufacturing process miniaturization to decrease cost. | 2012-02-02 |
| 20120025926 | MIXER AND FREQUENCY CONVERTING APPARATUS - A mixer includes an adder that inputs a first high-frequency signal and a second high-frequency signal for local use, adds the first high-frequency signal and the second high-frequency signal, and outputs as an addition signal; a magnetoresistive effect element that includes a fixed magnetic layer, a free magnetic layer, and a non-magnetic spacer layer disposed between the fixed magnetic layer and the free magnetic layer, and is operable when the addition signal has been inputted, to multiply the first high-frequency signal and the second high-frequency signal included in the addition signal using a magnetoresistive effect to generate a multiplication signal; a magnetic field applying unit applying a magnetic field to the free magnetic layer; and a first impedance converting unit that is passive, inputs the multiplication signal outputted from the magnetoresistive effect element, converts the multiplication signal to a lower impedance than an input impedance, and outputs the converted signal. | 2012-02-02 |
| 20120025927 | RF ISOLATION SWITCH CIRCUIT - In a first aspect, an RF switch includes a main transistor and a gate-to-source shorting circuit. When the RF switch is turned off, the gate-to-source shorting circuit is turned on to short the source and gate of the main transistor together, thereby preventing a Vgs from developing that would cause the main transistor to leak. When the RF switch is turned on, the gate-to-source shorting circuit is turned off to decouple the source from the gate. The gate is supplied with a digital logic high voltage to turn on the main transistor. In a second aspect, an RF switch includes a main transistor that has a bulk terminal. When the RF switch is turned off, the bulk is connected to ground through a high resistance. When the RF switch is turned on, the source and bulk are shorted together thereby reducing the threshold voltage of the main transistor. | 2012-02-02 |
| 20120025928 | COMPACT N-WAY COAXIAL-TO-WAVEGUIDE POWER COMBINER/DIVIDER - To transport electromagnetic energy at high power levels, a coaxial-to-waveguide power combiner/divider comprises a length of single-conductor closed waveguide terminated at one end by a conductive end plate. A plurality N of holes is formed in the end plate. A conductive matching plate is positioned within the waveguide opposite and spaced apart from the conductive end plate and spaced apart from the inner walls of the waveguide. A plurality of coaxial input/output ports each comprise an outer conductor that is electrically and mechanically terminated at the end plate about one hole and an inner conductor that extends through the associated hole into the waveguide and is electrically and mechanically terminated at the underside of the matching plate. The location and geometry of the matching plate and physical arrangement of the N ports are chosen so that the sum of the direct reflection and the N−1 coupled reflection contributions are small. | 2012-02-02 |
| 20120025929 | FILTER WITH IMPROVED IMPEDANCE MATCH TO A HYBRID COUPLER - The present invention concerns a bandstop filter for preventing signals of frequencies used for inter-device communications in a television signal distribution system from interfering with a signal source. The filter is designed to work with a signal splitter and reduce the negative impact on inter-device communication through the splitter caused by conventional bandstop filters. The filter adds a section to a bandstop filter to provide a resistive load and high output impedance at the port feeding the splitter largely through the action of a parallel resonant circuit. | 2012-02-02 |
| 20120025930 | PROGRAMMABLE ANTIFUSE MATRIX FOR MODULE DECOUPLING - An adapter couples a module to a circuit board. The adapter comprises a decoupling capacitor, which has a first capacitor plate and a second capacitor plate separated by an insulating dielectric, located within the adapter. A voltage pin and a ground pin within the adapter traverse through the decoupling capacitor in order to make voltage and ground connections between the module and the circuit board. A first fusible ring, which is adjacent to the first capacitor plate, encircles the voltage pin, and a second fusible ring, which is adjacent to the second capacitor plate, encircles the ground pin. When the first and second fusible rings are fused to their respective capacitor plates, the decoupling capacitor provides the module with decoupling capacitance protection from stray alternating current voltage, and also provides the module with power/ground sources to compensate for current/ground spikes. | 2012-02-02 |
| 20120025931 | BOUNDARY ACOUSTIC WAVE RESONATOR AND LADDER FILTER - In a boundary acoustic wave resonator, apodization weighting is performed on an IDT electrode so that an intersecting width decreases as a location moves outward in a boundary acoustic wave propagation direction. An inner side of a first busbar includes inclined portions that are disposed a predetermined distance from an envelope portion B | 2012-02-02 |
| 20120025932 | Integrated Lossy Low-Pass Filter - An apparatus for filtering a signal is disclosed. The apparatus includes a conductive line affixed to a surface of a substrate. For a signal received at an end of the conductive line, the apparatus is configured to filter at least a portion of the frequency components of the signal. First and second resistive films are adjacent to a respective side of the conductive line along a first side of each of the first and second resistive films, respectively. The first and second resistive films have a first resistivity. Third and fourth resistive films adjacent to a respective one of the first and second resistive films along a second side of each of the first and second resistive films. Each second side of the first and second resistive films extends beyond the third and fourth resistive films. The third and fourth resistive films have a second resistivity. | 2012-02-02 |
| 20120025933 | SWITCH AND ELECTRONIC DEVICE - A switch and an electronic device maintain a power supply ON state until data processing is completed, and automatically turn OFF the power supply after the data processing is completed. The switch includes a rotation operating body that does not receive an operation force from an operating element when OFF operated is arranged inside the operating element. The rotation operating body includes a switch operating portion for turning ON a power supply switch mechanism and a return spring regulating piece for biasing a return spring in an anti-biasing direction. A regulating state of the return spring regulated by the return spring regulating piece is held, where the ON state of the power supply switch mechanism is held with a permanent magnet, and the ON state of the power supply switch mechanism is released by applying a release force on the permanent magnet when the power supply is reset. | 2012-02-02 |
| 20120025934 | PRINTED CIRCUIT BOARD EMBEDDED RELAY - According to one exemplary embodiment, an electromechanical relay may be described. The relay can be constructed using printed circuit board (PCB) construction, and can have at least a pair of coils, for example one on the top of or above the PCB, the other on the bottom of or below the PCB, at least two ferromagnetic cores, one of which can be set at the center of each coil, at least a set of contacts which can be on the surface of the printed circuit board, a spacer which can be set between the coils, and a magnet which can be set within the spacer. | 2012-02-02 |
| 20120025935 | MAGNETIC SWITCH APPARATUS - A magnetic switch apparatus includes a button and a magnetic mechanism. The button is capable of moving between a first position and a second position. The magnetic mechanism is configured to drive the button to be kept in the first position, and drive the button to move from the second position to the first position. | 2012-02-02 |
| 20120025936 | ELECTRONIC PLUNGER SWITCH - A plunger switch for use as a switch element in an electrical circuit, has a housing and a plunger movable axially in a bore of the housing in the direction of a longitudinal axis and when in an operating position in which it is depressed toward the housing, acts on an electronic sensor unit situated in the housing, which in turn initiates a switching procedure in the electrical circuit by electrical pulses, and the plunger, in its axial plunging region into the bore of the housing, is peripherally provided with at least one lubricating groove, which permits a lubricating fluid to travel into the axial plunging region between the plunger and bore, and the electronic sensor unit is protected from a penetration of lubricating fluid. | 2012-02-02 |
| 20120025937 | PERMANENT MAGNET ARRANGEMENT FOR AN ELECTRICAL MACHINE - A permanent magnet arrangement for an electrical machine comprises a support structure for carrying magnetic flux and a pole assembly fixed to the support structure. The pole assembly comprises a magnet pole comprising at least one piece of permanent magnet material and a magnet carrier on which the magnet pole is mounted and which provides a magnetic flux path between the magnet pole and the support structure. The permanent magnet arrangement further comprises a sleeve containing the magnet pole and at least part of the magnet carrier. The magnet carrier is secured to the support structure to fix the pole assembly to the support structure and the sleeve is clamped to the support structure by the magnet carrier. A method for assembling the permanent magnet arrangement is also described. | 2012-02-02 |
