05th week of 2015 patent applcation highlights part 30 |
Patent application number | Title | Published |
20150029766 | ELECTROMAGNETIC COMPATIBILITY FILTER WITH AN INTEGRATED POWER LINE COMMUNICATION INTERFACE - An embodiment of the present invention is directed to an integrated electromagnetic compatibility (EMC) filter and power line communication (PLC) interface. The EMC filter and PLC interface comprises a first filter winding and a second filter winding configured as a common mode choke; and a two-part winding on the common mode choke, wherein the two-part winding comprises (i) a first winding coupled proximate the first filter winding and (ii) a second winding coupled proximate the second filter winding, wherein the first winding and the second winding have an equal number of turns, and wherein phasing of the first winding is reversed with respect to the second winding. | 2015-01-29 |
20150029767 | Power Controllers with Ultra-High-Voltage Startup - A power controller in a multi-chip module is disclosed. The power controller comprises a power controller die, an ultra-high voltage startup die, and a multi-chip module. The power controller die is operable to control a power switch when powered by an operation power source. The operation power source has a maximum voltage limit of tens volt. The ultra-high voltage startup die comprises an ultra-high voltage pad tolerable to receiving an input line voltage higher than one hundred volt. During a startup procedure the ultra-high voltage startup die charges the operation power source, and during a normal operation the ultra-high voltage startup die substantially performs an open-circuit. The multi-chip module packages both the power controller die and the ultra-high voltage startup die. | 2015-01-29 |
20150029768 | Non-isolated AC to DC power device - An AC to DC power supply is provided based on feedback control of an analog current blocking (ACB) device. The ACB element receives rectified high voltage AC. The output of the ACB element is provided to an integrating circuit that provides an output DC voltage. The output DC voltage depends on the average current passed by the ACB element. The average current passed by the ACB element depends on the current limit of the ACB element, which is under feedback control. | 2015-01-29 |
20150029769 | SYSTEMS, CIRCUITS, DEVICES, AND METHODS WITH BIDIRECTIONAL BIPOLAR TRANSISTORS - Methods, systems, circuits, and devices for power-packet-switching power converters using bidirectional bipolar transistors (BTRANs) for switching. Four-terminal three-layer BTRANs provide substantially identical operation in either direction with forward voltages of less than a diode drop. BTRANs are fully symmetric merged double-base bidirectional bipolar opposite-faced devices which operate under conditions of high non-equilibrium carrier concentration, and which can have surprising synergies when used as bidirectional switches for power-packet-switching power converters. BTRANs are driven into a state of high carrier concentration, making the on-state voltage drop very low. | 2015-01-29 |
20150029770 | Method and Apparatus for Automatically Equalizing Bus Bar Voltages of Power Factor Correction PFC Circuit - An automatic equalization method and apparatus for bus bar voltages of a Power Factor Correction (PFC) circuit. The method includes calculating a difference in voltages of a positive bus bar and a negative bus bar, and increasing the rotation speed of a fan in the PFC circuit according to the difference in voltages of the positive bus bar and the negative bus bar until the voltages of the positive and negative bus bars are equalized. The apparatus includes a voltage difference module configured to calculate a difference in voltages of a positive bus bar and a negative bus bar, and a rotation speed control module configured to increase a rotation speed of a fan in the PFC circuit according to the difference in voltages of the positive bus bar and the negative bus bar, until the voltages of the positive and negative bus bars are equalized. | 2015-01-29 |
20150029771 | RECTIFIER CIRCUIT WITH CURRENT INJECTION - The present invention relates to a rectifier circuit with a three-phase rectifier arrangement ( | 2015-01-29 |
20150029772 | POWER SUPPLY DEVICE AND METHOD OF OPERATING DEVICE - A power supply device of the invention includes a first switching leg including first and second switching elements between DC terminals; a second switching leg including third and fourth switching elements between the DC terminals; a first capacitor leg including first and second capacitors between the DC terminals; a second capacitor leg including third and fourth capacitors between AC terminals; a first inductor between a connection of the first and second switching elements and one of the AC terminals; a second inductor between a connection of the third and fourth switching elements and another of the AC terminals; a controller; an AC power supply connected to the AC terminals and the connection of the third and fourth capacitors; and a DC power supply between the DC terminals, wherein the controller charges the first and second capacitors to a voltage higher than a voltage crest of the AC power supply. | 2015-01-29 |
20150029773 | CONTEXT PROTECTION FOR A COLUMN INTERLEAVED MEMORY - A semiconductor memory cell includes a set of circuit structures, each having column input/output circuits. The semiconductor memory cell further includes a set of replicas corresponding to the column input/output circuits. The set of replicas are non-functional and fills an empty space next to the column input/output circuits and hence, provides context protection for the column input/output circuits. | 2015-01-29 |
20150029774 | STACKED DEVICE IDENTIFICATION ASSIGNMENT - Some embodiments include apparatus and methods having dice arranged in a stack. The dice include at least a first die and a second die, and a connection coupled to the dice. The connection may be configured to transfer control information to the first die during an assignment of a first identification to the first die and to transfer the control information from the first die to the second die during an assignment of a second identification to the second die. | 2015-01-29 |
20150029775 | MEMORY CELL ARRAY STRUCTURES AND METHODS OF FORMING THE SAME - The present disclosure includes memory cell array structures and methods of forming the same. One such array includes a stack structure comprising a memory cell between a first conductive material and a second conductive material. The memory cell can include a select element and a memory element. The array can also include an electrically inactive stack structure located at an edge of the stack structure. | 2015-01-29 |
20150029776 | SEMICONDUCTOR DEVICE HAVING A REDUCED AREA AND ENHANCED YIELD - A device includes a first power supply line supplying a first voltage, first, second, and third nodes, a selection circuit connected between the first power supply line and the first node, a first anti-fuse connected between the first node and the second node, and a second anti-fuse connected between the first node and the third node. The second node and the third node are not connected to each other. | 2015-01-29 |
20150029777 | Circuit and System of Using Junction Diode of MOS as Program Selector for Programmable Resistive Devices - A programmable resistive device cell using at least one MOS device as selector can be programmed or read by turning on a source junction diode of the MOS or a channel of the MOS. A programmable resistive device cell can include at least one programmable resistive element and at least one MOS device. The programmable resistive element can be coupled to a first supply voltage line. The MOS can have a source coupled to the programmable resistive element, a bulk coupled to a drain, a drain coupled to a second supply voltage line, and a gate coupled to a third supply voltage line. The programmable resistive element can be configured to be programmable or readable by applying voltages to the first, second, and/or third supply voltage lines to turn on the source junction of the MOS and/or to turn on the channel of the MOS. | 2015-01-29 |
20150029778 | MASK-PROGRAMMED READ ONLY MEMORY WITH ENHANCED SECURITY - A mask-programmed read-only memory (MROM) has a plurality of column line pairs, each having a bit line and a complement bit line. The MROM includes a plurality of memory cells corresponding to a plurality of intersections between the column line pairs and a plurality of word liens. Each memory cell includes a high Vt transistor and a low Vt transistor. | 2015-01-29 |
20150029779 | ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME - This technology provides an electronic device and a method of fabricating the same. An electronic device in accordance with an implementation of this document includes semiconductor memory, and the semiconductor memory includes a lower electrode, a variable resistance element over the lower electrode, an upper electrode disposed over the variable resistance element and including metal, and a metal compound layer configured to surround a side of the upper electrode. The metal compound layer includes a compound of the metal of the upper electrode. | 2015-01-29 |
20150029780 | TWO-TERMINAL REVERSIBLY SWITCHABLE MEMORY DEVICE - A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion. | 2015-01-29 |
20150029781 | METHOD AND APPARATUS FOR SENSING IN A MEMORY - A method and a memory for sensing a state of a memory cell while the memory cell capacitor is isolated from a data line are described. An activation device of the memory cell can be enabled to couple the memory cell capacitor to a parasitic capacitance of the active data line for charge sharing. The activation device can then be disabled to isolate the memory cell capacitor from the active data line. The state of the memory cell can then be sensed while the memory cell capacitor is isolated from the active data line. After the sense operation, the activation device can be re-enabled in order to restore the data to the memory cell capacitor that was destroyed during the sense operation. | 2015-01-29 |
20150029782 | WIDE RANGE MULTIPORT BITCELL - A multiport bitcell including a pair of cross-coupled inverters is provided with increased write speed and enhanced operating voltage range by the selective isolation of a first one of the cross-coupled inverters from a power supply and ground during a write operation. The write operation occurs through a write port that includes a transmission gate configured to couple a first node driven by the first cross-coupled inverter to a write bit line. A remaining second cross-coupled inverter in the bitcell is configured to drive a second node that couples to a plurality of read ports. | 2015-01-29 |
20150029783 | METHOD OF DETECTING TRANSISTORS MISMATCH IN A SRAM CELL - The present invention provides a method of detecting the transistor mismatch in a SRAM cell. The SRAM cell comprises two pass-gate transistors and a bi-stable circuit including two pull up transistors and two pull down transistors. The method comprises: providing two measuring transistors, whose gates are connected to a second word line, sources are connected to the outputs of the bi-stable circuit respectively and drains are connected to two measuring terminals respectively; turning on the measuring transistors and turning off the pass-gate transistors; detecting the voltage-current curve of the two pull down transistors and the two pull up transistors through the measuring transistors at the measuring terminals so as to detect the transistor mismatch in the SRAM cell. | 2015-01-29 |
20150029784 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - There is provided a semiconductor integrated circuit device that can generate a unique ID with the suppression of overhead. When a unique ID is generated, the potential of a word line of a memory cell in an SRAM is raised above the power supply voltage of the SRAM, and then lowered below the power supply voltage of the SRAM. When the potential of the word line is above the power supply voltage of the SRAM, the same data is supplied to both the bit lines of the memory cell. Thereby, the memory cell in the SRAM is put into an undefined state and then changed so as to hold data according to characteristics of elements or the like configuring the memory cell. In the manufacture of the SRAM, there occur variations in characteristics of elements or the like configuring the memory cell. Accordingly, the memory cell in the SRAM holds data according to variations occurring in the manufacture. | 2015-01-29 |
20150029785 | METHODS FOR OPERATING A FINFET SRAM ARRAY - A method of operating an SRAM array may include: providing a plurality of bit cells, each of the plurality of bit cells comprising a cross coupled inverter pair; a first pass gate; and a second pass gate. A word line voltage may be applied to the first pass gate and the second pass gate, while a first cell positive voltage supply CVdd may be applied to terminals of the cross coupled inverter pair. The first cell positive voltage supply CVdd may be varied relative to the word line voltage during a selected operation of the plurality of bit cells | 2015-01-29 |
20150029786 | SELF-REFERENCED SENSE AMPLIFIER FOR SPIN TORQUE MRAM - Circuitry and a method provide a plurality of timed control and bias voltages to sense amplifiers and write drivers of a spin-torque magnetoresistive random access memory array for improved power supply noise rejection, increased sensing speed with immunity for bank-to-bank noise coupling, and reduced leakage from off word line select devices in an active column. | 2015-01-29 |
20150029787 | Non-Volatile Resistance-Switching Thin Film Devices - Disclosed herein are resistive switching devices having, e.g., an amorphous layer comprised of an insulating aluminum-based or silicon-based material and a conducting material. The amorphous layer may be disposed between two or more electrodes and be capable of switching between at least two resistance states. Circuits and memory devices including resistive switching devices are also disclosed, and a composition of matter involving an insulating aluminum-based or an silicon-based material and a conducting material. Also disclosed herein are methods for switching the resistance of an amorphous material. | 2015-01-29 |
20150029788 | METHODS OF PROGRAMMING MEMORY DEVICES - Methods of programming memory devices include biasing each data line of a plurality of data lines to a program inhibit voltage; discharging a first portion of data lines of the plurality of data lines, wherein the first portion of data lines of the plurality of data lines are coupled to memory cells selected for programming; and applying a plurality of programming pulses to the memory cells selected for programming while biasing a remaining portion of data lines of the plurality of data lines to the program inhibit voltage. | 2015-01-29 |
20150029789 | NONVOLATILE MEMORY DEVICE INCLUDING MEMORY CELL ARRAY WITH UPPER AND LOWER WORD LINE GROUPS - A nonvolatile memory device includes a memory cell array having multiple memory blocks. Each memory block includes memory cells arranged at intersections of multiple word lines and multiple bit lines. At least one word line of the multiple word lines is included in an upper word line group and at least one other word line of the multiple word lines is included in a lower word line group. The number of data bits stored in memory cells connected to the at least one word line included in the upper word line group is different from the number of data bits stored in memory cells connected to the at least one other word line included in the lower word line group. | 2015-01-29 |
20150029790 | NONVOLATILE MEMORY AND ERASING METHOD THEREOF - An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block. | 2015-01-29 |
20150029791 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A control circuit is configured to execute an erasing operation on a selected cell unit in a selected memory block. In the erasing operation, the control circuit raises the voltage of the bodies of the first memory transistors included in the selected cell unit to a first voltage, sets the voltage of the bodies of the first memory transistors included in the non-selected cell unit to a second voltage lower than the first voltage, and applies a third voltage equal to or lower than the second voltage to the gates of the first memory transistors included in the selected cell unit and the non-selected cell unit. | 2015-01-29 |
20150029792 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device and a method of operating the same are provided. When threshold voltages of memory cells are boosted to use the memory cells as a selection transistor, a threshold voltage of an outermost memory cell may be boosted to the highest level so that a leakage current can be reduced and a channel boosting level can be increased to reduce the influence of program disturbance. | 2015-01-29 |
20150029793 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device including: a memory cell array including NAND strings; a plurality of word lines; a plurality of bit lines; a source line; and a control circuit configured to execute a write operation. The control circuit is configured to, when charging an unselected memory string prior to the write operation, execute both first and second charging operations, the first charging operation applying to the bit line connected to the unselected memory string a first voltage and rendering conductive a first select transistor to charge the unselected memory string, and the second charging operation applying to the source line connected to the unselected memory string a second voltage and rendering conductive a second select transistor to charge the unselected memory string, the first and second charging operations being executed at different timings. | 2015-01-29 |
20150029794 | DIFFERENTIAL CURRENT SENSING SCHEME FOR MAGNETIC RANDOM ACCESS MEMORY - A circuit for a differential current sensing scheme includes first and second cell segments, first and second reference cells, and first and second current sense amplifiers. The first and second reference cells are configured to store opposite logic values. The first and second current sense amplifiers are each configured with a first node and a second node for currents therethrough to be compared with each other. A cell of the first cell segment and a cell of the second cell segment are coupled to the first nodes of the first and second current sense amplifiers, respectively, and the first and second reference cells are coupled to both the second nodes of the first and second current sense amplifiers. | 2015-01-29 |
20150029795 | SELECTIVE DUAL CYCLE WRITE OPERATION FOR A SELF-TIMED MEMORY - A write is performed to a first cell of a memory at a first row and column during a first memory access cycle. A memory access operation is made to a second cell at a second row and column during an immediately following second memory access cycle. If the memory access is a read from the second cell and the second row is the same as the first row, or if the memory access is a write to the second cell and the second row is the same as the first row and the second column is different than the first column, then a simultaneous operation is performed during the second memory access cycle. The simultaneous operation is an access of the second cell (for read or write) and a re-write of data from the first memory access cycle write operation back to the first cell. | 2015-01-29 |
20150029796 | MEMORY DEVICE, MEMORY SYSTEM, AND METHOD OF CONTROLLING READ VOLTAGE OF THE MEMORY DEVICE - A memory device includes a memory cell array having a plurality of memory cells, and a page buffer unit including a plurality of page buffers configured to store a plurality of pieces of data sequentially read from some of the plurality of memory cells at different read voltage levels, respectively, and to perform a logic operation on the plurality of pieces of data, respectively. The memory device further includes a counting unit configured to count the number of memory cells that exist in each of a plurality of sections defined by the different read voltage levels, based on results of the logic operation | 2015-01-29 |
20150029797 | MEMORY MACRO WITH A VOLTAGE KEEPER - A memory macro comprises a data line, a first interface circuit comprising a first node coupled to the data line, and a voltage keeper configured to control a voltage level at the first node, and a second interface circuit comprising a second node coupled with the data line, wherein the voltage keeper is configured to control a voltage level at the second node via the data line. | 2015-01-29 |
20150029798 | APPARATUSES AND METHODS FOR PERFORMING COMPARE OPERATIONS USING SENSING CIRCUITRY - The present disclosure includes apparatuses and methods related to performing compare and/or report operations using sensing circuitry. An example method can include charging an input/output (IO) line of a memory array to a voltage. The method can include determining whether data stored in the memory array matches a compare value. The determination of whether data stored matches a compare value can include activating a number of access lines of the memory array. The determination can include sensing a number of memory cells coupled to the number of access lines. The determination can include sensing whether the voltage of the IO line changes in response to activation of selected decode lines corresponding to the number of memory cells. | 2015-01-29 |
20150029799 | CANARY CIRCUIT WITH PASSGATE TRANSISTOR VARIATION - A canary circuit with passgate transistor variation is described herein. The canary circuit includes a memory canary circuit that has a plurality of bitcells. Each bitcell has at least a passgate transistor that is driven by a wordline voltage. The canary circuit further includes a regulator circuit that outputs a wordline voltage that accounts for a predetermined offset of a threshold voltage of the passgate transistor. In an embodiment, the regulator circuit is a subtractor circuit that generates the wordline voltage from a reference voltage based in part on the threshold voltage variation of the passgate transistor. | 2015-01-29 |
20150029800 | SEMICONDUCTOR DEVICE - An interface circuit provided in a semiconductor device supplies an operation clock to an external memory device based on a clock signal and receives a data signal and a strobe signal from the external memory device. The interface circuit includes a delay circuit delaying the received strobe signal. The delay circuit includes a first adjustment circuit and a second adjustment circuit connected in series with the first adjustment circuit. The first adjustment circuit is capable of adjusting a delay amount of the strobe signal in a plurality of steps in accordance with the set frequency of the clock signal. The second adjustment circuit is capable of adjusting the delay amount of the strobe signal with a higher precision than the first adjustment circuit. | 2015-01-29 |
20150029801 | DEVICE AND METHOD FOR MEMORY REPAIR USING TEST LOGIC - A device for repairing a memory device using a test-bypass register associated with the memory device may include a comparator configured to compare a current address of the memory device with a faulty address and to generate a match signal when the current address matches the faulty address. A logic block may be coupled to the comparator and configured to generate one or more output signals in response to the match signal. The faulty address may be associated with a non-operational cell of the memory device. The one or more output signals may be coupled to one or more memory-bypass inputs of the test-bypass register. The one or more output signals may be configured to enable use of the test-bypass register instead of the non-operational cell of the memory device. | 2015-01-29 |
20150029802 | APPARATUSES, INTEGRATED CIRCUITS, AND METHODS FOR MEASURING LEAKAGE CURRENT - Methods, apparatuses, and integrated circuits for measuring leakage current are disclosed. In one such example method, a word line is charged to a first voltage, and a measurement node is charged to a second voltage, the second voltage being less than the first voltage. The measurement node is proportionally coupled to the word line. A voltage on the measurement node is compared with a reference voltage. A signal is generated, the signal being indicative of the comparison. Whether a leakage current of the word line is acceptable or not can be determined based on the signal. | 2015-01-29 |
20150029803 | Single-Ended Low-Swing Power-Savings Mechanism with Process Compensation - A single-ended low-swing power-savings mechanism is provided. The mechanism comprises a precharge device that turns off in an evaluation phase and a first biasing device is always on. Within the mechanism, a strength of a keeper device is changed to a first level in response to an input of the second biasing device being at a first voltage level. Within the mechanism the strength of the keeper device is changed to a second level in response to the input of the second biasing device being at a second voltage level. Responsive to receiving a (precharged voltage level read data line signal, a precharged voltage level of the first node falls faster when the keeper device is weakened to a first level. The keeper device turns on in response to receiving a LOW signal and pulls up the voltage at the first node so that a HIGH signal is output. | 2015-01-29 |
20150029804 | APPARATUSES AND METHODS FOR ADJUSTING DEACTIVATION VOLTAGES - Apparatuses and methods for adjusting deactivation voltages are described herein. An example apparatus may include a voltage control circuit. The voltage control circuit may be configured to receive an address and to adjust a deactivation voltage of an access line associated with a target group of memory cells from a first voltage to a second voltage based, at least in part, on the address. In some examples, the first voltage may be lower than the second voltage. | 2015-01-29 |
20150029805 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a plurality of first regions formed in a line-type and extending in a first direction, and a plurality of second regions and a plurality of third regions arranged between adjacent first regions in a zigzag manner. | 2015-01-29 |
20150029806 | VOLTAGE CONTROL INTEGRATED CIRCUIT DEVICES - Voltage control in integrated circuits include a first voltage divider coupled to receive a reference voltage and having an output providing an adjusted reference voltage; an operational amplifier having a first input coupled to receive the output of the first voltage divider, a second input coupled to receive a feedback voltage, and an output; a voltage generation circuit responsive to the output of the operational amplifier and having an output providing an output voltage; and a second voltage divider coupled to receive the output voltage and having an output providing the feedback voltage. The first voltage divider is responsive to first control signals to adjust a voltage level of the adjusted reference voltage. The second voltage divider is responsive to second control signals to adjust a voltage level of the feedback voltage. | 2015-01-29 |
20150029807 | MEMORY DEVICE AND METHOD FOR PUTTING A MEMORY CELL INTO A STATE WITH A REDUCED LEAKAGE CURRENT CONSUMPTION - In various embodiments, a memory device includes at least one memory cell and at least one virtual supply line coupled to the at least one memory cell. The memory device is designed in such a way that a voltage potential present on the virtual supply line is altered after an active access to the memory cell by virtue of a charge stored within the memory device during the active access being re-stored in such a way that a state of the memory cell with a reduced leakage current consumption is achieved. | 2015-01-29 |
20150029808 | POWER FAIL PROTECTION AND RECOVERY USING LOW POWER STATES IN A DATA STORAGE DEVICE/SYSTEM - Systems and methods for early warnings of power loss in solid state storage drives are disclosed. Early warnings of power loss can be used to power the drive to force the drive into a low power states before the energy in backup power sources, such as backup capacitors, is used. The low power states can allow for the reduction of power use by the drive which can provide cost savings and reduction in the risk that the drive will be rendered reconfigurable by a power failure event. | 2015-01-29 |
20150029809 | METHOD AND APPARATUS FOR MAKING ASPHALT CONCRETE USING AGGREGATE MATERIAL FROM A PLURALITY OF MATERIAL STREAMS - A combination of components is provided for use in making asphalt concrete from a plurality of aggregate material streams. The combination includes an indirect dryer for heating aggregate material from a first material stream without directly exposing said first stream material to hot gases of combustion. The combination also includes a mixer for mixing aggregate material from the first material stream, aggregate material that has not been heated in the indirect dryer from a second material stream, and a binder component to produce asphalt concrete. | 2015-01-29 |
20150029810 | TIPPING EQUIPMENT FOR QUICKLY MIXING AND UNLOADING CONCRETE - Truck-mounted tipping equipment for mixing and discharging concrete quickly includes an open tipping bucket shaped as a rectangular prism in the front and a semi-truncated cone in the rear that narrows towards a hydraulic discharge trap-door. The mixing and discharge mechanism has a spindle in an oblique position, to which helical fins have been welded serving as an endless screw. The diameter of these fins varies with the helix having a larger radius in the front (nearest to truck's cabin), and a reduced diameter rear part. The spindle keeps the concrete in continuous movement during transportation to prevent it from setting, and continuously moves the concrete towards the rear hydraulic trap-door. The trap-door remains closed until the concrete needs to be discharged. Once the majority of the total load is extracted, the tank is tipped to the rear to discharge the remaining concrete. | 2015-01-29 |
20150029811 | MIXING BLADE - A mixing blade is formed into a spiral shape by disposing blade plates, which are twisted in a predetermined manner in a circumferential direction of the blade, adjacent to each other in the circumferential direction along an inner wall surface of a mixer drum. Each of the blade plates includes a rib extended in the circumferential direction of the blade. | 2015-01-29 |
20150029812 | SCREW PAIR AND CO-ROTATING INTERMESHING TWIN-SCREW EXTRUDER PROVIDED WITH SCREW PAIR - A screw pair includes first and second screws having an outer circumferential surface on which a groove is spirally formed, and transports a raw material in a first direction along each of axis centers. An inner surface of the groove of each of the screws includes a first surface, which faces in the first direction, and in which the outer circumferential surfaces of the screws are formed to coincide with each other without a gap therebetween in the state where the screws mesh with each other, and a second surface, which faces in a second direction opposite to the first direction, and which forms a gap between the outer circumferential surfaces of the screws in the state where the screws mesh with each other. | 2015-01-29 |
20150029813 | Colour Strength Measurement and its Use in Production Processes - A method is provided for testing a diffusely reflective liquid for colour strength, said liquid comprising particles in a carrier medium, e.g. white emulsion paint based on titanium dioxide. The method comprises measuring in situ a lightness parameter of the liquid, of the carrier medium and of the liquid diluted with amounts of carrier medium; and determining from said measurements a dilution parameter indicating the amount of carrier medium needed to produce a predetermined reduction in the lightness parameter of the liquid, said dilution parameter providing an indication of colour strength. The lightness parameter may be L* in the CIE L*, a*, b* colour space, and the test may be carried out using a diffuse reflection probe ( | 2015-01-29 |
20150029814 | RESIN DISCHARGE MECHANISM - To suppress the thermal expansion of a slide bar and to prevent occurrence of failures such as galling or malfunctioning to the slide bar, a resin discharge mechanism, provided in mixing equipment that includes a barrel having a hollow interior and a pair of mixing rotors accommodated in the barrel and that mixes a resin material by causing the paired mixing rotors to rotate within the barrel, for discharging a part of the resin material mixed by the mixing rotors to an outside of the barrel, the resin discharge mechanism including: a resin discharge passage provided in the barrel, and communicating an inside of the barrel with the outside of the barrel; a slide bar closing or opening the resin discharge passage by moving across the resin discharge passage; and a cooling device provided within the slide bar, and cooling the slide bar using a cooling fluid. | 2015-01-29 |
20150029815 | MIXING SYSTEM - The present invention relates to a mixing system comprising a vessel ( | 2015-01-29 |
20150029816 | DRUG RECONSTITUTION SYSTEM - A drug reconstitution device comprising a disposable liquid transfer unit ( | 2015-01-29 |
20150029817 | DEVICE FOR PREPARING A SOLUTION, IN PARTICULAR IN OR ON A DIALYSIS MACHINE - Devices for preparing a liquid solution are disclosed. The device includes a receptacle defining a cavity for receiving at least one active substance to be dissolved, at least one inlet leading into the cavity for feeding at least one solvent into the cavity, and at least one outlet leading out of the cavity for discharging the liquid solution including the at least one active substance and the at least one solvent from the cavity. The cavity or the receptacle may include a flexible outer shell for enclosing the cavity and an inner, preferably columnar, supporting element for stretching the flexible outer shell between at least two points, the supporting element comprising the at least one inlet at its first end and the at least one outlet at its second end and being enclosed by the flexible outer shell to provide an axially rigid cartridge that can be used in currently customary dialysis machines comprising cartridge connection systems, which can be produced at low cost. | 2015-01-29 |
20150029818 | ULTRASONIC MEASUREMENT APPARATUS, ULTRASONIC HEAD UNIT, ULTRASONIC PROBE, AND ULTRASONIC IMAGING APPARATUS - An ultrasonic measuring apparatus includes an ultrasonic transducer device having a substrate and an ultrasonic transducer element array that has a first channel group and a second channel group that are arranged on the substrate, a first integrated circuit apparatus that is mounted on the substrate, at one edge portion of the ultrasonic transducer element array in a first direction, such that a long-side direction coincides with a second direction that intersects the first direction, and performs at least one of signal transmission to the first channel group and signal reception from the first channel group, and a second integrated circuit apparatus that is mounted on the substrate, at the other edge portion of the ultrasonic transducer element array in the first direction, such that the long-side direction coincides with the second direction, and performs at least one of signal transmission to the second channel group and signal reception from the second channel group. In the ultrasonic transducer element array, the first group of channels and the second group of channels are arranged alternately every channel in the second direction. | 2015-01-29 |
20150029819 | SURFACE AND SUBSURFACE DETECTION SENSOR - A sensor can include a plurality of imaging components configured to perform (1) subsurface imaging by acoustical excitation and optical detection, and (2) interferometric surface topographic measurement. | 2015-01-29 |
20150029820 | Method for Visualizing Multi-Component Seismic Data Including Rotational Data - The present invention provides visualization of a seismic wavefield as measured by various multi-component sensors, including, but not limited to, pressure, 3-component vector spatial pressure gradients, 3-component linear motion, and 3-component rotational motion. The visualization of the present invention employs combinations of dynamic displacement; dynamic rotation; dynamic dilation and compression; and dynamic color and transparency variations to display various measurements of a seismic wavefield. The visualization of the present invention may be applied to various seismic data sets, including, but not limited to, pre-stack data sets; post-migration data volumes; micro-seismic passive or active source monitoring; and vertical seismic profiles. | 2015-01-29 |
20150029821 | ULTRASONIC OBSERVATION APPARATUS, OPERATION METHOD OF THE SAME, AND COMPUTER READABLE RECORDING MEDIUM - An ultrasonic observation apparatus includes: a first conversion unit that converts an ultrasonic signal as a time domain signal reflected from a specimen into a frequency domain signal; a regression analysis unit that calculates a regression expression for the frequency domain signal; an attenuation correction coefficient calculation unit that calculates an attenuation correction coefficient which is obtained by dividing a difference between first-order coefficients in the regression expressions at two points having different reception depths by a difference between the reception depths at the two points; an attenuation correction processing unit that performs attenuation correction processing on the frequency domain signal based on the attenuation correction coefficient; a second conversion unit that converts the frequency domain signal after the attenuation correction processing, into a second time domain signal; and an image data generation unit that generates ultrasonic image data based on the second time domain signal. | 2015-01-29 |
20150029822 | Method and Apparatus for Enhanced Monitoring of Induced Seismicity and Vibration Using Linear Low Frequency and Rotational Sensors - The present invention provides a method and apparatus for enhanced monitoring of induced seismicity and industrial vibration to comprehensively measure all aspects of potentially damaging motion. The invention utilizes various combinations of multi-component low frequency linear seismic sensors and multi-component rotational seismic sensors. Sensors are jointly deployed in arrays on the free surface of the earth, and/or in arrays of shallow monitoring holes, which may be intended to be permanent deployments. The method has a wide range of risk/damage monitoring applications for industrial activity, and in oil and gas exploration and production for seismic surveys, hydraulic fracturing, and waste injection wells. This abstract is not intended to be used to interpret or limit the claims of this invention. | 2015-01-29 |
20150029823 | Systems and Methods for Identifying Sanding in Production Wells Using Time-Lapse Sonic Data - Systems and methods for identifying sanding in production wells using time-lapse sonic data. Formation anisotropy can be characterized in terms of shear moduli in a vertical wellbore, e.g., vertical shear moduli C | 2015-01-29 |
20150029824 | Fish Tracker - An integrated fish detection module/navigation module system that may provide the location of fish over a distance or time is provided herein. The location of fish can be presented on a navigation module display to provide information regarding the location of fish relative to navigational data known to the navigation module. The information may create a record of fish location over time and distance. In some configurations, the navigational data and fish detection module data of more than one watercraft may be combined and distributed. In some configurations, a marker may be automatically placed on a navigation module to indicate that fish have been detected at the location on the navigation module. | 2015-01-29 |
20150029825 | SYSTEM FOR ULTRASOUND LOCALIZATION OF A TOOL IN A WORKSPACE, CORRESPONDING METHOD AND PROGRAM PRODUCT - A method for locating a tool in a work space via ultrasound includes associating an ultrasound transmitter to a tool and calculating a position of the tool on the basis of determination of the position of the transmitter. At least three ultrasound receivers for receiving ultrasound signals from the transmitter are set in positions relative to the work space. A calculation of a position of the transmitter includes using a trilateration procedure that includes a change of reference of the positions of the receivers and is carried out to reference them in a second simplified reference system. An unknown point in the second simplified reference system is obtained. A rototranslation of the position of the unknown point obtained from the second simplified reference system is carried out into a first reference system, and a corresponding rototranslation matrix is calculated such that the unknown point is used as position of the transmitter. | 2015-01-29 |
20150029826 | Obscured Message Display for Watches - A system for communicating between one digital device and another digital device, such a watch, is disclosed. The user of the system is provided a number of manners in which messages from the first device are to be received, at least some of which are obvious only to the user, hiding the content of such messages from other persons near the intended recipient. | 2015-01-29 |
20150029827 | ESCAPEMENT, TIMEPIECE MOVEMENT AND TIMEPIECE - An object is to provide an escapement which can improve energy transmission efficiency, a timepiece movement including the escapement, and a timepiece including the timepiece movement. There is provided an escapement | 2015-01-29 |
20150029828 | SILICON OVERCOIL BALANCE SPRING - A method of producing unitary formed silicon balance spring having an overcoil portion for regulation of a mechanical timepiece, said method including the steps of providing a silicon balance spring having a main body portion, and an outer portion for formation as an overcoil portion, wherein the outer portion extends radially outward from an outermost turn of the main body portion, and wherein said main body portion and said outer portion are integrally formed from a silicon based material and are formed in a co-planar configuration; moving said outer portion in a direction relative to and out of the plane of said main body portion, and in a direction towards over said main body portion and towards the plane of the main body portion; and providing a stress relaxation process to the balance spring so as to relieve internal stresses induced within the balance spring from step (ii); wherein upon movement of said outer portion into the plane of said main body portion, the outer portion is located in an overcoil configuration relative to said main body portion. | 2015-01-29 |
20150029829 | Timepiece Comprising An Analog Display and a Digital Display - The present invention relates to a watch, comprising: a frame ( | 2015-01-29 |
20150029830 | MAGNETIC RECORDING MEDIUM AND MAGNETIC STORAGE APPARATUS - A magnetic recording medium includes a substrate, a magnetic layer including an alloy having an L1 | 2015-01-29 |
20150029831 | LTE-Advanced Transmit Diversity Decoders - Various embodiments of a transmit diversity decoding techniques are provided. In one aspect, a method receives a first input that includes signals transmitted by M transmit antennas on C channels and received by N receive antennas, where M, N and C is each a positive integer greater than 1. The method also receives a second input that includes estimates of channel matrix elements. The method further generates an output that includes at least an estimate of a transmit signal transmitted by one of the M transmit antennas on one of the C channels based at least in part on the first and the second inputs. | 2015-01-29 |
20150029832 | TIME DOMAIN SYMBOLS ENCODER AND DECODER - A multidimensional symbol encoder is coupled to a transmitter. Multidimensional symbols are encoded by concatenating two or more partial symbols, wherein individual intervals of up and down sections of the two or more partial symbols are independently controlled as to duration. A multidimensional symbol decoder is coupled to a receiver. Multidimensional symbols are decoded by measuring duration of individual intervals i) that are independently controlled as to duration and ii) that are up and down sections of two or more concatenated partial symbols. | 2015-01-29 |
20150029833 | Methods, Systems, and Computer Program Products for Enabling an Operative Coupling to a Network - Methods and systems are described for enabling an operative coupling to a network. In an aspect, first data is detected for forwarding between a first node in a first network and another node by a network relay including a first network interface hardware component operatively coupled to a first network. A determination is made that a second operative coupling to a second network of a second network interface hardware component in the network relay is disabled. The second network interface hardware component is configured to enabled the second operative coupling, in response to the determination. Data received for forwarding between the first network and the second network is forwarded via the enabled second operative coupling. | 2015-01-29 |
20150029834 | TRANSMISSION PATH SWITCHING - According to an example, a virtual next-hop is created and a destination identity corresponding to each virtual next-hop is stored. Each virtual next-hop comprises one best next-hop and one second-best next-hop, and a next-hop of the best path of the destination identity corresponding to a virtual next-hop is the best next-hop of the virtual next-hop, and a next-hop of the second-best path of the destination identity corresponding to the virtual next-hop is the second-best next-hop of the virtual next-hop. Path forwarding may be performed using the best next-hop of each virtual next-hop. If the best next-hop of a virtual next-hop is determined to be failed, path forwarding may be performed using the second-best next-hop of the virtual next-hop. | 2015-01-29 |
20150029835 | METHOD, DEVICE AND SYSTEM FOR PROCESSING RADIO LINK FAILURE REPORT AND FOR STATISTICALLY PROCESSING ABNORMAL EVENT - A device and a system for processing a radio link failure report and for statistically processing an abnormal event include: a user equipment generates a radio link failure report, wherein the radio link failure report carries an A2 event indication recorded by the user equipment; and reports the radio link failure report. | 2015-01-29 |
20150029836 | Apparatus and Methods for Transmission of Emergency Call Data Over Wireless Networks - Methods and apparatus for providing useful data in association with a high-priority call such as an emergency call. In one embodiment, the data comprises a data (e.g., an MSD or FSD) embedded within one or more real-time protocol packets such as RTP Control Protocol (RTCP) packets, that are interspersed within the voice or user data stream (carried in e.g., RTP packets) of an emergency call. Apparatus and methods are described for transmitting the data portion reliably from the initiating terminal (e.g., an in-vehicle system) to a Public Safety Answering Point (PSAP), by using the same transport connection as the user data. | 2015-01-29 |
20150029837 | Protection Switched Source Routing - A network element configured to operate in a source routing network, wherein the network element comprises a receiver, a transmitter, and a processor coupled to the receiver and the transmitter. The processor may be configured to cause the network element to receive from an upstream network element, a liveness protection probe comprising a header that comprises a list of one or more ordered connection identifiers that indicate a network path traversing the source routing network through which the liveness protection probe should be forwarded, transmit the liveness protection probe toward a downstream network element according to the connection identifiers, receive the liveness protection probe from the downstream network element, and transmit the liveness protection probe to the upstream network element according to a second list of one or more ordered connection identifiers contained within the header. | 2015-01-29 |
20150029838 | SYSTEM AND METHOD FOR SPEEDING CALL ORIGINATIONS TO A VARIETY OF DEVICES USING INTELLIGENT PREDICTIVE TECHNIQUES FOR HALF-CALL ROUTING - A mobile application gateway configured to interconnect mobile communication devices on a cellular network with an enterprise network is provided. The mobile application gateway includes a voice and data signaling gateway configured to provide routing functionalities, service functionalities and admission control. A gateway GPRS support node (GGSN) is configured to establish a secure data session between one or more of the mobile communication devices and the enterprise network by establishing a GPRS tunneling protocol (GTP) tunnel between a carrier-hosted serving GPRS support node (SGSN) and the GGSN. | 2015-01-29 |
20150029839 | APPARATUS AND METHODS FOR BLOCK ACKNOWLEDGMENT COMPRESSION - Systems, methods, and devices for compressing block acknowledgment (ACK) frames/packets are described herein. In some aspects, a method of communicating in a wireless network includes a compressed block acknowledgment frame including a bitmap, the bitmap indicating receipt of a plurality of fragments of a single data unit. The method further includes transmitting the compressed block acknowledgment frame. | 2015-01-29 |
20150029840 | TRANSMITTING DATA VIA A PRIVATE SUB-NETWORK OF A SERVICE PROVIDER NETWORK - A first device may receive data associated with a second device from within a first network and independently of a second network. The second device may include a sensor or an application to form or process a data record. The first device may establish a bearer between the first device and a particular user device, of multiple user devices, in accordance with a bearer policy; and provide the data towards the particular user device via a first sub-network, of multiple sub-networks, of the second network and via the bearer. The first sub-network may be independent of a second sub-network of the multiple sub-networks. The second sub-network may permit user device data to be transmitted between the multiple user devices. The first sub-network and the second sub-network may consume different levels of network resources. | 2015-01-29 |
20150029841 | SYSTEM FOR SPECIFYING CAUSE OF MICROBURST OCCURRENCE AND METHOD FOR SPECIFYING CAUSE OF MICROBURST OCCURRENCE - A microburst detection apparatus configured to detect a microburst of a control plane packet and to extract, from the control plane packet which forms the detected microburst, call information for identifying call of a data plane, a packet extraction apparatus configured to extract a data plane packet corresponding to the extracted call information, and a cause analysis apparatus configured to analyze a payload of an application layer of the extracted data plane packet, specify a service/application which causes occurrence of the microburst, count the number of data plane packets in response to the specified service/application, and display the counted number of packets associated with the specified service/application are included. | 2015-01-29 |
20150029842 | SYSTEM AND METHOD FOR THE TRANSMISSION OF DATA AND STREAMS CONTAINING VIDEO DATA DVIDEO IN A CHANNEL WITH GIVEN BITRATE - System and method for multiplexing data Di and one or more streams containing video data D | 2015-01-29 |
20150029843 | APPARATUS AND METHOD FOR PROVIDING WEB SERVICE IN WIRELESS COMMUNICATION SYSTEM - The present invention relates to an apparatus and method for providing a web service in a wireless communication system. The apparatus for providing the web service includes: a proxy unit receiving/sending data through the internet; a packet data conversion protocol (PDCP) unit producing and outputting at least one PDCP protocol data unit (PDU) by using the data; and a control unit monitoring the data received from the proxy unit and controlling the proxy unit to transmit data of a size acceptable by the PDCP unit on the basis of the data capacity of the PDCP unit. | 2015-01-29 |
20150029844 | METHOD AND A COMMUNICATION TERMINAL FOR MODULATING A MESSAGE FOR TRANSMISSION IN A WIRELESS COMMUNICATION NETWORK - The present invention is directed to a communication terminal in a wireless communication network. The communication terminal includes a receiver configured to receive a first message comprising a media access control (MAC) frame at a first transmission rate from a communication device in the wireless communication network; a message generator configured to generate a second message in response to the received first message, the second message comprising a control response frame; and a transmitter configured to transmit the control response frame at a second transmission rate, wherein the second transmission rate is lower than or equal to the first transmission rate; and wherein the second transmission rate is dependent on a difference in qualities between downlink communication and uplink communication between the communication device and the communication terminal. Methods of modulating a message for transmission in the wireless communication network are also disclosed. | 2015-01-29 |
20150029845 | MECHANISM TO PREVENT LOAD IN 3GPP NETWORK DUE TO MTC DEVICE TRIGGERS - Embodiments of methods and apparatus to manage MTC device trigger load in a wireless network are described herein. Other embodiments may be described and claimed. | 2015-01-29 |
20150029846 | Use of Switching for Optimizing Transport Costs for Bandwidth Services - Methods and systems are disclosed for receiving, with circuitry of a network controller, information indicative of characteristics of incoming data traffic in an information transport network, the network comprising at least one packet switched layer and at least one transport layer; determining to transport the incoming data traffic through at least one determined layer being at least one of the packet switched layer and the transport layer, based on the characteristics of the incoming data traffic and/or network information; determining at least one route for the incoming data traffic through the determined layer; and transmitting a signal containing computer executable instructions to at least one switch, to configure the switch to steer the incoming data traffic through the at least one route of the at least one determined layer. The information indicative of characteristics of data traffic may be gathered/provided by one or more traffic monitor. | 2015-01-29 |
20150029847 | PACKET NETWORK TRAFFIC FLOW EFFECTIVE BANDWIDTH ESTIMATION APPARATUS AND METHOD - A packet network traffic flow effective bandwidth estimation apparatus comprising a committed burst size (CBS) estimator loop, a peak information rate (PIR) estimator and an effective bandwidth (Eff.BW) estimator. The loop includes a meter arranged to determine a number of conformant bytes (G) and a number of violating bytes (Y) of a traffic flow; a committed information rate (CIR) estimator arranged to determine a subsequent estimated CIR; a controller arranged to, if Y is above zero, determine an estimated CBS (ECBS) correction and to apply the correction to the ECBS, and arranged to, if Y is zero, output the previously used ECBS. The PR estimator receives the ECBS from the loop and the ECIR and determines an estimated PR (EPIR) in dependence on the ECBS and the ECIR. The Eff.BW estimator determines an Eff.BW of the traffic flow from the EPIR, ECBS and ECIR. | 2015-01-29 |
20150029848 | Systems And Methods For Native Network Interface Controller (NIC) Teaming Load Balancing - Systems and methods are provided that may be employed in a network environment to implement load balancing for multi-network interface controller (NIC) teaming applications using pause frame flow control communications received at an information handling system in situations where a given data path through a given NIC of the information handling system and a corresponding network switch is heavily loaded or otherwise congested relative to one or more other more lightly loaded data paths through other NICs of the information handling system and their corresponding network switches. | 2015-01-29 |
20150029849 | RECEIVER-SIGNALED ENTROPY LABELS FOR TRAFFIC FORWARDING IN A COMPUTER NETWORK - In one embodiment, a receiver device determines that it accepts flow entropy, and accordingly determines a set of entropy labels the receiver device is accepting. After transmitting the set of entropy labels from the receiver device to one or more sender devices, the receiver device may then receive packets from the one or more sender devices with selected particular entropy labels from the set of entropy labels. In another embodiment, a sender device receives from a receiver device a set of entropy labels the receiver device is accepting. As such, when determining a packet to forward to the receiver device with flow entropy, the sender device may select a particular entropy label from the set of entropy labels for that receiver device, and transmits the packet device to the receiver device with the selected particular entropy label. | 2015-01-29 |
20150029850 | LOAD BALANCING NETWORK ADAPTER - Methods and systems for providing device-specific authentication are described. One example method includes receiving, by an input port of a network adapter within the computer system, a stream of network traffic; dividing, by load balancing logic within the network adapter, the received stream of network traffic into a plurality of substreams; and presenting the plurality of substreams to respective interfaces of the network adapter, each network adapter interface being accessible by an operating system executing on the computer system. | 2015-01-29 |
20150029851 | MANAGING THE TRAFFIC LOAD OF A DELIVERY NODE - The invention relates to a method for managing the traffic load of a delivery node being in a state BLOCKED or UNBLOCKED. The method comprises the step determining that the traffic load of the delivery node is within a pair of upper and lower limits. The method also comprise the step of changing the state of the delivery node upon the determination that the traffic load of a delivery node is within the pair of upper and lower limits. Changing the state is changing from UNBLOCKED to BLOCKED or from BLOCKED to UNBLOCKED. The invention also relates to a delivery node suitable for implementing the method disclosed hereinabove. | 2015-01-29 |
20150029852 | MAXIMIZING BOTTLENECK LINK UTILIZATION UNDER CONSTRAINT OF MINIMIZING QUEUING DELAY FOR TARGETED DELAY-SENSITIVE TRAFFIC - In one embodiment, a system and method include determining bandwidth of a link that connects a local modem to a remote router. A first percentage of the bandwidth is assigned to a first class of data and a second percentage of bandwidth is assigned to a second class of data. The remaining percentage of the bandwidth is assigned for nominal excess capacity. The flow of first class of data and second class of data are controlled to below respective percentages of the bandwidth. | 2015-01-29 |
20150029853 | CONGESTION CONTROL ENFORCEMENT IN A VIRTUALIZED ENVIRONMENT - In a data network congestion control in a virtualized environment is enforced in packet flows to and from virtual machines in a host. A hypervisor and network interface hardware in the host are trusted components. Enforcement comprises estimating congestion states in the data network attributable to respective packet flows, recognizing a new packet that belongs to one of the data packet flows, and using one or more of the trusted components and to make a determination based on the congestion states that the new packet belongs to a congestion-producing packet flow. A congestion-control policy is applied by one or more of the trusted components to the new packet responsively to the determination. | 2015-01-29 |
20150029854 | SERVICE LAYER SOUTHBOUND INTERFACE AND QUALITY OF SERVICE - Existing resource reservation techniques are inefficient for M2M communications. In an example embodiment described herein, a system comprises a service layer server that resides on a service layer and a control plane node that resides on an access network, wherein the service layer server communicates with the control plane node via a control plane interface. The control plane interface can be used to configure quality of service (QoS) policies (rules) that are based on an object that is being addressed. In this context, for example, an object may be a memory location or value. For example, the service layer may configure one or more QoS rules for the access network based on the object by sending a QoS provisioning message that includes one or more parameters to the control plane node. The control plane node may determine the object that is identified in the one or more QoS rules, and the QoS rules may be distributed to one or more routers that may be used to access the object. The access network may apply the one or more QoS rules in accordance with the parameters. | 2015-01-29 |
20150029855 | TRAFFIC ROUTING - The present disclosure relates to a traffic routing method and a traffic routing device. A member device of a stacking system receives traffic destined for a destination node. If there is at least one valid Equal-cost multi-path (ECMP) associated with an address of the destination node in a forwarding table, the member device routes the received traffic to the destination node through the at least one valid ECMP path. Otherwise, the member device selects at least one other member device of the stacking system for routing the received traffic, updates an ECMP path associated with the address of the destination node in the forwarding table to a stacking link connecting the member device with the selected at least one member device, and transmits the received traffic to the selected at least one member device. | 2015-01-29 |
20150029856 | PACKETS RECOVERY SYSTEM AND METHOD - In a network for reliable transfer of packets from a transmitter to a receiver using a Real-time Transport Protocol (RTP), a system for packet recovery, the system comprising a detection block (detector) for packet loss detection and a probe device (probe) for lost packet retransmission, wherein the detector includes a means for sending a packet retransmit request to the probe upon detecting a packet loss (a lost packet), and wherein the probe includes a means for storing received packets and for retransmitting the lost packet responsive to the retransmit request. | 2015-01-29 |
20150029857 | PER-CLASS SCHEDULING WITH RATE LIMITING - Providing network access is disclosed. Use of a provider equipment port via which network access is provided to two or more downstream nodes, each having one or more classes of network traffic associated with it, is scheduled on a per class basis, across the downstream nodes. The respective network traffic sent to each of at least a subset of the two or more downstream nodes is limited, on a per downstream node basis, to a corresponding rate determined at least in part by a capacity of a communication path associated with the downstream node. | 2015-01-29 |
20150029858 | ENERGY SAVING METHOD, SYSTEM AND DEVICE FOR BASE STATION - An energy saving method, system and device for a base station, applied in the technical field of communications. The energy saving method comprises: if the number of user equipments sending a service request in the coverage of a coverage base station is greater than a first threshold, sending a second activation request to a capacity boosting base station, wherein the second activation request is used for requesting the capacity boosting base station in a dormant state to enter an intermediate state from the dormant state, and the intermediate state refers to that in the intermediate state, the capacity boosting base station bears a user equipment in a connected state rather than a user equipment in an idle state; and after the capacity boosting base station enters the intermediate state, transferring the user equipment to be connected to the capacity boosting base station in the intermediate state. | 2015-01-29 |
20150029859 | NETWORK MANAGEMENT SYSTEM, NETWORK, METHOD AND COMPUTER PROGRAM PRODUCT - Known network management systems for managing traffic signals in a network store node/link parameter signals and traffic parameter signals and calculate solutions defining intermediate nodes/links situated between sources and destinations for transporting said traffic signals from said sources to said destinations via said intermediate nodes/links and calculate route information per solution. By storing node/link parameter signals and traffic parameter signals for several situations (like several predictions in the future) and calculating solutions for each situation and then selecting a solution per situation, the network management system will manage the network more advantageously, especially when solutions are compared with each other, and when a solution is selected per situation in dependence of comparison results (comprising similarities/differences between solutions of different situations). Said route information may comprise link load parameters and/or resource consumption parameters and/or fairness parameters and/or throughput parameters. | 2015-01-29 |
20150029860 | Method and Apparatus for Processing Inbound and Outbound Quanta of Data - A method for processing inbound and/or outbound data wherein a processing policy is determined for a quantum of data. A quantum of inbound data is received and a data notification for the received data is prepared. The notification for the quantum of received inbound data is delivered to a processor according to the processing policy. When selecting a quantum of outbound data, an outbound data work request for the outbound data is prepared and delivered to an output unit according to the processing policy. | 2015-01-29 |
20150029861 | COMMUNICATION DEVICE AND COMMUNICATION SYSTEM - There is provided a communication device for controlling an upper limit bandwidth of TCP communication for transmission. There is further provided a communication device for enhancing a communication bandwidth for TCP and restricting it to an upper limit for transmission by use of new TCP for enhancing a communication bandwidth. The device comprises a transmission bandwidth control unit for determining a communication bandwidth of each session of TCP or new TCP, a token bucket update unit for determining whether packets are transmittable per session, and a maximum bandwidth control unit for determining whether packets are transmittable based on an upper limit of a total sum of all the set sessions, wherein when the maximum bandwidth control unit determines that packets are transmittable, the token bucket update unit transmits packets of a session determined as transmittable. | 2015-01-29 |
20150029862 | Multi-Level Flow Control - Various methods, systems, and apparatuses can be used to control flow in an ethernet environment. In some implementations, methods can include receiving a flow of ethernet frames at a first device via an ethernet switch, determining that a buffer at the first device exceeds a threshold for an incoming flow, generating an initial pause frame operable to pause only a second device, and transmitting the initial pause frame to the ethernet switch. | 2015-01-29 |
20150029863 | Network Congestion Control with Awareness of Random Packet Losses - Messages are sent from a first network device to a second network device across a network. The network includes a network portion with an expected random packet loss rate. The actual packet loss rate for packets sent across the network is compared to the expected random packet loss rate. A determination is made that the actual packet loss rate is greater than the expected random packet loss rate. Compensation for network congestion is performed in response to the determination that the actual packet loss rate exceeds the expected random packet loss rate. | 2015-01-29 |
20150029864 | SYSTEM AND METHOD FOR MANAGING BANDWIDTH USAGE RATES IN A PACKET-SWITCHED NETWORK - A computer-implemented system is disclosed for managing bandwidth usage rates in a packet switched network. The system includes one or more servers configured to execute computer program steps. The computer program steps comprises monitoring bandwidth usage rate at a first provider interface, determining if bandwidth usage rate at the provider interface exceeds a bandwidth usage rate limit; and rerouting Internet traffic from the provider interface having bandwidth that exceeds the bandwidth usage rate limit to a second provider interface having available bandwidth capacity. | 2015-01-29 |
20150029865 | NETWORK TRAFFIC ROUTING OPTIMIZATION - The present disclosure describes methods, systems, and computer program products for providing network traffic routing optimizations. One computer-implemented method includes calculating a direct connection cost for network traffic between two points in a network, the network including one or more nodes of an accelerated application delivery (AccAD) network, calculating an AccAD connection cost for the network traffic between the two points in the network using at least one node of the AccAD network, comparing the calculated direct connection cost and the AccAD connection cost, and determining whether the direct connection cost is greater than the sum of the AccAD connection cost and a minimum cost threshold value. | 2015-01-29 |