03rd week of 2017 patent applcation highlights part 48 |
Patent application number | Title | Published |
20170018478 | VIA STRUCTURES FOR THERMAL DISSIPATION | 2017-01-19 |
20170018479 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018480 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018481 | COMPRESSIBLE THERMAL INTERFACE MATERIALS | 2017-01-19 |
20170018482 | RECESSED LEAD LEADFRAME PACKAGES | 2017-01-19 |
20170018483 | INTEGRATED CIRCUIT CHIP FABRICATION LEADFRAME | 2017-01-19 |
20170018484 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018485 | FLIPPED DIE STACK ASSEMBLIES WITH LEADFRAME INTERCONNECTS | 2017-01-19 |
20170018486 | SEMICONDUCTOR MODULE | 2017-01-19 |
20170018487 | THERMAL ENHANCEMENT FOR QUAD FLAT NO LEAD (QFN) PACKAGES | 2017-01-19 |
20170018488 | INTEGRATED POWER MODULE AND MANUFACTURING METHOD THEREOF | 2017-01-19 |
20170018489 | SOLDER BOND SITE INCLUDING AN OPENING WITH DISCONTINOUS PROFILE | 2017-01-19 |
20170018490 | VIA STRUCTURE AND CIRCUIT BOARD HAVING THE VIA STRUCTURE | 2017-01-19 |
20170018491 | Substrate Structure and Manufacturing Method Thereof | 2017-01-19 |
20170018492 | INTERPOSERS, SEMICONDUCTOR DEVICES, METHOD FOR MANUFACTURING INTERPOSERS, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES | 2017-01-19 |
20170018493 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | 2017-01-19 |
20170018494 | INTERPOSER AND CIRCUIT SUBSTRATE | 2017-01-19 |
20170018495 | SEMICONDUCTOR DEVICE FOR ELECTRIC POWER | 2017-01-19 |
20170018496 | Interconnect Structure for Semiconductor Devices | 2017-01-19 |
20170018497 | SOC WITH INTEGRATED VOLTAGE REGULATOR USING PREFORMED MIM CAPACITOR WAFER | 2017-01-19 |
20170018498 | Method Of Semiconductor Integrated Circuit Fabrication | 2017-01-19 |
20170018499 | NECKED INTERCONNECT FUSE STRUCTURE FOR INTEGRATED CIRCUITS | 2017-01-19 |
20170018500 | STRUCTURE WITH CONDUCTIVE PLUG AND METOD OF FORMING THE SAME | 2017-01-19 |
20170018501 | VIA STRUCTURES FOR THERMAL DISSIPATION | 2017-01-19 |
20170018502 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018503 | SEMICONDUCTOR DIE WITH A METAL VIA | 2017-01-19 |
20170018504 | SEMICONDUCTOR DEVICE HAVING STRUCTURE FOR IMPROVING VOLTAGE DROP AND DEVICE INCLUDING THE SAME | 2017-01-19 |
20170018505 | WIRING BOARD WITH EMBEDDED COMPONENT AND INTEGRATED STIFFENER AND METHOD OF MAKING THE SAME | 2017-01-19 |
20170018506 | TUNGSTEN ALLOYS IN SEMICONDUCTOR DEVICES | 2017-01-19 |
20170018507 | Semiconductor Device and Method of Forming EMI Shielding Layer with Conductive Material Around Semiconductor Die | 2017-01-19 |
20170018508 | SUPPORT FOR LONG CHANNEL LENGTH NANOWIRE TRANSISTORS | 2017-01-19 |
20170018509 | THROUGH-BODY VIA LINER DEPOSITION | 2017-01-19 |
20170018510 | MICROELECTRONIC ASSEMBLIES WITH CAVITIES, AND METHODS OF FABRICATION | 2017-01-19 |
20170018511 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM | 2017-01-19 |
20170018512 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018513 | SEMICONDUCTOR PACKAGE INCLUDING AN ANTENNA FORMED IN A GROOVE WITHIN A SEALING ELEMENT | 2017-01-19 |
20170018514 | TRANSMISSION LINE FOR 3D INTEGRATED CIRCUIT | 2017-01-19 |
20170018515 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING APPARATUS, AND WAFER LIFT PIN-HOLE CLEANING JIG | 2017-01-19 |
20170018516 | SELF-ALIGNED UNDER BUMP METAL | 2017-01-19 |
20170018517 | MICROELECTRONIC ASSEMBLIES FORMED USING METAL SILICIDE, AND METHODS OF FABRICATION | 2017-01-19 |
20170018518 | METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH THROUGH-SUBSTRATE VIA COVERED BY A SOLDER BALL | 2017-01-19 |
20170018519 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF | 2017-01-19 |
20170018520 | USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE | 2017-01-19 |
20170018521 | Protrusion Bump Pads for Bond-on-Trace Processing | 2017-01-19 |
20170018522 | FLIP CHIP BONDING ALLOYS | 2017-01-19 |
20170018523 | Bump Structures for Multi-Chip Packaging | 2017-01-19 |
20170018524 | SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD | 2017-01-19 |
20170018525 | METHOD AND PROCESS FOR EMIB CHIP INTERCONNECTIONS | 2017-01-19 |
20170018526 | SEMICONDUCTOR DEVICE AND METHOD | 2017-01-19 |
20170018527 | SEMICONDUCTOR PACKAGE HAVING A PLURALITY OF SEMICONDUCTOR CHIPS STACKED THEREIN | 2017-01-19 |
20170018528 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018529 | FLIPPED DIE STACK | 2017-01-19 |
20170018530 | MULTI-DIE SEMICONDUCTOR STRUCTURE WITH INTERMEDIATE VERTICAL SIDE CHIP AND SEMICONDUCTOR PACKAGE FOR SAME | 2017-01-19 |
20170018531 | Semiconductor Device and Method of Manufacture | 2017-01-19 |
20170018532 | INTERCONNECTION STRUCTURES AND METHODS FOR MAKING THE SAME | 2017-01-19 |
20170018533 | ELECTRONIC COMPONENT DEVICE | 2017-01-19 |
20170018534 | ELECTRONIC COMPONENT DEVICE AND MANUFACTURING METHOD THEREOF | 2017-01-19 |
20170018535 | CIRCUIT BOARD HAVING BYPASS PAD | 2017-01-19 |
20170018536 | ELECTRONIC CIRCUIT | 2017-01-19 |
20170018537 | LIGHT EMITTING DIODE (LED) PACKAGE HAVING SHORT CIRCUIT (VLED) DIE, LENS SUPPORT DAM AND SAME SIDE ELECTRODES AND METHOD OF FABRICATION | 2017-01-19 |
20170018538 | SOLID STATE LIGHT EMITTER DEVICES AND METHODS | 2017-01-19 |
20170018539 | Jetting a Highly Reflective Layer Onto an LED Assembly | 2017-01-19 |
20170018540 | ELECTRONIC DEVICE MODULE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018541 | WIRING BOARD AND MEMORY SYSTEM INCLUDING THE SAME | 2017-01-19 |
20170018542 | DIE BONDING TO A BOARD | 2017-01-19 |
20170018543 | TECHNIQUES FOR FORMING A COMPACTED ARRAY OF FUNCTIONAL CELLS | 2017-01-19 |
20170018544 | Semiconductor Device Comprising a Clamping Structure | 2017-01-19 |
20170018545 | SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018546 | DUAL-SIDED SILICON INTEGRATED PASSIVE DEVICES | 2017-01-19 |
20170018547 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018548 | Semiconductor Device with a Switchable and a Non-Switchable Diode Region | 2017-01-19 |
20170018549 | TRANSISTOR | 2017-01-19 |
20170018550 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018551 | Reduced Footprint LDMOS Structure for FINFET Technologies | 2017-01-19 |
20170018552 | SEMICONDUCTOR DEVICES INCLUDING DEVICE ISOLATION STRUCTURES AND METHODS OF MANUFACTURING THE SAME | 2017-01-19 |
20170018553 | SEMICONDUCTOR DEVICE INCLUDING CAPACITOR AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018554 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018555 | NAND MEMORY CELL STRING HAVING A STACKED SELECT GATE STRUCTURE AND PROCESS FOR FOR FORMING SAME | 2017-01-19 |
20170018556 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018557 | METHOD FOR PROCESSING A CARRIER, A CARRIER, AND A SPLIT GATE FIELD EFFECT TRANSISTOR STRUCTURE | 2017-01-19 |
20170018558 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018559 | METHOD FOR MANUFACTURING A NONVOLATILE MEMORY DEVICE | 2017-01-19 |
20170018560 | SEMICONDUCTOR DEVICE | 2017-01-19 |
20170018561 | FIELD EFFECT TRANSISTOR MEMORY DEVICE | 2017-01-19 |
20170018562 | DUAL CONTROL GATE SPACER STRUCTURE FOR EMBEDDED FLASH MEMORY | 2017-01-19 |
20170018563 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME | 2017-01-19 |
20170018564 | SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME | 2017-01-19 |
20170018565 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018566 | SEMICONDUCTOR MEMORY DEVICE | 2017-01-19 |
20170018567 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018568 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018569 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018570 | Capacitor With 3D NAND Memory | 2017-01-19 |
20170018571 | ULTRAHIGH DENSITY VERTICAL NAND MEMORY DEVICE AND METHOD OF MAKING THEREOF | 2017-01-19 |
20170018572 | STANDARD CELL CIRCUITRIES | 2017-01-19 |
20170018573 | SOI-BASED SEMICONDUCTOR DEVICE WITH DYNAMIC THRESHOLD VOLTAGE | 2017-01-19 |
20170018574 | ULTRA HIGH DENSITY THIN FILM TRANSISTOR SUBSTRATE HAVING LOW LINE RESISTANCE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | 2017-01-19 |
20170018575 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | 2017-01-19 |
20170018576 | Liquid Crystal Display Device and Electronic Device | 2017-01-19 |
20170018577 | SEMICONDUCTOR DEVICE | 2017-01-19 |