03rd week of 2012 patent applcation highlights part 18 |
Patent application number | Title | Published |
20120013332 | MAGNETIC DETECTION DEVICE - A magnetic detection device of the present invention includes at least one pair of first magnetosensitive bodies each comprising a soft magnetic material extending in a first axis direction and being sensitive to an external magnetic field oriented in the first axis direction; and a magnetic field direction changer comprising a soft magnetic material and changing an external magnetic field oriented in a different axis direction from the first axis direction into a measurement magnetic field having a component in the first axis direction which can be detected by the at least one pair of first magnetosensitive bodies. With this magnetic detection device, the external magnetic field oriented in the different axis direction can be detected by way of the first magnetosensitive bodies. As a result, while attaining magnetic detection with high accuracy, the magnetic detection device can be reduced in size or thickness by omitting a magnetosensitive body extending long in the different axis direction. | 2012-01-19 |
20120013333 | Magnetic Field Sensors and Methods for Fabricating the Magnetic Field Sensors - Magnetic field sensors and associated methods of manufacturing the magnetic field sensors include molded structures to encapsulate a magnetic field sensing element and an associated die attach pad of a lead frame and to also encapsulate or form a magnet or a flux concentrator. | 2012-01-19 |
20120013334 | Material Property Estimation Using Inverse Interpolation - Magnetic field sensor probes are disclosed which comprise primary or drive windings having a plurality of current carrying segments. The relative magnitude and direction of current in each segment are adjusted so that the resulting interrogating magnetic field follows a desired spatial distribution. By changing the current in each segment, more than one spatial distribution for the magnetic field can be imposed within the same sensor footprint. Example envelopes for the current distributions approximate a sinusoid in Cartesian coordinates or a first-order Bessel function in polar coordinates. One or more sensing elements are used to determine the response of a test material to the magnetic field. These sense elements can be configured into linear or circumferential arrays. | 2012-01-19 |
20120013335 | METHOD OF ADJUSTING PROPERTIES OF DRILLING FLUIDS AND APPARATUS FOR USE IN SUCH METHODS - The present invention provides a method of determining a physiochemical property of a drilling fluid at a drilling site during a drilling phase, said method comprising detecting a nuclear magnetic resonance signal from out-of-hole drilling fluid at said site and calculating therefrom a value indicative of said property. | 2012-01-19 |
20120013336 | MAGNETIC RESONANCE IMAGING WITH IMPROVED IMAGING CONTRAST - A method of magnetic resonance imaging of an object comprises the steps of arranging the object in a stationary magnetic field, subjecting the object to an excitation and encoding sequence of magnetic field gradients resulting in k-space sampling in two segments along the phase encoding direction, wherein the encoding sequence of the magnetic field gradients is selected such that the two segments in k-space are sampled along trajectories beginning with a central k-space line through the k-space center and continuing to opposite k-space borders of the two segments, collecting magnetic resonance signals created in the object, and reconstructing an image of the object based on the magnetic resonance signals, wherein one central k-space line is sampled in both of the two k-space segments, and intersegment phase and/or intensity deviations are corrected in both k-space segments using the magnetic resonance signals collected along the central k-space line. Furthermore, an imaging device for magnetic resonance imaging of an object is described. | 2012-01-19 |
20120013337 | SAR HOTSPOT REDUCTION BY TEMPORAL AVERAGING IN PARALLEL TRANSMISSION MRI - A magnetic resonance sequence includes a repetitively applied radiofrequency B | 2012-01-19 |
20120013338 | MAGNETISED STRUCTURE INDUCING A HOMOGENEOUS FIELD, IN THE CENTRE THEREOF, WITH A PRE-DETERMINED ORIENTATION - A magnetized structure that induces in a central area of interest a homogeneous magnetic field of predetermined orientation relative to a longitudinal axis (z) of the structure comprises at least two magnetized rings ( | 2012-01-19 |
20120013339 | Electromagnetic Orientation System for Deep Wells - An electromagnetic method and apparatus for determining the azimuthal orientation of a drill bit instrumentation sub ( | 2012-01-19 |
20120013340 | BATTERY MODULE - It is intended to provide a battery module having a long life by designing such that deterioration proceeds evenly among battery cells. | 2012-01-19 |
20120013341 | Method and Apparatus for Electrically Cycling a Battery Cell to Simulate an Internal Short - A test apparatus and corresponding method for simulating an internal cell short and initiating thermal runaway in a battery cell is disclosed whereby the cell is internally heated through rapid charge and discharge cycles at high currents. The magnitude of the selected current may be modulated to simulate a cell short with the desired power profile without unrealistically heating neighboring cells or interfering with the thermal environment of the cell within the module. | 2012-01-19 |
20120013342 | SEMICONDUCTOR DEVICE - A semiconductor device with a built-in battery whose residual amount of the electrical energy can be detected accurately. The semiconductor device has a battery, a demodulation circuit, a control circuit which generates a signal having information about the residual amount of the electrical energy stored in the battery, and a transmission medium which displays the residual amount of the electrical energy in accordance with the signal. The demodulation circuit demodulates a signal input from an antenna which requests display of the residual amount of the electrical energy. Based on the demodulated signal, the control circuit starts to generate a signal having information about the residual amount of the electrical energy in the battery. | 2012-01-19 |
20120013343 | RECEIVING APPARATUS, TEST APPARATUS, RECEIVING METHOD, AND TEST METHOD - A receiving apparatus that acquires a reception signal using a recovered clock that is recovered from an edge of the reception signal. The receiving apparatus comprises a recovered clock generating section that generates the recovered clock; a multi-strobe generating section that generates a plurality of strobes having different phases from each other, according to a pulse of the recovered clock; a detecting section that detects an edge position of the reception signal relative to the strobes, based on a value of the reception signal at timings of each of the strobes; an adjusting section that adjusts a phase of the recovered clock according to the edge position of the reception signal; and an acquiring section that acquires the reception signal at a timing shifted by a set phase difference, which is set in advance, from the recovered clock. | 2012-01-19 |
20120013344 | DEVICE FOR DIAGNOSING MEASUREMENT OBJECTS USING A MEASUREMENT VOLTAGE - A device for diagnosing measurement objects using a measurement voltage comprises a housing, in which at least one electric measurement circuit is arranged for carrying out the diagnosis. To this end, the device is designed for the simultaneous diagnosis of a plurality of measurement objects using the same measurement voltage and comprises at least two separate connecting elements for connecting one measurement object each to the measurement voltage. The measurement circuit in turn comprises at least two current detection units and a voltage detection unit, by means of which the current flowing through each measurement object and the measurement voltages present at all measurement objects can be measured at the same time. | 2012-01-19 |
20120013345 | SYSTEMS, METHODS, AND APPARATUS FOR CONNECTION FAULT SELF-MONITORING WITH DC BIAS CURRENT - Certain embodiments of the invention may include systems, methods, and apparatus for providing connection fault self-monitoring with DC bias current. According to an example embodiment of the invention, a method is provided for obtaining measurements and detecting connectivity faults associated with a voltage mode sensor. The method can include coupling a DC bias current into a circuit. The circuit includes a voltage mode sensor, and the voltage mode sensor can output a time varying signal. The method can also include setting a nominal level of the DC bias current, monitoring a voltage associated with the DC bias current, and determining circuit connectivity status based at least in part on monitoring the voltage. | 2012-01-19 |
20120013346 | SIGNAL TEST DEVICE FOR MOTHERBOARDS - A signal test device tests signal transmission performance of a DDR bus of a motherboard of a computer includes a connector, a checking module, and a number of signal collection units. The connector includes a number of connection pins. The checking module is electronically connected to the motherboard of the computer through the connection pins, and the checking module presets related a number of parameters of the DDR bus so that the motherboard can identify the signal test device. Each signal collection unit is electronically connected to the motherboard of the computer through the connection pins, and each signal collection unit includes a signal collection module. Each signal collection module provides a signal test point for collecting signals of the DDR bus. | 2012-01-19 |
20120013347 | CAPACITOR MONITORING SYSTEMS AND METHODS OF METERING AND MONITORING CAPACITOR BANK - The present invention relates to a capacitor bank monitoring system for monitoring the status of a capacitor bank in a power distribution system. The capacitor bank monitoring system includes a current transformer, a metering connection, and a housing for an electric utility meter. The current transformer is in electrical communication with a neutral terminal of the distribution system and can measure the current carried by the neutral terminal. The meter connection subsystem can provide electrical communication between the electric utility meter and the current transformer, such that the electric utility meter communicates the status of the capacitor bank. | 2012-01-19 |
20120013348 | TEST FIXTURE FOR TESTING SEMICONDUCTOR DIE WITH ITS LOADING MEMBER MAINTAINED FLAT THROUGHOUT THE TEST - A test fixture for testing a semiconductor die with its loading member maintained flat throughout the test is disclosed. The test fixture includes a loading member and a frame. The loading member includes a base film having a melting point higher than a thermal equilibrium temperature thereof, wherein the thermal equilibrium temperature is achieved due to heat transfer from the semiconductor die under test to the base film via the adhesive layer. The loading member further includes an adhesive layer made of electrically conductive adhesive material. The loading member is adapted for securing diced LED dies in position and maintained flat throughout the die testing process, thereby ensuring the accuracy of testing for optical and electrical properties of the dies. | 2012-01-19 |
20120013349 | METHOD OF MEASURING CHARACTERISTICS OF A SEMICONDUCTOR ELEMENT AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A measurement terminal is arranged at an edge of a semiconductor wafer to be apart from a gate electrode and a source electrode formed in a surface portion on one side in a thickness direction of a semiconductor wafer so that an electrode contact portion is in contact with a drain electrode on the other side in the thickness direction of the semiconductor wafer and that a terminal contact portion is exposed to the one side in the thickness direction of the semiconductor wafer. A probe terminal is brought into contact with the terminal contact portion of the measurement terminal and the probe terminal is brought into contact with the gate electrode and the source electrode, to thereby measure electrical characteristics of a MOSFET. | 2012-01-19 |
20120013350 | Apparatus for imitating thermal conductivity and electrical resistance of diamonds and their substitutes - The invention relates to devices which exhibit some physical properties, namely thermal conductivity and electrical resistance of diamonds and their popular imitations, and method for manufacturing and usage of such device. These physical properties of gems are usually used by commercial gem testers for the purpose of distinguishing true diamonds from the fakes. The imitations are made of inexpensive metals, like brass and stainless steel, and conductive plastics, and can replace more costly diamonds and other gems, like moissanite, white sapphire, and others for the purpose of verification of correct operation of gem testing devices. | 2012-01-19 |
20120013351 | METHOD FOR CONVERTING A SENSOR CAPACITANCE UNDER PARASITIC CAPACITANCE CONDITIONS AND A CAPACITANCE-TO-VOLTAGE CONVERTER CIRCUIT - A method for converting a sensor capacitance under parasitic capacitance conditions and a capacitance-to-voltage (CV) converter circuit for converting a sensor capacitance under parasitic capacitance conditions are provided. The method comprises the step of using a two stage operational amplifier (op-amp) in non-unity-gain configuration, wherein the two stage op-amp is chosen to be unstable in unity-gain configuration for reducing power consumption. | 2012-01-19 |
20120013352 | Multipoint Voltage And Current Probe System - A metrology system monitors radio frequency (RF) power at a plurality of locations in a circuit. The system includes a plurality of RF sensors that generate respective analog signals based on electrical properties of the RF power, a multiplexing module that generates an output signal based on the analog signals, and an analysis module that generates messages based on the output signal. The messages contain information regarding the electrical properties that are sensed by the plurality of RF sensors. | 2012-01-19 |
20120013353 | Method And System For Impedance Measurement In An Integrated Circuit - A method for determining a power supply impedance profile (|Z(f)|) at a predetermined load location within an electronic system. A repetitive activity (such as a modulated clock tree signal) is applied in the load location, and the local power supply voltage (U(t)) caused by this repetitive activity is measured. Rather than measuring the corresponding current consumption (I(t)) caused by the repetitive activity, the current consumption is calculated analytically. The local power supply impedance profile (|Z(f)|) is calculated as the ratio of the frequency-domain voltage and current consumption magnitudes (|U(f)|, |I(f)|) of the measured power supply voltage (U(t)) and the calculated current consumption (I(t)). | 2012-01-19 |
20120013354 | CONCENTRIC COPLANAR CAPACITIVE SENSOR FOR NONDESTRUCTIVE EVALUATION - A concentric coplanar capacitive sensor includes a charged central disc forming a first electrode, an outer annular ring coplanar with and outer to the charged central disc, the outer annular ring forming a second electrode, and a gap between the charged central disc and the outer annular ring. The first electrode and the second electrode may be attached to an insulative film. A method provides for determining transcapacitance between the first electrode and the second electrode and using the transcapacitance in a model that accounts for a dielectric test piece to determine inversely the properties of the dielectric test piece. | 2012-01-19 |
20120013355 | COMPOUND SENSOR - A compound sensor includes a first unit including first and second oscillators symmetrically disposed to each other and being able to be displaced in a driving direction and a detecting direction; a second unit including third and fourth oscillators symmetrically disposed to each other and being able to be displaced in the driving direction and the detecting direction; a drive unit to drive the first through fourth oscillators so as to oscillate the first and second oscillators in opposite phase, and the third and fourth oscillators in opposite phase, and so as to oscillate the first and second unit in opposite phase; and a detection unit configured to detect displacements of the first through fourth oscillators in the detecting direction, wherein an acceleration, angular rate, angular acceleration and centrifugal force are independently detected by canceling unnecessary inertial force components from the displacements of the first through fourth oscillators. | 2012-01-19 |
20120013356 | Method And System For Performing Self-Tests In An Electronic System - A method and system for performing a self-test of power supply quality for an integrated circuit chip within an electronic system. The electronic system is subjected to a well-defined repetitive activity, such as by using an amplitude modulated system clock tree. With the repetitive activity causing current consumption within the chip, time-domain local power supply voltage (U(t)) is measured for a location on the chip. A set of time-domain measured voltage data (U(t)) is accumulated and transformed into the frequency domain to yield a local voltage profile (U(f)). The local voltage profile (U(f)) is compared with a reference voltage profile (U | 2012-01-19 |
20120013357 | Semiconductor Device - A semiconductor device comprises a burn-in test circuit configured to receive a flag signal for a burn-in test, generate a toggled output enable signal, and drive a first input/output line to toggle a signal on the first input/output line, and a switching device connected between a bit line and a second input/output line for transferring a signal on the bit line to the second input/output line in response to the output enable signal. | 2012-01-19 |
20120013358 | PROBING APPARATUS FOR INTEGRATED CIRCUIT TESTING - A probing apparatus for integrated circuit testing at least includes a substrate, a probe body and a bypass capacitor. The substrate is fixed in an external conductor after an internal conductor is filled with an insulating material. One end of the substrate has a section, so that both the internal conductor and the insulating material are exposed on the section. One end of the probe body is electrically connected to the internal conductor exposed on the section. A tip end of the probe body is used for contacting a pad of an element to be tested. The bypass capacitor has a first electrode terminal and a second electrode terminal. The first electrode terminal is electrically connected to the probe body, and the second electrode terminal is connected to the external conductor at the end of the substrate. | 2012-01-19 |
20120013359 | Method and System for Wafer Level Testing of Semiconductor Chips - A system and method for wafer level testing of semiconductor chips are provided. In one embodiment, the system comprises a plurality of semiconductor chips disposed in a wafer, each semiconductor chip having at least one port for receiving test data and at least one connection disposed in a kerf region of the wafer between at least one port of a first semiconductor chip and at least one port of at least one second semiconductor chip in the plurality of semiconductor chips, wherein the first semiconductor chip is configured to send the test data to the at least one second semiconductor chip via the at least one connection. Additionally, the plurality of semiconductor chips may comprise at least one core logic configured to pass the test data to the at least one second semiconductor chip via the at least one connection. | 2012-01-19 |
20120013360 | Method of repairing probe card and probe board using the same - There are provided a method of repairing a probe card and a repaired probe board. The method of repairing a probe card includes: in a board body composed of a sintered ceramic having first and second pillar surfaces disposed at a position opposed to each other, preparing the board body including a plurality of main channels for electrically connecting a first pad formed on the first pillar surface to a second pad formed on a second pillar surface and reserved channels disposed to be adjacent to the main channels to repair to damaged main channels; when the main channels are damaged; removing the first and second pads formed in the main channels and the reserved channels; forming cavities by partially removing the board between the damaged main channels and the reserved channels adjacent to the main channel; and forming repair connection parts in the cavities in order to electrically connect the damaged main channels to the reserved channels adjacent thereto. | 2012-01-19 |
20120013361 | Synthetic Pulse Generator for Reducing Supply Noise - A source-terminated transmitter conveys digital signals over a short channel as a voltage signal that transitions between levels for each symbol transition. The transmitter produces each transition by issuing a charge pulse onto the channel, and thus creates a series of charge pulses. The number of charge pulses per unit time is proportional to the transition density of the signal, as no charge pulse is required between like symbols. The supply current used to deliver the pulses is therefore dependent upon the data pattern. This data dependency can induce supply fluctuations, which can in turn cause errors and otherwise reduce performance. The transmitter issues a synthetic charge pulse for each adjacent pair of like symbols to reduce the data dependency of the supply current. The synthetic pulses can be scaled to match the charge required for symbol transitions on a given channel. | 2012-01-19 |
20120013362 | LEVEL CONVERTER CIRCUIT FOR USE IN CMOS CIRCUIT DEVICE PROVIDED FOR CONVERTING SIGNAL LEVEL OF DIGITAL SIGNAL TO HIGHER LEVEL - A level converter circuit is provided for converting an input signal of a digital signal having a first signal level into an output signal having a second signal level higher than the first signal level. An amplifier circuit amplifies the input signal and outputs an amplified output signal, and a current generator circuit generates a control current corresponding to an operating current flowing through the amplifier circuit upon change of the signal level of the input signal. A current detector circuit detects the generated control current, and controls the operating current of the amplifier circuit to correspond to the detected control current. The current generator circuit includes series-connected first and second nMOS transistors as inserted between the current detector circuit and the ground. The first nMOS transistor operates responsive to the input signal, and the second nMOS transistor operates responsive to an inverted signal of the input signal. | 2012-01-19 |
20120013363 | METHOD AND SYSTEM FOR A GLITCH CORRECTION IN AN ALL DIGITAL PHASE LOCK LOOP - The present invention relates to a method and system for glitch correction in an all digital phase lock loop. An all digital phase lock loop can include a phase error signal generation unit, a multi-phase oscillator, a glitch correction unit, and a phase to digital converter. The phase to digital converter receives a multi-phase signal from the multi-phase oscillator and generates a phase signal. The error signal generation unit receives the phase signal and a reference phase signal and generates a phase error signal, which is fed to the glitch correction unit. The glitch correction unit removes the glitches in the phase error signal by a portion of the phase error signal. The phase lock loop can also include a phase rotator and a calibration block. The calibration block instructs the phase rotator to rotate the multi-phase signal by the phase rotation which generates the minimum number of glitches. | 2012-01-19 |
20120013364 | SYSTEM FOR ON-CHIP TEMPERATURE MEASUREMENT IN INTEGRATED CIRCUITS - A thermal sensor providing simultaneous measurement of two diodes. A first diode and a second diode are coupled to a first current source and a second current source, respectively. The ratio of the currents provided by the two sources is accurately know The voltage across each of the two diodes may be coupled to the input of a differential amplifier for determination of temperature. Alternatively, the first diode may be coupled to a first current source by a resistor with a known voltage drop, the second diode may be coupled to an adjustable second current source. The current in the second diode is equal to the sum of voltage drop across the first diode and the known voltage drop across the resistor. Under the established conditions, the Diode Equation may be used to calculate a temperature. | 2012-01-19 |
20120013365 | LOW VOLTAGE DETECTOR - A low voltage detector ( | 2012-01-19 |
20120013366 | CALIBRATING A SYSTEM BY SETTING DIFFERENCE BETWEEN SIGNALS - In a signal monitoring system, a circuit includes an input terminal and an output terminal. In addition, a processor coupled to the circuit is operable for calculating a parameter indicative of an error factor of the circuit by setting a level difference between an input signal at the input terminal and an output signal at the output terminal to a predetermined level. | 2012-01-19 |
20120013367 | Power stage control circuit - The present invention discloses a power stage control circuit including: a driver circuit for controlling a power stage according to an error amplified signal; an error amplifier circuit for comparing a feedback voltage at a feedback terminal with a reference signal to generate the error amplified signal; a current generator circuit coupled to the feedback terminal for generating a fault detection current flowing to the feedback terminal; and a feedback terminal short detection circuit for generating a fault signal to stop the operation of the power stage when the feedback voltage is smaller than a short-circuit threshold voltage or when the fault detection current is larger than a short-circuit threshold current. | 2012-01-19 |
20120013368 | METHOD AND SYSTEM FOR ELECTRICALLY COUPLING A CHIP TO CHIP PACKAGE - A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and reception of electromagnetic signals. Both the chip and the chip package have at least one such converter physically disposed on them. Each converter is able to (1) convert received electromagnetic signals into electronic signals, which it then may relay to leads on the device on which it is disposed; and (2) receive electronic signals from leads on the device on which it is disposed and convert them into corresponding electromagnetic signals, which it may transmit to a corresponding converter on the other device. Not having a direct physical connection between the chip and the chip package decreases the inductive and capacitive effects commonly experienced with physical bonds. | 2012-01-19 |
20120013369 | Synchronous Rectifier Gate Drive Timing To Compensate For Transformer Leakage Inductance - An apparatus for providing synchronous rectifier gate drive timing is described. The apparatus includes circuitry to receive a first signal. The apparatus also includes circuitry to generate a second signal by modifying the first signal to delay a transition from high to low for a non-zero overlap duration. An output to apply an inverse of the first signal as a gate drive timing of at least a first transistor and to apply the second signal as a gate drive timing of at least a second transistor, where the first transistor is a part of a primary side of a full-bridge synchronous rectifier and the second transistor is a part of a secondary side of the full-bridge synchronous rectifier is also included. The second signal and the inverse of the first signal are high during the overlap duration. Methods and program storage devices are also disclosed. | 2012-01-19 |
20120013370 | GATE DRIVING CIRCUIT FOR POWER SEMICONDUCTOR ELEMENT - A gate driving circuit for driving a power semiconductor element can include a MSINK that is an n-channel metal-oxide silicon field-effect transistor (MOSFET) with a low resistance value for rapidly drawing out the charges accumulated on the gate of an insulated gate bipolar transistor (IGBT), and a MSOFT that is an n-channel MOSFET with a high resistance value for slowly drawing out the charges. By shifting the time for turning ON of these MOSFETs, soft interruption can be performed rapidly and surely when overcurrent or short circuit current flows in the IGBT. Therefore, device breakdown is minimized or avoided and noise generation is suppressed. | 2012-01-19 |
20120013371 | GATE DRIVING CIRCUIT - A gate driving circuit for driving a voltage-driven switching device is provided with a current limiting circuit for limiting a gate current ig that flows into a gate terminal through a gate resistor at turn-on to a current limit value IL which defines an upper limit value. The current limit value IL is set at a value which is larger than a gate current value I | 2012-01-19 |
20120013372 | POWER LAYER GENERATION OF INVERTER GATE DRIVE - Techniques include systems and methods of synchronizing multiple parallel inverters in a power converter system. In one embodiment, control circuitry is connected to a power layer interface circuitry at each of the parallel inverters, via an optical fiber interface. The system is synchronized by transmitting a synchronizing pulse to each of the inverters. Depending on the operational mode of the system, different data exchanges may occur in response to the pulse. In an off mode, power up and power down data may be exchanged between the control circuitry and the inverters. In an initiating mode, identification data may be transmitted from the inverters to the control circuitry. In an active mode, control data may be sent from the control circuitry to the inverters. In some embodiments, the inverters also transmit feedback data and/or acknowledgement signals to the control circuitry. Power layer circuitry of the inverter adjusts a local clock based upon sampled data from the control circuitry to maintain synchronicity of the inverters between synchronization pulses. | 2012-01-19 |
20120013373 | SEMICONDUCTOR DEVICE, CIRCUIT CORRECTION METHOD, DESIGN SUPPORT DEVICE, AND RECORDING MEDIUM STORING DESIGN SUPPORT PROGRAM - There has been a problem in a conventional semiconductor device that a great deal of time is needed for a returning process associated with circuit correction. A semiconductor device according to the present invention includes a plurality of trigger signal driving elements (FFa and FFb) that synchronize with a trigger signal and operate, trigger wiring lines (CW | 2012-01-19 |
20120013374 | PHASE-LOCK ASSISTANT CIRCUITRY - Some embodiments regard a circuit comprising: a first circuit configured to lock a frequency of an output clock to a frequency of a reference clock; a second circuit configured to align an input signal to a phase clock of the output clock; a third circuit configured to use a first set of phase clocks of the output clock and a second set of phase clocks of the output clock to improve alignment of the input signal to the phase clock of the output clock; and a lock detection circuit configured to turn on the first circuit when the frequency of the output clock is not locked to the frequency of the reference clock; and to turn off the first circuit and to turn on the second circuit and the third circuit when the frequency of the output clock is locked to the frequency of the reference clock. | 2012-01-19 |
20120013375 | FREQUENCY SYNTHESIZER DEVICE AND MODULATION FREQUENCY DISPLACEMENT ADJUSTMENT METHOD - A frequency synthesizer device that includes two modulation paths and suitably adjusts the amplitude of a control voltage that is outputted from a digital-to-analog converter (DAC) to a voltage-controlled oscillator. The frequency synthesizer device is provided with a voltage-controlled oscillator, a programmable frequency divider, a frequency phase comparator, a DAC, a switch and a modulation frequency displacement correction circuit. The voltage-controlled oscillator oscillates at an oscillation frequency depending on an input voltage. The programmable frequency divider frequency-divides a signal from the voltage-controlled oscillator. The frequency phase comparator outputs a phase difference between the frequency-divided signal and a reference clock. The DAC outputs an adjustment voltage. The switch connects the voltage-controlled oscillator to a reference voltage power source at a time of correction of the adjustment voltage. The modulation frequency displacement correction circuit specifies adjustment data that corresponds to the adjustment voltage corresponding to the target frequency displacement. | 2012-01-19 |
20120013376 | USE OF PLL STABILITY FOR ISLANDING DETECTION - A phase detector for a phase-locked loop includes a phase detector that is configured to become unstable, oscillate and drift rapidly in frequency in a predictable manner when a reference frequency signal is not available. When applied, for example, to a power converter connected to a power distribution grid, the predictable oscillatory and rapid frequency drift behavior when the phase detector is unstable allows very rapid and reliable detection of disconnection from the grid, referred to as islanding. | 2012-01-19 |
20120013377 | Digital Phase Locked Loop - An adaptive digital phase locked loop comprises: a digital configurable phase detector for receiving a reference signal and a feedback signal and for generating a detection signal indicative of a phase/frequency difference between the reference signal and the feedback signal; a configurable digital loop filter for filtering the DPFD detection signal; a digital locking monitor for monitoring polarity transitions of the detection signal and adaptively switching the locking modes and DCO tuning resolution; and a DCO for generating the feedback signal as a function of the detection signal. | 2012-01-19 |
20120013378 | SLEW RATE BOOST CIRCUIT, OUTPUT BUFFER HAVING THE SAME, AND METHOD THEREOF - A slew rate boost circuit for an output buffer and an output buffer circuit for a source driver having the same are provided. In an output buffer including a pull-up unit providing a buffer output signal in a first level by receiving a buffer input signal and performing pull-up operation and a pull-down unit providing a buffer output signal in a second level having opposite phase from the first level by receiving the buffer input signal and performing pull-down operation, the slew rate boost circuit includes a first comparator generating a first boost signal to boost pull-up operation of the pull-up unit of the output buffer by inputting a first input signal and a second input signal and a second comparator generating a second boost signal to boost pull-down operation of the pull-down unit of the output buffer by inputting the first input signal and the second input signal. | 2012-01-19 |
20120013379 | Charge-Injection Sense-Amp Logic - A flip-flop circuit includes a charge injection module, a sense amp module, and a latch module. The charge injection module is configured to, in response to a clock signal, selectively provide electrical charge from a power supply to a first node. The sense amp module is configured to adjust a voltage of a second node in response to detecting a voltage of the first node crossing a threshold while the charge injection module is providing the electrical charge to the first node. The latch module is configured to in response to the clock signal, store a value based on a voltage of the second node. The latch module is also configured to provide the value as an output of the flip-flop circuit. | 2012-01-19 |
20120013380 | APPARATUS FOR GENERATING A PLURALITY OF DIFFERENT VOLTAGE LEVEL CLOCK SIGNALS - A system is provided for generating a plurality of different voltage level clock signals. The system comprises an electrical energy storage pack having a plurality of series coupled electrical energy storage cells that provide a plurality of different output voltage level, a reference oscillator that provides a reference clock signal and a plurality of voltage clamps that receive the plurality of different output voltage levels and output the plurality of different voltage level clock signals at respective output nodes. The plurality of voltage clamps are configured to clamp each of a given output node to a respective high-side voltage level in response to pulling up of the given output node toward a respective high output voltage level and to clamp each of the given output node to a respective low-side voltage level in response to pulling down of the output node toward a low output voltage level. | 2012-01-19 |
20120013381 | Semiconductor integrated circuit and power supply voltage control method - A semiconductor integrated circuit includes a selector to selectively output and supply to a monitoring target voltage terminal one of a power supply voltage from an outside of the semiconductor integrated circuit and a predetermined reference voltage depending on an adjusting mode signal, a voltage monitoring circuit to monitor a voltage fluctuation at the monitoring target voltage terminal and converting the voltage fluctuation that is monitored into a control signal, and an input and output circuit to output the control signal to the outside. | 2012-01-19 |
20120013382 | Semiconductor Integrated Circuit Device - The present invention is directed to perform fine low-voltage control without largely increasing the circuit layout area in a low-power consumption structure. In the case of shifting a region to a low-speed mode, a system controller outputs a request signal and an enable signal to a power switch controller and a low-power drive circuit, respectively, to turn off a power switch and to perform a control so that the voltage level of a virtual reference potential becomes about 0.2 V to about 0.3V. The region operates on voltages between a power supply voltage and a virtual reference potential, so that it is controlled in the low-speed mode. | 2012-01-19 |
20120013383 | VOLTAGE CLAMP CIRCUIT AND INTEGRATED CIRCUIT INCORPORATING SAME - A voltage clamp circuit includes a power supply, a first element connected with the power supply to output a constant current, a third element configured to allow a current to pass through when a voltage of a predetermined value or more is applied; and a second element configured to output a voltage according to a voltage generated by the first and third elements. | 2012-01-19 |
20120013384 | CLAMP CIRCUIT USING PMOS and NMOS DEVICES - A MOS-type semiconductor clamping circuit is disclosed. The clamping circuit comprises a pmos device coupled to a nmos device in series to form the clamping circuit to selectively clamp a signal to a reference voltage, the signal configured to swing between a first voltage and a second voltage about the reference voltage. When the signal is swung between the first voltage and the second voltage, the pmos device and the nmos device are subjected to a voltage swing less than the voltage swing between the first voltage and the second voltage. | 2012-01-19 |
20120013385 | APPARATUS FOR PROTECTING ANALOG INPUT MODULE FROM OVERVOLTAGE - Disclosed is an apparatus for protecting an analog input module from overvoltage, the apparatus including an analog input module and a stabilization unit. The analog input module converts one of a plurality of positive/negative analog signals inputted from the outside thereof into a digital signal and insulates the converted digital signal. The stabilization unit supplies voltages of the positive/negative analog signals to the analog input module when the voltage levels of the plurality of positive/negative analog signals are higher than the levels of positive/negative operating voltages in the analog input module. | 2012-01-19 |
20120013386 | LEVEL SHIFTER - A level shifter includes an output stage transistor and a level controller. The level controller receives a selection signal and provides a reference voltage at a gate terminal of the output stage transistor based on the selection signal. The output stage transistor, on being enabled by the reference voltage, provides a first level shifted output based on a first output reference voltage. | 2012-01-19 |
20120013387 | WIDEBAND BALUN HAVING A SINGLE PRIMARY AND MULTIPLE SECONDARIES - An RF transmitter capable of transmitting over a wide range of frequencies includes a mixer, a wideband high-Q balun, a first driver amplifier and a second driver amplifier. The balun has a single primary winding and two secondary windings. A differential output of the mixer is coupled to the primary winding. A first of the two secondary windings is coupled to drive the first driver amplifier. A second of the two secondary windings is coupled to drive the second driver amplifier. One driver amplifier is used when transmitting at lower frequencies whereas the other driver amplifier is used when transmitting at higher frequencies. By appropriate sizing of the inductances of the secondary windings and by switching out one of the secondary windings at certain times, the balun is tunable to operate over the wide frequency range while having a high quality factor Q, thereby facilitating reduced power consumption while simultaneously meeting performance requirements. | 2012-01-19 |
20120013388 | METHOD FOR MIXING A COMPLEX DIGITAL SIGNAL WITH A REFERENCE SIGNAL, MIXER AND DIGITAL-TO-ANALOGUE CONVERTER USING THE METHOD - Method and mixer using the method for mixing a complex digital input vector with an oscillator reference signal based on a separation of the mixing process in mainly two processing steps, to with a first step in which a set of n real part values V | 2012-01-19 |
20120013389 | Capacitively Coupled Switched Current Source - In the preferred embodiment, a current source is switchable between two precisely defined output currents. A terminal of a coupling capacitor is coupled to the gate of an output MOSFET. The other terminal of the capacitor is switched between two reference voltages to toggle the MOSFET to output the selected one of the two currents. A switchable bias voltage source is coupled to the gate only during the on state of the MOSFET to set the gate voltage of the MOSFET. The current output of the current source is quickly and accurately changed. A reference MOSFET is not directly coupled to the output MOSFET, so there are no slow settling components coupled to the gate of the output MOSFET. | 2012-01-19 |
20120013390 | DISPLAYPORT SWITCH - In versions 1.1a and 1.2 of the DISPLAYPORT™ standard, capacitors are used between a sourcing circuit and a switch for the auxiliary channel. As a result, these capacitors are generally uncharged when the switch activates the auxiliary channel, which can result in errors. Here, a switch is employed that uses precharge circuits to precharge these capacitors. Thus, errors due to charging of these capacitors can be reduced. | 2012-01-19 |
20120013391 | ADAPTIVE BOOTSTRAP CIRCUIT FOR CONTROLLING CMOS SWITCH(ES) - An adaptive switch circuit is provided, which includes a CMOS switch, an off-level voltage generator, and a booster circuit. The CMOS switch includes first PMOS and NMOS coupled transistors. The generator provides, via first and second outputs, first and second voltage levels, and includes second PMOS and NMOS transistors. The second PMOS transistor is series connected between VDD and a first bias source and the second NMOS transistor is series connected between VSS and a second bias source. The booster circuit, which is coupled to the generator between its outputs, and to the PMOS and NMOS gates of the CMOS switch, capacitively stores during off level first and second boost voltages, which are coupled to the PMOS and NMOS gates. The boost voltages are offset from VDD and VSS, respectively, each by approximately a threshold voltage of the respective transistor type. | 2012-01-19 |
20120013392 | METHODS AND APPARATUS FOR MEASURING ANALYTES - Methods and apparatus relating to FET arrays including large FET arrays for monitoring chemical and/or biological reactions such as nucleic acid sequencing-by-synthesis reactions. Some methods provided herein relate to improving signal (and also signal to noise ratio) from released hydrogen ions during nucleic acid sequencing reactions. | 2012-01-19 |
20120013393 | METHOD AND DEVICE FOR ANALYZING POSITIONS - The method and device for analyzing position are disclosed. By analyzing sensing information with at least one zero-crossing, each position can be analyzed. The number of analyzed positions may be different from the number of zero-crossings. When the number of analyzed positions is different from the number of zero-crossing, the number of analyzed positions is more than one. | 2012-01-19 |
20120013394 | SOURCE FOLLOWER CIRCUIT OR BOOTSTRAP CIRCUIT, DRIVER CIRCUIT COMPRISING SUCH CIRCUIT, AND DISPLAY DEVICE COMPRISING SUCH DRIVER CIRCUIT - In the case of using an analog buffer circuit, an input voltage is required to be added a voltage equal to a voltage between the gate and source of a polycrystalline silicon TFT; therefore, a power supply voltage is increased, thus a power consumption is increased with heat. In view of the foregoing problem, the invention provides a depletion mode polycrystalline silicon TFT as a polycrystalline silicon used in an analog buffer circuit such as a source follower circuit. The depletion mode polycrystalline silicon TFT has a threshold voltage on its negative voltage side; therefore, an input voltage does not have to be increased as described above. As a result, a power supply voltage requires no increase, thus a low power consumption of a liquid crystal display device in particular can be realized. | 2012-01-19 |
20120013395 | Internal Voltage Generation Circuit - An internal voltage generation circuit includes a driving control signal generation unit configured to receive a temperature signal enabled when the internal temperature is below a preset temperature and generate first and second driving control signals, and an internal voltage generation unit configured to receive the first and second driving control signals and generate an internal voltage. | 2012-01-19 |
20120013396 | SEMICONDUCTOR CIRCUIT AND CONSTANT VOLTAGE REGULATOR EMPLOYING SAME - A semiconductor circuit includes a voltage regulator and a buffer transistor. The voltage regulator converts an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof. The buffer transistor is an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator. | 2012-01-19 |
20120013397 | SEMICONDUCTOR DEVICE - A noise removal circuit is provided having a first holding circuit ( | 2012-01-19 |
20120013398 | Adaptive Spectral Enhancement and Harmonic Separation - A circuit and method perform adaptive spectral enhancement at a frequency ω | 2012-01-19 |
20120013399 | AUTOMATIC GAIN CONTROL CIRCUIT AND AUTOMATIC GAIN CONTROL METHOD - An automatic gain control method includes receiving a sequence of multiple digital data, and calculating a plurality of signal values corresponding to the respective voltage values of the digital data, such as multiple peak-to-peak voltage values or power values, so as to optimize a gain according to variations in the output values. The gain optimization includes updating a reference value according to the signal values. If the reference value is less than a minimum threshold, the gain is increased to cause the reference value to reach the minimum threshold. The gain optimization also includes analyzing a clipping rate according to the signal values. If the clipping rate is equal to zero, then the gain is adjusted up. If the clipping rate is greater than zero, then the gain is adjusted down, such that the clipping rate is decreased to approach to zero. | 2012-01-19 |
20120013400 | Current Control Circuit, Class AB Operational Amplifier System and Current Control Method - A current control circuit for controlling a bias current of a class AB operational amplifier includes: a low current source, for generating a low bias current; a high current source, for generating a high bias current, which is greater than the low bias current; and a comparing and selecting unit, coupled to an output terminal of the class AB operational amplifier, for selecting one of the low bias current and the high bias current to output as the bias current according to an output voltage of the class AB OP. | 2012-01-19 |
20120013401 | POWER AMPLIFIER WITH SELECTABLE LOAD IMPEDANCE AND METHOD OF AMPLIFYING A SIGNAL WITH SELECTABLE LOAD IMPEDANCE - A device includes: a power amplifier, including a supply voltage terminal, an input port and an output port, and the power amplifier being configured to receive a supply voltage at the supply voltage terminal, an input signal through the input port, to amplify the received input signal, and to output an amplified output signal through the output port; a variable impedance matching circuit having an input terminal connected to the output port of the power amplifier, and having an output terminal for being connected to a load; and a controller including a voltage measuring unit configured to measure the supply voltage, to compare the measured supply voltage with a threshold voltage, and to control the variable impedance matching circuit based on a result of the comparison so as to adjust a load impedance seen by the power amplifier at its output port. | 2012-01-19 |
20120013402 | Closed-loop class-d amplifier with modulated reference signal and related method - Disclosed is a closed-loop class-D amplifier circuit including a modulated reference signal generator that provides a modulated reference signal in a feed-forward path, where the reference signal is modulated corresponding to an input signal. The closed-loop class-D amplifier circuit further includes a comparator to generate a control signal based on a comparison of the modulated reference signal and a correction signal, which in turn is produced by filtering a combination of the input signal and a feedback signal. The closed-loop class-D amplifier circuit also includes a pulse generator to generate a pulse-width-modulated signal to drive an output stage of the closed-loop class-D amplifier based on the control signal. | 2012-01-19 |
20120013403 | AMPLIFIER CIRCUIT - An amplifier circuit is configured to be preceded by a single-ended-to-differential translate circuit using a BTL configuration operating at a low voltage and succeeded by amplifiers to amplify output signals VOT and VOB from the single-ended-to-differential translate circuit. The amplifier circuit activates a mute function of the subsequent amplifiers during state transition when the single-ended-to-differential translate circuit turns on. Consequently, the amplifier circuit fixes output signals OUTP and OUTN to 0 V and masks an output noise. The amplifier circuit inactivates the mute function after signals VOT and VOB become stable. Thereby, the amplifier circuit is capable of easily preventing a pop noise using a BTL configuration requested for high voltage output to drive a piezoelectric actuator. | 2012-01-19 |
20120013404 | Method and Apparatus for Broadband Input Matching with Noise and Non-Linearity Cancellation in Power Amplifiers - A CMOS differential power amplifier having broadband input matching with Noise and Non-linearity Cancellation. The broadband input match is realized by using two “Diode-Connected” NFETs (i.e., N-type Field Effect Transistors). Resulting noise degradation is reduced by using a noise cancellation structure. By using the same structure the disclosed method and apparatus also achieves non-linearity cancellation. | 2012-01-19 |
20120013405 | RF DETECTOR WITH CREST FACTOR MEASUREMENT - An RF detector configured to provide two outputs, one being a function of the true RMS power level of an RF input signal, and the other being a function of the instantaneous/peak power of the RF input signal, normalized to the average power level. The RF detector includes a variable gain detection subsystem including a single detector or detector array that provides a representation of the power level of the RF input signal. The detector or detector array is common to both the RMS power detection channel and the instantaneous/peak power detection channel of the RF detector. A method of RF detection includes providing representations of the RF input signal at different gain levels, selecting one or more of the representations, and averaging the selected signals. The gain levels of the selected representations is adjusted to provide information about the average power level of the RF input signal. | 2012-01-19 |
20120013406 | DIGITAL PHASE-LOCKED LOOP CLOCK SYSTEM - A clock system includes a digital phase/frequency detector (DPFD), a buffer, a digitally-controlled oscillator (DCO) including a sigma-delta modulator (SDM), an adder, a first frequency divider. The DPFD may have a first input for a reference input clock, a second input for a feedback signal, the DPFD generating an output representing a difference between the reference input clock and the feedback signal. The buffer may be coupled to the DPFD for accumulating the difference signal over time. The sigma-delta modulator (SDM) may have a control input coupled to the buffer. The adder may have inputs coupled to the (SDM) and a source of an integer control word. The first frequency divider may have an input for a clock signal and a control input coupled to the adder, the DCO generating an output clock signal having an average frequency representing a frequency of the input clock signal divided by (N+F/M), wherein N is determined by the integer control word and F/M is determined by an output of the SDM. The system clock also may include a second frequency divider coupled to the DCO output clock signal outputting the feedback signal to the DPFD. | 2012-01-19 |
20120013407 | METHOD AND SYSTEM FOR COMPENSATION OF FREQUENCY PULLING IN AN ALL DIGITAL PHASE LOCK LOOP - The present invention is a method and system for compensation of frequency pulling in an all digital phase lock loop. The all digital phase lock loop can utilize a multi-phase oscillator including latches with substantially all of the latches paired with a corresponding dummy cell. The dummy cells can have impedance characteristics, such as variable capacitance values which correspond to the variable capacitance value of the latches such that the sum of the two variable capacitance values remains substantially constant, even when the polarity of the reference clock signal changes. The dummy cells can be, for example, variable capacitors or dummy latches. The phase lock loop can also include a multiplying unit. The multiplying unit can receive a reference clock signal and generate a frequency multiplied reference clock signal. | 2012-01-19 |
20120013408 | NETWORK OF TIGHTLY COUPLED PERFORMANCE MONITORS FOR DETERMINING THE MAXIMUM FREQUENCY OF OPERATION OF A SEMICONDUCTOR IC - A circuit interconnection structure for synchronizing a network of oscillators placed on a semiconductor substrate. One such structure comprises a first synchronizing circuit electrically coupled to a second synchronizing circuit through tunable delay circuits. Also disclosed are methods to tune oscillators placed in different regions of a circuit having multiple clock domains by estimating the relative slack of a first group of signals within the circuit with regard to the period of a first clock domain, and estimating the relative slack of the second group of signals within the circuit with regard to the period of second clock domain, wherein the estimating is performed at process and operational corners that cover the variability of the circuit at different speed conditions, then calculating tuning values for the oscillator delays for each region such that the oscillator delay slack matches the worst relative slack of the signals of the same region. | 2012-01-19 |
20120013409 | DIGITAL FREQUENCY/PHASE LOCKED LOOP - A digital FLL/PLL is provided which is capable of converging an oscillation frequency from a VCO to a desired frequency at a high speed even without setting a damping factor corresponding to each VCO gain. A digital FLL/PLL of the present invention includes: a comparator for comparing a channel signal to a loopback signal having an oscillation frequency to generate a signal error; a digital loop filter for generating a control voltage that determines the oscillation frequency, on the basis of the signal error; a VCO for controlling an oscillation frequency on the basis of the control voltage; a loopback path through which the oscillation frequency generated by the VCO is outputted as the loopback signal to the comparator; and a control section for monitoring the signal error, and controlling the digital loop filter such that the oscillation frequency of the VCO becomes a stationary state, when detecting that the signal error meets a predetermined condition after the channel signal is switched. | 2012-01-19 |
20120013410 | METHODS AND APPARATUS FOR CALIBRATION AND TEMPERATURE COMPENSATION OF OSCILLATORS HAVING MECHANICAL RESONATORS - Methods and apparatus for calibration and temperature compensation of oscillators having mechanical resonators are described. The method(s) may involve measuring the frequency of the oscillator at multiple discrete temperatures and adjusting compensation circuitry of the oscillator at the various temperatures. The compensation circuitry may include multiple programmable elements which may independently adjust the frequency behavior of the oscillator at a respective temperature. Thus, adjustment of the frequency behavior of the oscillator at one temperature may not alter the frequency behavior at a second temperature. | 2012-01-19 |
20120013411 | OPTICAL MODULE AND ATOMIC OSCILLATOR - An optical module of an atomic oscillator using a quantum interference effect includes a light source to generate first light including a fundamental wave having a center wavelength, and including a first sideband wave and a second sideband wave having wavelengths that are different from each other, a wavelength selection unit that emits second light by selecting the first sideband wave and the second sideband wave of the first light and by allowing them to pass through, a gas cell in which an alkali metal gas is sealed and to which the second light is irradiated, and a light detection unit that detects an intensity of the second light passing through the gas cell. | 2012-01-19 |
20120013412 | MEMS RESONATOR DEVICES - Embodiments are related to micro-electromechanical system (MEMS) devices, systems and methods. In one embodiment, a MEMS resonating device comprises a resonator element configured to provide timing; and at least one passive temperature compensation structure arranged on the resonator element. | 2012-01-19 |
20120013413 | TIMING OSCILLATORS AND RELATED METHODS - Timing oscillators as well as related methods and devices are described. A timing oscillator may include a mechanical resonating structure with major elements and minor elements coupled to the major element. The timing oscillator can generate stable signals with low phase noise at very high frequencies which allows a timing oscillator to be used effectively in a number of devices including computers and mobile phones for time and data synchronization purposes. The signal generated by the timing oscillator can be tuned using a driver circuit and a compensation circuit. | 2012-01-19 |
20120013414 | CRYSTAL OSCILLATOR CIRCUIT FOR ADJUSTING RESONANT FREQUENCY OF CRYSTAL OSCILLATOR - A crystal oscillator includes a clock generator, first and second capacitors, a crystal oscillator, a variable capacitance diode, and a voltage generating circuit. The crystal oscillator is connected between the input pin and the output pin of the clock generator, and connected between the first terminal of the first capacitor and the first terminal of the second capacitor. The variable capacitance diode is connected between the second terminal of the first capacitor and the second terminal of the second capacitor. The voltage generating circuit is connected between two terminals of the variable capacitance diode to supply different voltages for the variable capacitance diode to change a junction capacitance of the variable capacitance diode, to change a resonant frequency of the crystal oscillator. | 2012-01-19 |
20120013415 | Method of manufacturing packages, package, piezoelectric, vibrator, and oscillator - A method of manufacturing packages includes a welding step for welding a base substrate wafer to a rivet member by heating the base substrate wafer while pressing the same by a forming die from both sides in the thickness direction is provided, wherein a rivet member receiving portion which can receive a distal end of a core member is formed in a receiving die of the forming die, and an inner surface of the rivet member receiving portion is formed into a tapered shape widening from the bottom side toward the opening side. | 2012-01-19 |
20120013416 | IMPEDANCE MATCHING METHODS AND SYSTEMS PERFORMING THE SAME - Provided are an impedance matching method and a matching system performing the same. The method includes: measuring an electrical characteristic of the power transmission line including the matching system and the load; extracting a control parameter for impedance matching from the electrical characteristic of the power transmission line; and controlling the matching system by using the control parameter. The extracting of the control parameter comprises utilizing an analytic coordinate system that quantitatively relates the electrical characteristic of the matching system to the electrical characteristic of the power transmission line. | 2012-01-19 |
20120013417 | Center-tapped Inductor Balun - An electronic balun circuit is provided for converting a single-ended signal into a differential signal and vice versa, comprising a center-tapped inductor having a first node, a center-tap coupled to a constant voltage source, and a second node. A first impedance circuit is coupled with the first node and with a line carrying single-ended signal to and from the first node. A second impedance circuit is coupled with the second node. The first node receives the single-ended signal to produce a differential signal at the first and second nodes. The first and second nodes receive the differential signal to produce the single-ended signal at the first node. Both first and second impedance circuits have an impedance of 2R | 2012-01-19 |
20120013418 | APPARATUS AND METHOD FOR DETECTING TRANSMISSION AND RECEPTION SIGNAL - Provided is a transmission and reception signal detecting apparatus, which includes a directional coupler and a signal detecting part. The directional coupler includes a first port and a second port. The signal detecting part is connected to the first and second ports of the directional coupler and detects an output of a first signal transmitted through the first port and an output of a second signal transmitted through the second port. The signal detecting part is connected to the first port under a first operation condition. The signal detecting part is connected to the second port under a second operation condition. | 2012-01-19 |
20120013419 | RADIO FREQUENCY FILTER AND RADIO FREQUENCY DUPLEXER INCLUDING BULK ACOUSTIC WAVE RESONATORS - A Radio Frequency (RF) duplexer including Bulk Acoustic Wave Resonators (BAWRs) and an RF filter including BAWRs are provided. The RF duplexer may convert the received signal into a balance signal and output the balance signal via a dual-output port. The RF duplexer may also include a BAWR receiving filter unit including an input end to receive the balance signal from the dual-output port, and an output end used for dual output. The RF duplexer may also include a BAWR transmitting filter unit to transmit a transmitted signal to the antenna via a single-output port. | 2012-01-19 |
20120013420 | Absorber Unit For A Bus System - An absorber unit is disclosed for increasing the noise immunity of a system bus. In order to improve the noise immunity of the system bus, the system bus is designed such that communication can take place in a defined communication frequency spectrum. In at least one embodiment, the absorber unit includes a high-pass filter and an absorber resistor. The high-pass filter can be connected to the system bus on the input side and to the absorber resistor on the output side and is dimensioned such that is has a low-impedance effect for noise signals above the communication frequency spectrum so that those signals are absorbed by the absorber resistor. | 2012-01-19 |
20120013421 | Waveguide Structure, High Frequency Module Including Waveguide Structure, and Radar Apparatus - A waveguide structure according to one embodiment includes an upper waveguide and a mode conversion portion. The upper waveguide internally transmits a high frequency signal in TE | 2012-01-19 |
20120013422 | SIGNAL TRANSMISSION COMMUNICATION UNIT AND COUPLER - This disclosure provides a signal transmission communication unit and a coupler that can occupy a small area and have a reduced thickness. The signal transmission communication unit includes a base component including a signal transmission line and a ground electrode, a coupling planar conductor parallel to the base component and having a planar shape, an inductor circuit connected between the coupling planar conductor and the signal transmission line, and an LC-series circuits between part of the coupling planar conductor and the ground electrode and including a capacitor and an inductor connected in series. The inductor circuit is provided between the coupling planar conductor and the base component, and the LC-series connected circuit is provided between the coupling planar conductor and the base component. | 2012-01-19 |
20120013423 | Miniature Magnetic Switch Structures - According to an illustrative embodiment, a switching device structure is provided comprising a cavity defined by a laminated structure; and a moveable member comprising a plurality of laminated layers, wherein the moveable member is suspended from a side surface of the cavity by a hinge comprising a plurality of adjacent electrical conductors. In one embodiment, a current conducting coil is formed within the moveable member, and first and second of the adjacent electrical conductors of the hinge respectively comprise coil-in and coil-out conductors electrically connected to the coil. In such an embodiment, the third and fourth of said electrical conductors may respectively comprise tip and ring conductors. In illustrative embodiments, each of the electrical conductors of the hinge may comprise a resilient or flexible copper material. | 2012-01-19 |
20120013424 | Vehicle Power System And Electrical Contactor For Use With Same - A vehicle power system includes an electrical power source, an electrical bus, and a contactor electrically connected with the electrical power source and electrical bus. The contactor includes first and second poles, dual plungers each operatively associated with one of the first and second poles, and an electromagnetic coil configured to cause at least one of the dual plungers to move if the coil is energized. | 2012-01-19 |
20120013425 | ELECTROMECHANICAL POLARIZATION SWITCH - A solenoid switching method includes energizing a first coil winding to cause a plunger to move in a first direction, and energizing a second coil winding to cause the plunger to move in the opposite direction. Furthermore, the plunger has a first standoff connected to a first end, and a second standoff connected to a second end. The first standoff extends through the first coil winding and the second standoff extends through the second coil winding. The bi-directional solenoid device is configured to physically move a slidable switch between a first position and a second position. Additionally, the plunger stays in position without either of the first coil winding or the second coil winding being energized if the plunger is latched. | 2012-01-19 |
20120013426 | FAST ANCHORING MAGNETIC HOLDER INCLUDING MULTIPLE ATTRACTIVE SURFACES - A fast anchoring magnetic holder including multiple attractive surfaces comprises a first magnet, a second magnet, a first insertion rod and a second insertion rod. The first magnet has a magnetic workstation surface. The second magnet has a magnetic anchor surface. The first and second magnets are stacked together. The first insertion rod and second insertion rod are respectively inserted into the first magnet and second magnet, and are turned to change distribution of the magnetic field of the first magnet and second magnet to alter the magnetic workstation surface and magnetic anchor surface from a non-magnetic state to a magnetic state to attract a working piece to a workstation. | 2012-01-19 |
20120013427 | TRANSFORMER - A transformer includes a tank that is attached under a floor of a vehicle, the tank being for housing an iron core, a coil, and an insulating liquid, thereby immersing the iron core and the coil in the insulating liquid; and a cooling unit for air-cooling the insulating liquid that has flowed from tank and returning the insulating liquid to tank, the cooling unit including a plurality of pipes arranged to be spaced from one another such that a spacing in a region relatively closer to floor of the vehicle is greater than a spacing in a region relatively away from floor of the vehicle. | 2012-01-19 |
20120013428 | STEP-DOWN AUTOTRANSFORMER FOR A POWER DISTRIBUTION SYSTEM WITH NON-LINEAR LOADS - A step-down autotransformer for a power distribution system with 1-phase non-linear loads according to the invention provides at least one output for each phase. In two-output embodiments the outputs in each output pair have a different voltage than the input voltage and are phase-shifted by 30 degrees to cancel or substantially reduce the 5 | 2012-01-19 |
20120013429 | MULTILAYER INDUCTOR AND METHOD OF MANUFACTURING THE SAME - Provided is a multilayer inductor and a method of manufacturing the same. The multilayer inductor includes a plurality of deposited ferrite sheets, a coil part constituted by a plurality of internal electrode patterns and internal electrode vias formed on the plurality of ferrite sheets, non-magnetic vias formed at arbitrary positions of the plurality of ferrite sheets and filled with a non-magnetic material of paste so that a magnetic flux formed around the coil part can be dispersed, and a gap layer formed of a non-magnetic ferrite disposed at a center of the deposited ferrite sheets. Since a non-magnetic via is formed in the multilayer inductor, a magnetic flux propagation path in a coil can be dispersed and blocked to suppress magnetization at a high current and thus improve variation in inductance according to current application. | 2012-01-19 |
20120013430 | MANUFACTURING METHOD OF GRAIN ORIENTED ELECTRICAL STEEL SHEET, GRAIN ORIENTED ELECTRICAL STEEL SHEET FOR WOUND CORE, AND WOUND CORE - A slab having a predetermined composition is heated to 1280° C. or more. The slab is hot-rolled to obtain a hot-rolled steel sheet. The hot-rolled steel sheet is annealed to obtain an annealed steel sheet. The annealed steel sheet is cold-rolled to obtain a cold-rolled steel sheet. The cold-rolled steel sheet is decarburization annealed to obtain a decarburization annealed steel sheet. The decarburization annealed steel sheet is coiled in a coil state. The coil-state decarburization annealed steel sheet is finish-annealed. The cold-rolled steel sheet is heated to a temperature of 800° C. or more at a rate of 30° C./sec or more and 100° C./sec or less during increasing temperature of the cold-rolled steel sheet in the decarburization annealing or before the decarburization annealing. The decarburization annealed steel sheet is heated at a rate of 20° C./h or less within a temperature range of 750° C. or more and 1150° C. or less during increasing temperature of the decarburization annealed steel sheet in the finish annealing. | 2012-01-19 |
20120013431 | FUSE ELEMENT - A fuse element ( | 2012-01-19 |