02nd week of 2015 patent applcation highlights part 24 |
Patent application number | Title | Published |
20150009673 | ILLUMINATION DEVICE - An illumination device includes a base, a light-emitting module, a first layer, and a second layer. The light-emitting module is disposed on the base for generating a progressive-type light-emitting intensity. The first layer encapsulates the light-emitting module. The second layer encloses the first layer. The second layer has a progressive-type thickness corresponding to the progressive-type light-emitting intensity, and both the progressive-type light-emitting intensity and the progressive-type thickness are decreased or increased gradually, thus the progressive-type light-emitting intensity can be transformed into the uniform light-emitting intensity of the second light through the progressive-type thickness of the second layer. | 2015-01-08 |
20150009674 | STRUCTURES SUBJECTED TO THERMAL ENERGY AND THERMAL MANAGEMENT METHODS THEREFOR - Thermal management techniques and methods for various types of structures that require a thermal property, such as thermal conductivity and/or flame retardance, and have a surface in proximity to a source of thermal energy. Such a structure includes a substrate formed of a metallic material or a thermally conductive plastic material, and a white fluoropolymer layer directly on a surface of the substrate without a discrete adhesive layer therebetween. The white fluoropolymer layer defines an outermost surface of the structure, has a reflectivity of greater than 95%, and has a thickness sufficient to inhibit degradation of the thermal property of the structure resulting from impingement of the surface by the thermal energy. | 2015-01-08 |
20150009675 | Recessed Lighting Fixture and Flexibly Attached Compact Junction Box - A recessed lighting fixture includes a lamp housing and a separate compact junction box, which contains a power supply that drives the lamp and serves in part to divide the interior cavity of the junction box into two separate wiring compartments. The junction box has two end walls spaced along an axis and a releasably secured. The lighting fixture is particularly suitable for retrofit installations, especially where small aperture downlights are desired. | 2015-01-08 |
20150009676 | UNIFIED DRIVER AND LIGHT SOURCE ASSEMBLY FOR RECESSED LIGHTING - A compact recessed lighting system is provided. The lighting system includes a light source module and a driver separately coupled to a unified casting. The driver is formed in a “donut” shape such that the light source module may be coupled to the casting in the center hole formed by the driver. The lighting system may also include a reflector that surrounds the light source module and shields the driver from exposure to the area surrounding the lighting system. Based on this configuration, the lighting system provides a compact design that allows the combined casting, light source module, driver, and reflector to be installed in a standard junction box instead of a “can” housing structure to reduce the overall cost of the lighting system while still complying with all building and safety codes/regulations. This configuration also allows the lighting system to achieve a UL fire-rating of at least two hours. | 2015-01-08 |
20150009677 | VARIABLE-BEAM LIGHT SOURCE AND RELATED METHODS - Light sources with arrangements of multiple LEDs (or other light-emitting devices) disposed at or near the focus of a reflecting optic having multiple segments facilitate varying the angular distribution of the light beam (e.g., the beam divergence) via the drive currents supplied to the LEDs. | 2015-01-08 |
20150009678 | REFLECTOR FOR DIRECTED BEAM LED ILLUMINATION - The present disclosure provides systems and techniques for directing light into one or more light beams which converge into an aggregate beam. In certain example embodiments, the present disclosure provides a reflector having one or more reflective curved surfaces for reflecting and focusing light from one or more light emitting diodes (LEDs) into one or more light beams, which make up an aggregate light beam. In certain example embodiments, the reflective curved surfaces are paraboloid surfaces. | 2015-01-08 |
20150009679 | BEAM-CONTROL MEMBER AND ILLUMINATION DEVICE - A beam-control member has a substantially cylindrical holder that is light-permeable, and a first beam-control member disposed on an end surface of the holder, the first beam-control member reflecting part of the light emitted from a light-emitting element and admitting part of the light. A guide protrusion and a tab are provided on the end surface of the holder. A concave portion corresponding to the tab is provided on an outer circumferential part of one surface of the first beam-control member. The first beam-control member is radially mated in a rotatable manner along the guide protrusion. Rotating the first beam-control member on the end surface of the holder so that the tab and the concave portion engage causes the first beam-control member to be secured on the end surface of the holder. | 2015-01-08 |
20150009680 | LENS AND LIGHT EMITTING ELEMENT USING THE SAME - An exemplary lens includes a bottom surface, a first light exit surface extending upwardly from an outer periphery of the bottom surface, a second light exit surface extending upwardly from a top of the first light exit surface, and a reflecting surface extending inwardly and downwardly from a top of the second light exit surface towards the bottom surface to have a funnel-shaped configuration. A receiving space is defined in the bottom surface to receive a light source therein. The receiving space is defined by a top surface and a side surface interconnecting the top surface and the bottom surface. A pyramid surface is in the middle of the top surface and recessed upwardly and inwardly away from the bottom surface. | 2015-01-08 |
20150009681 | ILLUMINATION DEVICE AND DISPLAY DEVICE EQUIPPED WITH SAME - Provided is an illumination device capable of preventing a reflection sheet in the periphery of a light-emitting element from being raised while minimizing the instability in the fixture of a diffusion lens. The illumination device comprises a light-emitting element, a mounting substrate, a diffusion lens, and a reflection sheet having a through-hole. The diffusing lens includes a lens portion for diffusing light, and a fixed portion to be fixed to the mounting substrate. An engaging portion that sandwiches the reflection sheet between the engaging portion and the mounting substrate is formed in the fixed portion. | 2015-01-08 |
20150009682 | LED LIGHT - The present invention is directed towards a light assembly, such as an LED light assembly. A cluster of light beams positioned on a substrate and connected to a power source. The light beams produced by the cluster of LED lights are captured in a mixing chamber and passed through an optical diffusing member. The plurality of light beams will be combined by the combination of the mixing chamber and optical diffuser such that a more uniformed beam is produced. The uniformed beam is then passed through a lens member to be oriented or directed towards the intended location or use of the light beam produced by the light assembly. | 2015-01-08 |
20150009683 | Lens Plate For Illumination Lamp, and Illumination Lamp - A lens plate and an illumination lamp which are not affected by heat from a light source even if the lens plate is small. The lens plate for an illumination lamp has the lens part covering the light source, and the lens part is formed in such a way that a concentric lens pattern is separately formed on an outer central part and an inner peripheral part so as not to be overlapped. | 2015-01-08 |
20150009684 | SURFACE LIGHT SOURCE DEVICE FOR RECORDING/REPRODUCING HOLOGRAMS - A surface light source device is provided. The surface light source device includes a light source, a beam splitter configured to split a light irradiated from the light source into a plurality of light beams each having a different path, a diffusion unit configured to diffuse the plurality of light beams split by the beam splitter into a surface light, and a collimating unit configured to arrange the plurality of light beams diffused from the diffusion unit in one direction. | 2015-01-08 |
20150009685 | PHOSPHOR WHEEL HEAT-DISSIPATING MODULE FOR LASER PROJECTION SYSTEM - A phosphor wheel heat-dissipating module for a laser projection system is provided. The phosphor wheel heat-dissipating module includes a phosphor wheel, a plurality of air vents and an impeller. At least one phosphor agent is coated on an outer-ring portion of a first surface of the phosphor wheel. The air vents run through the phosphor wheel. The impeller is disposed on a second surface of the phosphor wheel, and includes an inlet and a first outlet. A laser beam is projected on the outer-ring portion of the phosphor wheel. When the phosphor wheel is rotated at a high rotating speed, an airflow is inhaled into the impeller through the inlet. A first portion of the airflow is blown out through the first outlet, and a second portion of the airflow is transferred to the first surface of the phosphor wheel through the air vents. | 2015-01-08 |
20150009686 | LIGHT MIXING CHAMBER FOR USE WITH LIGHT GUIDE PLATE - A light mixing chamber includes a housing having a channel formed therein, with the channel exposed to an exterior of the housing. A chamber is formed in the housing, and an aperture formed in the housing connects the chamber to the channel. The chamber may house an LED, with an optical member being retained within the channel. A light guide plate may be positioned on an exterior of the housing outside the channel. | 2015-01-08 |
20150009687 | STRUCTURE FOR GUIDING LIGHT INTO GUIDE LIGHT PLATE TO CONDUCT TOTAL INTERNAL REFLECTION - A structure for guiding light into a light guide plate to conduct total internal reflection comprises a guide light plate and a prism; the prism is integrated with the guide light plate or joined to the guide light plate with an optical adhesive layer; the horizontal surface of the prism is parallel to the upper and lower surfaces of the guide light plate; the maximum angle between the horizontal surface and the slant surface of the prism is only 20 degrees to reduce the thickness of the prism greatly to meet requirements of lightness, thinness, shortness, and smallness for the electronic product; due to a special configuration of the prism and a special arrangement between the guide light plate and the prism, the most part of the light shot to the prism by the light source with any projecting angle is guided into the guide light plate to propagate the total internal reflection such that the light has an intensity capable of being sensed. | 2015-01-08 |
20150009688 | LIGHT SOURCES INCORPORATING LIGHT EMITTING DIODES - Taught herein are various light sources using light emitting diodes. A light source includes a housing, a connector configured for connection to an electrical socket and coupled to an end of the housing, at least one organic light emitting diode sheet mounted inside the housing and in electrical communication with the connector, and a power supply circuit for supplying electrical current to the at least one organic light emitting diode through the connector. | 2015-01-08 |
20150009689 | LED STRIP LAMP HOLDER AND LIGHT BULB - A lamp holder includes an insulating lamp base, a pair of lead frames and an LED strip assembly. The insulating lamp base has two spaced apart through holes. The pair of lead frames is separately inserted in the two through holes. Each lead frame includes a heat conducting section and a supporting section. One end of the heat conducting section is inserted in the through hole, and the other end of the heat conducting section is connected with the supporting section. The two heat conducting sections are extended from the insulating lamp base to separate the two supporting sections from a surface of the insulating lamp base with a distance. The LED strip assembly includes a transparent carrier board, a plural of LED chips and a first transparent glue layer .The transparent carrier board is disposed crossing the two supporting sections. | 2015-01-08 |
20150009690 | LED BULB WITH INTERNAL HEAT DISSIPATING STRUCTURES - An LED based light for replacing an incandescent bulb comprises a base having a first end and a second end; a connector fixed to the first end of the base, the connector adapted to physically connect to an incandescent light fixture; an open-ended light structure extending from the second end of the base, the light structure having an inner surface defining a cavity in fluid communication with an ambient environment and an opposing exterior outer surface; at least one LED arranged outward from the inner surface; and a heat dissipating structure for the at least one LED extending into the cavity. | 2015-01-08 |
20150009691 | PROTECTIVE COVER FOR A LAMP FINIAL - A protective cover adapted to house a lamp finial. The protective cover includes a cavity sized to house a lamp finial, the cavity having an open mouth. At least one tab is coupled to the cavity, preferably coupled to opposing sides of the open mouth of the cavity. An aperture can be disposed on each one of the tabs and a fold line can be disposed between the aperture and the cavity. | 2015-01-08 |
20150009692 | LED LIGHTING DEVICE INCLUDING A DIFFUSER SYSTEM - The invention relates to a lighting device, in particular for a motor vehicle, comprising LEDs secured to a printed circuit board (PCB). The device is characterised in that a system is positioned substantially perpendicularly to the LEDs ( | 2015-01-08 |
20150009693 | LIGHT SOURCE APPARATUS, VEHICLE HEADLAMP AND VEHICLE HEADLAMP SYSTEM - A light source apparatus having a plurality of light-emitting device arrays, each extending in a first direction and adjacently disposed in a second direction that crosses the first direction is disclosed. Each of the plurality of light-emitting device arrays comprises a plurality of light-emitting devices arranged along the first direction and is the same in length. Among the plurality of light-emitting device arrays, the number of the respective light-emitting devices of a first light-emitting device array at one end in a second direction is smaller than the number of the respective light-emitting devices of a second light-emitting device array adjacent to the first light-emitting device array. The surface area of the light-emitting units of the respective light-emitting devices of the first light-emitting device array is larger than that of the light-emitting units of the respective light-emitting devices of the second light-emitting device array adjacent to the first light-emitting device array. | 2015-01-08 |
20150009694 | VEHICLE HEADLAMP, VEHICLE HEADLAMP SYSTEM - To provide a technique capable of achieving AFS control without using mechanical means. A vehicle headlamp for forming a low beam that illuminates a relatively lower region of a space in front of a vehicle, including a first light source apparatus for forming a first irradiating light, a second light source apparatus for forming a second irradiating light with a width in the up-down direction that is smaller than that of the first irradiating light on an upper end side of the first irradiating light, and a lens that projects the light emitted from the first light source apparatus and the second light source apparatus, respectively, wherein the second light source apparatus includes a first light-emitting device array that extends in a first direction, and the first light-emitting device array includes a plurality of light-emitting devices capable of being individually turned on and off, arranged along the first direction. | 2015-01-08 |
20150009695 | Lighting Device for Headlights with a Phase Modulator - There is provided a lighting device arranged to produce a controllable light beam for illuminating a scene. The device comprises an addressable spatial light modulator arranged to provide a selectable phase delay distribution to a beam of incident light. The device further comprises Fourier optics arranged to receive phase-modulated light from the spatial light modulator and form a light distribution. The device further comprises projection optics arranged to project the light distribution to form a pattern of illumination as said controllable light beam. | 2015-01-08 |
20150009696 | LIGHTING DEVICE, LIGHTING FITTING, AND VEHICLE - A lighting device including: a light guide which is elongated and has a first end portion with an entrance surface; and a light source provided facing the entrance surface of the light guide, wherein the light guide includes: a reflective surface between the first end portion and a second end portion of the light guide; and an exit surface opposite the reflective surface, the reflective surface includes a plurality of grooves which extend in a direction oblique to a direction perpendicular to an extending direction of the light guide in a first region between the first end portion and the second end portion, and the exit surface includes a concave portion which extends from the first end portion toward the second end portion. | 2015-01-08 |
20150009697 | VEHICULAR LIGHTING UNIT - A vehicular lighting unit includes: a first light source in the form of an LED for providing illumination forward or rearward of a vehicle body, the first light source being mounted on one surface of a base plate in an orientation corresponding to the direction of the illumination; a second light source in the form of an LED for providing illumination laterally outward of the vehicle body, the second light source being mounted on another surface of the base plate; and a reflection section provided near the second light source for reflecting light emitted from the second light source laterally outward of the vehicle body | 2015-01-08 |
20150009698 | LAMP FOR VEHICLE AND VEHICLE HAVING THE SAME - A lamp for a vehicle is provided. The lamp includes an LED array in which a plurality of LEDs is aligned at the same position based on an illumination direction, an aspherical lens which is disposed in front of the LED array, and a plurality of reflectors on the plurality of LEDs so as to reflect light emitted from the LEDs to the aspherical lens, in which a distance from a rear end to a front end of the reflector based on the illumination direction becomes greater as the reflector is disposed farther away from an optical axis that passes through a focal point of the aspherical lens, and the lamp reduces an aberration so as to prevent a light blurring phenomenon. | 2015-01-08 |
20150009699 | VEHICULAR HEADLAMP - An object of the present disclosure is to provide a vehicular headlamp having good mountability onto a vehicle body by forming a vehicular headlamp in conformity with a mounting space for the vehicular headlamp formed in a vehicle body. The vehicular headlamp includes a lamp unit provided with a light source and configured to be pivotable in a predetermined direction; an actuator configured to pivot the lamp unit to adjust an irradiation direction of light emitted from the light source; and a connecting mechanism configured to connect the lamp unit and the actuator to transmit a driving force of the actuator to the lamp unit. The actuator is disposed in front of or behind the lamp unit. Therefore, the vehicular headlamp is formed in conformity with a mounting space for the vehicular headlamp formed in a vehicle body, and thus, good mountability onto a vehicle body may be ensured. | 2015-01-08 |
20150009700 | LAMP UNIT - A lamp unit has a first light source, a second light source which is illuminated when the first light source is turned off, and a projection lens having a first entering surface which is associated with a first focal point and a second entering surface which is associated with a second focal point. Light emitted from the first light source is incident on the first entering surface and passes through the projection lens. The second light source is disposed between the first light source and the projection lens in a position through which light emitted from the first light source to reach the first entering surface does not pass. Light emitted from the second light source is incident on the second entering surface and passes through the projection lens. | 2015-01-08 |
20150009701 | RETROFIT LED LIGHT SOURCE FOR VEHICLE LAMPS - A lamp including a lamp base, an LED driver circuit connected to the lamp base, an LED light source connected to the driver circuit and located distal from the lamp base, and a power consumption/heat dissipating unit electrically connected to the lamp base. The LED driver circuit and the power consumption/heat dissipating unit being electrically parallel to the lamp base terminals. The lamp includes a pin jumper block in electrical connection with the power consumption/heat dissipating unit, and configured to electrically isolate the power consumption/heat dissipating unit from the lamp base with insertion or removal of a pin jumper. | 2015-01-08 |
20150009702 | SEMICONDUCTOR LIGHT-EMITTING MODULE AND VEHICLE LUMINAIRE - A semiconductor light-emitting module includes a housing, at least one cooling body accommodated in the housing wherein the cooling body is thermally connected to at least one semiconductor light source, an active cooling device accommodated in the housing, and at least one electronics unit accommodated in the housing, at least for actuating the at least one semiconductor light source, wherein the housing has a leadthrough opening, and the at least one semiconductor light source is arranged in the region of the leadthrough opening. | 2015-01-08 |
20150009703 | LIGHT EMITTING DEVICE - The light emitting device according to the present invention comprises a laser diode; a wavelength converting member which is configured to convert a wavelength of a light emitted from the laser diode; and a support member which is configured to support the wavelength converting member so that the light passes through two surfaces of the wavelength converting member. The wavelength converting member comprises a fluorescent material and a binder. At least one light transmissive member is disposed on at least one of these two surfaces of the wavelength converting member. The binder has a melting point higher than a melting point of the light transmissive member. The light transmissive member is fixed to the support member by fusion bonding. | 2015-01-08 |
20150009704 | Fiber-optic illumination system - A fiber-optic illumination system provides lighting via a small number of low energy lighting elements, from which light is transmitted via fiber optic cables to the specific locations where illumination is needed. Low energy light elements, such as LEDs may be housed centrally at an illuminator with light distributed to where illumination is needed via fiber optic cables, resulting in reduced energy costs and simplified system maintenance. | 2015-01-08 |
20150009705 | Light Emitting Device and Lighting Device - According to an embodiment, a light emitting device includes: a light emitting section that has a light emitting element; a wavelength conversion section that absorbs light radiated from the light emitting section and emits the light having a wavelength different from that of the light radiated from the light emitting section; and a light guide section that is provided between the light emitting section and the wavelength conversion section and to propagate the light radiated from the light emitting section, and includes a first irradiation surface which radiates the propagated light toward a position in which the wavelength conversion section is provided, and a second irradiation surface which radiates the propagated light toward a position different from the position in which the wavelength conversion section is provided. | 2015-01-08 |
20150009706 | OPTICAL STRUCTURES INCLUDING NANOCRYSTALS - An optical structure can include a nanocrystal on a surface of an optical waveguide in a manner to couple the nanocrystal to the optical field of light propagating through the optical waveguide to generate an emission from the nanocrystal. The structure can be configured to restrict propagation of the emission from the nanocrystal along the waveguide. | 2015-01-08 |
20150009707 | Lighting Device Comprising A Light Guide and a Support - A lighting device ( | 2015-01-08 |
20150009708 | SIDE-LIGHTING BACKLIGHT AND LIQUID CRYSTAL DISPLAY COMPRISING THE SAME - The present disclosure relates to the technical field of flat panel display, and proposes a side-lighting backlight, including a back plate on which a reflecting plate is arranged, an optical sheet assembly spaced from the back plate to form an optical cavity therebetween, and a light-emitting element arranged on one side of the back plate, wherein a convex lens is arranged between the reflecting plate and the optical sheet assembly, so that light from the light-emitting element is guided into the optical cavity through the convex lens and then exits through the optical sheet assembly, and the distance between the convex lens and the light-emitting element is greater than a light coupling distance. The convex lens can also function to keep the distance between the optical sheet assembly and the reflecting plate constant. The side-lighting backlight according to the invention has a lighter weight, a thinner thickness and a greatly simplified manufacturing process over a backlight in the prior art. | 2015-01-08 |
20150009709 | LIGHT GUIDE PLATE AND BACKLIGHT UNIT - This invention relates to a light guide plate and a backlight unit, and more particularly, to a light guide plate and a backlight unit, wherein the light guide plate includes a light incident part to which light is incident from a light source located at a lateral side of the light guide plate and which is imparted with patterns, in which the patterns are formed such that a pattern-dense region and a pattern-sparse region are periodically repeated, and the pattern density between the pattern-dense region and the pattern-sparse region varies in a gradation, thus increasing luminance uniformity without affecting the luminance. | 2015-01-08 |
20150009710 | LIGHTING DEVICE AND FLAT PANEL DISPLAY HAVING THE LIGHTING DEVICE - Provided are a lighting device and a flat panel display having the lighting device, the lighting device, including: a support substrate; a circuit board on the support substrate; light emitting devices mounted on the circuit board; and a light guide plate having a protruding portion protruding to a remaining region except for a region in which the light emitting devices are disposed. | 2015-01-08 |
20150009711 | LIGHT GUIDE PLATE WITH SHARP-EDGED PRISMS AND SIDE-EDGE TYPE SURFACE-EMISSION OPTICAL APPARATUS INCLUDING THE SAME - In a light guide plate having a light incident surface, a light distributing control surface perpendicular to the light incident surface and a light emitting surface opposing the light distributing control surface, a flat mirror-finish portion is provided on a first area of the light distributing control surface, and a prism sequence is provided on a second area of the light distributing control surface where the flat mirror-finish portion is not provided. The prism sequence is protruded with respect to the flat mirror-finish portion. Each prism of the prism sequence has a rising sloped surface opposing the light incident surface, a first falling sloped surface connected to the rising sloped surface, and a second falling sloped surface connected to the first falling sloped surface, A slope of the first falling sloped surface is larger than a slope of the second falling sloped surface. | 2015-01-08 |
20150009712 | DISPLAY DEVICE HAVING IMPROVED ILLUMINATION CHARACTERISTICS - A display device includes a display panel including a display area in which an image is displayed, and a light unit that includes: a light guide plate including a light receiving surface and a light emitting surface; a light source spaced apart from the light receiving surface while facing the light receiving surface and overlapping the display area; and a light diffusion member extending between the light receiving surface and the light source. The light diffusion member includes at least one of a first pattern formed on a surface of the light diffusion member facing the light emitting surface, and a second pattern formed on another surface of the light diffusion member, thereby implementing uniform brightness across the whole surface of the display panel. | 2015-01-08 |
20150009713 | DISPLAY DEVICE - A display device includes: a light guide member under the display panel and including a light incident surface; a heat discharge member including a heat discharge surface which extends in a first direction opposite to the light incident surface of the light guide member, and a first flat surface which extends in a second direction from the heat discharge surface; and a light source on the heat discharge member, which provides light to the light incident surface and includes a light emitting device on the heat discharge surface and including a light emitting surface opposite to the light incident surface, a circuit board on the first flat surface of the heat discharge member and electrically connected to the light emitting device, and a heat discharge portion on the heat discharge member and which couples the light emitting device to the heat discharge surface of the heat discharge member and discharges a heat generated from the light emitting device. | 2015-01-08 |
20150009714 | LIGHT SOURCE SUBSTRATE AND LIGHT SOURCE MODULE - To provide a light source substrate in an edge-light-type light source module, with which a defect generated by contacting of a sealing member of the light source substrate coming into contact with a lightguide plate can be prevented and reliability and safety can be improved. A light source substrate has a plurality of light-emitting elements (LED elements | 2015-01-08 |
20150009715 | POWER SAVING CURRENT MEASURING APPARATUS AND POWER CONVERTER USING SAME - Disclosed is a power saving current measuring apparatus which includes a sensing resistor; a switch that is connected to the sensing resistor in parallel; a controller that controls on and off operations of the switch; and a current measuring unit that measures current flowing in the sensing resistor, wherein when the switch is turned on, the controller controls the current to bypasses the sensing resistor to flow to the switch, and when the switch is turned off, the controller controls the current to flow in the sensing resistor. | 2015-01-08 |
20150009716 | POWER CONVERSION DEVICE AND METHOD FOR DRIVING SAME - An electric power conversion device includes a primary circuit having a resonance inductor, a switch unit, and a primary winding of a transformer. A secondary circuit supplies an electric power to primary winding of transformer to supply an energy generated on secondary winding to a load. Switch unit includes first and second diodes connected in parallel to each other, first and second switching elements and a resonance capacitor. Furthermore, secondary circuit includes an output inductor between secondary windings and load. This structure achieves reductions of a loss, a size, and a cost and makes possible to suppress a destruction possibility of semiconductor elements and a worsening of a power factor. | 2015-01-08 |
20150009717 | SWITCHING POWER SUPPLY - A switching power supply of certain aspects of the invention includes a minimum dead time generating circuit that generates a minimum dead time from an OFF timing of an ON pulse detected from the voltage across an auxiliary winding of the transformer by a differentiating circuit. An ON width-determining means of a voltage control oscillator is started, after this minimum dead time, into operation to determine the ON width of the semiconductor switch. | 2015-01-08 |
20150009718 | METHOD AND APPARATUS FOR EXTENDING ZERO-VOLTAGE SWITCHING RANGE IN A DC TO DC CONVERTER - Method and apparatus for extending a zero voltage switching (ZVS) range during power conversion. In one embodiment, the apparatus comprises a DC/DC converter, operated in a quasi-resonant mode, comprising a transformer; a primary switch, coupled to a primary winding of the transformer, for controlling current flow through the primary winding; and a component coupled to the transformer, wherein the component has a capacitance that varies with voltage across the component, and wherein during a downswing in voltage across the primary switch the component is passively tuned by a change in the voltage across the component that changes the capacitance of the component, and wherein the passive tuning of the component causes a resonant frequency of the DC/DC converter to change, and wherein the change in the resonant frequency causes the downswing to accelerate. | 2015-01-08 |
20150009719 | SOFT-START SWITCHING POWER CONVERTING APPARATUS - A switching power converting apparatus includes a voltage conversion module, a detecting unit, and a switching signal generating unit. The voltage conversion module converts an input voltage into an output voltage associated with a secondary side current, which flows through a secondary winding of a transformer and is generated based on a switching signal. The detecting unit generates a detecting signal based on the output voltage and a predetermined reference voltage. The switching signal generating unit generates the switching signal based on the detecting signal and an adjusting signal so that the secondary side current is gradually increased during a start period of the switching power converting apparatus. | 2015-01-08 |
20150009720 | METHOD AND APPARATUS FOR CONTROLLING THE MAXIMUM OUTPUT POWER OF A POWER CONVERTER - An example control circuit for use in a power converter includes an input voltage sensor, a current sensor, and a drive signal generator. The input voltage sensor generates a first signal representative of an input voltage (Vin) of the power converter. The current sensor generates a second signal representative of a switch current through a power switch of the power converter. The drive signal generator generates a drive signal to control switching of the power switch in response to the first and second signals. The drive signal generator adjusts a duty cycle of the drive signal based on a product K×Vin×t to control a maximum output power of the power converter, where K is a fixed number and t is a time it takes the second signal to change between two values of the switch current when the power switch is in an on state. | 2015-01-08 |
20150009721 | VOLTAGE CONVERTER CONTROLLER AND VOLTAGE CONVERTER CIRCUIT - A voltage converter controller and a voltage converter circuit, either of which includes a voltage-drop compensating circuit for compensating a voltage drop between an output voltage and a load. The voltage-drop compensating circuit includes a trans-conductance stage and a squarer. The trans-conductance stage outputs a compensating sink current to a voltage dividing terminal of the output voltage and outputs a compensating source current to a reference voltage terminal of an error amplifier. An input terminal of the squarer is coupled to an output terminal of the error amplifier. An output terminal of the squarer is coupled to an input terminal of the trans-conductance stage. | 2015-01-08 |
20150009722 | POWER SUPPLY - Provided is regulation of a line current. The regulation of the line current includes comparing a reference voltage with a line sensing voltage to generate a feedback voltage, and controlling a switching operation of a power switch using the feedback voltage. The reference voltage may be a voltage having a constant level, a voltage which varies according to an output current, or a voltage which follows a sine wave to compensate a power factor. Provided is sensing of an output current. The sensing of the output current includes sensing the output current using a feedback voltage corresponding to a voltage between both terminals of an inductor connected to a power switch, a peak of current flowing through the power switch, and a switching cycle of the power switch. | 2015-01-08 |
20150009723 | POWER CONVERSION CIRCUIT - A diode bridge has a pair of input ends to which an alternating current is inputted from an AC power supply, and a pair of output ends which output a direct current. A boost chopper circuit is connected to the pair of output ends, and sets up a DC voltage inputted thereto. The boost chopper circuit functions as a power factor correction circuit. A smoothing capacitor is connected to an output side of the boost chopper circuit, and smoothes the voltage across the smoothing capacitor. An inverter receives the voltage across the smoothing capacitor to apply AC power to a load. A leakage current reduction device outputs a compensating current which compensates for a leakage current leaking from the load. The leakage current reduction device outputs the compensating current, except near the zero crossing of an AC voltage inputted from the AC power supply. | 2015-01-08 |
20150009724 | Solar Power Conditioning Unit - The present invention relates to a power conditioning unit for delivering power from a dc power source to an ac output, particularly ac voltages greater than 50 volts, either for connecting directly to a grid utility supply, or for powering mains devices independent from the mains utility supply. We describe a power conditioning unit for delivering power from a dc power source to an ac mains output, the power conditioning unit comprising an input for receiving power from said dc power source, an output for delivering ac power, an energy storage capacitor, a dc-to-dc converter having an input connection coupled to said input and an output connection coupled to the energy storage capacitor, and a dc-to-ac converter having an input connection coupled to said energy storage capacitor and an output connection coupled to said output, wherein said energy storage capacitor has a capacitance of less than twenty microfarads. | 2015-01-08 |
20150009725 | POWER CONVERSION CIRCUIT - A converter to which an alternating current is inputted from an AC power supply rectifies the alternating current to output it to a DC link. An inverter is connected through the DC link to the converter and converts a direct current into an alternating current to output it to a load. A leakage current detector outputs a detection current corresponding to a leakage current leaking from the load. A compensating current output end is connected to a location where the leakage current leaks, and outputs a compensating current compensating for the leakage current in response to the detection current. A switch sets whether to input the detection current to the compensating current output section or not. | 2015-01-08 |
20150009726 | GROUND SCHEME IDENTIFICATION METHOD - The present techniques include methods and systems for detecting the grounding condition of an electrical system to automatically determine a suitable electrical drive configuration. The drive includes a test resistor which may be connected or disconnected from the drive to measure different drive voltages. The measured drive voltages are analyzed to determine a type of grounding configuration of the electrical system in which the drive is to be installed. Embodiments also include determining ground resistance condition such as a high resistance ground (HRG) fault or a ground resistance fault when the drive is in operation. | 2015-01-08 |
20150009727 | POWER CONVERTER WITH LOW COMMON MODE NOISE - The present invention relates to a power converter with low common mode noise, at least comprising: a ground terminal, a power converting unit, a capacitor unit of common DC bus, a filtering capacitor unit, a filtering inductor unit, and a compensation unit. In the present invention, a filtering inductor unit including three primary windings and three auxiliary windings is used for making the power converting unit couple to three phase terminals of an external electrical apparatus. Moreover, the three auxiliary windings are further formed a compensation circuit by way of being connected with the compensation unit, such that the engineer is able to easily and effectively suppress the common mode noise occurring near the resonant frequency of the power converting apparatus through selecting a suitable turns ratio of the primary windings and the auxiliary windings. | 2015-01-08 |
20150009728 | DC POWER SUPPLY CIRCUIT - In a DC power supply circuit, a first period and a second period are alternately repeated a plurality of times during each half cycle of AC supplied to the DC power supply circuit. The first period is a period during which current flows along a first current path extending from an output terminal at a high-potential side of a rectifier circuit to an output terminal at a low-potential side of the rectifier circuit, via an inductor and a switching element. The second period is a period during which current flows along a second current path extending from the output terminal at the high-potential side of the rectifier circuit to the output terminal at the low-potential side of the rectifier circuit, via the inductor, a charging current supply path, and a capacitor. | 2015-01-08 |
20150009729 | CIRCUIT HAVING A FAULT PROTECTING FUNCTION - A circuit includes a switching module, a control module, and a driving module. The driving module is electrically coupled between the control module and the switching module for generating a driving signal. The driving module includes a normal driving unit and a fault protection unit. The normal driving unit is for turning on and off the switching module according to a first command signal from the control module. The fault protection unit is for lowering the driving signal from a driving value to a protection value according to a second command signal from the control module during a fault protection period after the control module receives a fault signal. | 2015-01-08 |
20150009730 | CONTROL OF AN INDUCTIVE LOAD WITH TEMPERATURE-SENSITIVE CURRENT REDUCTION MECHANISM - The control of an inductive load is implemented by a control strategy to generate a control signal for a switching element on the basis of a setpoint datum, with a mechanism defining a maximum permitted value (Imax) of the current in the load as a function of the temperature at the level of the switching element. The mechanism exhibits a temperature threshold (Tshd). The maximum permitted value (Imax) of the current is held constant, equal to an upper limit value (Isup), during a temperature climb phase for all the temperatures which are lower than the threshold. The maximum permitted value of the current is abruptly rendered equal to a lower limit value (Iinf) as soon as the temperature reaches the threshold. Finally, during a temperature descent phase, the maximum permitted value of the current gradually climbs back to the upper limit value as the temperature decreases. | 2015-01-08 |
20150009731 | MULTILEVEL INVERTER - The present disclosure proposes an input power of each unit power cell of a cascaded H-bridge inverter that is mutually insulated. To this end, the present disclosure includes a phase shift transformer configured to output a voltage of predetermined phase by receiving an AC input power having a fixed frequency, and a plurality of unit power cells serially-connected configured to output a voltage having a predetermined phase by receiving a voltage provided by the phase shift transformer, wherein the phase shift transformer is configured to include the number of phase shifts corresponding to the number of the plurality of unit power cells. | 2015-01-08 |
20150009732 | CONTROL UNIT FOR AN INVERTER LOADED BY A RESONANT LOAD NETWORK - An inverter may include at least two switching means for feeding a series oscillator circuit from a source, wherein a control device of the inverter controls the switching means in such a way that: in a first mode A, the inverter feeds the oscillator circuit via the switching means from the source; and in a second mode B, the oscillator circuit is decoupled from the source, wherein the control device switches back and forth between the two modes A and B to set a reference current in the oscillator circuit or a reference voltage on the oscillator circuit. | 2015-01-08 |
20150009733 | POWER SUPPLY SYSTEM AND POWER SOURCE APPARATUS - A power supply system that comprises an electrical storage device; a power conversion circuit configured to convert a power from the electrical storage device into converted DC power; and a power control unit configured to receive the converted DC power and output AC power. The converted DC power is controlled such that the output AC power is a predetermined AC power. | 2015-01-08 |
20150009734 | ELECTRICAL CIRCUIT AND METHOD FOR OPERATION THEREOF - A method for the operation of an electrical circuit taking the form of a multi-level half-bridge (MLHB), and a multi-level half-bridge designed for implementation of the method, comprising two connections to which a bridge voltage is applied and which are connected via two symmetrical branches meeting at a central connection, wherein a central voltage is applied to the central connection against the potential of one of the connections. | 2015-01-08 |
20150009735 | Transferring Electrical Power for Subsea Applications - A method for transferring electrical power in the sea includes generating AC power, guiding, at least partially underwater, the AC power through a cable from a first end of the cable to a second end of the cable, and changing a frequency of the AC power guided through the cable based on a value of power consumption of a load connected to the second end of the cable. | 2015-01-08 |
20150009736 | APPROXIMATE MULTI-LEVEL CELL MEMORY OPERATIONS - The present technology relaxes the precision (or full data-correctness-guarantees) requirements in memory operations, such as writing or reading, of MLC memories so that an application may write and read a digital data value as an approximate value. Types of MLCs include Flash MLC and MLC Phase Change Memory (PCM) as well as other resistive technologies. Many software applications may not need the accuracy or precision typically used to store and read data values. For example, an application may render an image on a relatively low resolution display and may not need an accurate data value for each pixel. By relaxing the precision or correctness requirements is a memory operation, MLC memories may have increased performance, lifetime, density, and/or energy efficiency. | 2015-01-08 |
20150009737 | SELF-REFRESH ADJUSTMENT IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS - Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal. | 2015-01-08 |
20150009738 | PAD SELECTION IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS - Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal. | 2015-01-08 |
20150009739 | MEMORY DEVICES WITH SERIALLY CONNECTED SIGNALS FOR STACKED ARRANGEMENTS - Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal. | 2015-01-08 |
20150009740 | LATENCY ADJUSTMENT BASED ON STACK POSITION IDENTIFIER IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS - Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal. | 2015-01-08 |
20150009741 | VALID COMMAND DETECTION BASED ON STACK POSITION IDENTIFIERS IN MEMORY DEVICES CONFIGURED FOR STACKED ARRANGEMENTS - Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal. | 2015-01-08 |
20150009742 | SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED FUSE SENSING RELIABILITY IN SLOW POWER-UP OPERATION AND METHOD FOR READING FUSE BLOCK THEREBY - Provided is a semiconductor memory device with improved fuse sensing reliability during a slow power-up operation. The semiconductor memory device may include a memory cell array including a normal memory cell array and a spare memory cell array; an anti-fuse circuit supplied with a first voltage and configured to store fail address information associated with a defective memory cell in the normal memory cell array and configured to sense the fail address information in response to a clock signal applied during a power-up period; and a fuse read circuit including a clock generator supplied with a second voltage, the fuse read circuit configured to detect respective levels of the first and second voltages during the power-up period to generate the clock signal and to read the sensed fail address information from the anti-fuse circuit in response to the clock signal. | 2015-01-08 |
20150009743 | Low-Pin-Count Non-Volatile Memory Interface for 3D IC - A low-pin-count non-volatile (NVM) memory to be provided in an integrated circuit for a 3D IC to repair defects, trim devices, or adjust parameters is presented here. At least one die in a 3D IC can be built with at least one low-pin-count OTP memory. The low-pin-count OTP memory can be built with a serial interface such as I2C-like or SPI-like of interface. The pins of the low-pin-count OTP in at least one dies can be coupled together to have only one set of low-pin-count bus for external access. With proper device ID, each dies in a 3D IC can be accessed individually for soft programming, programming, erasing, or reading. This technique can improve the manufacture yield, device, circuit, or logic performance or to store configuration parameters for customization after 3D IC are built. | 2015-01-08 |
20150009744 | NON-VOLATILE MEMORY DEVICE - The invention concerns a memory device comprising: a first memory cell comprising a first resistive non-volatile data storage element programmable to store a first bit of data; and a second memory cell comprising a second resistive non-volatile data storage element programmable to store a second bit of data; wherein said first resistive element is configured to have a first data retention duration, and said second resistive element is configured to have a second data retention duration different from said first data retention duration. | 2015-01-08 |
20150009745 | HIGH OPERATING SPEED RESISTIVE RANDOM ACCESS MEMORY - Providing for resistive random access memory (RRAM) having high read speeds is described herein. By way of example, a RRAM memory can be powered at one terminal by a bitline, and connected at another terminal to a gate of a transistor having a low gate capacitance (relative to a capacitance of the bitline). With this arrangement, a signal applied at the bitline can quickly switch the transistor gate, in response to the RRAM memory being in a conductive state. A sensing circuit configured to measure the transistor can detect a change in current, voltage, etc., of the transistor and determine a state of the RRAM memory from the measurement. Moreover, this measurement can occur very quickly due to the low capacitance of the transistor gate, greatly improving the read speed of RRAM. | 2015-01-08 |
20150009746 | Solid-State Quantum Memory Based on a Nuclear Spin Coupled to an Electronic Spin - A system comprising a solid state lattice containing an electronic spin coupled to a nuclear spin; an optical excitation configuration which is arranged to generate first optical radiation to excite the electronic spin to emit output optical radiation without decoupling the electronic and nuclear spins; wherein the optical excitation configuration is further arranged to generate second optical radiation of higher power than the first optical radiation to decouple the electronic spin from the nuclear spin thereby increasing coherence time of the nuclear spin; a first pulse source configured to generate radio frequency (RF) excitation pulse sequences to manipulate the nuclear spin and to dynamically decouple the nuclear spin from one or more spin impurities in the solid state lattice so as to further increase the coherence time of the nuclear spin; a second pulse source configured to generate microwave excitation pulse sequences to manipulate the electronic spin causing a change in intensity of the output optical radiation correlated with the electronic spin and with the nuclear spin via the coupling between the electronic spin and the nuclear spin; and a detector configured to detect the output optical radiation correlated with the electronic spin and the nuclear spin so as to detect a nuclear spin state of the nuclear spin. | 2015-01-08 |
20150009747 | PHASE SWITCHABLE BISTABLE MEMORY DEVICE, A FREQUENCY DIVIDER AND A RADIO FREQUENCY TRANSCEIVER - A phase switchable bistable memory device comprising a bistable memory component and a phase switching component is described. The bistable memory component comprises a bistable memory stage arranged to receive an input signal and a state transition stage arranged to receive a state transition signal and to cause the bistable memory stage to capture a logical state of the received input signal upon a transition from a first logical state of the state transition signal to a second logical state of the state transition signal. The phase switching component is arranged to receive a clock input signal and a phase control signal, and to output the state transition signal comprising transitions between logical states corresponding to transitions between logical states of the clock input signal and comprising a phase relative to the clock input signal based at least partly on the received phase control signal. | 2015-01-08 |
20150009748 | DATA OUTPUT TIMING CONTROL CIRCUIT FOR SEMICONDUCTOR APPARATUS - A data output timing control circuit for a semiconductor apparatus includes a phase adjustment unit. The phase adjustment unit is configured to shift a phase of a read command as large as a code value of the delay control code in sequential synchronization with a plurality of delayed clocks obtained by delaying the external clock as large as predetermined delay amounts, respectively, delay the shifted read command as large as the variable delay amount, and output the result of delay as an output enable flag signal. | 2015-01-08 |
20150009749 | MEMORY CELL ARRAY - A memory cell array includes a bit line, a complementary bit line, a first operation voltage supply circuit, a second operation voltage supply circuit, a first memory cell and a second memory cell. The first operation voltage supply circuit is electrically coupled to the bit line and the complementary bit line and used for supplying a first operation voltage. The second operation voltage supply circuit is electrically coupled to the bit line and the complementary bit line and used for supplying a second operation voltage. The first memory cell is electrically coupled to the bit line and the complementary bit line and used for receiving the first operation voltage. The second memory cell is electrically coupled to the bit line and the complementary bit line and used for receiving the second operation voltage. The first and second memory cells are located in a same column in the memory cell array. | 2015-01-08 |
20150009750 | DEVICE INCLUDING A DUAL PORT STATIC RANDOM ACCESS MEMORY CELL AND METHOD FOR THE FORMATION THEREOF - A device includes a substrate and a dual port static random access memory cell. The substrate includes an N-well region, a first P-well region and a second P-well region. The first and second P-well regions are arranged on opposite sides of the N-well region and spaced apart along a width direction. The static random access memory cell includes first and second pull-up transistors that are provided in the N-well region, a first pair of pull-down transistors and a first pair of access transistors provided in the first P-well region, and a second pair of pull-down transistors and a second pair of access transistors provided in the second P-well region. Each of the first pair and the second pair of pull-down transistors includes a first pull-down transistor and a second pull-down transistor. Active regions of the first pull-down transistor and the second pull-down transistor are spaced apart along the width direction. | 2015-01-08 |
20150009751 | METHODS AND SYSTEMS TO SELECTIVELY BOOST AN OPERATING VOLTAGE OF, AND CONTROLS TO AN 8T BIT-CELL ARRAY AND/OR OTHER LOGIC BLOCKS - Methods and systems to provide a multi-Vcc environment, such as to selectively boost an operating voltage of a logic block and/or provide a level-shifted control to the logic block. A multi-Vcc environment may be implemented to isolate a Vmin-limiting logic block from a single-Vcc environment, such as to reduce Vmin and/or improve energy efficiency in the single-Vcc environment. The logic block may include bit cells of a register file, a low-level processor cache, and/or other memory system. A cell Vcc may be boosted during a read mode and/or write wordlines (WWLs) and/or read wordlines (RWLs) may be asserted with boost. A wordline decoder may include a voltage level shifter with differential split-level logic, and a dynamic NAND, which may include NAND logic, a keeper circuit, and logic to delay a keeper control based on a delay of the level shifter to reduce contention during an initial NAND evaluation phase. | 2015-01-08 |
20150009752 | PHASE CHANGE MEMORY DEVICE HAVING MULTI-LEVEL AND METHOD OF DRIVING THE SAME - A phase change memory device having a multi-level and a method of driving the same are presented. The disclosed phase change memory device includes variable resistors and shifting units. The variable resistors are interchanged into set and reset states in response to an applied current. The shifting units, which are connected to the variable resistors, shift resistance distribution in the set and reset state of the variable resistors by a predetermined level. | 2015-01-08 |
20150009753 | PHASE CHANGE MEMORY DEVICE HAVING MULTI-LEVEL AND METHOD OF DRIVING THE SAME - A phase change memory device having a multi-level and a method of driving the same are presented. The disclosed phase change memory device includes variable resistors and shifting units. The variable resistors are interchanged into set and reset states in response to an applied current. The shifting units, which are connected to the variable resistors, shift resistance distribution in the set and reset state of the variable resistors by a predetermined level. | 2015-01-08 |
20150009754 | PARTIAL BLOCK ERASE ARCHITECTURE FOR FLASH MEMORY - A method and system for increasing the lifespan of a flash memory device by selectively erasing sub-blocks of a memory block. Each physical memory block of the flash memory device is dividable into at least two logical sub-blocks, where each of the at least two logical sub-blocks is erasable. Therefore, only the data of the logical sub-block is erased and reprogrammed while unmodified data in the other logical sub-block avoids unnecessary program/erase cycles. The logical sub-blocks to be erased are dynamically configurable in size and location within the block. A wear leveling algorithm is used for distributing data throughout the physical and logical sub-blocks of the memory array to maximize the lifespan of the physical blocks during programming and data modification operations. | 2015-01-08 |
20150009755 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - When selectively erasing one sub-block, a control circuit applies, in a first sub-block, a first voltage to bit lines and a source line, and applies a second voltage smaller than the first voltage to the word lines. Then, the control circuit applies a third voltage lower than the first voltage by a certain value to a drain-side select gate line and a source-side select gate line, thereby performing the erase operation in the first sub-block. The control circuit applies, in a second sub-block existing in an identical memory block to the selected sub-block, a fourth voltage substantially identical to the first voltage to the drain side select gate line and the source side select gate line, thereby not performing the erase operation in the second sub-block. | 2015-01-08 |
20150009756 | SENSING OPERATIONS IN A MEMORY DEVICE - Methods and apparatus for sensing operations in memory devices are disclosed. In at least one embodiment, a sensing operation to determine negative threshold voltages in memory cells by an elevated source potential applied to a string of memory cells and an elevated data line potential applied to the string of memory cells is disclosed. A ramped sense potential is incorporated into the sense operation according to at least one embodiment. A sense circuit diode allows a sense potential to fall below a data line potential during a sensing operation according to another embodiment. | 2015-01-08 |
20150009757 | ARRAY ARRANGEMENT INCLUDING CARRIER SOURCE - A source of charge carriers in thin film transistor-based memory devices is provided for a memory. The source of charge carriers can include a diode having a first and second terminal. A NAND string coupled on a first end via a first switch to a bit line, is coupled on a second end via a second switch to the first terminal of the diode. Separately drivable first and second supply lines are coupled to the first and second terminals, respectively of the diode. Circuitry is included that is coupled to the first and second supply lines, that is configured to bias the first and second supply lines with different bias conditions depending on the mode of operation, including forward bias conditions and reverse bias conditions. | 2015-01-08 |
20150009758 | SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes memory cells stacked on a substrate. The method includes applying a reference voltage to an unselected drain select line, applying a drain selection voltage to a selected drain select line, and applying a word line voltage to a normal word line. Before the word line voltage is applied to the normal word line, a positive voltage is applied to a dummy word line to bounce the unselected drain select line. | 2015-01-08 |
20150009759 | SUBSTRATE CONNECTION OF THREE DIMENSIONAL NAND FOR IMPROVING ERASE PERFORMANCE - A memory includes a doped substrate well, a substrate connector coupled to the doped substrate well, and a set of interlayer connectors insulated from the doped substrate well. A series arrangement including a plurality of memory cells is coupled on a first end by a first switch to a bit line and coupled on a second end by a second switch to a source line contact pad. The source line contact pad is connected to the substrate connector and to at least one of the interlayer connectors in the set of interlayer connectors. A supply line is connected to the set of interlayer connectors. A plurality of word lines is coupled to the plurality of memory cells. Circuitry is coupled to the supply line and to the doped substrate well and configured to bias the supply line and the doped substrate well with different bias conditions. | 2015-01-08 |
20150009760 | THREE-DIMENSIONAL NONVOLATILE MEMORY AND RELATED READ METHOD DESIGNED TO REDUCE READ DISTURBANCE - A nonvolatile memory device performs a read operation comprising first and second intervals. In the first interval the device applies a turn-on voltage to string selection lines and ground selection lines connected to the string selection transistors and the ground selection transistors, respectively. In the second interval, the device applies a turn-off voltage to unselected string selection lines and unselected ground selection lines while continuing to apply the turn-on voltage to a selected string selection line and a selected ground selection line. In both the first and second intervals, the device applies a first read voltage to a selected wordline connected to memory cells to be read by the read operation and applying a second read voltage to unselected wordlines among connected to memory cells not to be read by the read operation. | 2015-01-08 |
20150009761 | CLOCK MODE DETERMINATION IN A MEMORY SYSTEM - A clock mode configuration circuit for a memory device is described. A memory system includes any number of memory devices serially connected to each other, where each memory device receives a clock signal. The clock signal can be provided either in parallel to all the memory devices or serially from memory device to memory device through a common clock input. The clock mode configuration circuit in each memory device is set to a parallel mode for receiving the parallel clock signal, and to a serial mode for receiving a source synchronous clock signal from a prior memory device. Depending on the set operating mode, the data input circuits will be configured for the corresponding data signal format, and the corresponding clock input circuits will be either enabled or disabled. The parallel mode and the serial mode is set by sensing a voltage level of a reference voltage provided to each memory device. | 2015-01-08 |
20150009762 | SWITCH AND SEMICONDUCTOR DEVICE INCLUDING THE SWITCH - A device for use with non-volatile memory, includes a first transistor of a first channel type coupled between first and second nodes, including a control gate supplied with a first control signal having a first phase, a second transistor of a second channel type different from the first channel type including a first terminal coupled to the first node, a second terminal coupled to a third node, a back gate coupled to the first terminal thereof, and a control gate supplied with a second control signal having a second phase substantially opposite to the first phase, a third transistor of the second channel type including a first terminal coupled to the second node, a second terminal coupled to the third node, a back gate coupled to the first terminal thereof, and a control gate supplied with the second control signal, and a protection circuit coupled between the first and second node. | 2015-01-08 |
20150009763 | SEMICONDUCTOR STORAGE DEVICE - A semiconductor storage device according to the present embodiment includes a memory cell array including a plurality of memory cells. A plurality of word lines are electrically connected to control gates of the memory cells. A plurality of bit lines are electrically connected to one end of a current path of the memory cells. A sense amplifier part detects data stored in the selected memory cells. A power supply part converts an external power supply voltage to an internal power supply voltage and supplies the internal power supply voltage to the sense amplifier part. A power supply wire extends above the memory cell array and is provided to range from the power supply part to the sense amplifier part. | 2015-01-08 |
20150009764 | OUTPUT CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE - According to one embodiment, there is provided an output circuit including a driver transistor and a pre-driver circuit. The driver transistor is connected to an output terminal. The pre-driver circuit is configured to turn ON/OFF the driver transistor. The pre-driver circuit includes a first transistor, a second transistor, a third transistor. The first transistor is configured to control ON speed of the driver transistor. The second transistor is connected in parallel with the first transistor. The second transistor is configured to control ON speed of the driver transistor. The third transistor is connected in parallel with the first transistor and in series with the second transistor. The third transistor is configured to activate or deactivate the second transistor. | 2015-01-08 |
20150009765 | LATENCY CONTROL DEVICE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A latency control device and a semiconductor device including the same are disclosed. The latency control device includes: a code setting unit configured to output a plurality of coding signals by setting a code value having a specific delay amount in response to a code signal; a latch unit configured to latch a command signal for a predetermined time; a period control unit configured to control a delay amount of a period signal in response to an output signal of the latch unit; a selection unit configured to output an oscillation signal synchronized with the clock signal in response to the selection signal, or synchronize the oscillation signal with an output signal of the period control unit; a register unit configured to output a plurality of period signals by dividing the oscillation signal; and a comparator configured to compare the plurality of coding signals with the plurality of period signals so as to output the self-latency signal. | 2015-01-08 |
20150009766 | APPARATUSES AND METHODS FOR COMPARING A CURRENT REPRESENTATIVE OF A NUMBER OF FAILING MEMORY CELLS - Apparatuses and methods for comparing a sense current representative of a number of failing memory cells of a group of memory cells and a reference current representative of a reference number of failing memory cells is provided. One such apparatus includes a comparator configured to receive the sense current and to receive the reference current. The comparator includes a sense current butler configured to buffer the sense current and the comparator is further configured to provide an output signal having a logic level indicative of a result of the comparison. | 2015-01-08 |
20150009767 | PROGRAMMABLE LSI - A low-power programmable LSI that can perform configuration (dynamic configuration) at high speed and can quickly start is provided. The programmable LSI includes a plurality of logic elements and a memory element for storing configuration data to be input to the plurality of logic elements. The plurality of logic elements each include a configuration memory. Each of the plurality of logic elements performs different arithmetic processing and changes an electrical connection between the logic elements in accordance with the configuration data stored in the configuration memory. The memory element is formed using a storage element including a transistor whose channel is formed in an oxide semiconductor layer and a node set in a floating state when the transistor is turned off. | 2015-01-08 |
20150009768 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE, AND METHOD FOR DRIVING THE SAME - A semiconductor device includes a command decoder configured to decode a command and generate a composite command; a first generation block configured to generate a first control signal for performing a first operation based on the composite command; a delay control block configured to delay the composite command by a predetermined time and output a delayed composite command; and a second generation block configured to generate a second control signal for performing a second operation based on the delayed composite command. | 2015-01-08 |
20150009769 | DRAM SUB-ARRAY LEVEL REFRESH - A memory controller coupled to a memory chip having a number of sub-arrays of memory cells is configured to determine a configuration of the memory chip. The memory controller is configured to read the sub-array configuration of the memory chip and to detect sub-array level conflicts between external commands and refresh operations. The memory controller keeps one or more non-conflicting pages open during the refresh operations. | 2015-01-08 |
20150009770 | SEMICONDUCTOR SYSTEM AND METHOD FOR REPARING THE SAME - Provided is a semiconductor system and method for repairing the same that may improve repair capacity of the semiconductor system. The semiconductor system comprises a semiconductor circuit configured to output a remaining repair information and perform a repair operation in response to an external command, and a host configured to determine a number of available repairs based on the remaining repair information and provide the semiconductor circuit with the external command based on the number of available repairs. | 2015-01-08 |
20150009771 | SENSE AMPLIFIER STRUCTURE FOR A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device includes a first signal line and a second signal line, and a sense amplifier that includes a plurality of PMOS transistors and a plurality of NMOS transistors. The sense amplifier is configured to sense amplify a potential difference between the first signal line and the second signal line. The junction regions of the NMOS and PMOS transistors having the same conductivity type, and to which the same signal is applied, are formed in one integrated active region. | 2015-01-08 |
20150009772 | MEMORY HAVING POWER SAVING MODE - A memory has a normal mode and a power saving mode. The memory has bitline precharge circuitry which during the normal mode selectively couples a pair of bitlines to a precharge node to charge the bitlines to a given voltage level. During the power saving mode the bitlines are isolated from the precharge node. Voltage control circuitry is provided to maintain the precharge node at a first voltage level during the normal mode and at a second voltage level less than the first voltage level during the power saving mode. By reducing the voltage level at the precharge node during the power saving mode, the amount of inrush current occurring when switching from power saving mode to normal mode can be reduced, and this enables the wakeup time to be reduced when returning from power saving mode to normal mode. | 2015-01-08 |