| 01st week of 2012 patent applcation highlights part 25 |
| Patent application number | Title | Published |
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| 20120002401 | LIQUID COOLED LED LIGHT BULB - Disclosed is a liquid cooled LED light bulb comprising at least one shaped tube positioned so as to conduct ambient heat away from the LED light source using passive cooling. In the most preferred embodiments of the present invention, a plurality of shaped tubes are arranged in an array and attached by various methods to the LED light source of the LED light bulb. The tubes of the cooling array may be in any closed circuit geometry and configured so as to contain any interior liquid that is suitable for the conduction of heat. In certain preferred embodiments of the present invention, a plurality of tubes may be arranged in a circular array or any other array configuration. In certain preferred embodiments of the present invention, an array of tubes may be below an LED mounting, but other configurations may include a tubular array substantially surrounding the LED mounting. Further, certain preferred embodiments of the present invention may comprise a protective housing or case that serves to prevent inadvertent damage to the cooling array of the LED light bulb. | 2012-01-05 |
| 20120002402 | FASHION ILLUMINATION SYSTEM - A fashion apparel accessory, such as a garment, having one or more concealed light sources positioned so as to illuminate the skin of the wearer, as opposed to focusing attention on the light sources themselves. A particular embodiment includes concealed light sources proximate to a low-cut neckline of a female's garment, such as brassiere, shirt, or item of lingerie, with the light sources being oriented so as direct illumination across the wearer's chest area in an alluring way, potentially offering multiple color, intensity, direction/control options as well as multiple deployment techniques/devices. A portable power supply is integrated with the garment or accessory and electrically connected to the light sources. | 2012-01-05 |
| 20120002403 | VISIBILITY VEST - The present application is directed to a method for providing reflective and/or lighted capability about the torso of a wearer, said method comprising providing it least one reflective and/or lighted strap, draping said strap about said torso, adjusting said strap via a mechanism that keeps said strap relatively taut about torso such that when said wearer is engaged in movement, said straps remain in place on said torso without substantial impediment to said wearer engaging in an activity. | 2012-01-05 |
| 20120002404 | Holiday lantern carrier - An illuminated candy or other merchandise bucket or carrier is provided for use by children on Halloween, or other holidays. The structure of the bucket is a double-layered or walled carrier, with LED light, or other illuminated source, established between the layered inner and outer walls for the formed carrier. | 2012-01-05 |
| 20120002405 | ILLUMINATING BOOK LIGHT WITH ATTACHABLE HEADS - An illuminating device having multiple adjustable housings is described. Each head has one or more light sources. Each head each may be attached to a neck that extends from a base. The light sources may be manipulated into numerous positions to focus on different areas or may be joined together via a removable attachment to focus on a single area. Such an illuminating device may be desirable for use, for example, as a portable illuminator, a book light, or a travel light. | 2012-01-05 |
| 20120002406 | SLIDABLE LUMINAIRE CONNECTORS - Embodiments of the invention provide for a linear lighting system with a plurality of discrete light sources. Other embodiments of the invention include heat dissipation techniques and apparatus for a linear light system. Other embodiments of the invention include a two component lighting system that includes rails and nodes. In some embodiments, the lighting and control aspects can be divided between the rail and node. In yet other embodiments a linear lens providing a unique photometric distribution is provided. | 2012-01-05 |
| 20120002407 | LIGHT EMITTING DIODE LIGHT SOURCE MODULES - The present invention provides a highly-protective, heat dissipating LED light source module that may be waterproof or non-waterproof. In an embodiment, the present invention provides an LED light source module comprising: a waterproof housing comprising a metal substrate and a plastic cover integrally disposed on one or more surfaces of the metal substrate; and at least one light emitting diode, electronic component, and power line disposed on and operably connected with the metal substrate and encapsulated thereon by the plastic cover. In other embodiments are provided LED light source modules comprising: a circuit board with at least two through holes disposed at selected positions; at least one light emitting diode, electronic component, and power line disposed on the circuit board and operably connected therewith; and a plastic cover comprising at least two pins disposed and shaped for interconnection with corresponding through holes of the circuit board. The simple LED light source models disclosed may be efficiently and inexpensively produced and are capable of withstanding the harsh environments in which they are sometimes used. | 2012-01-05 |
| 20120002408 | LIGHTING FIXTURE FOR A POULTRY HOUSE - A lighting fixture for a poultry housing can generally include an elongated body and a transparent cover that is selectively coupled to the body and is configured to create an internal space with the body. A first light emitting diode (LED) can be disposed in the internal space and can be configured to emit a light having a first color. A second LED can be disposed in the internal space and be configured to emit a light having a second color that is distinct from the first color. A controller can be electrically connected to and independently control an output of the first and second LEDs. | 2012-01-05 |
| 20120002409 | CARRIER COMPRISING AT LEAST ONE SEMICONDUCTOR LUMINOUS DEVICE AND CARRIER SYSTEM - In various embodiments, a mount may include an elongated basic form which is configured to include at least two functionalities, of which at least one functionality is a lighting functionality, wherein to implement the at least one lighting functionality, the mount includes at least one semiconductor lighting device. | 2012-01-05 |
| 20120002410 | LIGHT SOURCE, LIGHT SOURCE DEVICE AND DISPLAY DEVICE - A light source capable of emitting light of which intensity is uniform throughout its length. A light source ( | 2012-01-05 |
| 20120002411 | Light Emitting Diode Troffer - A troffer-style luminaire includes first and second side ends and a top end extending between the side ends. The side and top ends define an interior region. Light emitting diodes (“LEDs”) are coupled along interior surfaces of the side ends, within the interior region. At least some of the LEDs are coupled to the interior surfaces by being wedged between members protruding into the interior region from the interior or other surfaces. In addition, or in the alternative, one or more spring clips can apply a force that holds the LEDs against the interior surfaces. A reflector extends between the LEDs and the top member and reflects light from the LEDs towards a bottom end of the frame. The light emitted by the LEDs is directed to the reflector and then indirectly emitted through the bottom end, into a desired environment. | 2012-01-05 |
| 20120002412 | Light Source Device - A light source device comprises at least two reflecting members and light sources corresponding to each other. The reflecting member has a top surface and an arc bottom surface, and a reflecting curved surface extended toward the top surface from the arc bottom surface. The arc bottom surface forms a containing space for placing the light source. A light outgoing surface of the arc bottom surface is toward the top surface. The reflecting curved surface of each reflecting member is disposed by corresponding to each other. Accordingly, a light beam of each light source can achieve the effect of illuminating in a wide-angle through the reflection of each reflecting member, and the luminous flux can be uniformly distributed within a unit area. | 2012-01-05 |
| 20120002413 | STREETLIGHT - A streetlight installed on a street or a sidewalk in order to radiate light includes a base plate detachably fixed to a streetlight body using a clamp and a reflector fixed to one side of the base plate. The reflector has a first slope having a plurality of LEDs mounted thereon, and a second slope having a reflective film mounted thereon, the reflective film arranged opposite the LEDs. The reflector provides illumination by reflecting light, emitted from the LEDs, to the outside. A heat dissipation pad is disposed between the base plate and the reflector. The heat dissipation pad insulates the LEDs from external high-voltage EMS. A cover made of a translucent material has a recess in the central portion thereof to house the reflector therein, and fixes both the reflector and the heat dissipation pad to the base plate. Heat dissipation fins are fixed to the base plate. | 2012-01-05 |
| 20120002414 | LENS FOR LED LUMINARIES - Embodiments of the invention provide for a linear lighting system with a plurality of discrete light sources. Other embodiments of the invention include heat dissipation techniques and apparatus for a linear light system. Other embodiments of the invention include a two component lighting system that includes rails and nodes. In some embodiments, the lighting and control aspects can be divided between the rail and node. In yet other embodiments a linear lens providing a unique photometric distribution is provided. | 2012-01-05 |
| 20120002415 | VENTILATION FOR LED LIGHTING - Embodiments of the invention provide for a linear lighting system with a plurality of discrete light sources. Other embodiments of the invention include heat dissipation techniques and apparatus for a linear light system. Other embodiments of the invention include a two component lighting system that includes rails and nodes. In some embodiments, the lighting and control aspects can be divided between the rail and node. In yet other embodiments a linear lens providing a unique photometric distribution is provided. | 2012-01-05 |
| 20120002416 | LIGHTING DEVICE - A lighting device includes a light source unit having a substrate and a light emitting diode disposed on the substrate, a heat sink having an inner surface on which the light source unit is disposed and at least one opening, and a top plate being disposed on the heat sink and having a reflective surface which reflects light from the light source unit in a particular direction. | 2012-01-05 |
| 20120002417 | WATERPROOF FLEXIBLE AND RIGID LED LIGHTING SYSTEMS AND DEVICES - The present invention relates to lighting strips and more particularly to flexible lighting systems and devices, which are waterproof. The lighting strips are modular and are capable of being physically and electrically connected with one another to provide lighting systems that are waterproof and adaptable to many situations. Included in embodiments of the invention are modular lighting strips comprising: a non-conductive substrate strip comprising an electrical circuit; a plurality of high brightness LEDs operably connected to the electrical circuit; a colloid layer comprising polyurethane resin providing a waterproof coating over the substrate, the circuit, and the LEDs; and a plug at one end and a socket at an opposing end of the substrate which is integrally formed with the strip to provide for waterproof electrical interconnection of two or more circuits or to a power supply. The lighting strips of the invention can be used in particular for back lighting, accent lighting, aisle or path lighting, contour lighting, elegant interior decoration, holiday decorations, or landscape lighting. | 2012-01-05 |
| 20120002418 | RAIL AND CLIP MOUNTING FOR LED MODULES FOR FLUORESCENT APPLICATION REPLACEMENT - In accordance with a first exemplary embodiment of the present disclosure, a mounting arrangement for use with an LED power strip module is provided. The mounting arrangement comprises one or more one frames having a first end and a second end, a first holding base configured to mate with the first end and a second holding base configured to mate with the second end, and at least one LED module having a first and second edge and comprising a plurality of LEDs, said LED module being adapted to removably attach to the one or more frames. The first and second holding bases are adapted to secure the one or more frames to an existing raceway structure. | 2012-01-05 |
| 20120002419 | LIGHT MODULE - An LED array is mounted on a base that is thermally coupled to a heat spreader. At least one aperture is provided between the support area and an edge of the heat spreader. The heat spreader may be coupled to a thermal pad which has sufficient thermal conductivity and is sufficiently thin to allow the thermal resistivity between the heat spreader and a corresponding heat sink to be below a predetermined value. | 2012-01-05 |
| 20120002420 | LED module, LED package, and wiring substrate and method of making same - An LED module includes an electrical insulation material including a first surface having a total reflectivity of not less than 80% with respect to light with a wavelength of 450 nm, a via hole penetrating through the electrical insulation material, a wiring pattern on a second surface of the electrical insulation material, a metal filler formed in the via hole and electrically connected to the wiring pattern, and an LED chip bonded to a surface of the metal filler on the first surface of the electrical insulation material, and sealed with a resin. | 2012-01-05 |
| 20120002421 | BULB-SHAPED LAMP AND LIGHTING DEVICE - A bulb-type lamp having both heat dissipation and size/weight reduction properties with a lower thermal load on a lighting circuit. An LED module is mounted in a case with a base member to allow dissipation of heat. An LED mount member closes another end of the case and allows conduction of heat to the case. A lighting circuit receives power via the base member. The lighting circuit is disposed inside a circuit holder. An air space exists between the circuit holder and both the case and the mount member. The lighting circuit is isolated from the air space by the circuit holder. A relationship 0.5≦S | 2012-01-05 |
| 20120002422 | REPLACEMENT LIGHT ASSEMBLY - A light assembly for a hand-held medical diagnostic instrument. The light assembly includes a substrate having a top surface and a bottom surface, a light source mounted to the top surface, and the bottom surface having first and second electrical terminals. The light assembly further includes a circuit board disposed inclined to the substrate, the circuit board having first and second electrical terminals, a first connector mounting and electrically connecting the first electrical terminal of the substrate to the first electrical terminal of the circuit board, a second connector mounting and electrically connecting the second electrical terminal of the substrate to the second electrical terminal of the circuit board, a heat sink, and a thermal conductor thermally connecting at least one of the first and second electrical terminals of the substrate to the heat sink. | 2012-01-05 |
| 20120002423 | Lamp With A Truncated Reflector Cup - A lamp assembly, and method for making same. The lamp assembly includes first and second truncated reflector cups. The lamp assembly also includes at least one base plate disposed between the first and second truncated reflector cups, and a light engine disposed on a top surface of the at least one base plate. The light engine is configured to emit light to be reflected by one of the first and second truncated reflector cups. | 2012-01-05 |
| 20120002424 | LIGHT EMITTING DIODE BASED LAMP - A light emitting diode (LED) based lamp may include a LED module having at least one LED to provide light, a housing to house the LED module, and a lens to receive the light from the LED and to direct the light in a specific direction. A microlens array may have a plurality of microlenses with a polygonal shape, and a distance between two opposing sides of one of the microlens is 0.7 mm to 1.2 mm. | 2012-01-05 |
| 20120002425 | LIGHT-EMITTING MODULE AND LUMINAIRE - According to one embodiment, a light-emitting module includes a substrate, a light-emitting element, a light distribution control member, and a cover. The substrate includes a surface on which a thermally conductive portion and a interconnect pattern are formed. The light-emitting element is thermally connected to the thermally conductive portion, is electrically connected to the interconnect pattern, and generates heat while emitting light. The light distribution control member is thermally connected to the thermally conductive portion at a periphery of the light-emitting element, includes a ridge portion formed on an exit side where light emitted from the light-emitting element is projected, and is configured to control distribution of the light emitted from the light-emitting element. The cover is thermally connected to the ridge portion and configured to pass therethrough the light emitted from the light-emitting element. | 2012-01-05 |
| 20120002426 | SCREW-SHAPED LED - A screw-shaped LED including a high power LED, a metal circuit board, power supply cords, and a screw-shaped housing. The high power LED and the metal circuit board are both mounted inside the screw-shaped housing. Within the housing, the high power LED is fixed on and electrically connected with the metal circuit board. The power supply cords are electrically connected with the metal circuit board and pass through the screw-shaped housing. | 2012-01-05 |
| 20120002427 | LIGHT EMITTING DEVICE MODULE - A light emitting device module is provided comprising a light emitting device package and a printed circuit board to which the light emitting device package is coupled, wherein the light emitting device package includes a sliding groove and a fixing groove, and wherein the printed circuit board includes a sliding protrusion coupled to the sliding groove to guide the light emitting device package to a predetermined position and a fixing protrusion coupled to the fixing groove at the predetermined position. | 2012-01-05 |
| 20120002428 | LIGHT FIXTURE - The invention relates to a lamp, essentially containing a lamp head, an upright tube, and a stand. These three elements can be connected to each other in a releasable and latchable manner based upon an operable construction. In the assembled state, the three elements form a table lamp or a floor lamp based on dimensions. The lamp head can be removed and thus can be used as a mobile hand lamp. After disassembly, all parts can be accommodated in the stand, which forms a transport case. | 2012-01-05 |
| 20120002429 | SOCKET DEVICE, LAMP DEVICE AND LIGHTING DEVICE - There is provided a lighting fixture capable of efficiently radiating heat of a lamp device attached to a socket device. | 2012-01-05 |
| 20120002430 | CONTROL DEVICE FOR VEHICLE LAMP, VEHICLE LAMP, AND METHOD OF CONTROLLING VEHICLE LAMP - There is provided a control device for controlling a vehicle lamp provided in a vehicle. The device includes: a receiver configured to receive an inclination angle of the vehicle with respect to a horizontal plane from an inclination detector; a controller configured to: i) generate a first control signal instructing the vehicle lamp to adjust an optical axis of the vehicle lamp in response to a change of the inclination angle, when the vehicle has already stopped; and ii) generate a second control signal instructing the vehicle lamp to maintain the optical axis of the vehicle lamp, when the vehicle is traveling on a road surface; and a transmitter configured to transmit the first control signal or the second control signal to an optical axis adjuster provided in the vehicle lamp. | 2012-01-05 |
| 20120002431 | SIMULATED FLAMES FROM A VEHICULAR EXHAUST - An assembly for creating the appearance of flames emerging from a vehicle exhaust, including a partially transparent tube connected to the vehicle, a light emitting array positioned within the tube, a plurality of reflective generally flame-shaped streamers extending at least partially into the partially transparent tube, an air pressure source operationally connected to the tube, a power source electrically connected to the light emitting array and an electronic controller operationally connected to the light emitting array. Actuation of the air pressure source waves the streamers within the tube and the streamers are visible through the tube when waving. The light emitting array is positioned to shine light onto the waving streamers and the electronic controller is operable to sequence the actuation of the light emitting array. | 2012-01-05 |
| 20120002432 | LIGHTING DEVICE FOR VEHICLES AND A METHOD FOR PRODUCING IT - The invention relates to a lighting device for vehicles, having a housing, a translucent diffusing screen covering a light exit opening of the housing, and a reflector. The translucent diffusing screen and the reflector may be fastened to the housing. A rapidly curing connection means may be applied to at least one interface between the housing and the diffusing screen to facilitate positioning. | 2012-01-05 |
| 20120002433 | REAR LAMP FOR VEHICLE - A rear lamp apparatus for a vehicle may include a plurality of reflectors mounted in a rear lamp housing of the vehicle to reflect light emitted from light sources at various angles and a light guide provided inside the reflectors and having end portions on which the light sources are mounted to guide the light emitted from the light sources through the light guide. | 2012-01-05 |
| 20120002434 | MOTOR VEHICLE REAR MODULE INTENDED TO BE AFFIXED TO A REAR HATCH MODULE - The invention provides a motor vehicle rear module ( | 2012-01-05 |
| 20120002435 | LIGHT EMITTING DEVICE AND LUMINAIRE - This invention relates to a light emitting device ( | 2012-01-05 |
| 20120002436 | Light distribution using tapered waveguides in LED-based tubular lamps as replacements of linear fluorescent lamps - An LED replacement-lamp design concept comprising tapered waveguides to provide uniform and effective light distribution is disclosed. Currently, most LED-based replacement lamps for linear fluorescent lamps (LFLs) place discrete surface mount LEDs directly on a cylindrical base. This produces non-uniform, directional light that cannot illuminate large spaces as effectively as LFLs can. A design of an LED lamp with a semi-circle cross-section is proposed as a replacement for LFLs that get placed against the ceiling or some blocking surface. The flat back side of the proposed lamp is used to place a heat-sink. The design comprises of discrete LED chips or modules arranged on a board, where light from these modules are guided through tapered waveguides to create broad, uniform illumination over the entire curved surface of the lamp cover, which may be either transparent or translucent. The lamp's light is uniformly distributed in many directions, effectively illuminating large spaces. | 2012-01-05 |
| 20120002437 | AREA LIGHT SOURCE DEVICE - An area light source device has a light guide plate including a light incident end face, a light guide plate main body thinner than a thickness of the light incident end face, and a light introducing unit formed in continuation with the light guide plate main body and so that thickness gradually becomes thinner from the light incident end face side towards the light guide plate main body side, a light source arranged at a position facing the light incident end face, a diffuser plate and one or more prism sheets arranged on a surface on a light emission side of the light guide plate main body, and a light shielding sheet arranged on an upper side of the diffuser plate and the prism sheet in a region excluding a light emitting region of the light guide plate main body. | 2012-01-05 |
| 20120002438 | LIGHT GUIDES - This invention relates to light guide devices and methods of manufacture. The light guide device is suitable for use in a range of applications, particularly in connection with the backlighting of displays, for example, liquid crystal displays. | 2012-01-05 |
| 20120002439 | BACKLIGHT MODULE - A backlight module includes a light source, a light guide plate, a diffuser plate, a first prism plate, and a second prism plate consecutively mounted together, bottom to top. The light source emits and provides light beams and is adjacent to the light guide plate. The light guide plate receives and converts the light beams into surface light, and includes a reflective layer. The diffuser plate is adjacent to the reflective layer and unifies the light beams. The first prism plate and the second prism plate can increase the brightness of the light beams. Parts of the light beams are reflected back to the light guide plate by the reflective layer, and the light beams from the light source and the light guide plate pass through the diffuser plate, the first prism plate and the second prism plate to provide needful light beams. | 2012-01-05 |
| 20120002440 | OPTICAL DEVICE WITH LENTICULAR ARRAYS, EDGE-TYPE BACKLIGHT MODULE AND DIRECT-TYPE BACKLIGHT MODULE - An edge-type backlight module and a direct-type backlight module with a optical device are provided. The optical device comprises an array layer and a second refractive layer. The array layer has a first refractive index (n | 2012-01-05 |
| 20120002441 | AREA LIGHT SOURCE DEVICE - An area light source device has a diffusion plate and a prism sheet stacked on a light guide plate, and a light source disposed opposite an end face of the light guide plate. Light emitted from the light source is introduced to an inside of the light guide plate from the end face. Area light emission is obtained by outputting the light diffused in the light guide plate from the diffusion plate and the prism sheet through a front face disposed opposite the diffusion plate. The light guide plate includes a light guide section that includes the end face disposed opposite the light source, a light emitting section that is disposed opposite the diffusion plate, and a joining section that joins the light guide section and the light emitting section. The front surface in the joining section includes an inclined surface that is gradually retreated toward a rear surface on an opposite side from the light guide section toward the light emitting section. The front faces of the light guide section and the joining section are covered with a light shielding member. The light shielding member is fixed to the diffusion plate without interposing the prism sheet therebetween. The light shielding member and the inclined surface are arranged to allow air to be interposed therebetween. | 2012-01-05 |
| 20120002442 | DISPLAY DEVICE FOR A VEHICLE AND METHOD FOR PRODUCING THE DISPLAY DEVICE - A display apparatus is provided for a vehicle and a method for manufacturing the display apparatus. The display apparatus includes, but is not limited to a display screen and a background lighting. Illuminated characters are disposed, imaged, or activated on the display screen. The background lighting of the display screen includes, but is not limited to illuminants which emit light into a light guide body. The light guide body is disposed on a rear side of the display screen. The light guide body includes, but is not limited to a light guide plate made of an optically transparent plastic compound, in which optically non-transparent partitions for light guide zones of the light guide body, which are optically shielded from one another, are introduced. | 2012-01-05 |
| 20120002443 | LIGHT GUIDING OBJECT AND LIGHTING DEVICE USING THE SAME - A light guiding object for use in a lighting device is provided. The light guiding object includes a cylindrical body, a reflective layer, a transparent resin layer and a light-adjustable film. The cylindrical body has a light-entering surface and a bottom surface. The reflective layer is disposed on the bottom surface of the cylindrical body. The transparent resin layer is disposed on the light-entering surface of the cylindrical body. The light-adjustable film has a flat surface and an optical structure surface, wherein the flat surface is opposite to the optical structure surface and disposed on the transparent resin layer. A central part of the optical structure surface includes a first prism group. The first prism group includes a plurality of first prisms, wherein the apex angles of the first prisms are in a range of 120 to 170 degrees. | 2012-01-05 |
| 20120002444 | BACKLIGHT UNIT OF LIQUID CRYSTAL DISPLAY - Provided is a backlight unit of a liquid crystal display (LCD). The backlight unit includes: a plurality of light guide plates (LGPs) arranged in M layers and separated from each other by a predetermined gap, wherein M is a natural number equal to or greater than two, a light source unit disposed on at least one side surface of each of the LGPs and including N light source blocks whose brightnesses are controlled individually, and wherein N is a natural number equal to or greater than two. The backlight unit further includes a plurality of light output regions defined by each of the LGPs being divided into a plurality of regions according to a distance from the light source unit and by a plurality of light output patterns being formed in some of the regions, and wherein the light output regions do not overlap each other in a stacking direction of the LGPs and are arranged to correspond to a whole surface of the LGPs. | 2012-01-05 |
| 20120002445 | LIGHTING ASSEMBLY AND LIGHT MODULE FOR SAME - A lighting assembly that has a light fixture and an LED light module is provided. One or more resilient members generate a compression force when the LED light module is removably coupled to the light fixture to thereby exert a generally axial force on the LED light module to resiliently maintain the LED light module in resilient contact with the light fixture or socket of the light fixture to thereby resiliently couple the LED light module to the light fixture or socket of the light fixture. One or both of the LED light module and light fixture have one or more engaging members that extend radially from a circumferential surface thereof, and one or both of the LED light module and the light fixture have one or more slots configured to removably receive the one or more engaging members therein when coupling the LED light module to the light fixture. | 2012-01-05 |
| 20120002446 | PRIMARY-SIDE POWER CONTROL FOR INDUCTIVE POWER TRANSFER - A method is provided for controlling the output voltage of a pickup in an inductive power transfer (IPT) system without any additional form of communications for feedback from the pickup to the power supply. The method comprising the steps of deriving an estimate of the output voltage of the pickup from the voltage across the primary conductive path, and adjusting the current in the primary conductive path so that the estimated pick-up output voltage matches a required pick-up output voltage. In particular, an estimate of the pickup output voltage is derived from the magnitude and phase angle of the voltage in the primary conductive path. | 2012-01-05 |
| 20120002447 | GATE DRIVE CONTROLLER CIRCUIT WITH ANTI-SATURATION CIRCUIT AND POWER UP CIRCUIT THEREFOR - A high side isolated gate drive controller circuit is presented with an on-time limiting circuit to prevent isolation transformer saturation as well as a universal power up circuit adaptable to power the driver with constant voltage for different input voltage levels. | 2012-01-05 |
| 20120002448 | METHOD AND APPARATUS FOR ON/OFF CONTROL OF A POWER CONVERTER - A power converter is disclosed. An example power converter includes an energy transfer element coupled between a power converter input and a power converter output. A power switch is coupled to the energy transfer element and the power converter input. A feedback sampling circuit is coupled to receive a feedback signal representative of the power converter output to generate feedback signal samples during switching cycles. A switch conduction scheduling circuit is coupled to determine enabling and disabling of the power switch in future switching cycles in response to the feedback signal samples from a present switching cycle and one or more past switching cycles. A switch conduction control circuit is coupled to enable or disable conduction of the power switch during a switching cycle to control an amount of energy transferred from the power converter input to the power converter output. | 2012-01-05 |
| 20120002449 | Primary Side Voltage Control in Flyback Converter - In one embodiment, an apparatus includes a sampling component. The sampling component receives a first voltage signal on a primary side of a transformer and monitors the first voltage signal to determine a voltage sampling time. The determined voltage sampling time is when the first voltage signal is used to estimate a second voltage level on a secondary side of the transformer. The first component further samples the first voltage signal at the voltage sampling time to determine a first voltage level. A second component outputs a control signal to control a switch to regulate the second voltage level based on the first voltage level. | 2012-01-05 |
| 20120002450 | BIDIRECTIONAL INVERTER FOR CONVERSION BETWEEN A DIRECT CURRENT SOURCE AND AN ALTERNATING CURRENT GRID - A bidirectional inverter is disclosed, the inverter including DC terminals and being connectable to a grid via grid AC terminals. The inverter includes a first subinverter and a second subinverter, both subinverters being connected in parallel to the DC terminals, and being connected in parallel to the grid AC terminals by subinverter AC terminals. Each subinverter includes a full bridge and a switchable freewheel path, both being configured to drive current between the grid AC terminals in a driving direction, and configured to block a current between the grid AC terminals in a blocking direction opposite the driving direction. The driving direction of the first subinverter is the blocking direction of the second subinverter. | 2012-01-05 |
| 20120002451 | METHOD AND APPARATUS FOR INTEGRATED CABLE DROP COMPENSATION OF A POWER CONVERTER - An integrated circuit controller for a power converter to be coupled to a distribution network is disclosed. An example integrated circuit controller according to aspects of the present invention includes a switching control circuit that outputs a drive signal to control switching of a switch to regulate an output of the power converter. The integrated circuit controller also includes a cable drop compensator that outputs a compensated reference voltage signal to the switching control circuit in response to a switching signal. The switching signal is responsive to the drive signal. The compensated reference voltage signal is representative of a voltage value that is responsive to a distribution voltage across the distribution network and a load voltage across a load to be coupled to the distribution network. The switching of the switch is responsive to the compensated reference voltage signal and a feedback signal. | 2012-01-05 |
| 20120002452 | Compact inverter - A method of making a compact power inverter is disclosed. Steps include: providing a plurality of transistors, a main circuit board, a transformer, an input control circuit board; an output control circuit board; and optionally, casing; aligning transistors in the plurality of transistors in rows on the top side of the main circuit board; capping the rows with heat sinks; installing the main circuit board in the casing when a casing is present, preferably in a thermally coupled configuration adapted to cool at least one of the transistors in the plurality of transistors by conduction to the casing; positioning the output control circuit board and the input control circuit board vertically between rows of the plurality of transistors; and, attaching the transformer to the bottom side of the main circuit board. | 2012-01-05 |
| 20120002453 | CONTROLLER APPARATUS FOR CONTROLLING A MULTIPHASE MULTILEVEL VOLTAGE SOURCE INVERTER AND A METHOD THEREOF - The present invention provides an apparatus for controlling a multiphase multilevel voltage source inverter. The apparatus includes a signal-generating unit and a converter. The signal-generating unit responds to an input signal to produce a switching strategy control signal and a duration timing control signal corresponding to the switching strategy control signal. The converting unit responds to the switching strategy control signal and the duration timing control signal to produce a switching signal. The voltage source inverter responds to the switching signal to generate a multiphase-and-multilevel AC voltage output. | 2012-01-05 |
| 20120002454 | THREE-LEVEL INVERTER, POWER CONDITIONER, AND POWER GENERATING SYSTEM - A three-level inverter includes a set of series-connected capacitors connected in parallel to a direct-current power supply; two arms connected in parallel to an output of the direct-current power supply and each having an alternating-current output terminal; and a control section having a neutral voltage controller determining a three-phase voltage correction command based on a neutral voltage and voltage of the direct-current power supply, having a coordinate converter converting the three-phase voltage correction command to a voltage correction command on d-q axis, and suppressing voltage variations at the neutral point by correcting a voltage command on d-q axis based on the d-q voltage correction command. The neutral point is connected to one grounded phase of a three-phase grounded power system. The alternating-current output terminals are connected to respective non-grounded phases of the power system. A power conditioner includes the three-level inverter. A power generating system includes the power conditioner. | 2012-01-05 |
| 20120002455 | MINITURIZATION TECHNIQUES, SYSTEMS, AND APPARATUS RELATNG TO POWER SUPPLIES, MEMORY, INTERCONNECTIONS, AND LEDS - Miniaturization techniques, systems, and apparatus relating to power supplies, memory, interconnections, and LEDS are described herein. Specifically, some aspects of the invention relate to techniques for miniaturization of power supplies. Other aspects relate to systems and methods for optimizing memory performance in a computer device or system. Still further, some aspects relate to systems and methods for miniaturizing and optimizing memory layout on a circuit board. Other aspects relate to systems and methods for attaching an integrated circuit, which comprises an array of pins, to a circuit board through the use of an adaptor that comprises a BGA, and which is configured to electrically and physically attach to the circuit board. Furthermore, some aspects relate to systems and methods for achieving activation of at least one multi-color LED, such as a bi-color or tri-color LED, using multiple electrical ground outputs or signals intended to activate only a single unicolor LED. | 2012-01-05 |
| 20120002456 | METHOD OF ARRANGING PADS IN SEMICONDUCTOR DEVICE, SEMICONDUCTOR MEMORY DEVICE USING THE METHOD, AND PROCESSING SYSTEM HAVING MOUNTED THEREIN THE SEMICONDUCTOR MEMORY DEVICE - A method of arranging pads in a semiconductor memory device, the semiconductor memory device using the method, and a processing system having mounted therein the semiconductor memory device. The method includes classifying pads provided in a memory chip of the semiconductor memory device into monitoring pads configured for a memory chip test on a wafer, a package pads configured for wire connection in a package, and common pads configured for both the memory chip test on the wafer and wire connection in the package and arranging the monitoring pads and the package pads separately in columns on the memory chip. | 2012-01-05 |
| 20120002457 | SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME - According to one embodiment, a semiconductor memory device includes a plurality of memory cell arrays each includes a plurality of memory cells, the plurality of memory cell arrays being stacked on a semiconductor substrate to form a three-dimensional structure, and a data input/output circuit includes a first address buffer and a second address buffer configured to store a first address and a second address of the plurality of memory cells, and a controller configured to perform control to time-divisionally output the first address and the second address to a first address bus and a second address bus in data input/output. | 2012-01-05 |
| 20120002458 | RESISTANCE CHANGE MEMORY DEVICE - A resistance change memory device includes: a cell array having multiple layers of mats laminated thereon, each of the mats having word lines and bit lines intersecting each other as well as resistance change type memory cells arranged at intersections thereof, each of the mats further having therein a reference cell and a reference bit line connected to the reference cell, the reference cell set to a state of a certain resistance value; a selection circuit configured to select a word line in each mat of the cell array, and select a bit line intersecting a selected word line and the reference bit line at the same time; and a sense amplifier configured to sense data by comparing respective cell currents of a selected memory cell on the selected bit line and the reference cell on the reference bit line. | 2012-01-05 |
| 20120002459 | 5T SRAM MEMORY FOR LOW VOLTAGE APPLICATIONS - An embodiment of a memory device of SRAM type integrated in a chip of semiconductor material is proposed. The memory device includes a plurality of memory cells each for storing a binary data having a first logic value represented by a first reference voltage or a second logic value represented by a second reference voltage. Each memory cell includes a bistable latch—having a main terminal, a complementary terminal, a set of field effect main storage transistors coupled to the main terminal for maintaining the main terminal at the reference voltage corresponding to the stored logic value or to a complement thereof, a set of field effect complementary storage transistors coupled to the complementary terminal for maintaining the complementary terminal at the reference voltage corresponding to the complement of the logic value associated with the main terminal—and a field effect access transistor for accessing the main terminal. The chip includes an isolated well, the access transistor and at least one of the complementary storage transistors being formed in the isolated well. | 2012-01-05 |
| 20120002460 | DYNAMICALLY CONFIGURABLE SRAM CELL FOR LOW VOLTAGE OPERATION - An embodiment of a memory device of SRAM type is proposed. The memory device includes a plurality of memory cells each for storing a first logic value represented by a first reference voltage or a second logic value represented by a second reference voltage. Each memory cell includes a bistable latch—having a main terminal, a complementary terminal, a set of main storage transistors for maintaining the main terminal at the reference voltage corresponding to the stored logic value, and a set of complementary storage transistors to maintain the complementary terminal at the reference voltage corresponding to the complement of the stored logic value—a main access transistor and a complementary access transistor for accessing the main terminal and the complementary terminal, respectively. The memory device may further include biasing means for modifying a value of a threshold voltage of at least one of the main transistors to a first threshold voltage value or to a second threshold voltage value and for modifying a threshold voltage value of at least one of the complementary transistors to the second threshold voltage value or to the first threshold voltage value during a write operation of the first logic value or of the second logic value, respectively, in the memory cell. | 2012-01-05 |
| 20120002461 | NON-VOLATILE MEMORY WITH OVONIC THRESHOLD SWITCH AND RESISTIVE MEMORY ELEMENT - The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, the non-volatile memory of the present disclosure may include a resistive memory element with an ovonic threshold switch. The ovonic threshold switch may be connected in series with the resistive memory element and may act as an isolation device for the resistive memory element. | 2012-01-05 |
| 20120002462 | RESISTANCE-CHANGE SEMICONDUCTOR MEMORY - According to one embodiment, a memory includes first to fourth memory cells aligned in a first direction. Each of the first to fourth memory cells comprises a cell transistor having a gate connected to a word line extending in a second direction crossing the first direction and a resistive memory element having one end connected to a first source/drain region of the cell transistor. A second source/drain region of the cell transistor is connected to one of a first bit line extending in the first direction and a second bit line extending in the second direction. The other end of the resistive memory element is connected to one of the first and second bit lines which is apart from the second source/drain region. The second source/drain regions in the first and second memory cells are shared, and the second source/drain regions in the third and fourth memory cells are shared. | 2012-01-05 |
| 20120002463 | HIGH CAPACITY LOW COST MULTI-STATE MAGNETIC MEMORY - A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states. | 2012-01-05 |
| 20120002464 | SEMICONDUCTOR DEVICE EQUIPPED WITH A PLURALITY OF MEMORY BANKS AND TEST METHOD OF THE SEMICONDUCTOR DEVICE - A write circuit writes a first data signal that is an input data signal that indicates a first logic level to each memory bank in sequence and writes a second data signal that is an input data signal that indicates a second logic level to each memory bank simultaneously. | 2012-01-05 |
| 20120002465 | METHODS, STRUCTURES, AND DEVICES FOR REDUCING OPERATIONAL ENERGY IN PHASE CHANGE MEMORY - Methods of forming and operating phase change memory devices include adjusting an activation energy barrier between a metastable phase and a stable phase of a phase change material in a memory cell. In some embodiments, the activation energy barrier is adjusted by applying stress to the phase change material in the memory cell. Memory devices include a phase change memory cell and a material, structure, or device for applying stress to the phase change material in the memory cell. In some embodiments, a piezoelectric device may be used to apply stress to the phase change material. In additional embodiments, a material having a thermal expansion coefficient greater than that of the phase change material may be positioned to apply stress to the phase change material. | 2012-01-05 |
| 20120002466 | STORAGE APPARATUS - Disclosed herein is a storage apparatus including a cell array configured to include storage devices arranged to form an array. Each of the storage device has: a storage layer for storing information as the state of magnetization of a magnetic substance; a fixed-magnetization layer having a fixed magnetization direction; and a tunnel insulation layer sandwiched between the storage layer and the fixed-magnetization layer. In an operation to write information on the storage layer, a write current is generated to flow in the layer-stacking direction of the storage layer and the fixed-magnetization layer in order to change the direction of the magnetization of the storage layer. The cell array is divided into a plurality of cell blocks. The thermal stability of the storage layer of any particular one of the storage devices has a value peculiar to the cell block including the particular storage device. | 2012-01-05 |
| 20120002467 | SINGLE TRANSISTOR MEMORY CELL - A semiconductor device along with circuits including same and methods of operating same are disclosed. In one particular embodiment, the device may comprise a memory cell including a transistor. The transistor may comprise a gate, an electrically floating body region, and a source region and a drain region adjacent the body region. Data stored in memory cells of the device may be refreshed during hold operations. | 2012-01-05 |
| 20120002468 | CELL DETERIORATION WARNING APPARATUS AND METHOD - Memory devices and methods adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data transfer rates relative to devices processing and generating only binary data signals indicative of individual bits. Programming of such memory devices includes programming to a target threshold voltage range representative of the desired bit pattern. Reading such memory devices includes generating an analog data signal indicative of a threshold voltage of a target memory cell. Warning of cell deterioration can be performed using reference cells programmed in accordance with a known pattern such as to approximate deterioration of non-volatile memory cells of the device. | 2012-01-05 |
| 20120002469 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device according to an embodiment includes: a memory cell array including a plurality of memory cells selected by word lines and bit lines, each memory cell being capable of storing N-bit data, a set of n-th bits of a plurality of memory cells selected by one of the word lines constituting an n-th physical page, and a predetermined number of the bit lines constituting one column; and a data writing unit that divides each of first to N-th input data of the length of the physical page or less input from the outside into unit data of the length of the column, changes at least a portion of the order of unit data of the first to N-th input data of a predetermined column in the predetermined column before data writing, and performs writing. | 2012-01-05 |
| 20120002470 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A non-volatile semiconductor memory device according to an embodiment includes a data write portion, the data write portion includes, in a write loop, a first operation mode of sequentially performing a program operation and a first verify operation, and a second operation mode of sequentially performing the program operation, the first verify operation, and a second verify operation, and the data write portion includes, in the first verify operation, precharging a bit-line connected to the first memory cell and a bit-line connected to a second memory cell adjacent to the first memory cell and verifying data of the first memory cell, then in the second verify operation, when the write to the second memory cell is completed, without precharging the bit-line connected to the second memory cell, precharging the bit-line connected to the first memory cell and verifying data of the first memory cell. | 2012-01-05 |
| 20120002471 | Memory Bit Redundant Vias - An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss. | 2012-01-05 |
| 20120002472 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A non-volatile semiconductor memory device according to an embodiment includes: a data write portion configured to repeat a write loop until data write is complete, the write loop including a program operation of applying a selected word-line with a program voltage necessary for program and a verify operation of applying the selected word-line with a verify voltage necessary for verify, the program voltage being changed for each write loop by a predetermined step width, the data write being performed in units of a page including a plurality of memory cells selected by the selected word-line; and an endurance determination portion configured to determine the endurance of the memory cells of the page, the data write portion supplies the selected word-line with a program voltage of a step width depending on the endurance. | 2012-01-05 |
| 20120002473 | BACKGROUND POWER CONSUMPTION REDUCTION OF ELECTRONIC DEVICES - An electronic device including a set of functional block, and a biasing block for generating a set of bias voltages for the functional blocks. The electronic device further includes a holding block coupled between the biasing block and the functional blocks for providing each bias voltage to at least one corresponding functional block, for each bias voltage the holding block including a capacitive element for storing the bias voltage, and a switch element switchable between an accumulation condition wherein provides the bias voltage from the biasing block to the capacitive element and to the at least one corresponding functional block, and a release condition wherein isolates the capacitive element from the biasing block and provides the bias voltage from the capacitive element to the at least one corresponding functional block, and a control block for alternately switching the switching elements between the accumulation condition and the release condition. | 2012-01-05 |
| 20120002474 | INTERLEAVED MEMORY PROGRAM AND VERIFY METHOD, DEVICE AND SYSTEM - An interleaved memory programming and verification method, device and system includes a memory array including first and second memory banks of memory cells. The memory device further includes a controller configured to concurrently program a first data into the first memory bank and a second data into the second memory bank using iterative programming and verification operations in each of the first and second memory banks with the programming and verification operations in the second memory bank being offset from the programming and verification operations in the first memory bank. | 2012-01-05 |
| 20120002475 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - A non-volatile semiconductor memory device includes a non-volatile memory having a plurality of blocks each including a plurality of memory cells, a bit line electrically connected to one end of a current path of the memory cell, a source line electrically connected to the other end of the current path of the memory cell, a word line electrically connected to the gate electrode, a sense amplifier circuit electrically connected to the bit line and configured to read data from the memory cell, a row decoder electrically connected to the word line and configured to apply a read voltage at which the memory cell is set to an ON state to the word line, and a controller configured to measure a cell current flowing through the memory cell in the ON state to judge whether the memory cell has been degraded. | 2012-01-05 |
| 20120002476 | Semiconductor Memory With Improved Block Switching - A non-volatile memory core comprises one or more memory bays. Each memory bay comprises one or more memory blocks that include a grouping of non-volatile storage elements. In one embodiment, memory blocks in a particular memory bay share a group of read/write circuits. During a memory operation, memory blocks are transitioned into active and inactive states. The process of transitioning blocks from an inactive state to an active state includes enabling charge sharing between a memory block entering the active state and another memory block that was previously in the active state. This charge sharing improves performance and/or reduces energy consumption for the memory system. | 2012-01-05 |
| 20120002477 | MEMORIES AND THEIR FORMATION - Memories and their formation are disclosed. One such memory has first and second memory cells at a first vertical level of the memory, first and second memory cells at a second vertical level of the memory, a first data line is selectively coupled to the first memory cells at the first and second vertical levels, and a second data line over the first data line is selectively coupled to the second memory cells at the first and second vertical levels. | 2012-01-05 |
| 20120002478 | NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE - When a voltage level detector detects that a supply voltage reaches a recovery voltage level that requires a recovery operation, a signal generator generates a recovery operation instructing signal for instructing the recovery operation. The recovery operation instructing signal is invalidated if a certain operation mode is executed and validated in other cases. | 2012-01-05 |
| 20120002479 | CIRCUIT FOR THE OPTIMIZATION OF THE PROGRAMMING OF A FLASH MEMORY - A non volatile memory device is provided. The memory device includes a plurality of memory cells and programming means. The programming circuitry is configured to select a group of memory cells, receive a first data word and program memory cells of the selected group based on the data word. the program means includes a program circuit configured to receive at least one second data word, and, for each second data word, select a corresponding portion of memory cells of the group and send a program current in parallel to discriminated memory cells of the portion based on the corresponding second data word during a corresponding program phase. The memory device further includes an optimization circuit configured to generate said at least one second data word from the first data word. Each of said at least one second data word is such to cause during each program phase that the number of discriminated memory cells is maximized compatibly with a maximum predetermined limit of the total program current provided by the program circuit. | 2012-01-05 |
| 20120002480 | NONVOLATILE MEMORY APPARATUS - A nonvolatile memory device includes: a data transmission line configured to transmit internal configuration data; a data path control unit configured to control a data transmission path direction of the data transmission line according to control of a test signal; and a configuration data latch unit configured to latch a signal transmitted through the data transmission line or drive a latched signal to the data transmission line, according to control of the test signal. | 2012-01-05 |
| 20120002481 | METHOD OF PROGRAMMING A NON-VOLATILE MEMORY DEVICE - A method of programming a non-volatile memory device includes applying a first pass voltage to word lines in a direction of a source select line based on a first word line selected for a program operation, wherein the word lines do not include a second word line adjacent to the first word line in a direction of the source select line; and applying a first voltage, a program voltage and a second pass voltage when the first pass voltage reaches a given level. The first voltage is applied to the second word line, the program voltage is provided to the first word line, and the second pass voltage is applied to word lines in a direction of a drain select line on the basis of the first word line. | 2012-01-05 |
| 20120002482 | CHARGE EQUILIBRIUM ACCELERATION IN A FLOATING GATE MEMORY DEVICE VIA A REVERSE FIELD PULSE - Methods for accelerating charge equilibrium in a non-volatile memory device using floating gate memory cells are disclosed. Memory devices and storage systems using charge equilibrium acceleration are also disclosed. In one such method, a programming pulse is applied to the word line to change an amount of charge stored on the floating gate of the memory cells being programmed. A reverse field pulse is then applied to the memory cell using only voltages greater than or equal to about 0 volts. The reverse field pulse accelerates charge equilibrium by moving any electrons trapped in the insulating oxide layers to a stable location so that the threshold voltage is stabilized. After the reverse field pulse, a program verify operation is performed and additional programming pulses and reverse field pulses are applied as needed to properly program the memory cell. | 2012-01-05 |
| 20120002483 | Non-Volatile Memory And Method With Reduced Neighboring Field Errors - A memory device and a method thereof allow programming and sensing a plurality of memory cells in parallel in order to minimize errors caused by coupling from fields of neighboring cells and to improve performance. The memory device and method have the plurality of memory cells linked by the same word line and a read/write circuit is coupled to each memory cells in a contiguous manner. Thus, a memory cell and its neighbors are programmed together and the field environment for each memory cell relative to its neighbors during programming and subsequent reading is less varying. This improves performance and reduces errors caused by coupling from fields of neighboring cells, as compared to conventional architectures and methods in which cells on even columns are programmed independently of cells in odd columns. | 2012-01-05 |
| 20120002484 | OPERATION METHODS FOR MEMORY CELL AND ARRAY FOR REDUCING PUNCH THROUGH LEAKAGE - A method for programming a first memory cell in a memory array. In a specific embodiment, each memory cell has a drain, a source, a channel, and a control gate overlying a charge storage material and the channel. The source of the first memory cell is coupled to the drain of a second memory cell. A voltage is applied to the drain of the first memory cell, and the source of the second memory cell is grounded. The method includes floating the drain of the second memory cell and the source of the first memory cell and turning on the channels of the first and second memory cells, effectively forming an extended channel region. Hot carriers are injected to the charge storage material of the first cell to program the first memory cell. The extended channel lowers electrical fields and reduces punch through leakage in unselected memory cells. | 2012-01-05 |
| 20120002485 | SEMICONDUCTOR MEMORY DEVICE - In a semiconductor memory circuit, a write voltage generation circuit receives an output voltage of a voltage boosting circuit to generate a write voltage to a memory cell. When the write voltage is low, a number-of-bits adjustment circuit increases the number of write bits of memory cells before write operation is performed. On the other hand, when the write voltage to a memory cell is high, the number-of-bits adjustment circuit decreases the number of write bits of memory cells before write operation is performed. The area and write time of the voltage boosting circuit can be reduced while the current supply capability of the voltage boosting circuit is efficiently used. | 2012-01-05 |
| 20120002486 | NONVOLATILE MEMORY APPARATUS AND METHOD FOR PROCESSING CONFIGURATION INFORMATION THEREOF - A nonvolatile memory apparatus includes a memory device including a configuration information storage block for storing configuration data groups. A configuration information processing circuit is configured to determine majorities of configuration data groups, which are outputted from the memory device during a first period as an initial stage of a power-up operation, under the control of a first control clock signal. The configuration information processing circuit is also configured to determine majorities of configuration data groups, which are outputted from the memory device during a second period after the first period, under the control of a second control clock signal having a cycle shorter than the first control clock signal. | 2012-01-05 |
| 20120002487 | NONVOLATILE MEMORY APPARATUS AND METHOD FOR PROCESSING CONFIGURATION INFORMATION THEREOF - A nonvolatile memory apparatus includes a memory device having a configuration information storage block for storing a first configuration data group and a second configuration data group having fewer bits than the first configuration data group and a configuration information processing circuit configured to determine a majority of the first configuration data group outputted from the memory device, during a first period of a power-up operation, and determine a majority of the second configuration data group outputted from the memory device, during a second period after the first period. | 2012-01-05 |
| 20120002488 | Current detection method - A current detection method for detecting whether data are stored in a memory unit includes the steps of: (A) respectively inputting two currents into a detection current input end and a reference current end; (B) reading out a current of the detection current input end by a first switching element and a current of the reference current end by a second switching element; (C) respectively converting the current read out by the first switching element and the current read out by the second switching element into two voltages, and respectively transmitting the two voltages to two input ends of a comparator; and (D) outputting a voltage signal for determining whether the data are stored in the memory unit by the comparator. The current detection method of the present invention has the fast detection speed, low power consumption and simple operation. | 2012-01-05 |
| 20120002489 | SIGNAL DRIVER CIRCUIT HAVING ADJUSTABLE OUTPUT VOLTAGE FOR A HIGH LOGIC LEVEL OUTPUT SIGNAL - A signal driver circuit having an adjustable output voltage for a high-logic level output signal. The signal driver circuit includes a signal driver configured to output a first logic level signal having a first voltage and output a second logic level signal having a second voltage according to an input signal. A voltage controlled voltage supply coupled to the signal driver provides the first voltage for the first logic level signal. The magnitude of the first voltage provided by the voltage controlled voltage supply is based on a bias voltage. A bias voltage generator can be coupled to the voltage controlled voltage supply to provide the bias voltage. | 2012-01-05 |
| 20120002490 | SEMICONDUCTOR STORAGE DEVICE - According to the embodiments, a semiconductor storage device includes a memory cell array, a plurality of word lines, a plurality of bit lines, and a row selector that multiply-selects the word lines, wherein the semiconductor storage device satisfies N | 2012-01-05 |
| 20120002491 | TEST SIGNAL GENERATING DEVICE, SEMICONDUCTOR MEMORY APPARATUS USING THE SAME AND MULTI-BIT TEST METHOD THEREOF - A semiconductor memory apparatus includes a multi-bit test signal generating device configured to receive an address signal and generate a multi-bit test signal based on the address signal when a multi-bit test write operation is performed. | 2012-01-05 |
| 20120002492 | DATA TRANSFER CIRCUIT OF SEMICONDUCTOR APPARATUS - Various embodiments of a data transfer circuit of a semiconductor apparatus are disclosed. In one exemplary embodiment, the data transfer circuit may include a first data line, a second data line, a first transfer unit configured to amplify data on the first data line in response to a first control signal and transfer amplified data to the second data line, and a second transfer unit configured to electrically connect the first data line to the second data line in response to a second control signal. | 2012-01-05 |
| 20120002493 | OUTPUT ENABLE SIGNAL GENERATION CIRCUIT OF SEMICONDUCTOR MEMORY - An output enable signal generation circuit of a semiconductor memory includes: a latency signal generation unit configured to generate a latency signal for designating activation timing of a data output enable signal in response to a read signal and a CAS latency signal; and a data output enable signal generation unit configured to control the activation timing and deactivation timing of the data output enable signal in response to the latency signal and a signal generated by shifting the latency signal based on a burst length (BL). | 2012-01-05 |
| 20120002494 | TEST MODE CONTROL CIRCUIT IN SEMICONDUCTOR MEMORY DEVICE AND TEST MODE ENTERING METHOD THEREOF - A test mode control circuit is provided to strictly allow entry into a test mode or prevent a boot failure from occurring during a boot operation for a built-in parallel bit test. The test mode control circuit includes a latch, a real entry signal detector, an entry determinator, and a mode control signal generator. When a real entry signal is detected, the entry signal determinator generates an entry determination signal and a test mode control signal is obtained from the mode control signal generator. | 2012-01-05 |
| 20120002495 | MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM - A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device. | 2012-01-05 |
| 20120002496 | Circuit and method for eliminating bit line leakage current in random access memory devices - A method for eliminating bit line leakage current of a memory cell in random access memory devices comprises the steps of: periodically activating a pre-charge equalization circuit, which provides a pre-charge voltage to a pair of complementary bit lines of a memory cell, if the memory cell is in a self-refresh mode or a standby mode; and temporarily activating the pre-charge equalization circuit after the memory cell is refreshed if the memory cell is in the self-refresh mode or the standby mode. | 2012-01-05 |
| 20120002497 | Circuit and method for controlling standby leakage current in random access memory devices - A method for controlling standby current coming from bit line leakage in random access memory devices comprises the steps of: continuously deactivating a pre-charge equalization circuit providing a pre-charge voltage to a pair of complementary bit lines of a memory cell if the memory cell is in a self-refresh mode, a standby mode or an active mode; temporarily activating the pre-charge equalization circuit before the memory cell is refreshed if the memory cell is in a self-refresh mode or a standby mode; and temporarily activating the pre-charge equalization circuit before the memory cell is refreshed or accessed if the memory cell is in an active mode. | 2012-01-05 |
| 20120002498 | NONVOLATILE MEMORY, DATA PROCESSING APPARATUS, AND MICROCOMPUTER APPLICATION SYSTEM - Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. Accordingly, operational stability of the nonvolatile memory is realized. | 2012-01-05 |
| 20120002499 | Power control of an integrated circuit memory - An integrated circuit memory | 2012-01-05 |
| 20120002500 | Multi-Voltage Level, Multi-Dynamic Circuit Structure Device - A multi-voltage level, multi-dynamic circuit structure device and method are disclosed. In a particular embodiment, the method includes discharging a first dynamic node at a first discharge circuit of a first dynamic circuit structure in response to receiving an asserted discharge signal. The first dynamic circuit structure includes the first dynamic node at a first voltage level and a first keeper circuit that is disabled when the asserted discharge signal is received. The asserted discharge signal has a second voltage level that is different from the first voltage level. A second keeper circuit of a second dynamic circuit structure is enabled responsive to discharging the first dynamic node to maintain a second dynamic node of the second dynamic circuit structure at the first voltage level. | 2012-01-05 |
