| 01st week of 2012 patent applcation highlights part 17 |
| Patent application number | Title | Published |
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| 20120001601 | POWER SUPPLY SYSTEM AND POWER SUPPLY METHOD - Disclosed is a power supply system capable of achieving low power consumption while reducing CPU control even if the power supply system includes a plurality of regulators. A DCDC ( | 2012-01-05 |
| 20120001602 | Multiple Branch Alternative Element Power Regulation - A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated. | 2012-01-05 |
| 20120001603 | VOLTAGE REGULATOR WITH ADAPTIVE HYSTERETIC CONTROL - A voltage regulator with adaptive hysteretic control. The voltage regulator may include a top switch (e.g., MOSFET) configured to couple a power supply supplying an input voltage to a load. An adaptive hysteretic control circuit of the voltage regulator may turn on the top switch when the feedback voltage reaches the low threshold and turn off the top switch when the feedback voltage reaches the high threshold. The adaptive hysteretic control circuit may adjust the upper and lower threshold to make the voltage regulator working like a constant on time control circuit in steady state. When a step down transient happens, the top switch could be turned off when the output voltage reaches the upper threshold, and when a step up transient happens, the top switch could be turned on when the output voltage reaches the lower threshold, it makes the voltage regulator working like a hysteretic control circuit. | 2012-01-05 |
| 20120001604 | VOLTAGE REGULATION CIRCUIT - A voltage regulation circuit includes: a first voltage divider that divides a regulation voltage with a predetermined division ratio to generate a division voltage; a first current driving force control unit configured to compare a reference voltage with the division voltage and generate a first control signal; a current driving unit configured to generate a driving current with a variable driving force based on the first control signal and a second control signal, and generate the regulation voltage; and a second current driving force control unit configured to generate the second control signal in accordance with a level variation of the regulation voltage. | 2012-01-05 |
| 20120001605 | DIFFERENTIAL AMPLIFIER CIRCUIT AND SERIES REGULATOR - A differential amplifier circuit including: a differential input stage including a pair of differential MOS transistors, a pair of load elements, and a first constant-current source; an output stage including an output MOS transistor and a second constant-current source; a constant-current MOS transistor provided in parallel to one of the first and second constant-current sources; and a boost current controlling MOS transistor in which a potential of a connection node of the output MOS transistor and the second constant-current source is applied to a gate terminal thereof; wherein the boost current controlling MOS transistor is turned on when a voltage inputted to a gate terminal of one of the pair of differential MOS transistors changes, and a current of the constant-current MOS transistor is added to one of the first and second constant-current sources and is allowed to flow. | 2012-01-05 |
| 20120001606 | Voltage regulator circuit - A voltage regulator circuit comprises active and standby amplifiers, first and second transistors, and a capacitor. The active amplifier has a negative input connected to a first reference voltage, and the standby amplifier has a negative input connected to a second reference voltage. The first reference voltage is greater than the second reference voltage. The first transistor has a gate connected to an output of the active amplifier and a drain connected to a voltage regulated output, and the second transistor has a gate connected to an output of the standby amplifier and a drain connected to the voltage regulated output. The capacitor is connected between a chip enable signal and the voltage regulated output. | 2012-01-05 |
| 20120001607 | DROP POWER SUPPLY CIRCUIT - A capacitor drop power supply circuit for supplying power to a load has a switch configured to alter a configuration of the power supply circuit to reduce input current of the power supply circuit. The switch is operable by the load to alter the configuration when the load enters a power save mode. The switch is operable to alter the configuration of the power supply circuit between a first configuration having a first current path through the power supply circuit in a first current direction, and a second configuration having a second current path through the power supply circuit in the first current direction. The switch changes the power supply circuit between the first configuration and the second configuration when the load enters a power save mode. | 2012-01-05 |
| 20120001608 | INTELLIGENT GATE DRIVE - According to an embodiment of the invention, an apparatus includes a microprocessor-based pulse-width modulation controller configured to generate a pulse-width modulation signal, and a synchronous converter including a first transistor, a second transistor, a first driver, and a second driver. The apparatus further includes a drive voltage generator configured to generate a drive voltage for the synchronous converter. The drive voltage generator is further configured to generate the drive voltage based on a measured output current and a measured input voltage. | 2012-01-05 |
| 20120001609 | DC/DC CONVERTER - In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system. | 2012-01-05 |
| 20120001610 | BUCK-BOOST REGULATOR WITH DEAD BAND - This document provides methods and apparatus configured to efficiently regulate an output voltage near a desired voltage level, for example, under varying input or load conditions. An example apparatus can include a regulator having a boost controller configured to provide voltage to an output of the regulator when at least one of the output voltage or the input voltage is below a first threshold voltage and a buck controller configured to provide voltage to the output of the regulator when at least one of the output voltage or the input voltage is above a second threshold voltage. Further, the regulator can be configured to provide the input voltage at the output of the regulator when at least one of the input voltage or the output voltage is between the first and second threshold voltages. In some examples, the first threshold is below the second threshold. | 2012-01-05 |
| 20120001611 | DC/DC CONVERTER AND ELECTRONIC APPARATUS - A DC/DC converter comprising: a switching element; a driving unit configured to turn on/off the switching element based on a pulse width of a control signal; a control unit configured to generate the control signal based on a voltage signal; and a generation unit configured to generate the voltage signal by connecting a detection unit having a resistor corresponding to a temperature and a resistance element in series, and dividing a reference voltage by the detection unit and the resistance element. | 2012-01-05 |
| 20120001612 | Four-switch step-down storageless converter - A four-switch step-down storageless DC-DC converter is provided having simultaneously ultra high efficiency of over 99% in an ultra compact size, while also providing a regulation and maintaining fast transient response while in regulation. Because of its storageless feature it is ideal for demanding computer applications, such as VRM (Voltage Regulator Modules), with extremely fast step-load load current change requirements and tight output voltage regulation requiring ultra low output ripple voltages during the transients. | 2012-01-05 |
| 20120001613 | HIGH-BANDWIDTH LINEAR CURRENT MIRROR - High linearity is essential in audio circuitry. As sampling rates for audio applications are needed, high speed and high linearity are needed in analog and mixed signal portions of audio circuitry such as in current mirrors. A current mirror employs two current paths in an output. The first current path is driven by a fast acting transistor through a resistor. The second current path is driven by a differential amplifier coupled to another transistor through another resistor. The second current path is used to maintain linearity by causing the voltage across both transistors to be the same. | 2012-01-05 |
| 20120001614 | ULTRA LOW-POWER CMOS BASED BIO-SENSOR CIRCUIT - An apparatus configured to identify a material having an electric charge, the apparatus having: an inverting gain amplifier including a first field-effect transistor (FET) coupled to a second FET; wherein a gate of the first FET is configured to sense the electric charge and an output of the amplifier provides a measurement of the electric charge to identify the material. | 2012-01-05 |
| 20120001615 | ARRAY COLUMN INTEGRATOR - The described embodiments may provide a chemical detection circuit with an improved signal-to-noise ration. The chemical detection circuit may include a current source, a chemical detection pixel, an amplifier and a capacitor. The chemical detection pixel may comprise a chemical-sensitive transistor that may have a first and second terminals and a row-select switch coupled between the current source and chemically-sensitive transistor. The amplifier may have a first input and a second input, with the first input coupled to an output of the chemically-sensitive transistor via a switch and the second input coupled to an offset voltage line. The capacitor may be coupled between an output of the amplifier and the first input of the amplifier. The capacitor and amplifier may form an integrator and may be shared by a column of chemical detection pixels. | 2012-01-05 |
| 20120001616 | COLUMN ADC - The described embodiments may provide a chemical detection circuit. The chemical detection circuit may comprise a column of chemically-sensitive pixels. Each chemically-sensitive pixel may comprise a chemically-sensitive transistor, and a row selection device. The chemical detection circuit may further comprise a column interface circuit coupled to the column of chemically-sensitive pixels and an analog-to-digital converter (ADC) coupled to the column interface circuit. Each column interface circuit and column-level ADC may be arrayed with other identical circuits and share critical resources such as biasing and voltage references, thereby saving area and power. | 2012-01-05 |
| 20120001617 | APPARATUS FOR CALIBRATED NON-INVASIVE MEASUREMENT OF ELECTRICAL CURRENT - A system for accurate measurement and monitoring of AC or DC electrical current flowing through electrical conductors includes one or more current sensors, a receiver, and one or more calibration signal generators (“CSG's”) that can be plugged into outlets or otherwise coupled to the conductors so as to add automated, time-varying calibration signals to the conductors, such as current pulses or pulse patterns. The sensors are placed on a circuit breaker panel, around a cable, or otherwise near the conductors. The receiver distinguishes the calibration signals by their timing, pulse patterns, frequencies, or other time-varying features, uses their known amplitudes to calibrate the sensitivity of each sensor to each conductor, and determines the current flowing in each conductor. Among other applications, the invention can monitor building current usage, CO and data center power usage and distribution, and power line current leakage, and can calibrate invasive and/or non-invasive current sensors. | 2012-01-05 |
| 20120001618 | SYSTEM FOR MONITORING CAPACITOR CELLS - A system for monitoring a plurality of capacitor cells connected in series in a capacitor module which are used as electrical energy stores in an energy storage device and which can be charged in same by a charge current flowing through all the capacitor cells or discharged by a discharge current comprises a measuring unit which can determine the voltages applied to the individual capacitor cells by measuring voltages, an evaluation unit which sets a nominal voltage for the capacitor cells, and at least one discharge branch connectable to each capacitor cell and controllable by a discharge control unit which discharges a respective capacitor cell onto said discharge branch depending upon the set nominal voltage and the applied voltage. | 2012-01-05 |
| 20120001619 | HARD PARTICLE CONCENTRATION DETECTING METHOD, PARTICLE CONCENTRATION DETECTING METHOD, AND DEVICE THEREFOR - Magnetic and counterpart members | 2012-01-05 |
| 20120001620 | MAGNETIC ANGLE SENSOR - A magnetic angle sensor comprises a semiconductor chip, at least two magnetic field concentrators of planar shape which are arranged on a surface of the semiconductor chip, and four Hall sensors. Each Hall sensor is assigned to one of the magnetic field concentrators and comprises a Hall element or a cluster of Hall elements. The Hall elements are integrated in the semiconductor chip and are arranged in the region of the edge of the assigned magnetic field concentrator where they are permeated by field lines of the magnetic field which extend approximately perpendicularly to the mentioned surface of the semiconductor chip in the region of the edge of the magnetic field concentrator. Two Hall sensors form a first pair of sensors for measuring a first component of the magnetic field and the two other Hall sensors form a second pair of sensors for measuring a second component of the magnetic field. Connecting lines which connect the Hall sensors which are arranged in the region of the edge of the same magnetic field concentrator run either parallel with respect to each other or form a single common line. | 2012-01-05 |
| 20120001621 | Method of Determining Distance to a Ferrous Material - In one aspect of the present invention a method of determining a distance to a ferrous material comprises providing a plurality of magnetometers spaced at varying distances from a ferrous material, detecting a ferrous material with each of the plurality of magnetometers individually, establishing one of the plurality of magnetometers as a primary magnetometer, obtaining sensor readings from each of the plurality of magnetometers, forming a first ratio of the differences in the sensory readings of the primary magnetometer to the sensory readings of the other magnetometers, forming a second ratio of the differences in inversely cubed distances to the ferrous material from the primary magnetometer to inversely cubed distances to the ferrous material from the other magnetometers, setting the first ratio and the second ratio equal to each other, and calculating the distance to the ferrous material from the plurality of magnetometers. | 2012-01-05 |
| 20120001622 | MAGNETORESTRICTIVE POSITION SENSOR ACCORDING TO THE PROPAGATION TIME PRINCIPLE HAVING A MAGNETORESTRICTIVE DETECTOR UNIT FOR MECHANICAL-ELASTIC DENSITY WAVES - Instead of tapping a mechano-elastic desnity wave (MEDW) from a wave conductor or a Villary band through a detector coil, a changing field strength H is captured by a XMR sensor which is positioned on a wave conductor or proximal to the wave conductor or on a Villary band or proximal to the Villary band. | 2012-01-05 |
| 20120001623 | SENSOR WITH LASER WELDED COVER - In order to configure a housing of a sensor, in particular of an angle sensor, long term leak tight in the best way possible a cover is not glued into the pot shaped housing or screwed in and sealed, but welded in the housing through a laser. In spite of the sensor chip already being in the housing, the heat induction is so small that the sensor chip is not damaged even though the sensor chip is very small. | 2012-01-05 |
| 20120001624 | Method And Apparatus For Measuring The Thickness Of A Metal Layer Provided On A Metal Object - A method and an apparatus for measuring the thickness of a metal layer. The metal layer has a resistivity (ρ | 2012-01-05 |
| 20120001625 | ULTRASENSITIVE MAGNETIC SENSOR BASED ON GIANT FARADAY ROTATION - A high-resolution sensor of magnetic field sensor system and materials for use in such a system are described. The sensor systems measure a magnetic field using inorganic and/or organic magneto-optically active materials, e.g. polymer material and have an interferometer based on Faraday rotation. The polymer material is preferably in the form of a film. The polymer material has an optical property that is sensitive to the magnetic field, e.g. the Faraday rotation effect. The present invention also provides a sensor head structure comprising the above polymer material. The sensor head may be designed for use with an optical fiber or with mirrors. In particular the present invention provides a fiber Sagnac interferometer to measure the rotation of polarized plane of light. The present invention provides a fiber or mirror based Sagnac interferometer with passive phase bias applied to magnetic field sensing. This invention has the following three major aspects each being an embodiment of the present invention: 1. Sensing material: a conjugate polymer such as polythiophene and/or a polymer containing superparamagnetic nanoparticles that exhibits a giant Faraday rotation. 2. Magnetic field probe that incorporates the above polymer or polymer/nanoparticle composite, e.g. in the form of a film. 3. Sensor: The sensor combines an optical fiber-based Sagnac interferometer and the above magnetic field probe. | 2012-01-05 |
| 20120001626 | MAGNETIC IMPEDANCE ELEMENT AND MAGNETIC SENSOR USING THE SAME - In order to provide a magnetic impedance element capable of achieving a large magnetic impedance effect at room temperature or higher, the magnetic impedance element includes a ceramic body represented by the chemical formula Sr | 2012-01-05 |
| 20120001627 | SURFACE-MOUNTABLE MAGNETIC FIELD SENSOR HAVING A SEMICONDUCTOR CHIP AND METHOD FOR PRODUCING A CIRCUIT BOARD HAVING A MAGNETIC FIELD SENSOR - A surface-mountable magnetic field sensor ( | 2012-01-05 |
| 20120001628 | Method and apparatus for obtaining spatial information and measuring the dielectric constant of an object - Methods and apparatus are provided for obtaining spatial information about an object, and for measuring the dielectric constant of an object. They include placing the object in a cavity and interacting electromagnetic radiation at a plurality of frequencies with the object to obtain a corresponding plurality of measured resonant transverse magnetic modes. They also include using the plurality of measured resonant transverse magnetic modes to obtain the spatial information for the object, and/or using the plurality of measured resonant transverse magnetic modes to obtain the dielectric constant for the object. | 2012-01-05 |
| 20120001629 | NON-RESONANT LOGGING TOOLS - Methods and systems are provided for tools having non-resonant circuits for analyzing a formation and/or a sample. For example, nuclear magnetic resonance and resistivity tools can make use of a non-resonant excitation coil and/or a detection coil. These coils can achieve desired frequencies by the use of switches, thereby removing the requirement of tuning circuits that are typical in conventional tools. | 2012-01-05 |
| 20120001630 | DARK BLOOD BALANCED STEADY STATE FREE PRECESSION IMAGING - Systems, methods, and other embodiments associated with controlling a magnetic resonance imaging (MRI) apparatus to perform a balanced steady state free precession (bSSFP) technique that includes magnetization preparation with differentiated velocity encoding and spoiling residual transverse magnetization are described. The example systems, methods, and other embodiments are also associated with acquiring a dark blood image in response to the bSSFP technique. A dark blood image is one in which NMR signal acquired from an object subjected to the bSSFP technique and magnetization preparation includes NMR signal from flowing spins and NMR signal from non-flowing spins in a desired ratio. | 2012-01-05 |
| 20120001631 | ULTRA-LOW FIELD NUCLEAR MAGNETIC RESONANCE METHOD TO DISCRIMINATE AND IDENTIFY MATERIALS - An ultra-low field (ULF) nuclear magnetic resonance (NMR) and/or magnetic resonance imaging (MRI) system can be used for rapid identification and discrimination of materials, e.g., liquid in opaque containers and/or materials in or on human bodies. The system utilizes the ability of ULF NMR/MRI to measure NMR parameters in magnetic fields that can be easily changed in field strength and orientation. | 2012-01-05 |
| 20120001632 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD OF CONTROLLING IMAGE CONTRAST - A magnetic resonance imaging apparatus includes a data acquisition unit and an image data generating unit. The data acquisition unit acquires MR signals for imaging by an imaging scan with a frequency-selective or slice-selective radio frequency intermediate pulse for controlling a contrast and a spoiler gradient magnetic field for suppressing unnecessary signal component after applying at least one of radio frequency excitation pulses. The image data generating unit generates image data based on the magnetic resonance signals. | 2012-01-05 |
| 20120001633 | MR IMAGING USING PARALLEL SIGNAL ACQUISITION - The invention relates to a method of MR imaging of at least a portion of a body ( | 2012-01-05 |
| 20120001634 | METHOD AND MAGNETIC RESONANCE SYSTEM FOR MR SPECTROSCOPY - A method for MR spectroscopy includes the steps of (a) switching at least one phase coding gradient for spatial coding of a spectral information to be detected, and (b) detection of the spectral information, and repeating (a) and (b) until a predetermined raw data space has been scanned. Specific spectral information is detected in (b) when the at least one phase coding gradient respectively has a value of 0. This specific spectral information is evaluated in order to determine a property of the spectral information already detected in (b), or still to be detected in (b). | 2012-01-05 |
| 20120001635 | MAGNETIC RESONANCE IMAGING APPARATUS AND MAGNETIC RESONANCE IMAGING METHOD - In one embodiment, an MRI apparatus includes a temperature measuring unit, a data storing unit, a pulse setting unit and an imaging unit. | 2012-01-05 |
| 20120001636 | CAPILLARY CARTRIDGE FOR MINIATURIZED NUCLEAR MAGNETIC RESONANCE (NMR) DEVICES - A shim coil assembly for positioning shim coils in a narrow gap between magnetic poles of miniature NMR devices around the magnetic center includes electric traces on multiple levels of printed circuit board layers in various, overlapping configurations. Mirror image shim coils can be connected in series in a symmetric sense or connected in series in a antisymmetric sense. | 2012-01-05 |
| 20120001637 | CORRECTING FOR MAGNETIC INTERFERENCE IN AZIMUTHAL TOOL MEASUREMENTS - Methods and systems that compensate for magnetic interference in azimuthal tool measurements. At least some method embodiments include a downhole logging method that includes taking measurements as a function of orientation from inside a borehole. The measurements are associated with different azimuthal bins, and an azimuthal direction is determined for each azimuthal bin. Because the tool rotates at a constant rate, the relative number of measurements associated which the different bins can be used to measure the effective sizes of the different bins and to redetermine the effective angles of the bins in the presence of magnetic interference. The tool measurements may include, but are not limited to, formation resistivity, magnetic field, and formation density. | 2012-01-05 |
| 20120001638 | Assembly and Method for Identifying a Ferrous Material - In one aspect of the present invention, a system assembly for identifying a ferrous material comprises a plurality of magnetometers spaced at varying distances from a ferrous material. Each of the plurality of magnetometers may comprise a sensor reading of a magnitude of an absolute magnetic field, which comprises a magnetic field created by the ferrous material and an ambient magnetic field. One of the plurality of magnetometers may be designated as a primary magnetometer. A distance to the ferrous material from the primary magnetometer may be determined by forming a ratio of the differences in the sensor reading of the primary magnetometer and the sensor readings of the other magnetometers set equal to a ratio of the differences in the distance to the ferrous material from the primary magnetometer inversely cubed and the distances to the ferrous material from the other magnetometers inversely cubed. The system assembly may also comprise a picture taking device that may provide an image of a surface viewable from above the ferrous material and a global positioning system device that may provide a map of a geographical region. | 2012-01-05 |
| 20120001639 | VOLTAGE MONITOR - A first monitor circuit | 2012-01-05 |
| 20120001640 | POWER SUPPLY DEVICE CAPABLE OF DETECTING DISCONNECTION OF GROUND LINE - A power supply device includes negative-side and positive-side battery blocks serially connected to each other through a resistor element | 2012-01-05 |
| 20120001641 | GAS SENSOR CONTROL APPARATUS AND METHOD - A gas sensor control apparatus ( | 2012-01-05 |
| 20120001642 | DIE CONNECTION MONITORING SYSTEM AND METHOD - A system for monitoring a die connection includes a die bonded to a substrate and a connection indicator circuit coupled to a monitor pad of the die. The connection indicator circuit is configured to detect a connection failure of the monitor pad. A signal corresponding to the monitor pad of the die is monitored, and an indication of a pad connection failure associated with the monitor pad is provided in response to a change in the monitored signal. | 2012-01-05 |
| 20120001643 | SENSING PHASE SEQUENCE TO SUPPRESS SINGLE TONE NOISE - A noise suppression method for a capacitance-to-voltage converter varies a sequence of sensing signal edges during a plurality capacitance measurements to produce a number of noise responses. The sensing signal edges are varied in a repetitive rising and falling edge pattern for each sequence. Three or more such sequences can be used, and the sequence with the highest noise is eliminated and the others are averaged. The noise suppression method can be implemented during calibration and then used for a number of normal acquisitions. The noise suppression method can be applied to capacitance-to-voltage converters having monitoring and integration phases. | 2012-01-05 |
| 20120001644 | SPATIAL TRACKING SYSTEM AND METHOD - The specification discloses a simple and effective system for tracking position and rotation of an object or portable device located within an electromagnetic field. The electromagnetic field may be produced by a primary coil, which inductively couples with one or more secondary coils located within a portable device. The relative strength of this inductive coupling may be used to determine the position, rotation, or both of the portable device relative to the primary coil. | 2012-01-05 |
| 20120001645 | COMBINED ELECTRICAL VARIABLE DETECTION DEVICE - A combined electrical variable detection device comprises a plurality of single-phase current measuring modules ( | 2012-01-05 |
| 20120001646 | METHODS AND APPARATUS FOR TESTING ISFET ARRAYS - The invention provides testing of a chemically-sensitive transistor device, such as an ISFET device, without exposing the device to liquids. In one embodiment, the invention performs a first test to calculate a resistance of the transistor. Based on the resistance, the invention performs a second test to transition the testing transistor among a plurality of modes. Based on corresponding measurements, a floating gate voltage is then calculated with little or no circuitry overhead. In another embodiment, the parasitic capacitance of at least either the source or drain is used to bias the floating gate of an ISFET. A driving voltage and biasing current are applied to exploit the parasitic capacitance to test the functionality of the transistor. | 2012-01-05 |
| 20120001647 | TOUCH AND APPROACH DETECTION WITH CAPACITATIVE SENSORS - Provided by the invention is a sensor device for the detection of touch or approach of an object. A server circuit of the sensor device according to the invention is formed in such a manner, that the server circuit alone (i.e. without co-operation with a client circuit) may be used as approaching sensor, at the same time however also together with one or several client circuits may be implemented a sensor network, in which the client circuits preferably are fed with energy with the electric field of the server electrode. | 2012-01-05 |
| 20120001648 | Capacitance Sensors - A sensor assembly includes a housing assembly, an electrode arrangement and a diaphragm having a fixed portion secured to the housing assembly and an active portion movable relative to the electrode arrangement in response to a differential pressure applied to opposite sides of the diaphragm. The fixed portion of the diaphragm is secured at one or more locations relative to at least a portion of the housing assembly; and at least one groove is formed in the fixed portion of the diaphragm between the locations at which the diaphragm is fixed relative to the housing assembly and the active portion so as to relieve any stress on the active portion of the diaphragm. A method of making the sensor assembly is also disclosed. | 2012-01-05 |
| 20120001649 | LEADFRAME CURRENT SENSOR - A current sensor is disclosed. The current sensor includes a leadframe having a die paddle, a portion of the die paddle being configured as a resistive element through which current can flow, and an integrated circuit (IC) die attached and thermally coupled to the die paddle. The IC die includes a current sensing module configured to measure a voltage drop across the resistive element and convert the voltage drop measurement to a current measurement signal and a temperature compensation module electrically coupled to the current sensing module. The temperature compensation module is configured to adjust the current measurement signal to compensate for temperature-dependent changes in the resistive element. The temperature compensation module includes a temperature-sensitive element, with a portion of the temperature-sensitive element located directly over a portion of the resistive element. | 2012-01-05 |
| 20120001650 | Test Probe - A test probe is configured to provide conductive contact with a surface on application of the probe to the surface. The probe includes a probe body having a proximal and distal end, a probe tip located at the distal end of the probe body, the probe being configured such that, when the probe tip is applied to the surface, the probe tip is moved to rotate about its axis, whereby the shaft tip can rotatably remove oxidation and/or contamination debris from between the shaft tip and the surface. | 2012-01-05 |
| 20120001651 | FREQUENCY SPECIFIC CLOSED LOOP FEEDBACK CONTROL OF INTEGRATED CIRCUITS - Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indicator of the integrated circuit at the desired specific operating frequency. The predetermined value is stored in a data structure within a computer usable media. The data structure comprises a plurality of frequency specific predetermined values for a variety of operating frequencies. | 2012-01-05 |
| 20120001652 | ELECTROMAGNETIC ACTUATOR INSPECTION DEVICE AND IMAGE FORMING APPARATUS - An electromagnetic actuator inspection device, including a driver to PWM control an electric power input to a drive coil of an electromagnetic actuator to PWM drive the electromagnetic actuator; a PWM drive controller to output a PWM signal to the driver; a voltage detector to detect a voltage generated in the drive coil of the electromagnetic actuator when pausing its PWM drive; and a determiner to determine at least one of whether the electromagnetic actuator is connected to the driver and whether the drive coil is disconnected, based on the voltage detected by the voltage detector. | 2012-01-05 |
| 20120001653 | Dense Nanoscale Logic Circuitry - One embodiment of the present invention is directed to hybrid-nanoscale/microscale device comprising a microscale layer that includes microscale and/or submicroscale circuit components and that provides an array of microscale or submicroscale pins across an interface surface; and at least two nanoscale-layer sub-layers within a nanoscale layer that interfaces to the microscale layer, each nanoscale-layer sub-layer containing regularly spaced, parallel nanowires, each nanowire of the at least two nanoscale-layer sub-layers in electrical contact with at most one pin provided by the microscale layer, the parallel nanowires of successive nanoscale-layer sub-layers having different directions, with the nanowires of successive nanoscale-layer sub-layers intersecting to form programmable crosspoints. | 2012-01-05 |
| 20120001654 | Three Dimensional Multilayer Circuit - A three dimensional multilayer circuit ( | 2012-01-05 |
| 20120001655 | BASE CELL FOR IMPLEMENTING AN ENGINEERING CHANGE ORDER (ECO) - A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell. | 2012-01-05 |
| 20120001656 | Apparatus, System, and Method for Direct Phase Probing and Mapping of Electromagnetic Signals - An apparatus, system, and method for phase detection of electromagnetic signals are presented. The apparatus may include a magnetic element, one or more first signal contacts coupled to the magnetic element for receiving a first signal, and one or more output contacts coupled to the magnetic element for providing a variable level voltage generated by the magnetic element, the level of the voltage being responsive to a phase difference between the first signal and a second signal. In a further embodiment, the apparatus may include a substrate for mechanically supporting the magnetic element. Additionally, the apparatus may include a conductor mechanically supported by substrate, the conductor configured to receive the second signal. | 2012-01-05 |
| 20120001657 | APPARATUS AND METHOD FOR IMPROVED EDGE TRIGGERING IN A TEST AND MEASUREMENT INSTRUMENT - A digital storage oscilloscope employs an improved edge triggering circuit that discards some of trigger events when it determines that there are many more trigger events than the oscilloscope can use. The determination is made in response to detection of a characteristic of the signal that indicates a repetitive nature of a complex signal. Certain trigger events are selected to be acted upon, and others are discarded, in response to the determination. The circuitry dynamically reacts to changes in the input signal in response to detection of different criteria for a characteristic of repetition as the input signal changes. | 2012-01-05 |
| 20120001658 | MODULATION PROFILE GENERATOR AND SPREAD SPECTRUM CLOCK GENERATOR INCLUDING THE SAME - There is provided a modulation profile generator and spread spectrum clock generator including the modulation profile generator. The modulation profile generator includes an input signal generator that generates an input signal; a function calculator that outputs a function calculation result in the form of a square root graph by using the input signal as an input of a function; and a profile generator that generates a non-linear modulation profile based on the function calculation result. As a result, it is possible to effectively reduce electromagnetic interference. | 2012-01-05 |
| 20120001659 | Voltage-to-Current Converter with Feedback - A voltage-to-current converter includes a transconductance stage including an input configured to receive a scaled voltage signal, a first output to carry a first current based on the scaled voltage signal, and a second output to carry a second current that is proportional to the first current. The voltage-to-current converter further includes a digital feedback loop coupled to the second output of the transconductance stage and configured to adjust the scaled voltage signal based on an error between an external reference voltage and a sense voltage derived from the second current to compensate for changes in the scaled voltage signal. | 2012-01-05 |
| 20120001660 | SOFTWARE-DEFINED RADIO - Present software-defined radios (SDR) employ front end circuits that contain multiple receivers and transmitters for each band of interest, which is inflexible, expensive and power inefficient. A programmable front end circuit is implemented on a CMOS device and is configurable to transmit and receive signals in a wide band of frequencies, thereby providing an adaptable transmitter and receiver operable with current and future wireless networking technologies. | 2012-01-05 |
| 20120001661 | VARIABLE RESISTOR VOLTAGE DRIVER WITH SELF-NOISE COMPENSATION CIRCUIT - A multi-PAM line driver circuit to drive input data along a transmission line from a voltage source is disclosed. The driver circuit includes a voltage source to supply a regulated voltage and a regulator current. A main branch is coupled between the voltage source and the transmission line and includes variable impedance circuitry. The main branch draws a drive current from the voltage source. A compensating branch is coupled to the voltage source in parallel with the main branch and includes a second variable impedance circuit to draw a compensating current from the voltage source based on the drive current, such that a sum of the drive current and the compensating current is substantially constant during the transmission of the input data. | 2012-01-05 |
| 20120001662 | CONTROL OF A RESONANT SWITCHING SYSTEM WITH MONITORING OF THE WORKING CURRENT IN AN OBSERVATION WINDOW - Controlling a resonant switching system, which includes a first switch and a second switch in a half-bridge configuration for driving a resonant load. A corresponding control system includes command means for switching on and switching off the switches alternatively according to a working frequency of the switching system. The control system includes detection means for detecting a zeroing of a working current being supplied by the switching system to the resonant load in a temporal observation window; the observation window follows each switching off of at least one of the switches, and has a length equal to a fraction of a working period of the switching system. Correction means are then provided for modifying the working frequency in response to each detection of the zeroing in the observation window. | 2012-01-05 |
| 20120001663 | MIXED-MODE INPUT BUFFER - An input buffer with a reduced sensitivity to an externally generated reference voltage includes: a first input coupled between a first load and ground, the first input being an externally generated reference voltage; a second input coupled between a second load and ground, for generating an output; and a third input coupled in parallel to the first input, the third input being an internally generated reference voltage. The output switches between high and low or vice versa when the second input exceeds a switching point which is an average of the first input and the third input according to the relative size of the first input and the third input. | 2012-01-05 |
| 20120001664 | CLOCK DIVIDER CIRCUIT AND SYSTEM LSI HAVING SAME - A clock divider circuit has a plurality of dividers for which dividing ratios are settable, a preset register group that stores the dividing ratios set for the plurality of dividers, and a selector that selects a single preset register within the preset register group, and imparts the dividing ratios stored in the selected preset register to the plurality of dividers. | 2012-01-05 |
| 20120001665 | FRACTIONAL FREQUENCY DIVIDER - A fractional frequency divider including a frequency division unit for generating a reduced frequency timing signal having j pulses for every k pulses of an original timing signal, wherein j and k are each integers; and phase correction circuitry adapted to selectively shift each jth pulse of the reduced frequency timing signal by a first fixed time period. | 2012-01-05 |
| 20120001666 | PARALLEL PATH FREQUENCY DIVIDER CIRCUIT - A parallel path frequency divider (PPFD) includes a low power frequency divider and a high speed latch. A first portion of an oscillating input signal present on an input node of the PPFD is communicated to the divider and a second portion is communicated to the latch. The divider generates a frequency divided enable signal that is communicated to the latch. The latch generates a divided down output signal based on the oscillating input signal and the enable signal. The output signal is insensitive to phase noise present on the enable signal as long as the phase noise on the enable signal is less than one-half of the period of oscillation of the oscillating input signal. Because the noise generated by the low power frequency divider is not propagated to the output signal generated by the PPFD, the PPFD generates low noise, frequency divided signals with relatively low power consumption. | 2012-01-05 |
| 20120001667 | FREQUENCY CONVERTING CIRCUIT, SIGNAL PROCESSING CIRCUIT AND RECEIVER - A frequency converting apparatus according to one embodiment is a frequency converting circuit which generates a multiplied signal obtained by multiplying a local signal by an amplified signal generated by an amplifying portion comprising a first transistor having a drain terminal connected to a first power source potential, the frequency converting circuit comprising: a converter which comprises a second transistor of which gate terminal is connected to the amplifying portion and which converts the amplified signal inputted to the gate terminal into a current signal; a switching circuit which comprises two third-transistors of which a source terminal is connected each other and which multiplies the current signal by the local signal and generates the multiplied signal; and an impedance element which comprises a first terminal connected to a source terminal of the first transistor, a second terminal connected to a drain terminal of the second transistor and a third terminal connected to the source terminal of the third transistor, which inputs a first direct current inputted from the source terminal of the first transistor and a second direct current inputted from the source terminal of the third transistor into the drain terminal of the second transistor, of which impedance is an ACwise high impedance between the first terminal and the second terminal. | 2012-01-05 |
| 20120001668 | DIE AND A PACKAGE COMPRISING A PLURALITY OF DIES - A first die includes a controller configured to select at least one task to be performed by the first die and signal circuitry configured in response to the selection of the at least one task to provide a signal to be sent to a second die for initiating performance of at least one task on the second die which corresponds to (and is to be performed in a time coordinated manner with) the at least one task on the first die. The first die has task circuitry configured to perform the task in response to generation of the signal, and the second die has task circuitry configured to perform the corresponding task in response to receipt of the signal. | 2012-01-05 |
| 20120001669 | LOW-POWER DUAL-EDGE-TRIGGERED STORAGE CELL WITH SCAN TEST SUPPORT AND CLOCK GATING CIRCUIT THEREFOR - A storage cell having a pulse generator and a storage element is proposed. The storage element input is connected to receive a data input signal. The storage element output is connected to provide a data output signal. The storage element is operable in one of a data retention state and a data transfer state in response to a storage control signal received from the pulse generator. The pulse generator is connected to receive a clock signal with rising and falling clock signal edges and is adapted to provide control pulses in the storage control signal. Each control pulse has a leading edge and a trailing edge. The control pulses have a polarity suited to invoke the data transfer state on their leading edges. The novel feature is that the pulse generator is adapted to initiate a rising-edge control pulse when receiving a rising clock signal edge and to initiate a falling-edge control pulse when receiving a falling clock signal edge. In this way, a dual-edge-triggered flip-flop may be made using only combinatorial logic circuitry and one level- or single-edge-triggered storage element. The storage cell has low power consumption, facilitates scan testing and can be used by existing design tools and test equipment. | 2012-01-05 |
| 20120001670 | Clock Routing in Mulitiple Channel Modules and Bus Systems - The terminating module includes integrated circuits and a termination circuit which receive clock signals from the integrated circuit. The integrated circuit includes at least one memory integrated circuit mounted on a printed circuit board. An electrical connector is configured to couple the terminating module to a motherboard. Additionally, the termination circuit includes a resistor. In another embodiment, the terminating module provides a printed circuit board, a memory integrated circuit mounted on the circuit board, a terminator circuit which includes a resistor, and an electrical connector. The electrical connector couples the terminating module to a motherboard. | 2012-01-05 |
| 20120001671 | 5V TOLERANT CIRCUIT FOR CML TRANSCEIVER IN AC-COUPLE - A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads. Further provided is a bias isolating circuit so that an input bias voltage is isolated from a high voltage in the pads. | 2012-01-05 |
| 20120001672 | Apparatuses and methods for a voltage level shifting - Level shifting circuits and a related method are disclosed herein. An embodiment of the present invention includes a voltage level shifter, comprising a first pull up transistor coupled to a high voltage signal and a first pull down transistor coupled between the first pull up transistor and a low voltage signal and controlled by an input signal. The voltage level shifter further includes a first bias transistor serially coupled between the first pull up transistor and the first bias transistor. A gate of the first bias transistor is coupled with a bias voltage signal. The voltage level shifter further includes a first additional pull up path coupled with the high voltage signal and a first node between the first pull up transistor and the first pull down transistor, and an output signal associated with the first node. The output signal is a level shifted voltage responsive to the input signal. | 2012-01-05 |
| 20120001673 | LOW POWER FAST LEVEL SHIFTER - A lever shifter is provided for receiving a signal in a first voltage domain and providing an output signal in a second voltage domain. The level shifter reduces propagation delay and power consumption by mitigating contention between NFETs and PFETs during signal propagation. | 2012-01-05 |
| 20120001674 | WAFER SCALE SPATIAL POWER COMBINER - A plurality of power amplifiers are integrated into a semiconductor substrate and coupled to a corresponding first plurality of antennas on an adjacent first microwave substrate. A second microwave substrate carries a second plurality of antennas coupled to a combining network. The second microwave substrate is separated from the first microwave substrate to allow a free space combination of RF energy propagated by the first plurality of antennas. | 2012-01-05 |
| 20120001675 | TRANSCONDUCTANCE AMPLIFIER - The present invention is intended to achieve a transconductance amplifier and a voltage/current converting method which can provide a sufficient amplitude and a high degree of design freedom. The method comprises the steps of converting a first voltage signal to a first current signal; converting a second voltage signal to a second current signal; obtaining the common-mode components of the first and second current signals; and subtracting the common-mode components from the first and second current signals to obtain third and fourth signals, and further, subtracting the fourth current signal from the third current signal to generate a first output, while subtracting the third current signal from the fourth current signal to generate a second output. | 2012-01-05 |
| 20120001676 | HIGH FREQUENCY SWITCH CIRCUIT DEVICE - A switch circuit device includes a switch circuitry and a driver circuitry. The switch circuitry switches an electrical connection between first and second terminals between the on-state and the off-state in response to a set of control signals. The driver circuitry is configured to generate the control signals and includes an N-latch circuit and a leakage current suppression circuitry. The N-latch circuit selectively outputs lower one of two input voltages fed thereto as one of the control signals. The leakage current suppression circuitry suppresses the leakage current through the N-latch circuit. | 2012-01-05 |
| 20120001677 | INTELLIGENT DECORATIVE DISPLAYS WITH AMBIENT ELECTROMAGNETIC FIELD SWITCHING - A system and method of controlling self powered decorative devices using EMF emanating from, for example, a light string on a Christmas tree. The decorative devices sense the presence of EFM from the light string and actuate in response thereto and turn off when the field disappears, thereby saving energy. In an alternate embodiment, the EMF source is capable of modulation and the slave decorations are coded and tuned to specific EMF characteristics, such as frequency. The master EMF source transmits the EMF of different characteristic thereby causing the coded slave decorations to operate in a synchronized matter. The system may also be responsive to music or other inputs to create special decorative effects. | 2012-01-05 |
| 20120001678 | CAPACITIVE TOUCHING APPARATUS - The invention provides a capacitive touching apparatus, which includes at least an equivalent capacitor module, a first comparator, a first reference current generator, a first detection capacitor module and a selection switch module. The equivalent capacitor module receives a periodic driving signal and produces an output voltage according to the driving signal. The first comparator compares the output voltage with a first reference voltage and thereby produces a first comparison result. The first reference current generator produces a first reference current and a second reference current according to a base current, in which the first reference current generator decides whether to respectively output the first reference current and the second reference current according to the first comparison result, and the first reference current is output to the equivalent capacitor module. The first detection capacitor module produces a first detection output signal according to the second reference current. | 2012-01-05 |
| 20120001679 | HIGH-PRECISION RESISTOR AND TRIMMING METHOD THEREOF - An embodiment of an electrically trimmable electronic device, wherein a resistor of electrically modifiable material is formed by a first generally strip-shaped portion and by a second generally strip-shaped portion, which extend transversely with respect to one another and are in direct electrical contact in a crossing area. The first and second portions have respective ends connected to own contact regions, coupled to a current pulse source and are made of the same material or of the same composition of materials starting from a same resistive layer of the material having electrically modifiable resistivity, for example, a phase-change material, such as a Ge—Sb—Te alloy, or polycrystalline silicon, or a metal material used for thin-film resistors. The trimming is performed by supplying a trimming current to the second portion so as to heat the crossing area and modify the resistivity thereof, without flowing longitudinally in the first portion. | 2012-01-05 |
| 20120001680 | ISOLATION CIRCUIT - The present disclosure includes various method, device, and system embodiments for isolation circuits. One such isolation circuit embodiment includes: a first transistor configured for connection to a supply voltage via a first terminal; a register connected to the first transistor; a second transistor in parallel with a resistor, wherein the second transistor is configured for connection to the first terminal, with a gate of the second transistor configured for connection to an output of the register; and wherein the second transistor is configured for connection to a second terminal, the second transistor having a state that depends on a status of the register. | 2012-01-05 |
| 20120001681 | LIGHT EMITTING DEVICE WITH ENCAPSULATED REACH-THROUGH REGION - A light emitting device ( | 2012-01-05 |
| 20120001682 | APPARATUSES AND METHODS TO REDUCE POWER CONSUMPTION IN DIGITAL CIRCUITS - An apparatus and method for reducing power consumption in digital circuits, particularly circuits including a charge pump. A driver may selectively drive a signal line, such as a memory device wordline, between a first voltage, which may be a voltage generated by the charge pump, and a different second voltage. A coupling circuit may be coupled between the signal line and the charge pump to selectively couple the signal line to the charge pump responsive to the signal line being driven from the first voltage to the second voltage. For example, the first voltage may be a voltage generated by the charge pump, and the second voltage may be a voltage having a lesser magnitude. As a result, the voltage on the signal line may be discharged into the charge pump when the voltage of the signal line transitions from the first voltage to the second voltage. | 2012-01-05 |
| 20120001683 | VOLTAGE LEVEL SHIFT CIRCUITS AND METHODS - In one embodiment, the present invention includes a charge pump circuit. The charge pump circuit comprises a plurality of terminals, a plurality of switches for selectively coupling the plurality of terminals, and a control circuit. A first input terminal receives a first reference voltage and a second input terminal receives a second reference voltage. First, second, third, and fourth flying capacitor terminals and the first and second input terminals are selectively coupled together in different configurations. The control circuit selects the switches to actuate according to a cycling of at least three phases of configuration. The cycling shifts the first and second reference voltages to provide dual power supply rails. | 2012-01-05 |
| 20120001684 | Systems and Methods for Minimizing Static Leakage of an Integrated Circuit - A leakage manager system for adequately minimizing static leakage of an integrated circuit is disclosed. The leakage manager system includes a generator configured to generate a control signal to be applied to a sleep transistor. A monitor is configured to determine whether to adjust the control signal to adequately minimize the static leakage. In some embodiments, the monitor includes an emulated sleep transistor. A regulator is configured to adjust the control signal depending on the determination. | 2012-01-05 |
| 20120001685 | CAPACITIVE CHARGE PUMP - One or more charge pumps may be used to amplify the output voltage from a chemically-sensitive pixel that comprises one or more transistors. A charge pump may include a number of track stage switches, a number of boost phase switches and a number of capacitors. The capacitors are in parallel during the track phase and in series during the boost phase, and the total capacitance is divided during the boost phase while the total charge remains fixed. Consequently, the output voltage is pushed up. | 2012-01-05 |
| 20120001686 | HIGH FREQUENCY CIRCUIT - A high frequency circuit includes an amplifier part that includes a plurality of amplifier circuits amplifying a high frequency signal and connected in parallel, that synthesizes outputs of the amplifier circuit and that supplies the outputs to an antenna; a controller that outputs a low power signal during a low power mode in which the amplifier part operates at low power; and an operation suppressing circuit that disables one of the plurality of amplifier circuits based on the low power signal. | 2012-01-05 |
| 20120001687 | RECEIVING APPARATUS AND AUTO GAIN CONTROL METHOD - A receiving apparatus converges a gain to a target gain even when a fish bone effect signal is included having a low power period in which signal power decreases abruptly compared to average signal power. The receiving apparatus ( | 2012-01-05 |
| 20120001688 | TRANSMISSION POWER CONTROL METHOD AND TRANSMISSION POWER CONTROL APPARATUS - When switching the mode of a power amplifier between a compressed mode and an uncompressed mode, an accurate transmission power control is realized. A transmission power control method includes calculating an intra-mode output power error from a power setting value in a mode before switching as a comparison standard value error (equal to step ST | 2012-01-05 |
| 20120001689 | NANOELECTRONIC DIFFERENTIAL AMPLIFIERS AND RELATED CIRCUITS IMPLEMENTED ON A SEGMENT OF A GRAPHENE NANORIBBON - A multiple transistor differential amplifier is implemented on a segment of a single graphene nanoribbon. Differential amplifier field effect transistors are formed on the graphene nanoribbon from a first group of electrical conductors in contact with the graphene nanoribbon and a second group of electrical conductors insulated from, but exerting electric fields on, the graphene nanoribbon thereby forming the gates of the field effect transistors. A transistor in one portion of the graphene nanoribbon and a transistor in another portion of the graphene nanoribbon are responsive to respective incoming electrical signals. A current source, also formed on the graphene nanoribbon, is connected with the differential amplifier, and the current source and the differential amplifier operating together generate an outgoing signal responsive to the incoming electrical signal. In an example application, the resulting circuit can be used to interface with electrical signals of nanoscale sensors and actuators, | 2012-01-05 |
| 20120001690 | System for Driver Amplifier - In an embodiment, a circuit includes a two-stage amplifier and a feedback component. The two stage amplifier consists of an input stage biased at a first power supply voltage, and an output stage biased at a second power supply voltage. The second power supply voltage is greater than the first power supply voltage, and the second stage is configured for high voltage operation. The feedback component is connected between the output stage to the input stage. | 2012-01-05 |
| 20120001691 | VARIABLE GAIN AMPLIFIER WITH REDUCED POWER CONSUMPTION - A variable gain amplifier includes a first common mode (CM) node configured to receive a first differential signal of a pair of differential signals. A first regulator couples to the first CM node, the first regulator being configured to generate a first CM offset. A second CM node is configured to receive a second differential signal of the pair of differential signals. A second regulator couples to the second CM node, the second regulator being configured to generate a second CM offset. In one embodiment, the first CM offset and the second CM offset together comprise a net CM offset, the net CM offset being configured to replace a current source net offset. | 2012-01-05 |
| 20120001692 | ADAPTIVE POWER AMPLIFIER - Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided. | 2012-01-05 |
| 20120001693 | POWER AMPLIFIER AMPLITUDE MODULATOR SYSTEM AND METHOD - A system for controlling amplifier power is provided. The system includes a voltage envelope detector receiving a voltage signal and generating an attenuated voltage envelope signal. A current envelope detector receives a current signal and generates an attenuated current envelope signal. A controller receives power level data and generates attenuation control data for the voltage envelope signal and the current envelope signal. A detector receives the voltage envelope signal and the current envelope signal and generates a control signal based on the greater of the voltage envelope signal and the current envelope signal. A power amplifier level controller receives the control signal and generates a power amplifier level control signal. | 2012-01-05 |
| 20120001694 | ADAPTIVE CARTESIAN LOOP TRANSMITTER FOR BROADBAND AND OPTIMAL LOOP STABILITY ADJUSTMENT - An integrated circuit includes a linearizer circuit in which excessive delay is compensated. The linearizer circuit includes a power amplifier, forward and feedback paths, and a microprocessor. A signal from the power amplifier is routed by the forward path to be transmitted while a portion of the signal to be transmitted is routed back to the power amplifier via the feedback path. The microprocessor applies phase training signals to the forward path. The microprocessor uses the phase training signals to determine the amount of delay in the linearizer circuit and alters the frequency position of poles and zeros in the linearizer circuit to compensate for the delay. The gain of the linearizer circuit is also altered by the microprocessor depending on the measured delay. | 2012-01-05 |
| 20120001695 | RADIO FREQUENCY POWER AMPLIFIER - The radio frequency power amplifier is connected between an other end of the first switching element and an other end of the second switching element, supplies power to a second amplifier via the first switching element and a second matching circuit, and includes a first power supply line for supplying power to the third amplifier via a second switching element and a third matching circuit, and the other end of the first switching element is connected to an input node of the first matching circuit, the other end of the second switching element is connected to the input node of the first matching circuit via the first power supply line, and an impedance of an output side of the RF power amplifier as viewed from an output node of the third amplifier is higher than an impedance of the RF power amplifier as viewed from an output node of the second amplifier. | 2012-01-05 |
| 20120001696 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device constituting an inverting amplifier employs a cascode current source as a current source. In the semiconductor integrated circuit device, a high-potential-side transistor of the cascode current source and a low-potential-side transistor constituting an amplification portion are shared. The configuration can not only make an output impedance of the cascode current source high and improve current source characteristics but also make a minimum potential at a minimum potential point of the amplification portion low and ensure a sufficient power supply voltage margin. | 2012-01-05 |
| 20120001697 | DIFFERENTIAL AMPLIFIER STAGE WITH INTEGRATED OFFSET CANCELLATION CIRCUIT - A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit. | 2012-01-05 |
| 20120001698 | OSCILLATOR - An oscillator includes a resonator section structured such that a dielectric is interposed between first and second conductors and such that the first and second conductors are electrically connected to a resonant tunneling diode, a capacitor section structured such that the dielectric is interposed between the first and second conductors, a line section configured to electrically connect the resonator section and the capacitor section in parallel to each other, and a resistor section configured to electrically connect the first and second conductors to each other. A first position of the resonator section and a second position of the capacitor section are connected to each other by the line section so that the first position and the second position are substantially electrically equivalent to each other in a wavelength range larger than a wavelength of an electromagnetic wave that resonates in the resonator section. | 2012-01-05 |
| 20120001699 | SYSTEM AND METHOD FOR EXTENDING VCO OUTPUT VOLTAGE SWING - Voltage controlled oscillator (VCO) has been widely used in radio frequency communication systems. In a typical VCO implementation, a pair of directly cross-coupled MOS transistors is used as a switching device and an LC resonant circuit is used to tune the desired frequency. The direct cross coupling of the MOS transistor pair will result in limited output voltage swing since a large swing may cause the MOS transistors into a linear region to increase phase noise. The VCO system to increase the output voltage swing according to one embodiment of the present invention includes DC-blocking capacitors to avoid direct cross coupling of the MOS pair. The VCO further includes circuit to provide bias for the gate voltage of the MOS pair. A method for increasing the output voltage swing is disclosed for a VCO system having LC resonant circuit. The method includes providing DC-blocked cross coupling from the drains of the cross-coupled transistor pair to the gates of the cross-coupled transistor pair. The method also includes providing an offset voltage to the gates of the cross-coupled transistor pair to reduce the maximum gate-to-drain voltage of a cross-coupled NMOS transistor pair or maximum drain-to-gate voltage of a cross-coupled PMOS transistor pair so that the cross-coupled transistor pair will work in a saturation region when the output voltage swing is increased. | 2012-01-05 |
| 20120001700 | RESONATOR - A method of manufacturing a MEMS resonator formed from a first material having a first Young's modulus and a first temperature coefficient of the first Young's modulus, and a second material having a second Young's modulus and a second temperature coefficient of the second Young's modulus, a sign of the second temperature coefficient being opposite to a sign of the first temperature coefficient at least within operating conditions of the resonator. The method includes the steps of forming the resonator from the first material; applying the second material to the resonator; and controlling the quantity of the second material applied to the resonator by the geometry of the resonator. | 2012-01-05 |
