01st week of 2019 patent applcation highlights part 62 |
Patent application number | Title | Published |
20190006124 | Heat Dissipation From a Balancing Circuit For an Ultracapacitor Module - A module comprises at least two ultracapacitors and at least one balancing circuit. The balancing circuit is connected to a heat dissipation component. The heat dissipation component is present on a heat sink comprising a metal. | 2019-01-03 |
20190006125 | FIBROUS ELECTRODE WITH BUCKLE STRUCTURE, METHOD OF MANUFACTURING THE SAME, AND SUPERCAPACITOR INCLUDING THE SAME - A fibrous electrode includes a carbon nanotube sheet which is coated on an elastic fiber and has a buckle structure. Thus, the fibrous electrode may maintain a fiber shape, may be light and small and may maintain excellent conductivity even when variously deformed. In addition, the fibrous electrode has high elasticity and thus is capable of being variously deformed (e.g., bent or stretched) and of being realized in the form of textile. As a result, the fibrous electrode may be effectively applied to flexible electronic devices such as implantable medical devices, microelectronic devices, Google glasses, smart watches, wearable computers, and smart clothing. Furthermore, a supercapacitor using the fibrous electrode includes flexible materials and thus is not easily damaged by external force such as tension or pressure. As a result, the supercapacitor may be applied to various fields because of its excellent flexibility. | 2019-01-03 |
20190006126 | Interconnect Strip for an Ultracapacitor Module - A module comprises a first ultracapacitor having a first terminal, a second ultracapacitor having a second terminal, and an interconnect strip is provided. The interconnect strip contains a central section positioned between a first attachment section and a second attachment section. The first terminal of the first ultracapacitor is connected to the first attachment section of the strip and the second terminal of the second ultracapacitor is connected to the second attachment section of the strip. Further, the central section is formed from a flexible conductive material. | 2019-01-03 |
20190006127 | LIGHT-WEIGHT, LOW-RESISTIVITY TRANSFER MATERIALS AND METHODS OF MAKING AND PRODUCTS CONTAINING THE SAME - In some embodiments, a method is provided that includes (1) providing aluminum; (2) providing carbon nanotube material; (3) combining the aluminum and carbon nanotube material to form a current-carrying, aluminum-carbon-nanotube component of an electrical switch device; and (4) assembling the electrical switch device using the aluminum-carbon-nanotube component. The aluminum-carbon-nanotube component is formed so as to have at least one of lower electrical resistivity and greater thermal conductivity than a component formed of aluminum without carbon nanotube material. Numerous other embodiments are provided. | 2019-01-03 |
20190006128 | Disconnecting switch having anti-icing device - The present invention provides a disconnector with an anti-icing arrangement, including a main blade moving contact, a main blade arm, a main blade static contact, a main blade transmission arrangement and a main blade anti-icing arrangement. The main blade transmission arrangement is adapted for driving the main blade arm to move. The main blade anti-icing arrangement includes a main blade anti-icing shield and a main blade anti-icing shield transmission arrangement. The main blade anti-icing shield transmission arrangement is adapted for drive the main blade anti-icing shield such that the main blade anti-icing shield shields the main blade moving contact in an opened position to keep ice and snow and rainwater from covering a surface of the main blade moving contact, and moves away from the main blade moving contact in a closed position, to enable the main blade moving contact to be contacted with the main blade static contact. The disconnector of the present invention has simple structure, convenient installation and strong adaptability, which greatly improves stability and reliability of the disconnector in alpine regions. | 2019-01-03 |
20190006129 | CONTROL DEVICE BASE THAT ATTACHES TO THE PADDLE ACTUATOR OF A MECHANICAL SWITCH - A remote control device may control electrical loads and/or load control devices of a load control system without accessing electrical wiring. The remote control device may include a control unit and a base for the control unit. The base may include a frame and a mounting tab that attaches to the paddle actuator of a mechanical switch. The mounting tab may be monolithic with the frame. Alternatively, the base may include a resilient attachment member that extends from the frame and is captively retained by the mounting tab. The frame and the attachment member may be configured such that the attachment member is held in a fixed in position by the frame, or such that the attachment member is translatable relative to the frame. The base may include one or more alignment members. The base may cause a rear surface of the frame to be biased against the mechanical switch. | 2019-01-03 |
20190006130 | CONTROLLABLE LIGHT SOURCE - A controllable light source is provided that includes a load control circuit and an integrated lighting load. The controllable light source is configured to receive wirelessly communicated commands transmitted by a remote control device associated with the controllable light source, such as a rotary remote control device. The controllable light source may include an actuator for associating the controllable light source with the remote control device, such that the load control circuit is operable to adjust the intensity of the lighting load in response to wireless signals received from the remote control device. The controllable light source may support the actuator such that the actuator may be actuated when the controllable light source is installed in a fixture. | 2019-01-03 |
20190006131 | MULTI-POLE ELECTRICAL SWITCHING APPARATUS AND TRIP CAM ASSEMBLY THEREFOR - A trip cam assembly is for a multi-pole electrical switching apparatus. The trip cam assembly includes a first trip cam, a second trip cam, and an interconnect member coupled to the first trip cam and the second trip cam. | 2019-01-03 |
20190006132 | LIGHT SWITCH HOOK ASSEMBLY - A light switch hook assembly including a light switch plate and a hook extending outwardly therefrom. A fastener is inserted through an aperture defined in the hook and then into a hole defined in the light switch plate. The end of the fastener is subsequently inserted into an opening defined in a light switch mounted within an electrical connector box. The light switch plate may already be installed on a wall. In this instance, a fastener is removed from this pre-existing light switch plate, the hook is positioned against the plate, and the fastener is inserted through the aperture in the hook, through the hole from which the fastener was previously removed, and into the opening in the light switch. A cover may be engaged with the hook to cover the head of the fastener. An article may be hung on the hook. | 2019-01-03 |
20190006133 | SYSTEMS AND METHODS INCLUDING GATE LOCKOUT UNITS - A lockout unit coupled to a gate to provide selective access to an electrical machine is provided. The lockout unit includes a stationary bracket, an arm, and a removable bracket. The stationary bracket includes a first aperture defined therein, and the arm includes a second aperture defined therein. The arm is selectively movable between an open position in which the arm is spaced from the stationary bracket, and a closed position in which the second aperture is substantially concentrically-aligned with the first aperture to receive a locking device therethrough. The removable bracket is selectively coupleable to the arm when the arm is in the closed position. The removable bracket includes a third aperture defined therein that is selectively aligned with one of the first aperture and the second aperture to receive the locking device therethrough when the removable bracket is coupled to the arm. | 2019-01-03 |
20190006134 | RADIATION-HARDENED BREAK BEFORE MAKE CIRCUIT - A break-before-make (BB4M) circuit topology is disclosed for use with a multiplexer that eliminates shoot-through current between analog inputs and also between an analog input and analog output. The BB4M circuit generates a pulse that disables an existing selected channel before enabling a newly selected channel or gate driver, and is suitable for use in high-radiation or outer space operating environments. | 2019-01-03 |
20190006135 | GAS CIRCUIT BREAKER - A gas circuit breaker that includes: a first tank filled with an insulating gas; a fixed contact provided inside the first tank; a movable contact provided inside the first tank; a nozzle that ejects the insulating gas toward the fixed contact when the movable contact moves in a first direction; a cylindrical body that guides the gas ejected from the nozzle in a second direction; and a second tank connected to the first tank in the second direction. The movable contact is movable between a position in contact with the fixed contact and a position separated from the fixed contact. The first direction is a direction in which the movable contact moves from the position in contact with the fixed contact to the position separated from the fixed contact. The second direction is a direction opposite to the first direction. | 2019-01-03 |
20190006136 | Zero Power Plasmonic Microelectromechanical Device - A zero-power plasmonic microelectromechanical system (MEMS) device is capable of specifically sensing electromagnetic radiation and performing signal processing operations. Such devices are highly sensitive relays that consume no more than 10 nW of power, utilizing the energy in detected electromagnetic radiation to detect and discriminate a target without the need of any additional power source. The devices can continuously monitor an environment and wake up an electronic circuit upon detection of a specific trigger signature of electromagnetic radiation, such as vehicular exhaust, gunfire, an explosion, a fire, a human or animal, and a variety of sources of radiation from the ultraviolet to visible light, to infrared, to terahertz radiation. | 2019-01-03 |
20190006137 | ACTUATOR - An actuator driven by combustion of powder satisfactorily transmits energy for driving an output part to the output part. An output piston part has a specific end face that receives driving energy. A sealing member confines the combustion products in a first space separated by the sealing member. The sealing member has a fixed end portion and a contact portion that is in contact with the specific end face. In a state before the combustion of powder in an igniter, the contact portion is located at an initial position. With the combustion of powder in the igniter, the contact portion shifts to an operative position with the sliding motion of the output piston part while being in contact with the specific end portion. | 2019-01-03 |
20190006138 | RELAY DEVICE - A miniature and inexpensive relay device is provided. A relay device, i.e., a relay unit, includes a breakdown detection unit that does not detect breakdown of an operation of a first switching element and detect breakdown of an operation of a second switching element. When a switching control unit switches an external load circuit from non-conductivity to conductivity, the switching control unit switches the second switching element from non-conductivity to conductivity after switching the first switching element from non-conductivity to conductivity. When the switching control unit switches the load circuit from conductivity to non-conductivity, the switching control unit switches the first switching element from conductivity to non-conductivity after switching the second switching element from conductivity to non-conductivity. | 2019-01-03 |
20190006139 | ELECTROMAGNETIC RELAY - An electromagnetic relay includes a movable terminal including a movable contact, a fixed terminal including a fixed contact that faces the movable contact, first irons disposed on one of the fixed terminal and the movable terminal, and a second iron disposed on another one of the fixed terminal and the movable terminal such that the second iron at least partially overlaps both of the first irons. | 2019-01-03 |
20190006140 | HIGH-VOLTAGE DIRECT-CURRENT RELAY AND ASSEMBLY METHOD THEREFOR - A high-voltage direct-current relay includes two stationary contacts and a movable assembly, the movable assembly including a movable spring part, a main spring and a pushing rod assembly. The pushing rod assembly is composed of a pushing rod part and a U-shaped basket as two separate parts, the pushing rod part includes a fixing piece and a pushing rod fixed together with insulating plastic. The movable spring part and the U-shaped basket are mounted on the top of the pushing rod part, the two ends of the fixing piece are secured to the bottom of the side part of the U-shaped basket. The main spring is tightened between the bottom surface of the movable spring part and the insulating plastic of the pushing rod part, and the movable spring of the movable spring part is pressed to the inner side of the top part of the U-shaped basket. | 2019-01-03 |
20190006141 | FLEXIBLE PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING FLEXIBLE PRINTED CIRCUIT BOARD - A flexible printed circuit board according to an aspect of the present invention includes a base film having insulating properties and a conductive pattern laminated to one surface side of the base film. The conductive pattern forms part of a circuit and includes at least one fuse portion having a cross section smaller than the other part. The conductive pattern has a pair of measurement pad portions configured to enable measurement of a potential difference between two points in the vicinity of both ends of the fuse portion. | 2019-01-03 |
20190006142 | ANTENNA ARRANGEMENT - An antenna arrangement on a printed circuit board with at least two magnetic rings and a rectangular ring cross section and lateral magnetic ring surfaces with opposite polarity formed thereby wherein the magnetic ring surfaces are arranged on the printed circuit board with a distance from one another using a spacer, wherein the opposite polarities of the magnetic ring surfaces are oriented towards each other and the central bore holes of the magnetic ring form a pass through bore hole through a bore hole in the spacer. This antenna arrangement is configured for a material detector device which detecting predetermined materials over a distance. The antenna arrangement is infinitely expandable in its operation by increasing the number of the magnetic rings and of the respective spacers. Being compact the antenna arrangement easily integrates into existing devices and can be produced in a cost effective manner. | 2019-01-03 |
20190006143 | Method and System for Edge-of-Wafer Inspection and Review - An electron-optical system for inspecting or reviewing an edge portion of a sample includes an electron beam source configured to generate one or more electron beams, a sample stage configured to secure the sample and an electron-optical column including a set of electron-optical elements configured to direct at least a portion of the one or more electron beams onto an edge portion of the sample. The system also includes a sample position reference device disposed about the sample and a guard ring device disposed between the edge of the sample and the sample position reference device to compensate for one or more fringe fields. One or more characteristics of the guard ring device are adjustable. The system also includes a detector assembly configured to detect electrons emanating from the surface of the sample. | 2019-01-03 |
20190006144 | LINEAR STRUCTURE FOR DISPLACEMENT TRANSMISSION, AND ONE-DIMENSIONAL AND THREE-DIMENSIONAL MICRO MOVEMENT DEVICE USING SAME - Provided is a linear structure for displacement transmission having a structure that enables a desired movement to be performed smoothly while minimizing complexity of a system through a simple structure in performing a precise and fine movement, and a one-dimensional and three-dimensional micro movement device using the same. | 2019-01-03 |
20190006145 | METHOD OF VERIFYING OPERATION PARAMETER OF SCANNING ELECTRON MICROSCOPE - A method capable of verifying whether operation parameters, such as a focus parameter and an astigmatism correction parameter, of a scanning electron microscope are correctly adjusted. This method includes: determining a ratio of a length of an edge in a first direction to a length of the edge in a second direction perpendicular to the first direction, the edge being an edge of a pattern selected from design data; generating images of the pattern while changing an operation parameter of a scanning electron microscope; calculating an edge sharpness in the first direction of each of the images and calculating an edge sharpness in the second direction of each of the images; determining a ratio of a peak value of the edge sharpness in the first direction to a peak value of the edge sharpness in the second direction; and emitting an alarm if the ratio of the peak values does not coincide with the ratio of the lengths of the edge. | 2019-01-03 |
20190006146 | ELECTRON PROBE MICROANALYZER AND STORAGE MEDIUM | 2019-01-03 |
20190006147 | METHOD AND APPARATUS FOR INSPECTION - An electron beam inspection apparatus, the apparatus including a plurality of electron beam columns, each electron beam column configured to provide an electron beam and detect scattered or secondary electrons from an object, and an actuator system configured to move one or more of the electron beam columns relative to another one or more of the electron beam columns. The actuator system may include a plurality of first movable structures at least partly overlapping a plurality of second movable structures, the first and second movable structures supporting the plurality of electron beam columns. | 2019-01-03 |
20190006148 | ELECTRON BEAM SURFACE MODIFICATION APPARATUS - It is difficult to perform surface modification by irradiating a side surface of a hole formed on an irradiated object with a low-energy-density electron beam. An irradiated object having an irradiation hole formed thereon is disposed in a vacuum chamber. A cathode electrode is arranged to face a side surface of the irradiation hole. The cathode electrode has a large number of metal projections over an entire surface of a base body, the base body facing at least the side surface of the irradiation hole. A conductive mesh is arranged between the cathode electrode and the side surface of the irradiation hole. The conductive mesh partially contacts the irradiated object and is set to have the same potential as the irradiated object. | 2019-01-03 |
20190006149 | APPARATUS AND TECHNIQUES TO TREAT SUBSTRATES USING DIRECTIONAL PLASMA AND POINT OF USE CHEMISTRY - In one embodiment, an apparatus to treat a substrate may include an extraction plate to extract a plasma beam from a plasma chamber and direct the plasma beam to the substrate. The plasma beam may comprise ions forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate; and a gas outlet system disposed outside the plasma chamber, the gas outlet system coupled to a gas source and arranged to deliver to the substrate a reactive gas received from the gas source, wherein the reactive gas does not pass through the plasma chamber. | 2019-01-03 |
20190006150 | SEMICONDUCTOR MANUFACTURING DEVICE AND METHOD OF OPERATING THE SAME - A semiconductor manufacturing device includes a plasma chamber, a source power supply, and first and second bias power supplies. The source power supply applies a first source voltage to the plasma chamber at a first time and a second source voltage to the plasma chamber at a second time. The first bias power supply applies a first turn-on voltage to the plasma chamber at the first time and a first turn-off voltage to the plasma chamber at the second time. The second bias power supply applies a second turn-off voltage to the plasma chamber at the first time and a second turn-on voltage to the plasma chamber at the second time. The plasma chamber forms plasmas of different conditions from a gas mixture in the plasma chamber based on the source, turn-on, and turn-off voltages. | 2019-01-03 |
20190006151 | APPARATUS AND METHOD FOR PLASMA SYNTHESIS OF CARBON NANOTUBES - Apparatus and method for plasma synthesis of carbon nanotubes couple a plasma nozzle to a reaction tube/chamber. A process gas comprising a carbon-containing species is supplied to the plasma nozzle. Radio frequency radiation is supplied to the process gas within the plasma nozzle, so as to sustain a plasma within the nozzle in use, and thereby cause cracking of the carbon-containing species. The plasma nozzle is arranged such that an afterglow of the plasma extends into the reaction tube/chamber. The cracked carbon-containing species also pass into the reaction tube/chamber. The cracked carbon-containing species recombine within the afterglow, so as to form carbon nanotubes in the presence of a catalyst. | 2019-01-03 |
20190006152 | PLASMA GENERATING UNIT AND PLASMA PROCESSING APPARATUS - A plasma generating unit capable of improving in-surface uniformity of plasma and a plasma processing apparatus using the same are provided. The plasma generating unit provided in the plasma processing apparatus includes a dielectric window | 2019-01-03 |
20190006153 | THE PLASMA PROCESSING APPARATUS AND PLASMA PROCESSING METHOD - In order to provide a plasma processing apparatus or method with improved processing uniformity, a plasma processing apparatus includes: a processing chamber which is disposed inside a vacuum container; a sample stage which is disposed inside the processing chamber and has a top surface for placing a wafer corresponding to a processing target thereon; an electric field forming part which forms an electric field supplied into the processing chamber; a coil which forms a magnetic field for forming plasma inside the processing chamber by an interaction with the electric field; and a controller which increases or decreases intensity of the plasma inside the processing chamber by repeatedly increasing or decreasing intensity of the magnetic field formed by the coil at a predetermined interval, wherein the wafer is processed while the plasma is repeatedly formed and diffused. | 2019-01-03 |
20190006154 | Toroidal Plasma Chamber - An apparatus and methods for forming a toroidal plasma chamber includes metallic material, material forming process, heat treatment, anodization and a feature to form an ideal gas flow pattern in the plasma chamber. The gas passing through the plasma chamber that functions as a secondary wiring in a transformer will be dissociated when coupled with the current induced through a magnetic core by a primary wiring that is a semiconductor switching power source. | 2019-01-03 |
20190006155 | PLASMA REACTOR HAVING A FUNCTION OF TUNING LOW FREQUENCY RF POWER DISTRIBUTION - The present disclosure provides a plasma reactor having a function of tuning low frequency RF power distribution, comprising: a reaction chamber in which an electrically conductive base is provided, the electrically conductive base being connected to a low frequency RF source via a first match, an electrostatic chuck being provided on the electrically conductive base, an upper surface of the electrostatic chuck being configured for fixing a to-be-processed substrate, an outer sidewall of the electrically conductive base being coated with at least one layer of plasma corrosion-resistance dielectric layer, a coupling ring made of a dielectric material surrounding an outer perimeter of the base, a focus ring being disposed above the coupling ring, the focus ring being arranged surround the electrostatic chuck and be exposed to a plasma during a plasma processing procedure; the plasma reactor further comprising an annular electrode that is disposed above the coupling ring but below the focus ring; a wire, a first end of which is electrically connected to the base, and a second end of which is connected to the annular electrode, a variable capacitance being serially connected to the wire. | 2019-01-03 |
20190006156 | Plasma Processing Apparatus - A plasma processing apparatus includes an electrostatic chuck configured to adsorb and hold a wafer, a focus ring disposed to surround an upper edge of the electrostatic chuck, an insulating tube disposed to cover a side surface of the electrostatic chuck, and a conductive tube disposed to cover the insulating tube. | 2019-01-03 |
20190006157 | Test Wafer With Optical Fiber With Bragg Grating Sensors - An apparatuses relating generally to a test wafer, processing chambers, and method relating generally to monitoring or calibrating a processing chamber, are described. In one such an apparatus for a test wafer, there is a platform. An optical fiber with Fiber Bragg Grating sensors is located over the platform. A layer of material is located over the platform and over the optical fiber. | 2019-01-03 |
20190006158 | A Photomultiplier Tube and Method of Making It - A photomultiplier tube (PMT) suitable for detecting a photon, comprising: an electron ejector configured for emitting primary electrons in response to an incident photon; a detector configured for collecting electrons and providing an output signal representative of the incident photon; and a series of vertical electrodes between the electron ejector and the detector, wherein each of the vertical electrodes is configured for emitting secondary electrons in response to incident electrons, and each of the vertical electrodes is parallel to a straight line connecting the electron ejector and the detector. | 2019-01-03 |
20190006159 | A Photomultiplier and Methods of Making It - Disclosed herein is a photomultiplier comprising: an electron ejector; a detector; a substrate; and a first electrode in the substrate; a second electrode in the substrate; a third electrode in the substrate; wherein each of the first, second and third electrodes comprises a flat or curved surface at an angle to a normal direction of the substrate; wherein each of the first, second and third electrodes comprises a first end and a second end, the first end being closer to the electron ejector than the second end; wherein the first, second and third electrodes are spatially arranged such that the second ends of the first, second and third electrode are on a same plane, or such that a plane the second ends of the first and third electrodes are on crosses the second electrode. | 2019-01-03 |
20190006160 | INTELLIGENTLY CONTROLLED SPECTROMETER METHODS AND APPARATUS - The present invention relates to improving the ability of a hyphenated instrument to analyze a sample benefiting from having the first instrument's analysis of the same sample. A fast switching mechanism can be used as the interface between an ion mobility spectrometer (IMS) and a mass spectrometer (MS) such that the obtained IMS spectrum is converted into a timing diagram that controls the vacuum inlet's size dynamically during analysis of a neutral and/or charged chemical and/or biological species such that a smaller pumping system can be used. | 2019-01-03 |
20190006161 | METHODS FOR MICROBIAL IDENTIFICATION BY MASS SPECTROMETRY - Methods and systems for identification of microorganisms either after isolation from a culture or directly from a sample. The methods and systems are configured to identify microorganisms based on the characterization of proteins of the microorganisms via high-resolution/mass accuracy single-stage (MS) or multi-stage (MS | 2019-01-03 |
20190006162 | MASS SPECTROMETER - A mass spectrometer | 2019-01-03 |
20190006163 | IONIZATION MASS SPECTROMETRY METHOD AND MASS SPECTROMETRY DEVICE USING SAME - A mass spectrometry device includes a sample seating part including an ultrasonic vibrator having a through hole through which liquid particles formed by the ultrasonic vibrator from an adsorbent material including a sample and a solvent are discharged, the adsorbent material being seated on the ultrasonic vibrator; a reaction part in which plasma or an ionization medium generated by plasma come into contact with the liquid particles discharged from the through hole to form an ionized material; an introduction part discharging and introducing the ionized material to a detection part; and the detection part analyzing the ionized material discharged from the introduction part. The mass spectrometry device and the mass spectrometry method can detect the components of various samples by converting a sample into liquid particles using ultrasonic waves and applying plasma and can detect samples in various fields without regard to locations. | 2019-01-03 |
20190006164 | Mass Spectrometer - Acceleration of decelerated ions and a reduction in the velocity dispersion width of decelerated ions are both achieved, whereby the sensitivity of detected ion sensitivity is improved and resolution is improved. The distance dx between at least one set of facing rod-shaped electrodes among rod-shaped electrodes ( | 2019-01-03 |
20190006165 | System for Minimizing Electrical Discharge During ESI Operation - Methods and systems are provided for reducing the occurrence of unwanted electrical discharge when operating an electrospray ion source to generate ions for mass spectrometric analysis. In accordance with various aspects of the applicant's teachings, the methods and systems described herein can provide for controlling the ion emission current so as to limit the onset of avalanche of electrical discharge between the electrospray electrode and the counter electrode under ionization conditions that typically tend to increase the likelihood of such discharge (arcing), while nonetheless providing for maximal ionization efficiency. In various aspects, emission currents between the electrospray electrode and the counter electrode through which the ions are transmitted to a downstream mass analyzer can be maintained at elevated levels, below 10 μA, for example, without the electric potential between the electrospray electrode and the counter electrode initiating the electrical discharge avalanche that results from the dielectric break-down of the air gap therebetween, which can cause sputtering and effect the long-term operation of the ESI source. | 2019-01-03 |
20190006166 | APPARATUS AND METHOD FOR GENERATING CHEMICAL SIGNATURES USING DIFFERENTIAL DESORPTION - The present invention is directed to a method and device to generate a chemical signature for a mixture of analytes. The present invention involves using a SPME surface to one or both absorb and adsorb the mixture of analytes. In an embodiment of the invention, the surface is then exposed to different temperature ionizing species chosen with appropriate spatial resolution to desorb a chemical signature for the mixture of analytes. | 2019-01-03 |
20190006167 | SAMPLE ANALYSIS SYSTEMS AND METHODS OF USE THEREOF - The invention generally relates to sample analysis systems and methods of use thereof. In certain aspects, the invention provides a system for analyzing a sample that includes an ion generator configured to generate ions from a sample. The system additionally includes an ion separator configured to separate at or above atmospheric pressure the ions received from the ion generator without use of laminar flowing gas, and a detector that receives and detects the separated ions. | 2019-01-03 |
20190006168 | TIME-OF-FLIGHT MASS SPECTROMETER - An acceleration voltage generator ( | 2019-01-03 |
20190006169 | SEMICONDUCTOR WAFER AND METHOD OF WAFER THINNING - A semiconductor wafer has a base material. The semiconductor wafer may have an edge support ring. A grinding phase of a surface of the semiconductor wafer removes a portion of the base material. The grinder is removed from or lifted off the surface of the semiconductor wafer during a separation phase. The surface of the semiconductor wafer and under the grinder is rinsed during the grinding phase and separation phase to remove particles. A rinsing solution is dispensed from a rinsing solution source to rinse the surface of the semiconductor wafer. The rinsing solution source can move in position while dispensing the rinsing solution to rinse the surface of the semiconductor wafer. The grinding phase and separation phase are repeated during the entire grinding operation, when grinding conductive TSVs, or during the final grinding stages, until the final thickness of the semiconductor wafer is achieved. | 2019-01-03 |
20190006170 | High Mobility Silicon on Flexible Substrates - A semiconductor device and method for fabricating same is disclosed. Embodiments are directed to a semiconductor device and fabrication of same which include a flexible substrate and a buffer stack overlying the substrate. The buffer stack comprises at least one epitaxial buffer layer. An epitaxial doped layer comprised predominantly of silicon overlies the at least one epitaxial buffer layer. Mobility of the device is greater than 100 cm | 2019-01-03 |
20190006171 | METHODS AND DEVICES INTEGRATING III-N TRANSISTOR CIRCUITRY WITH SI TRANSISTOR CIRCUITRY - Methods and devices integrating circuitry including both III-N (e.g., GaN) transistors and Si-based (e.g., Si or SiGe) transistors. In some monolithic wafer-level integration embodiments, a silicon-on-insulator (SOI) substrate is employed as an epitaxial platform providing a first silicon surface advantageous for seeding an epitaxial III-N semiconductor stack upon which III-N transistors (e.g., III-N HFETs) are formed, and a second silicon surface advantageous for seeding an epitaxial raised silicon upon which Si-based transistors (e.g., Si FETs) are formed. In some heterogeneous wafer-level integration embodiments, an SOI substrate is employed for a layer transfer of silicon suitable for fabricating the Si-based transistors onto another substrate upon which III-N transistors have been formed. In some such embodiments, the silicon layer transfer is stacked upon a planar interlayer dielectric (ILD) disposed over one or more metallization level interconnecting a plurality of III-N HFETs into HFET circuitry. | 2019-01-03 |
20190006172 | METHOD FOR PROCESSING SEMICONDUCTOR DEVICE - A method for processing a semiconductor device is provided. The semiconductor device includes a protruding structure on a substrate, the protruding structure having a nitride spacer at a sidewall, and an epitaxial layer is formed in the substrate adjacent to the protruding structure. The method includes removing the nitride spacer on the protruding structure. Then, a dilute hydrofluoric (DHF) cleaning process is performed over the substrate, wherein a top surficial portion of the epitaxial layer is removed. A standard clean (SC) process is performed over the substrate, wherein a native oxide layer is formed on an expose surface of the epitaxial layer. | 2019-01-03 |
20190006173 | Epitaxies of a Chemical Compound Semiconductor - Methods and structures includes providing a substrate, forming a prelayer over a substrate, forming a barrier layer over the prelayer, and forming a channel layer over the barrier layer. Forming the prelayer may include growing the prelayer at a graded temperature. Forming the barrier layer is such that the barrier layer may include GaAs or InGaAs. Forming the channel layer is such that the channel layer may include InAs or an Sb-based heterostructure. Thereby structures are formed. | 2019-01-03 |
20190006174 | METHOD FOR PATTERNING SEMICONDUCTOR DEVICE USING MASKING LAYER - A semiconductor device and method includes a method. The method includes patterning a plurality of first mandrels over a first mask layer. The method further includes forming a first spacer layer on sidewalls and tops of the first mandrels. The method further includes removing horizontal portions of the first spacer layer, with remaining vertical portions of the first spacer layer forming first spacers. The method further includes, after removing the horizontal portions of the first spacer layer, depositing a reverse material between the first spacers. The method further includes patterning the first mask layer using the first spacers and the reverse material in combination as a first etching mask. | 2019-01-03 |
20190006175 | SILICON GERMANIUM SELECTIVE OXIDATION PROCESS - Implementations described herein relate to selective oxidation processes for semiconductor device manufacturing. In one implementation, the process includes delivering a substrate having a semiconductor device comprising at least a silicon material and a silicon germanium material formed thereon to a process chamber. Process variables are determined based upon the germanium concentration of the silicon germanium material and a desired oxide thickness and a selective oxidation process is performed utilizing the determined process variables. | 2019-01-03 |
20190006176 | PROCESS OF FORMING SEMICONDUCTOR EPITAXIAL SUBSTRATE - A process of growing a barrier layer made of AlGaN on a GaN channel layer is disclosed. The process includes steps of, growing the GaN channel layer, growing the AlGaN barrier layer, and growing a cap layer made of GaN. The growth temperature of the AlGaN barrier layer monotonically lowers from the initial temperature, which may be equal to the growth temperature for the GaN channel layer, to the finish temperature that is lower than the initial temperature and may be substantially equal to the growth temperature of the GaN cap layer. | 2019-01-03 |
20190006177 | ENCAPSULATED SUBSTRATE, MANUFACTURING METHOD, HIGH BAND-GAP DEVICE HAVING ENCAPSULATED SUBSTRATE - An encapsulated substrate includes a zinc oxide substrate and a composite barrier layer. The composite barrier layer includes a first film layer having a first material different from zinc oxide, a second film layer covered on a surface of the first film layer and having a second material different from the zinc oxide and the first material, and an active layer formed on the composite barrier layer and corresponding to an acting surface of a zinc oxide substrate and having an acting material different from the zinc oxide. | 2019-01-03 |
20190006178 | SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME - A semiconductor device including a substrate, a semiconductor layer, and a buffer structure is provided. The semiconductor layer is located on the substrate. The buffer structure is located between the substrate and the semiconductor layer. The buffer structure includes a plurality of first layers and a plurality of second layers. The first layers and the second layers are alternately stacked with a same pitch or different pitches. | 2019-01-03 |
20190006179 | Method for Manufacturing Semiconductor Device - The present application relates to the field of semiconductor technologies, and discloses methods for manufacturing a semiconductor device. The manufacturing method includes: forming an etchable material layer on a substrate; forming multiple openings on the etchable material layer by means of patterning processing to determine a position of a core; etching the substrate at bottoms of the multiple openings, so that the bottoms of the multiple openings extend into the substrate; depositing a material of the core to fill the multiple openings; etching the material of the core so as to expose the etchable material layer; removing the etchable material layer to leave multiple cores; depositing spacers; over etching the spacers so as to expose the multiple cores, and etching a part of the substrate, where an etching depth of the substrate is the same as a depth to which the openings extend into the substrate; and removing the multiple cores. The methods address the problem of a distance offset of gaps between spacers. | 2019-01-03 |
20190006180 | MICROASSEMBLY OF HETEROGENEOUS MATERIALS - A method for microassembly of heterogeneous materials comprises contacting a stamp with an ink disposed on a donor substrate to form an inked stamp, where the ink is reversibly bound to the stamp. The inked stamp is stamped onto a receiving substrate or onto an object on the receiving substrate, and the stamp is removed, thereby transferring the ink to the receiving substrate. The ink and the receiving substrate or the ink and the object are thermally joined, thereby forming a microassembly of heterogeneous materials. The ink may comprise a first material and the receiving substrate or the object may comprise a second material different from the first material. | 2019-01-03 |
20190006181 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a semiconductor layer of silicon carbide including a plurality of layers disposed on a main surface side; an electrode layer that is one of the plurality of layers, wherein the electrode layer has an electrode connecting surface to which a conductive connecting member is connected, and the electrode layer is composed mainly of silver; and a first metal layer that is a layer, different from the electrode layer, among the plurality of layers, wherein the first metal layer has a first bonding surface bonded onto the electrode layer such that the electrode connecting surface is exposed to an outside, and a second bonding surface electrically connected to the semiconductor layer, and the first metal layer is composed mainly of titanium carbide. | 2019-01-03 |
20190006182 | PROCEDE DE REALISATION DE CONTACT INTERMETALLIQUE A BASE DE NI SUR INXGA1-XAS - A process for manufacturing an intermetallic contact on the surface of a layer or of a substrate of oriented In | 2019-01-03 |
20190006183 | Metal Gate Stack Having TaAlCN Layer - Gate stacks for improving integrated circuit device performance and methods for fabricating such gate stacks are disclosed herein. An exemplary method includes forming a gate stack over a substrate and at least partially removing the gate stack, thereby forming an opening. A multi-function layer is deposited in the opening and a work function layer is deposited over the multi-function layer. The multi-function layer includes nitrogen and one of titanium or tantalum. The work function layer includes nitrogen and one of titanium or tantalum. A concentration of the nitrogen of the work function layer is different than a concentration of the nitrogen of the multi-function layer. In some implementations, the concentration of the nitrogen of the work function layer from about 2% to about 5% and the concentration of the nitrogen of the multi-function layer from about 5% to about 15%. | 2019-01-03 |
20190006184 | GALLIUM NITRIDE BASED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF GALLIUM NITRIDE BASED SEMICONDUCTOR DEVICE - A gallium nitride based semiconductor device is provided, where when a thickness of a transition layer is defined as the followings, the thickness of the transition layer is less than 1.5 nm: (i) a distance between a depth position at which an atomic composition of nitrogen element constituting the gallium nitride based semiconductor layer is ½ relative to that at a position on the GaN based semiconductor layer side sufficiently away from the transition layer, and a depth position at which an atomic composition of a metal element is ½ of a value of a maximum if an atomic composition of the metal element constituting an insulating layer has the maximum, or a depth position at which an atomic composition of the metal element is ½ relative to that at a position on the insulating layer side sufficiently away from the transition layer if not having the maximum. | 2019-01-03 |
20190006185 | WAFER PROCESSING METHOD - A wafer processing method for processing a wafer having devices on the front side is provided. The wafer processing method includes a back grinding step of grinding the wafer to form a recess and an annular reinforcing portion surrounding the recess on the back side of the wafer, and a dividing step of cutting the wafer along division lines formed on the front side of the wafer. In the back grinding step, a taper surface is formed between the bottom surface of the recess and the annular reinforcing portion. The taper surface is inclined with respect to a direction perpendicular to the bottom surface of the recess. In the dividing step, a cutting blade is lowered to start cutting at a position radially inside the outer circumference of the wafer and is subsequently raised to stop cutting at another position radially inside the outer circumference of the wafer. | 2019-01-03 |
20190006186 | PLASMA ETCHING METHOD AND PLASMA ETCHING APPARATUS - A shape of a hole can be improved. The plasma etching method includes a recess forming of forming a recess having a depth smaller than a thickness of a silicon oxide film by etching the silicon oxide film by plasma; a removing process of removing a reaction product adhering to the recess by plasma generated from a fluorocarbon gas; and a penetrating process of forming a hole penetrating the silicon oxide film by etching the recess, from which the reaction product is removed, by plasma. | 2019-01-03 |
20190006187 | Multi-Chip Structure and Method of Forming Same - A device includes a first chip is embedded in a molding compound layer, wherein the first chip is shifted toward a first direction, a second chip over the first chip and embedded in the molding compound layer, wherein the second chip is shifted toward a second direction opposite to the first direction and a plurality of bumps between the first chip and the second chip. | 2019-01-03 |
20190006188 | PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS - A plasma processing method includes a substrate processing step of performing predetermined processing on a target substrate loaded into a chamber by using plasma of a hydrogen-containing gas and unloading the processed substrate from the chamber; and an in-chamber processing step of processing surfaces of components in the chamber by plasma of an oxygen-containing gas after the substrate processing step is performed at least once. The substrate processing step is performed again at least once after the in-chamber processing step. | 2019-01-03 |
20190006189 | Laser Annealing Systems and Methods With Ultra-Short Dwell Times - Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing. | 2019-01-03 |
20190006190 | FZ SILICON AND METHOD TO PREPARE FZ SILICON - FZ silicon which shows no degradation of its minority carrier lifetime after any processing steps at a processing temperature of less than 900° C. is prepared by annealing FZ silicon at an annealing temperature of greater than or equal to 900° C. and processing the annealed FZ silicon at a processing temperature of less than 900° C. | 2019-01-03 |
20190006191 | SEMICONDUCTOR PRODUCT AND CORRESPONDING METHOD - A semiconductor product such as an integrated circuit includes a laminar plastic substrate having first and second opposed surfaces and through holes extending through the substrate, electrically and/or thermally conductive material balls inserted in the through holes at the first surface of the substrate, and one or more semiconductor chips mounted at the first surface of the substrate, the semiconductor chip(s) electrically and/or thermally coupled with electrically and/or thermally conductive material balls inserted in the through holes. | 2019-01-03 |
20190006192 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE - A 3D semiconductor device, the device including: a first single crystal layer including a plurality of first transistors and a first metal layer, where the first metal layer includes interconnecting the first transistors forming, at least in part a plurality of logic gates; a plurality of second transistors overlaying, at least in part the first single crystal layer; a plurality of third transistors overlaying, at least in part the second transistors; a plurality of fourth transistors overlaying, at least in part the third transistors; a second metal layer overlaying, at least in part the fourth transistors; where the fourth transistors are aligned with less than 100 nm misalignment to the first transistors, where at least one of the plurality of vias has a radius of less than 200 nm, where a memory cell includes at least one of the third transistors. | 2019-01-03 |
20190006193 | Apparatus and Method for Processing a Semiconductor Substrate - A method includes placing a semiconductor substrate on a first curved surface of a first bending tool, using a second bending tool with a second surface to apply pressure to the semiconductor substrate, thereby pressing the semiconductor substrate onto the first curved surface and bending the semiconductor substrate, and removing the bended semiconductor substrate from the first bending tool. | 2019-01-03 |
20190006194 | Integrated Circuit Packages and Methods of Forming Same - An integrated circuit package and a method of forming the same are provided. A method includes forming a conductive column over a carrier. An integrated circuit die is attached to the carrier, the integrated circuit die being disposed adjacent the conductive column. An encapsulant is formed around the conductive column and the integrated circuit die. The carrier is removed to expose a first surface of the conductive column and a second surface of the encapsulant. A polymer material is formed over the first surface and the second surface. The polymer material is cured to form an annular-shaped structure. An inner edge of the annular-shaped structure overlaps the first surface in a plan view. An outer edge of the annular-shaped structure overlaps the second surface in the plan view. | 2019-01-03 |
20190006195 | CHIP ENCAPSULATING METHOD AND CHIP ENCAPSULATING STRUCTURE - A chip encapsulating method includes: fixing a plurality of wafers to a first panel level substrate, the wafer including a plurality of chips; forming a re-distribution layer on the wafer for each of the chips; forming each individual chip and the re-distribution layer connected to the chip by cutting; fixing the chip and the re-distribution layer connected thereto to a second panel level substrate; and encapsulating the chip to form an encapsulating layer. A chip encapsulating structure is prepared by the above described chip encapsulating method. | 2019-01-03 |
20190006196 | METHOD FOR PACKAGING CHIP AND CHIP PACKAGE STRUCTURE - A method for packaging a chip, including: forming a release layer on a first panel-level substrate, and forming redistribution layers respectively on predetermined regions on the release layer, the redistribution layers located in different regions being insulated from each other, and forming a first dielectric layer during the process of forming the redistribution layers; connecting a chip and a pillar connected to the chip to the redistribution layer formed in the predetermined region through a solder cap on the pillar; packaging the chip to form an encapsulation layer; and removing the first panel-level substrate and the release layer, and forming a solder ball on one side of the redistribution layer. | 2019-01-03 |
20190006197 | WAFER PART AND CHIP PACKAGING METHOD - A wafer part and a chip packaging method are provided. The wafer part is obtained by processing a round wafer. A profile of the wafer part is an inscribed closed pattern of a profile of the round wafer, and area of the inscribed closed pattern is larger than area of an inscribed square of the profile of the round wafer; the inscribed closed pattern includes an even number of straight edges, and each one of straight edges is parallel to another of the straight edges and has a length equal to that of the another of the straight edges. The chip packaging method includes: fixing the plurality of wafer parts on a first panel level substrate and forming a packaging structure on each chip; wherein the plurality of wafer parts are arranged closely on the first panel level substrate without being overlapped with each other. | 2019-01-03 |
20190006198 | MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE - There is provided a manufacturing method of a semiconductor package in which plural semiconductor chips different in the thickness are mounted. In the manufacturing method, the back surface of a package board in which the plural semiconductor chips on a wiring base are collectively sealed by a sealant is held by a holding tape and a resin layer is thinned by a shaping abrasive stone. Then, a dividing unit is caused to cut to the middle of the holding tape along planned dividing lines to divide the package board into individual semiconductor packages. | 2019-01-03 |
20190006199 | Release Film as Isolation Film in Package - A method includes forming a release film over a carrier, forming a metal post on the release film, encapsulating the metal post in an encapsulating material, performing a planarization on the encapsulating material to expose the metal post, forming a redistribution structure over the encapsulating material and the metal post, decomposing a first portion of the release film to separate a second portion of the release film from the carrier, and forming an opening in the release film to expose the metal post. | 2019-01-03 |
20190006200 | Release Film as Isolation Film in Package - A method includes forming a release film over a carrier, attaching a device over the release film through a die-attach film, encapsulating the device in an encapsulating material, performing a planarization on the encapsulating material to expose the device, detaching the device and the encapsulating material from the carrier, etching the die-attach film to expose a back surface of the device, and applying a thermal conductive material on the back surface of the device. | 2019-01-03 |
20190006201 | SUBSTRATE LIQUID PROCESSING APPARATUS, SUBSTRATE LIQUID PROCESSING METHOD AND STORAGE MEDIUM - A substrate liquid processing apparatus includes a liquid processing unit configured to store a processing liquid and a substrate and process the substrate using the processing liquid, the processing liquid including a phosphoric acid aqueous solution; a phosphoric acid aqueous solution supply unit configured to supply the phosphoric acid aqueous solution to the liquid processing unit; a discharge line connected to the liquid processing unit, and configured to discharge the processing liquid; a return line switchably connected to the discharge line, and configured to return the processing liquid to the liquid processing unit; a recycling line switchably connected to the discharge line, and including a recycling unit configured to recycle the processing liquid; and a waste line switchably connected to the discharge line, and configured to discard the processing liquid to the outside. | 2019-01-03 |
20190006202 | REPAIRING APPARATUS FOR REMOVAL OF METAL RESIDUALS ON DISPLAY SUBSTRATE - A repairing apparatus for removal of metal residuals on a display substrate is provided. The apparatus includes a storage container, comprising at least a first container configured to store a metal etchant; an adsorption component, configured to be adsorbed on a surface to be repaired on the display substrate and to cooperate with the surface to be repaired to define collectively a closed chamber therebetween; and a circulating pipe assembly, arranged to be connected and in fluid communication between the storage container and the adsorption component. The repairing apparatus may include a first fluid circuit arranged to be connected and in fluid communication between the first container and the adsorption component and configured to guide the metal etchant within the first container to flow to the adsorption component and into the chamber and then back into the first container. | 2019-01-03 |
20190006203 | SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD - A substrate processing apparatus includes a connection portion connected to the common piping and having a flow space in its interior, a chemical liquid supplying piping connected to the connection portion, a drain piping connected to the connection portion, and a cleaning liquid supplying piping connected to the connection portion, the connection portion has a plurality of ports aligned along a flow direction of the flow space, and a common port, which, among these ports, is connected to one end of the common piping, is disposed, in regard to the flow direction, between a drain port, which, among these ports, is connected to the drain piping, and a cleaning liquid supplying port, which, among these ports, is connected to the cleaning liquid supplying piping. | 2019-01-03 |
20190006204 | POST-CMP CLEANING APPARATUS AND METHOD WITH BRUSH SELF-CLEANING FUNCTION - Apparatuses and methods for performing a post-CMP cleaning are provided. The apparatus includes a chamber configured to receive a wafer in need of having CMP residue removed. The apparatus also includes a spray unit configured to apply a first cleaning solution to at least one surface of the wafer. The apparatus further includes a brush cleaner configured to scrub the at least one surface of the wafer. In addition, the apparatus includes at least one inner tank disposed in the chamber for storing a second cleaning solution that is used to clean the brush cleaner. | 2019-01-03 |
20190006205 | SYSTEM, APPARATUS, AND METHOD FOR PROCESSING SUBSTRATES USING ACOUSTIC ENERGY - A system, apparatus, and method for processing substrates using acoustic energy. In one aspect, the invention can be a system for processing flat articles including a support for supporting the flat article and an acoustic energy treatment apparatus. The acoustic energy treatment apparatus may include a support arm and a plurality of transducer assemblies coupled thereto. The transducer assemblies may include a housing with a transducer coupled thereto, and the housings of the transducer assemblies may be arranged in an end-to-end manner. A trough may also be included that extends along at least a portion of a length of the transducer assemblies. The trough may serve as a reservoir that upon being filled and overflowed with a liquid allows the liquid to fluidly couple the transducer assemblies to the flat article. | 2019-01-03 |
20190006206 | SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS - The substrate processing method according to an exemplary embodiment includes a low temperature dissolving processing and an etching processing. The low temperature dissolving processing dissolves oxygen in an alkaline aqueous solution cooled to a predetermined temperature lower than the room temperature. The etching processing etches a substrate by supplying the alkaline aqueous solution in which oxygen is dissolved to the substrate. | 2019-01-03 |
20190006207 | SUBSTRATE PROCESSING APPARATUS - A substrate processing apparatus includes a processing container configured to air-tightly accommodate substrates, a plurality of mounting stands configured to mount the substrates, a process gas supply part configured to supply a process gas to the mounting stands, an exhaust mechanism configured to evacuate an interior of the processing container, a partition wall configured to independently surround the mounting stands with a gap left between the partition wall and each of the mounting stands, and cylindrical inner walls configured to independently surround the mounting stands with a gap left between each of the inner walls and each of the mounting stands. Slits are formed in the inner walls. The process gas in the processing spaces is exhausted via the slits. The inner walls include partition plates for bypassing the process gas so that the process gas does not directly flow into the slits. | 2019-01-03 |
20190006208 | HEAT TREATMENT APPARATUS, METHOD OF MANAGING HEAT TREATMENT APPARATUS AND STORAGE MEDIUM - A heat treatment apparatus of heating a substrate mounted on a mounting plate heated by a heating part includes: plural types of physical quantity detecting parts for detecting plural types of physical quantities, respectively; a state estimating part for estimating an occurrence probability occurring for each of abnormality modes by a neural network, and including an input layer to which a group of time-series detection values obtained for each of physical quantity detection values detected respectively by the physical quantity detecting parts is inputted; and a selecting part for selecting one of correspondence processes based on the occurrence probability of each of the abnormality modes estimated by the state estimating part. One of the physical quantity detection values is a temperature detection value detected by a temperature physical quantity detecting part for detecting a temperature of the mounting plate among the physical quantity detecting parts. | 2019-01-03 |
20190006209 | DEVICE AND METHOD FOR HOLDING, ROTATING, AS WELL AS HEATING AND/OR COOLING A SUBSTRATE - A device and a method for holding, rotating, heating and/or cooling a substrate. The device comprises a rotor, having: at least one secondary winding, a substrate holder with a substrate holder surface and fixing elements for fixing the substrate, a rotary shaft for rotating the substrate holder around a rotary axis, at least one electric heater for heating and/or a cooler for cooling the substrate holder surface; and a stator, having: at least one primary winding, a ring-shaped base, wherein the rotary shaft of the rotor is arranged at least partially inside the base; and wherein a current and/or a voltage is induced in the at least one secondary winding by the at least one primary winding, the induced current and/or voltage used to power the at least one heater and/or cooler so that the substrate holder surface is heated and/or cooled. | 2019-01-03 |
20190006210 | TAPE ATTACHING MACHINE AND TAPE REMOVING METHOD - A tape attaching machine for attaching an adhesive tape to a frame and a wafer and cutting the adhesive tape along the frame is provided. The tape attaching machine includes a tape winding unit configured to wind a remaining part of the adhesive tape left after cutting the adhesive tape, the remaining part of the adhesive tape being not attached to the frame and the wafer. The tape winding unit includes a main shaft like a roller and a pair of jigs detachably mounted on the opposite ends of the main shaft. Each of the jigs is engageable with the main shaft so as to have a tape contact area around which the remaining part of the adhesive tape is adapted to be wound and a grip area formed axially outside the tape contact area and adapted to be gripped by an operator. | 2019-01-03 |
20190006211 | ELECTRONIC COMPONENT HANDLING UNIT - The electronic component handling unit comprises: a main body; a rotating shaft attached to the main body; a flip head attached to the rotating shaft; and a stepping motor attached to the main body, and causing the rotating axis to rotate to invert the flip head. The flip head has: a base connected to the rotating shaft; and a plurality of pickup nozzles attached on the base in a straight line in such a manner that the alignment direction is tilted 45° with respect to the direction in which the rotating axis extends. As a result, a column of picked-up semiconductor chips can be flipped-over while simultaneously changing the alignment direction thereof with a simple constitution. | 2019-01-03 |
20190006212 | WAFER PRODUCING APPARATUS - A wafer producing apparatus for producing an SiC wafer from a single-crystal SiC ingot includes an ingot grinding unit, a laser applying unit that applies a pulsed laser beam having a wavelength that is transmittable through the single-crystal SiC ingot while positioning a focal point of the pulsed laser beam in the single-crystal SiC ingot at a depth corresponding to the thickness of the SiC wafer to be produced from an upper surface of the single-crystal SiC ingot, thereby forming a peel-off layer in the single-crystal SiC ingot, a wafer peeling unit that peels the SiC wafer off the peel-off layer in the single-crystal SiC ingot, and a delivery unit assembly that delivers the single-crystal SiC ingot between the ingot grinding unit, the laser applying unit, and the wafer peeling unit. | 2019-01-03 |
20190006213 | CHEMICAL SUPPLYING UNIT, SUBSTRATE TREATMENT APPARATUS, AND METHOD OF TREATING SUBSTRATE USING THE SUBSTRATE TREATMENT APPARATUS - Provided is a substrate treatment apparatus including a housing, a supporting unit located inside the housing and supporting a substrate, a nozzle unit supplying chemicals to the substrate disposed on the supporting unit, and a chemical supplying unit supplying the chemicals to the nozzle unit. Herein, the chemical supplying unit includes a chemical supply source, a first tank and a second tank storing the chemicals, a chemical supplying line supplying the chemicals from the chemical supply source to the first tank and the second tank, a chemical discharge line supplying the chemicals from the first tank and the second tank to the nozzle unit, a circulation line allowing the chemicals to circulate through the first tank and the second tank, respectively, a member installed on the circulation line, and a controller controlling the member. | 2019-01-03 |
20190006214 | SYSTEM FOR A SEMICONDUCTOR FABRICATION FACILITY AND METHOD FOR OPERATING THE SAME - An apparatus for a semiconductor fabrication facility (FAB) is provided. In one embodiment, the apparatus includes a maintenance tool and a transporting tool configured to transport at least one customized. The maintenance tool includes a first track at a first horizontal plane, at least one maintenance crane movably mounted on the first track, and a plurality of first sensors on the first track. The first sensors are configured to define at least a danger zone and to detect a location of the maintenance crane. The transporting tool includes a second track at a second horizontal plane, at least one overhead hoisting transporting (OHT) vehicle movably mounted on the second track, and at least one second sensor on the OHT vehicle. The second horizontal plane is different from the first horizontal planes. The first horizontal plane and the second horizontal plane at least partially overlap each other from a plane view. | 2019-01-03 |
20190006215 | LIGHT IRRADIATION TYPE HEAT TREATMENT APPARATUS, AND HEAT TREATMENT METHOD - A semiconductor wafer transport mode of a heat treatment apparatus is switchable between two modes of a “high throughput mode” and a “low oxygen concentration mode” as appropriate. In the “low oxygen concentration mode”, a first cooling chamber is used only as a path for transferring the semiconductor wafer, and a second cooling chamber is used only as a dedicated cooling unit for cooling the semiconductor wafer subjected to flash heating. On the other hand, in the “high throughput mode”, both of the first cooling chamber and the second cooling chamber are used as paths for transferring the semiconductor wafer, and as the cooling units, too. | 2019-01-03 |
20190006216 | APPARATUS FOR TRANSPORTATION OF A SUBSTRATE CARRIER IN A VACUUM CHAMBER, SYSTEM FOR VACUUM PROCESSING OF A SUBSTRATE, AND METHOD FOR TRANSPORTATION OF A SUBSTRATE CARRIER IN A VACUUM CHAMBER - An apparatus for transportation of a substrate carrier in a vacuum chamber is provided. The apparatus includes a first track providing a first transportation path for the substrate carrier, and a transfer device configured for contactlessly moving the substrate carrier from a first position on the first track to one or more second positions away from the first track. The one or more second positions include at least one of a position on a second track and a process position for processing of a substrate. The transfer device includes at least one first magnet device configured to provide a magnetic force acting on the substrate carrier to contactlessly move the substrate carrier from the first position to the one or more second positions. | 2019-01-03 |
20190006217 | CONVEYANCE SYSTEM - A conveyance system includes: a first track and a second track arranged parallel in a vertical direction such that device ports are positioned therebelow and on one side thereof; a plurality of overhead conveyance vehicles configured to travel along each of the first track and the second track and each convey a FOUP, and storage shelves provided below and on the other side of the first track and the second track and each configured to have the FOUP placed thereon. Each of the overhead conveyance vehicles includes: a gripping unit capable of gripping the FOUP; a movement mechanism capable of moving the gripping unit to a position above the device ports or above the storage shelves; and a hoisting mechanism capable of raising and lowering the gripping unit, which has been moved to the position above each thereof by the movement mechanism. | 2019-01-03 |
20190006218 | SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM - A substrate processing technique includes: a first heating device configured to heat a substrate to a first processing temperature; a first process chamber provided with the first heating device; a second heating device configured to heat the substrate to a second processing temperature utilizing microwaves, the second processing temperature being higher than the first processing temperature; a second process chamber provided with the second heating device; a substrate placement portion configured to load and unload the substrate with respect to the first process chamber and the second process chamber by placing and rotating the substrate; and a controller configured to respectively control the first heating device, the second heating device, and the substrate placement portion. | 2019-01-03 |
20190006219 | METHOD OF PACKAGING CHIP AND CHIP PACKAGE STRUCTURE - A method of packaging a chip includes laminating a first substrate with a second substrate, the first substrate being capable of withstanding a greater stress than the second substrate; applying an adhesive layer on the second substrate; bonding the chip on the adhesive layer; and forming an encapsulation layer that covers at least the chip. | 2019-01-03 |
20190006220 | Thermal Pad for Etch Rate Uniformity - Etch uniformity is improved by providing a thermal pad between an insert ring and electrostatic chuck in an etching chamber. The thermal pad provides a continuous passive heat path to dissipate heat from the insert ring and wafer edge to the electrostatic chuck. The thermal pad helps to keep the temperature of the various components in contact with or near the wafer at a more consistent temperature. Because temperature may affect etch rate, such as with etching hard masks over dummy gate formations, a more consistent etch rate is attained. The thermal pad also provides for etch rate uniformity across the whole wafer and not just at the edge. The thermal pad may be used in an etch process to perform gate replacement by removing hard mask layer(s) over a dummy gate electrode. | 2019-01-03 |
20190006221 | METHOD FOR PRODUCING AN INTERFACE INTENDED TO ASSEMBLE TEMPORARILY A MICROELECTRONIC SUPPORT AND A MANIPULATION HANDLE, AND TEMPORARY ASSEMBLY INTERFACE - Method for producing an interface for assembling temporarily a microelectronic support and a handle, comprising at least:
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20190006222 | 3D SEMICONDUCTOR DEVICE AND STRUCTURE - A 3D semiconductor device, including: a first level including a single crystal layer, a plurality of first transistors, and a first metal layer, forming memory control circuits; a second level overlaying the single crystal layer, and including a plurality of second transistors and a plurality of first memory cells; a third level overlaying the second level, and including a plurality of third transistors and a plurality of second memory cells; where the second transistors are aligned to the first transistors with less than 40 nm alignment error, where the memory cells include a NAND non-volatile memory type, where some of the memory control circuits can control at least one of the memory cells, and where some of the memory control circuits are designed to perform a verify read after a write pulse so to detect if the at least one of the memory cells has been successfully written. | 2019-01-03 |
20190006223 | METHOD AND APPARATUS FOR WAFER LEVEL PACKAGING - Methods and apparatus for wafer level packaging are described herein. According to one embodiment, a method comprises depositing an adhesive layer atop a carrier, placing at least a portion of a substrate pre-fabricated with a plurality of die cavities and a plurality of through vias atop the laminate, inserting a die into each of the die cavities, encapsulating the die and the substrate and debonding and removing the laminate and the carrier from the encapsulated die and substrate. Another embodiment provides an apparatus comprising a substrate, a plurality of die cavities formed through the substrate and a plurality of conductive through vias disposed through the substrate and arranged about the perimeter of each die cavity, wherein a top surface of the substrate is exposed for application of an encapsulating layer and a bottom surface of the substrate is exposed for placement on an adhesive layer. | 2019-01-03 |