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01st week of 2013 patent applcation highlights part 52
Patent application numberTitlePublished
20130005107SEMICONDUCTOR APPARATUS AND MANUFACTURING METHOD OF SAME - Disclosed is a thin-film transistor (2013-01-03
20130005108SILICON GERMANIUM (SiGe) HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) - A heterojunction bipolar transistor (HBT), an integrated circuit (IC) chip including at least one HBT and a method of forming the IC. The HBT includes an extrinsic base with one or more buried interstitial barrier layer. The extrinsic base may be heavily doped with boron and each buried interstitial barrier layer is doped with a dopant containing carbon, e.g., carbon or SiGe:C. The surface of the extrinsic base may be silicided.2013-01-03
20130005109METHOD FOR FORMING A TOROIDAL INDUCTOR IN A SEMICONDUCTOR SUBSTRATE - A toroidal inductor formed in a semiconductor substrate. Through-silicon vias are used to connect metal layers formed on top and bottom surfaces of the semiconductor substrate. In one embodiment, the vias are elongated and laid out in two concentric circles, an inner circle enclosed by an outer circle. The vias of the outer concentric circle are longer than the vias of the inner circle so that spaces between vias are the same for both circles. In another embodiment, each elongated via may include a plurality of circular vias formed in a line. Metals layers on the top and bottom of the semiconductor substrate are patterned to form wedge shaped connectors between the inner and outer vias to form the spirals of the toroidal inductor. The wedge shaped connectors with elongated vias allow spacing between spirals to be constant.2013-01-03
20130005110Method of fabricating semiconductor device - Provided is a method of manufacturing a semiconductor device having a capacitor. The method includes forming a composite layer, including sequentially stacking on a substrate alternating layers of first through nth sacrificial layers and first through nth supporting layers. A plurality of openings that penetrate the composite layer are formed. A lower electrode is formed in the plurality of openings. At least portions of the first through nth sacrificial layers are removed to define a support structure for the lower electrode extending between adjacent ones of the plurality of openings and the lower electrode formed therein, the support structure including the first through nth supporting layers and a gap region between adjacent ones of the first through nth supporting layers where the first through nth sacrificial layers have been removed. A dielectric layer is formed on the lower electrode and an upper electrode is formed on the dielectric layer.2013-01-03
20130005111Methods of Forming Capacitors - Some embodiments include methods of making stud-type capacitors utilizing carbon-containing support material. Openings may be formed through the carbon-containing support material to electrical nodes, and subsequently conductive material may be grown within the openings. The carbon-containing support material may then be removed, and the conductive material utilized as stud-type storage nodes of stud-type capacitors. The stud-type capacitors may be incorporated into DRAM, and the DRAM may be utilized in electronic systems.2013-01-03
20130005112METHOD OF FORMING PHASE CHANGE MATERIAL LAYER USING GE(II) SOURCE, AND METHOD OF FABRICATING PHASE CHANGE MEMORY DEVICE - In one aspect, a method of forming a phase change material layer is provided. The method includes supplying a reaction gas including the composition of Formula 1 into a reaction chamber, supplying a first source which includes Ge(II) into the reaction chamber, and supplying a second source into the reaction chamber. Formula 1 is NR2013-01-03
20130005113METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device comprises: forming a processing target; forming a first supporter on the processing target; forming a first mask so as to contact one side surface of the first mask with a side surface of the first supporter; patterning the processing target using, as masks, the first mask and the first supporter; forming a second supporter so as to be contacted with a side surface of the processing target exposed in first processing step and the other side surface of the first mask; removing the first supporter; and patterning the processing target using, as masks, the first mask and the second supporter.2013-01-03
20130005114METHODS FOR FORMING ISOLATED FIN STRUCTURES ON BULK SEMICONDUCTOR MATERIAL - Methods are provided for fabricating a semiconductor device. A method comprises forming a layer of a first semiconductor material overlying the bulk substrate and forming a layer of a second semiconductor material overlying the layer of the first semiconductor material. The method further comprises creating a fin pattern mask on the layer of the second semiconductor material and anisotropically etching the layer of the second semiconductor material and the layer of the first semiconductor material using the fin pattern mask as an etch mask. The anisotropic etching results in a fin formed from the second semiconductor material and an exposed region of first semiconductor material underlying the fin. The method further comprises forming an isolation layer in the exposed region of first semiconductor material underlying the fin.2013-01-03
20130005115Methods Of Forming An Array Of Memory Cells, Methods Of Forming A Plurality Of Field Effect Transistors, Methods Of Forming Source/Drain Regions And Isolation Trenches, And Methods Of Forming A Series Of Spaced Trenches Into A Substrate - A method of forming a series of spaced trenches into a substrate includes forming a plurality of spaced lines over a substrate. Anisotropically etched sidewall spacers are formed on opposing sides of the spaced lines. Individual of the lines have greater maximum width than minimum width of space between immediately adjacent of the spacers between immediately adjacent of the lines. The spaced lines are removed to form a series of alternating first and second mask openings between the spacers. The first mask openings are located where the spaced lines were located and are wider than the second mask openings. Alternating first and second trenches are simultaneously etched into the substrate through the alternating first and second mask openings, respectively, to form the first trenches to be wider and deeper within the substrate than are the second trenches. Other implementations and embodiments are disclosed.2013-01-03
20130005116EDGE-EXCLUSION SPALLING METHOD FOR IMPROVING SUBSTRATE REUSABILITY - A method to minimize edge-related substrate breakage during spalling using an edge-exclusion region where the stressor layer is either non-present (excluded either during deposition or removed afterwards) or present but significantly non-adhered to the substrate surface in the exclusion region is provided. In one embodiment, the method includes forming an edge exclusion material on an upper surface and near an edge of a base substrate. A stressor layer is then formed on exposed portions of the upper surface of the base substrate and atop the edge exclusion material, A portion of the base substrate that is located beneath the stressor layer and which is not covered by the edge exclusion material is then spalled.2013-01-03
20130005117PROCESS FOR HIGH-PRESSURE NITROGEN ANNEALING OF METAL NITRIDES - The disclosure provides a process to anneal group III-V metal nitride crystals, wafers, epitaxial layers, and epitaxial films to reduce nitrogen vacancies. In particular, the disclosure provides a process to perform slow annealing of the group III-V metal nitrides in a high temperature and high pressure environment.2013-01-03
20130005118FORMATION OF III-V MATERIALS USING MOCVD WITH CHLORINE CLEANS OPERATIONS - Methods of forming III-V materials using metal organic chemical vapor deposition (MOCVD) with chlorine cleans operations are described. A chlorine-clean operation may further season an MOCVD process for improved throughput for high volume manufacturing.2013-01-03
20130005119METHOD FOR CONTROLLED REMOVAL OF A SEMICONDUCTOR DEVICE LAYER FROM A BASE SUBSTRATE - A method of removing a semiconductor device layer from a base substrate is provided that includes providing a crack propagation layer on an upper surface of a base substrate. A semiconductor device layer including at least one semiconductor device is formed on the crack propagation layer. Next, end portions of the crack propagation layer are etched to initiate a crack in the crack propagation layer. The etched crack propagation layer is then cleaved to provide a cleaved crack propagation layer portion to a surface of the semiconductor device layer and another cleaved crack propagation layer portion to the upper surface of the base substrate. The cleaved crack propagation layer portion is removed from the surface of the semiconductor device layer and the another cleaved crack propagation layer portion is removed from the upper surface of the base substrate.2013-01-03
20130005120ORGANIC THIN FILM TRANSISTOR, PRODUCTION METHOD THEREOF, AND ELECTRONIC DEVICE - An organic thin film transistor including a substrate with an organic insulating layer; a source and drain electrode layer electro deposited on the substrate; a second metal material source and drain electrode layer covering the first layer, the metal material capable of forming an ohmic contact with an organic semiconductor material lower than the first layer; and an organic semiconductor layer over a region between the source electrode and the drain electrode2013-01-03
20130005121Deposition Method and Method for Manufacturing Deposition Substrate - One embodiment of the present invention is a deposition method for forming a layer 2013-01-03
20130005122METHOD FOR FINISHING A SUBSTRATE OF THE SEMICONDUCTOR-ON-INSULATOR TYPE - The invention relates to finishing a substrate of the semiconductor-on-insulator (SeOI) type comprising an insulator layer buried between two semiconducting material layers. The method successively comprises: 2013-01-03
20130005123Laser Annealing Method And Device - A laser annealing method for executing laser annealing by irradiating a semiconductor film formed on a surface of a substrate with a laser beam, the method including the steps of, generating a linearly polarized rectangular laser beam whose cross section perpendicular to an advancing direction is a rectangle with an electric field directed toward a long-side direction of the rectangle or an elliptically polarized rectangular laser beam having a major axis directed toward a long-side direction, causing the rectangular laser beam to be introduced to the surface of the substrate, and setting a wavelength of the rectangular laser beam to a length which is about a desired size of a crystal grain in a standing wave direction.2013-01-03
20130005124METHOD FOR MANUFACTURING A METAL OXIDE SEMICONDUCTOR - One aspect in the present disclosure relates to a method for manufacturing an amorphous metal oxide semiconductor. In an exemplary embodiment, a film is deposited on a substrate from a mixed solution as a starting element. For example, the mixed solution includes at least an indium alkoxide and a zinc alkoxide in a solvent. The film made from the mixed solution on the substrate is cured by thermal-annealing in a water vapor atmosphere, at a temperature range of, for example, 210 to 275 degrees Celsius, inclusive.2013-01-03
20130005125NANOPARTICLE POSITIONING TECHNIQUE - Embodiments of the present invention are generally directed to a method for disposing nanoparticles on a substrate. In one embodiment, a substrate having a plurality of recesses is provided. In this embodiment, a plurality of nanoparticles is also provided. The nanoparticles include a catalyst material coupled to one or more ligands, and these nanoparticles are disposed within respective recesses of the substrate. In some embodiments, the substrate is processed to form nanostructures, such as nanotubes or nanowires, within the recesses. Devices and systems having such nanostructures are also disclosed.2013-01-03
20130005126APPLICATION OF CLUSTER BEAM IMPLANTATION FOR FABRICATING THRESHOLD VOLTAGE ADJUSTED FETS - Semiconductor structures including a high k gate dielectric material that has at least one surface threshold voltage adjusting region located within 3 nm or less from an upper surface of the high k gate dielectric are provided. The at least one surface threshold voltage adjusting region is formed by a cluster beam implant step in which at least one threshold voltage adjusting impurity is formed directly within the high k gate dielectric or driven in from an overlying threshold voltage adjusting material which is subsequently removed from the structure following the cluster beam implant step.2013-01-03
20130005127METHOD FOR MANUFACTURING MULTIGATE DEVICE - A method for manufacturing a multigate device is provided, comprising: providing a semiconductor substrate; etching the semiconductor substrate to form a protruding fin; etching the semiconductor substrate at the bottom of the fin so as to form a gap between the fin and the semiconductor substrate; forming a dielectric layer which covers the semiconductor substrate and the fin and fills the gap; and etching the dielectric layer so as to expose the top and a portion of sidewalls of the fin. The present invention can realize isolation between fins with a simple process, which costs relatively low and is suitable for massive industrial application.2013-01-03
20130005128METAL GATE FILL BY OPTIMIZING ETCH IN SACRIFICIAL GATE PROFILE - A high-k metal gate electrode is formed with reduced gate voids. An embodiment includes forming a replaceable gate electrode, for example of amorphous silicon, having a top surface and a bottom surface, the top surface being larger than the bottom surface, removing the replaceable gate electrode, forming a cavity having a top opening larger than a bottom opening, and filling the cavity with metal. The larger top surface may be formed by etching the bottom portion of the amorphous silicon at greater temperature than the top portion, or by doping the top and bottom portions of the amorphous silicon differently such that the bottom has a greater lateral etch rate than the top.2013-01-03
20130005129STRUCTURE AND METHOD TO INTEGRATE EMBEDDED DRAM WITH FINFET - Various embodiment integrate embedded dynamic random access memory with fin field effect transistors. In one embodiment, a first fin structure and at least a second fin structure are formed on a substrate. A deep trench area is formed between the first and second fin structures. A high-k metal gate is formed within the deep trench area. The high-k metal gate includes a high-k dielectric layer and a metal layer. A polysilicon material is deposited within the deep trench area adjacent to the metal layer. The high-k metal gate and the polysilicon material are recessed and etched to an area below a top surface of a substrate insulator layer. A poly strap is formed in the deep trench area. The poly strap is dimensioned to be below a top surface of the first and second fin structures. The first and second fin structures are electrically coupled to the poly strap.2013-01-03
20130005130SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - The present invention relates to a semiconductor device, which includes a junction region formed in an active area of a semiconductor substrate; a trench defining a buried gate predetermined area within the semiconductor substrate; a gate electrode buried in an lower portion of the trench; an ion implantation region formed in a sidewall of the trench; and a capping insulation layer formed in an upper portion of the gate electrode.2013-01-03
20130005131SEMICONDUCTOR DEVICE FABRICATION USING GATE SUBSTITUTION - Methods is provided for forming a CMOS device. The method includes providing a substrate and depositing a gate stack on the substrate. The gate stack includes a gate dielectric and a dummy gate including polycrystalline silicon (polySi). The method also includes depositing a dielectric layer on the substrate after depositing the gate stack on the substrate. The method further includes substituting the dummy gate with a metal without first removing the dummy gate.2013-01-03
20130005132Floating gate device with oxygen scavenging element - A floating gate device is provided. A tunnel oxide layer is formed over the channel. A floating gate is formed over the tunnel oxide layer. A high-k dielectric layer is formed over the floating gate. A control gate is formed over the high-k dielectric layer. At least one of the control gate and/or the floating gate includes an oxygen scavenging element. The oxygen scavenging element is configured to decrease an oxygen density at least one of at a first interface between the control gate and the high-k dielectric layer, at a second interface between the high-k dielectric layer and the floating gate, at a third interface between the floating gate and the tunnel oxide layer, and at a fourth interface between the tunnel oxide layer and the channel responsive to annealing.2013-01-03
20130005133METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device can uniformly form a metal gate irrespective of gate pattern density. The method includes forming an interlayer dielectric layer having a trench on a substrate, forming a metal layer having first, second and third sections extending along the sides of the trench, the bottom of the trench and on the interlayer dielectric layer, respectively, forming a sacrificial layer pattern exposing an upper part of the first section of the metal layer, forming a spacer pattern on the exposed part of the first section of the metal layer, and forming a first gate metal layer by etching the first section of the metal layer using the sacrificial layer pattern and the spacer pattern as masks.2013-01-03
20130005134SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - The semiconductor device includes a silicon substrate having a channel region, a gate electrode formed over the channel region, buried semiconductor regions formed in a surface of the silicon substrate on both sides of the gate electrode, for applying to the surface of the silicon substrate a first stress in a first direction parallel to the surface of the silicon substrate, and stressor films formed on the silicon substrate between the channel region and the buried semiconductor regions in contact with the silicon substrate, for applying to the silicon substrate a second stress in a second direction which is opposite to the first direction.2013-01-03
20130005135PLANAR PATTERNED TRANSPARENT CONTACT, DEVICES WITH PLANAR PATTERNED TRANSPARENT CONTACTS, AND/OR METHODS OF MAKING THE SAME - Certain examples relate to improved methods for making patterned substantially transparent contact films, and contact films made by such methods. In certain cases, the contact films may be patterned and substantially planar. Thus, the contact films may be patterned without intentionally removing any material from the layers and/or film, such as may be required by photolithography. In certain example embodiments, an oxygen exchanging system comprising at least two layers may be deposited on a substrate, and the layers may be selectively exposed to heat and/or energy to facilitate the transfer of oxygen ions or atoms from the layer with a higher enthalpy of formation to a layer with a lower enthalpy of formation. In certain cases, the oxygen transfer may permit the conductivity of selective portions of the film to be changed. This advantageously may result in a planar contact film that is patterned with respect to conductivity and/or resistivity.2013-01-03
20130005136Methods Of Forming Metal Silicide-Comprising Material And Methods Of Forming Metal Silicide-Comprising Contacts - A method of forming metal silicide-comprising material includes forming a substrate which includes a first stack having second metal over first metal over silicon and a second stack having second metal over silicon. The first and second metals are of different compositions. The substrate is subjected to conditions which react the second metal with the silicon in the second stack to form metal silicide-comprising material from the second stack. The first metal between the second metal and the silicon in the first stack precludes formation of a silicide comprising the second metal and silicon from the first stack. After forming the metal silicide-comprising material, the first metal, the second metal and the metal silicide-comprising material are subjected to an etching chemistry that etches at least some remaining of the first and second metals from the substrate selectively relative to the metal silicide-comprising material.2013-01-03
20130005137BARRIER SEQUENCE FOR USE IN COPPER INTERCONNECT METALLIZATION - A method patterns at least one opening in a low-K insulator layer of a multi-level integrated circuit structure, such that a copper conductor is exposed at the bottom of the opening. The method then lines the sidewalls and the bottom of the opening with a first Tantalum Nitride layer in a first chamber and forms a Tantalum layer on the first Tantalum Nitride layer in the first chamber. Next, sputter etching on the opening is performed in the first chamber, so as to expose the conductor at the bottom of the opening. A second Tantalum Nitride layer is formed on the conductor, the Tantalum layer, and the first Tantalum Nitride layer, again in the first chamber. After the second Tantalum Nitride layer is formed, the methods herein form a flash layer comprising a Platinum group metal on the second Tantalum Nitride layer in a second, different chamber.2013-01-03
20130005138LOCAL INTERCONNECT HAVING INCREASED MISALIGNMENT TOLERANCE - A method is provided for forming an interconnect in a semiconductor memory device. The method includes forming a pair of source select transistors on a substrate. A source region is formed in the substrate between the pair of source select transistors. A first inter-layer dielectric is formed between the pair of source select transistors. A mask layer is deposited over the pair of source select transistors and the inter-layer dielectric, where the mask layer defines a local interconnect area between the pair of source select transistors having a width less than a distance between the pair of source select transistors. The semiconductor memory device is etched to remove a portion of the first inter-layer dielectric in the local interconnect area, thereby exposing the source region. A metal contact is formed in the local interconnect area.2013-01-03
20130005139TECHNIQUES FOR MANUFACTURING PLANAR PATTERNED TRANSPARENT CONTACT AND/OR ELECTRONIC DEVICES INCLUDING SAME - Certain examples relate to improved methods for making patterned substantially transparent contact films, and contact films made by such methods. In certain cases, the contact films may be patterned and substantially planar. Thus, the contact films may be patterned without intentionally removing any material from the layers and/or film, such as may be required by photolithography. In certain example embodiments, an oxygen exchanging system comprising at least two layers may be deposited on a substrate, and the layers may be selectively exposed to heat and/or energy to facilitate the transfer of oxygen ions or atoms from the layer with a higher enthalpy of formation to a layer with a lower enthalpy of formation. In certain cases, the oxygen transfer may permit the conductivity of selective portions of the film to be changed. This advantageously may result in a planar contact film that is patterned with respect to conductivity and/or resistivity.2013-01-03
20130005140SYSTEMS AND METHODS FOR CONTROLLING ETCH SELECTIVITY OF VARIOUS MATERIALS - A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.2013-01-03
20130005141SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device can include an insulation layer on that is on a substrate on which a plurality of lower conductive structures are formed, where the insulation layer has an opening. A barrier layer is on a sidewall and a bottom of the opening of the insulation layer, where the barrier layer includes a first barrier layer in which a constituent of a first deoxidizing material is richer than a metal material in the first barrier layer and a second barrier layer in which a metal material in the second barrier layer is richer than a constituent of a second deoxidizing material. An interconnection is in the opening of which the sidewall and the bottom are covered with the barrier layer, the interconnection is electrically connected to the lower conductive structure.2013-01-03
20130005142METHOD AND APPARATUS FOR FORMING SILICON FILM - Provided is a method and apparatus for forming a silicon film, which are capable of suppressing generation of a void or seam. The method includes performing a first film-forming process, performing an etching process, performing a doping process, and performing a second film-forming process. In the first film-forming process, a non-doped silicon film that is not doped with an impurity is formed so as to embed a groove of an object. In the etching process, the non-doped silicon film formed via the first film-forming process is etched. In the doping process, the non-doped silicon film etched via the etching process is doped with an impurity. In the second film-forming process, an impurity-doped silicon film is formed so as to embed the silicon film doped via the doping process.2013-01-03
20130005143METHOD AND APPARATUS PROVIDING AIR-GAP INSULATION BETWEEN ADJACENT CONDUCTORS USING NANOPARTICLES - A semiconductor device and a method of forming it are disclosed in which at least two adjacent conductors have an air-gap insulator between them which is covered by nanoparticles of insulating material being a size which prevent the nanoparticles from substantially entering into the air-gap.2013-01-03
20130005144ELECTRONIC DEVICE - An electronic device is disclosed. In one embodiment, the electronic device includes a substrate, a plurality of conducting lines formed on a first conducting material that is disposed on the substrate, and a layer of a second conducting material disposed on the plurality of conducting lines. The conducting lines include a top face and a side face. The layer of the second conducting material includes a first thickness disposed on each of the top faces and a second thickness disposed on each of the side faces. To this end, the first thickness is greater than the second thickness.2013-01-03
20130005145METHODS OF FORMING A METAL PATTERN - A method of forming a metal pattern includes depositing a metal material over a photosensitive, insulative material and into a trench positioned over a bond pad. A photoresist material having a substantially planar surface may be formed over the metal material. A portion of the photoresist material may be etched to expose the metal material outside of the trench. The metal material may be isotropically etched to leave sidewalls of the metal protruding above surfaces of the photosensitive, insulative material outside of the trench. Some methods include removing a portion of a dielectric material to form at least one trench. Metal material and photoresist material may be deposited over the trench. A portion of the photoresist material may be etched to expose areas of the metal material. The metal material may be etched to form sidewalls of the metal material that protrude above the dielectric material.2013-01-03
20130005146MULTILAYERED LOW k CAP WITH CONFORMAL GAP FILL AND UV STABLE COMPRESSIVE STRESS PROPERTIES - The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.2013-01-03
20130005147METHOD OF REDUCING CRITICAL DIMENSION PROCESS BIAS DIFFERENCES BETWEEN NARROW AND WIDE DAMASCENE WIRES - A method including forming an organic polymer layer (OPL) on a substrate; forming a patterned photoresist layer having a first opening and a second opening over the OPL, the second opening wider than the first opening; performing a first reactive ion etch (RIE) to form a first trench and a second trench in the organic layer, the second trench wider than the first trench, the first trench extending into but not through the organic polymer layer, the second trench extending through the OPL to the substrate, the first RIE forming a first polymer layer on sidewalls of the first trench and a second polymer layer on sidewalls of the second trench, the second polymer layer thicker than the first polymer layer; and performing a second RIE to extend the first trench through the OPL to the substrate, the second RIE removing the second polymer layer from sidewalls of the second trench.2013-01-03
20130005148METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a pillar on a base layer, forming a insulating layer on the base layer to cover the pillar by using GCIB method, where a lowermost portion of an upper surface of the insulating layer is lower than an upper surface of the pillar, and polishing the insulating layer and the pillar to expose a head of the pillar by using CMP method, where an end point of the polishing is the lowermost portion of the upper surface of the insulating layer.2013-01-03
20130005149CHEMICAL-MECHANICAL PLANARIZATION OF SUBSTRATES CONTAINING COPPER, RUTHENIUM, AND TANTALUM LAYERS - A chemical-mechanical polishing composition comprising: (a) at least one type of abrasive particles; (b) at least two oxidizing agents; (c) at least one pH adjusting agent; and (d) deionized water; (e) optionally comprising at least one antioxidant, and a method for the chemical-mechanical planarization of a substrate containing at least one copper layer, at least one ruthenium layer, and at least one tantalum layer comprising the steps of (1) providing the said chemical-mechanical polishing composition; (2) contacting the substrate surface to be polished with the chemical-mechanical polishing composition and a polishing pad; and (3) chemically and mechanically polishing the substrate surface by way of moving the polishing pad relative to the substrate.2013-01-03
20130005150COMPOSITION FOR FORMING RESIST UNDERLAYER FILM AND PATTERNING PROCESS USING THE SAME - The invention provides a composition for forming a silicon-containing resist underlayer film comprising: (A) a silicon-containing compound obtained by a hydrolysis-condensation reaction of a mixture containing, at least, one or more hydrolysable silicon compound shown by the following general formula (1) and one or more hydrolysable compound shown by the following general formula (2), and (B) a silicon-containing compound obtained by a hydrolysis-condensation reaction of a mixture containing, at least, one or more hydrolysable silicon compound shown by the following general formula (3) and one or more hydrolysable silicon compound shown by the following general formula (4). There can be provided a composition for forming a resist underlayer film applicable not only to a resist pattern obtained in a negative development but also to a resist pattern obtained in a conventional positive development, and a patterning process using this composition.2013-01-03
20130005151METHOD FOR FORMING CONTACT HOLES - In an exemplary method for forming contact holes, a substrate overlaid with an etching stop layer and an interlayer dielectric layer in that order is firstly provided. A first etching process then is performed to form at least a first contact opening in the interlayer dielectric layer. A first carbon-containing dielectric layer subsequently is formed overlying the interlayer dielectric layer and filling into the first contact opening. After that, a first anti-reflective layer and a first patterned photo resist layer are sequentially formed in that order overlying the carbon-containing dielectric layer. Next, a second etching process is performed by using the first patterned photo resist layer as an etching mask to form at least a second contact opening in the interlayer dielectric layer.2013-01-03
20130005152INCREASED DEPOSITION EFFICIENCY AND HIGHER CHAMBER CONDUCTANCE WITH SOURCE POWER INCREASE IN AN INDUCTIVELY COUPLED PLASMA (ICP) CHAMBER - Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).2013-01-03
20130005153Process for Enhancing Solubility and Reaction Rates In Supercritical Fluids - Processes for enhancing solubility and the reaction rates in supercritical fluids are provided. In preferred embodiments, such processes provide for the uniform and precise deposition of metal-containing films on semiconductor substrates as well as the uniform and precise removal of materials from such substrates. In one embodiment, the process includes, providing a supercritical fluid containing at least one reactant, the supercritical fluid being maintained at above its critical point, exposing at least a portion of the surface of the semiconductor substrate to the supercritical fluid, applying acoustic energy, and reacting the at least one reactant to cause a change in at least a portion of the surface of the semiconductor substrate.2013-01-03
20130005154METHOD OF FORMING A DIELECTRIC LAYER HAVING AN ONO STRUCTURE USING AN IN-SITU PROCESS - A method of forming a dielectric layer, the method including sequentially forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate by performing a plasma-enhanced atomic layer deposition process, wherein a first nitrogen plasma treatment is performed after forming the first oxide layer.2013-01-03
20130005155METHOD TO ENHANCE CHARGE TRAPPING - Methods of improving charge trapping are disclosed. One such method includes forming an oxide-nitride-oxide tunnel stack and a silicon nitride layer on the oxide-nitride-oxide tunnel stack. This silicon nitride layer is implanted with ions. These ions may function as electron traps or as fields. The silicon nitride layer may be part of a flash memory device.2013-01-03
20130005156STRUCTURE AND METHOD TO OBTAIN EOT SCALED DIELECTRIC STACKS - Equivalent oxide thickness (EOT) scaled high k/metal gate stacks are provided in which the capacitance bottleneck of the interfacial layer is substantially eliminated, with minimal compromise on the mobility of carriers in the channel of the device. In one embodiment, the aforementioned EOT scaled high k/metal gate stacks are achieved by increasing the dielectric constant of the interfacial layer to a value that is greater than the originally formed interfacial layer, i.e., the interfacial layer prior to diffusion of a high k material dopant element therein. In another embodiment, the aforementioned scaled high k/metal gate stacks are achieved by eliminating the interfacial layer from the structure. In yet another embodiment, the aforementioned high k/metal gate stacks are achieved by both increasing the dielectric constant of the interfacial layer and reducing/eliminating the interfacial layer.2013-01-03
20130005157SEMICONDUCTOR-ON-INSULATOR SUBSTRATE AND STRUCTURE INCLUDING MULTIPLE ORDER RADIO FREQUENCY HARMONIC SUPRESSING REGION - A semiconductor-on-insulator substrate and a related semiconductor structure, as well as a method for fabricating the semiconductor-on-insulator substrate and the related semiconductor structure, provide for a multiple order radio frequency harmonic suppressing region located and formed within a base semiconductor substrate at a location beneath an interface of a buried dielectric layer with the base semiconductor substrate within the semiconductor-on-insulator substrate. The multiple order radio frequency harmonic suppressing region may comprise an ion implanted atom, such as but not limited to a noble gas atom, to provide a suppressed multiple order radio frequency harmonic when powering a radio frequency device, such as but not limited to a radio frequency complementary metal oxide semiconductor device (or alternatively a passive device), located and formed within and upon a surface semiconductor layer within the semiconductor structure.2013-01-03
20130005158CURRENT CONTROL BRUSH ASSEMBLY - A system, in certain embodiments, includes a current control brush assembly including an axial button having a first electrically conductive housing retaining a first set of electrically conductive filaments. The first set of electrically conductive filaments extends generally inward along an axial direction. The current control brush assembly also includes a radial shaft grounding ring (SGR) coupled to the axial button. The radial SGR includes a second electrically conductive housing retaining a second set of electrically conductive filaments. The second set of electrically conductive filaments is arranged circumferentially around the second electrically conductive housing, and the second set of electrically conductive filaments extends generally inward along a radial direction.2013-01-03
20130005159ROBUST MAGNETIC CONNECTOR - Connector inserts and receptacles that are robust, easily manufactured, and provide an improved connector performance. One example may provide a connector receptacle having a power contact located in a ground surface. An insulating layer may be placed between the power contact and the ground surface. The ground surface may be curved or flat, or it may have other shapes. Another example may provide a robust connector insert. This connector insert may include a crimping piece that fits over a cable braiding and is crimped. The crimping piece may then be attached to an attraction plate. A cover or shell may be attached to provide further reinforcement. Another example may provide a connector system having a ground contact and a power contact, where the ground contact is a make-first-break-last contact.2013-01-03
20130005160Connection Footprint For Electrical Connector With Printed Wiring Board - An electrical connector including a housing; ground contacts; and signal contacts. The signal contacts are differential signal pairs. The electrical connector is a right angle connector. First ends of the ground contacts are in a center row. First ends of a first one of the each differential signal pair are on a first side row at a first side of the center row. First ends of a second one of the differential signal pairs are on a second side row at a second opposite side of the center row. At least one of the first ends of the ground contacts is provided between the first ends of two of the differential signal pairs. An assembly is provided including the electrical connector and a printed circuit board having the electrical connector mounted thereon. The printed circuit board includes through-holes with a shared single antipad one of the differential signal pair.2013-01-03
20130005161Joint Connector Assembly - The invention relates to a joint connector assembly including first and second connectors connected to each other by a circuit board and connected to third connectors by connection terminals. The circuit board is mounted at the center of the third connectors below the first and second connectors located in an upper region of a main body housing and is integrally formed with the main body housing in a lower region thereof. The upper region of the main body housing defines first and second connector receptacles for the first and second connectors. A cover member is attached to a lower surface of the circuit board to cover the circuit board. The joint connector assembly has a reduced volume because the connectors are connected to one another without lines and all the connectors are inserted in the main body housing, allowing the joint connector assembly to be installed in a small space.2013-01-03
20130005162MULTIPLE SOCKET CONCEPT - Electronic assemblies and their manufacture are described. One assembly includes a land grid array package including a plurality of land contacts. The assembly also includes a first socket adapted to engage a first group of the plurality of land contacts, and a second socket adapted to engage a second group of the plurality of land contacts. The first socket and the second socket are each coupled to a board. The first socket and the second socket are separate structures on the board. Other embodiments are described and claimed.2013-01-03
20130005163ELECTRICAL CONTACT ARRANGEMENT - The invention relates to an electrical contact arrangement of a spring contact element (2013-01-03
20130005164ELECTRICAL CONNECTOR - An electrical connector has a first row of contact pins. The first row of contact pins comprises a first grounding pin, a second grounding pin and a first signal pin arranged between the first grounding pin and the second grounding pin. A grounding bar electrically connects the first grounding pin and the second grounding pin.2013-01-03
20130005165CONTACT UNIT AND PRINTED CIRCUIT BOARD CONNECTOR HAVING THE SAME - A ground contact plate in a contact unit includes fixing pieces provided at predetermined equal intervals in a longitudinal direction. The fixing pieces are respectively fitted in opposed slits in ground contact terminals via a transmission blade.2013-01-03
20130005166CARD CONNECTOR - A card connector includes a tray having a side wall and a breach region formed on the side wall, a main body including a front opening for inserting the tray and a side portion defining a side of the front opening, a plurality of terminals attached to the main body, and a detective switch including a spring member that is attached to the side portion of the main body and includes a press portion configured to extend into the card-holding space of the tray through the breach region of the tray when the tray is inserted in the main body. A card connector can include a card locking element, and a card ejecting mechanism. The card ejecting mechanism can comprise an actuator movable between an outward position and an inward position and a levering member.2013-01-03
20130005167CONNECTOR FOR A MEMORY CARD - A connector for a card having a housing for housing a card equipped with a terminal member, a connection terminal attached to the housing for contacting the terminal member of the card and a detecting switch equipped with a first contact member and a second contact member for detecting separation from each other and the insertion of a card into the housing, wherein at least the first contact member or the second contact member is equipped with a fixed portion fixed to the housing and a moving portion displaceable by the housing and unevenly mated with the housing.2013-01-03
20130005168ELECTRICAL CARD CONNECTOR - An electrical card connector (2013-01-03
20130005169STRAIN RELIEF FEATURE FOR AN IMPLANTABLE MEDICAL DEVICE LEAD - A lead assembly for an implantable medical device includes a lead body having a proximal end, a distal end, and a longitudinal axis that extends between the proximal end and distal end. The lead assembly also includes a strain relief tube that surrounds a portion of the lead body. The strain relief tube includes a flexible material configured to include contours such that the portion of the lead body surrounded by the strain relief tube maintains a formed shape that varies from the longitudinal axis of the lead body. The contours vary in response to forces on the lead body to prevent strain at the distal end of the lead body.2013-01-03
20130005170PLUG AND CONNECTOR SYSTEM - A connector system includes a socket and a plug. The socket includes a receptacle and a recess communicating with the receptacle. The plug includes a main body, a locking element and a spring. The main body is inserted in the receptacle to electrically connect the plug with the socket. The locking element is retractably mounted to the main body. The spring drives the locking element to be latched in the recess. When the pressing block is pressed, the resisting panel drives the latching block releasing from the recess.2013-01-03
20130005171CONNECTOR FIXING STRUCTURE - A connector fixing structure includes a connector provided at one end of an electric wire, a protector surrounding a portion of the electric wire, and a fixing portion integrally formed with the protector and fixating the connector. The protector and the fixing portion are formed of a protection material that includes a base material and a binder material having a melting point lower than that of the base material. The protector and the fixing portion are joined at each joint portion by cooling and solidifying the melted binder material.2013-01-03
20130005172FITTING CONFIRMATION CONSTRUCTION FOR CONNECTORS - In a fitting confirmation construction, a lock arm is provided in a housing of a first connector. The lock arm includes a lock wall inclined and disposed at a front end of the lock arm in a direction from the first connector toward the second connector; a deflection space formed at a rear of the lock wall in the direction; and an operation plate disposed on the deflection space. A confirmation opening is provided in a rear wall of the housing, and has a height equal to a height of the deflection space. A lock projection is provided on a second connector to be brought into engagement with the lock wall. A rear end face of the operation plate is exposed to a rear outside of the housing of the first connector through the confirmation opening, only in a state where the lock arm is deflected.2013-01-03
20130005173MULTI-PLUGGING CONNECTOR SYSTEM - A connector utilizes a latching assembly that has a structure that connects horizontal movement of an actuator to vertical movement of a latching arm. If desired, a 2X ganged plug can be inserted into any two adjacent bays of a ganged receptacle assembly that includes at least three bays.2013-01-03
20130005174ELECTRICAL CONNECTOR - A signal transmission medium inserted into an insulating housing can be held and released in a favorable manner with a simple structure. A pair of lock release parts are arranged to face opposite each other at both outer ends of a signal transmission medium, this pair of lock release parts being integrally and continuously formed to release arms integrally extending from the insulating housing to be movable to approach and separate from each other, with a lock release link mechanism being provided for causing the locking portion to displace in an unlocking direction by moving the pair of lock release parts in directions approaching each other.2013-01-03
20130005175CONNECTOR FOR CONNECTING TWO ELECTRIC CABLES TOGETHER - A connector configured to adopt a position for the installation of cables between jaws (2013-01-03
20130005176Rotating Plug - A rotating plug includes an insulating main body, multiple conductive prongs, multiple conductive connecting terminals, and an insulating rotating member. Electrical wires are disposed in the insulating main body. The conductive prongs are electrically connected with the electrical wires, respectively. Each conductive connecting terminal includes a fixed portion and a swing portion pivotably connected to the fixed portion. The fixed portion is mounted to the insulating main body and electrically connected to a corresponding electrical wire. The swing portion is mounted to the insulating rotating member. The conductive prongs are mounted to the insulating rotating member and electrically connected with the swing portions, respectively. The fixed portions are electrically connected with the electrical wires, respectively. When the swing portions of the conductive connecting terminals rotate, the swing portions may drive the insulating rotating member and conductive prongs to rotate together therewith. The rotating plug is flexible and convenient in use.2013-01-03
20130005177Toy Car USB Memory Storage Device - A Universal Serial Bus (USB) memory device capable of being concealed within a housing exterior designed to resemble a toy car. The device has a USB connector, which can slide out of the rear end of the toy car and be inserted into a USB port on a computer to establish a communication link between the computer and the device. The headlights of the toy car will blink, when a connection is established Alternatively, the tires may spin and the sound of a revving car engine will be emitted from the device when the connection is established. The housing is capable of concealing the USB connector inside of the toy car exterior, making the device completely unrecognizable as a USB memory device. Concealment of the device is intended to discourage theft of the USB memory device and the sensitive information contained thereon.2013-01-03
20130005178High Data Rate Electrical Connector and Cable Asssembly - An electrical connector has a first shell, an opposing second shell and a circuit board between the first shell and the second shell. The circuit board has a first side and an opposing second side and includes a plurality of differential pair conductive traces on each side. A first drain wire termination device is provided on the first side and includes at least one separator between at least one of the differential pair conductive traces on the first side and another of the differential pair conductive traces on the first side. A second drain wire termination device is connected to the second side and includes at least one separator between at least one of the differential pair conductive traces on the second side and another of the differential pair conductive traces on the second side.2013-01-03
20130005179DOCK FOR A PORTABLE ELECTRONIC DEVICE - A dock for receiving a portable electronic device, including a housing comprising an aperture; a support coupled to an inner wall of the housing, a portion of the support being elastically deformable; and a connector received in the support and extending through the aperture for electrically communicating with the portable electronic device, wiring of the connector for transferring data to an electronic device; wherein the portion of the support elastically deforms in response to non-axial movement of at least a portion of the connector.2013-01-03
20130005180COAXIAL CABLE CONNECTOR HAVING A PLATED POST - A coaxial cable connector configured to couple a coaxial cable having a conductive shield around a dielectric insulator and a mating connector is provided. The coaxial cable connector includes a fastener configured to engage the mating connector, a body coupled to the fastener, and a post received within the fastener, the post comprising a non-conductive plastic member having a conductive plating applied to the exterior thereof. The conductive plating is configured to provide a conductive path between the conductive shield of the coaxial cable and at least one of the fastener and the mating connector.2013-01-03
20130005181CABLE CONNECTION STRUCTURE - A cable connection structure includes a cable that has an outer skin and at least one conducting wire, and a substrate to which the cable is connected at a main surface side having a hard wiring, wherein the substrate includes, at the main surface side, a first flat section having flatness and a second flat section having flatness thinner than the first flat section via a level difference surface from the first flat section and an end part of the outer skin is arranged on the second flat section and at least one of the conducting wire is connected to a connecting electrode formed on the second flat section.2013-01-03
20130005182ELECTRICAL CONNECTOR - An electrical connector includes a terminal subassembly having inserts holding terminals. The terminals extend between a mating end and a cable end. The cable end is configured to be terminated to corresponding wires of a cable. A front shell surrounds a front portion of the terminal subassembly. The front shell provides electrical shielding around the mating ends of the terminals. The front shell is configured to be mated to a mating connector. A back shell surrounds a rear portion of the terminal subassembly. The back shell provides electrical shielding around the cable ends of the terminals. The back shell is configured to be terminated to an overbraid of the cable. The back shell includes a plurality of contacts that extend from a front of the back shell. The contacts engage, and are electrically connected to, the front shell.2013-01-03
20130005183CONNECTING ELEMENT FOR DATA LINES - Connecting element for data lines with a body with a receiving section with recesses for receiving wires of the data lines, whereby electrical conductors are disposed on the body, whereby the conductors are guided from the recesses to a contact area, whereby the electronic circuit is connected with the conductors, whereby the element is made of molded material.2013-01-03
20130005184Shielding Terminal Clamp - A shielding terminal clamp including a first side piece having a first guide device disposed along the first side piece, a second side piece, a U-shaped yoke having a base part having a second guide means disposed along the second side piece, an elastic element is disposed between the first side piece and the second side piece such that a compressive force is exerted onto a pressure piece that is movably mounted between the first and second guide means, and a first wing and second wing disposed on the pressure piece, wherein the first and second wings are configured to generate a counterforce with the fingers of a human hand against the compressive force and thereby compress the elastic element.2013-01-03
20130005185INPUT/OUTPUT CONNECTOR ASSEMBLY - An input/output (I/O) connector assembly includes an I/O connector module and a holder for accommodating the I/O connector module. The I/O connector module includes a plurality of I/O connectors and an Electro Magnetic Interference (EMI) shielding member located below each of the plurality of I/O connectors. The EMI shielding member includes a flat piece, a first resilient piece extending slantingly upwards from the flat piece, and a second resilient piece extending slantingly downward from the flat piece. A plurality of receiving holes is defined in the holder. The plurality of I/O connecters extends through and protrudes out from the plurality of receiving holes. The first resilient piece abuts a corresponding one of the plurality of I/O connectors. The second resilient piece abuts the holder.2013-01-03
20130005186CONNECTING HARDWARE WITH MULTI-STAGE INDUCTIVE AND CAPACITIVE CROSSTALK COMPENSATION - A connector and method of crosstalk compensation within a connector is disclosed. The method includes determining an uncompensated crosstalk, including an uncompensated capacitive crosstalk and an uncompensated inductive crosstalk, of a wired pair in a connector. The uncompensated crosstalk includes common mode and differential mode crosstalk. The method includes applying at least one inductive element to the wired pair, where the at least one inductive element is configured and arranged to provide balanced compensation for the inductive crosstalk caused by the one or more pairs. The method further includes applying at least one capacitive element to the wired pair, where the at least one capacitive element is configured and arranged to provide balanced compensation for the capacitive crosstalk caused by the one or more wired pairs.2013-01-03
20130005187CONNECTOR - A connector includes a first connector and a second connector, wherein the first connector includes first contacts made of a conductive material, and a first movable part made of an insulating material, wherein the first contacts have respective first contact portions of a convex shape, and the first movable part is connected to the first contacts to be movable together with the first contact portions, wherein the second connector includes second contacts made of a conductive material, and a second movable part made of an insulating material, wherein the second contacts have respective second contact portions coming in contact with the first contact portions, and the second movable part is connected to the second contacts to be movable together with the second contact portions, and wherein the first contact portions and the second contact portions are configured to come in contact with each other, thereby establishing electrical coupling.2013-01-03
20130005188CONNECTOR - A connector which is capable of preventing spring characteristics of contacts from changing due to sucking up of solder. A plurality of contacts each include a contact portion in contact with an electrode of a card-type electronic component, a spring portion for pressing the contact portion against the electrode of the card-type electronic component, and a connection portion which is soldered to a pad on a printed substrate. The spring portion of each contact is formed with a low wettability area on an end thereof toward the connection portion, to which solder is less likely to adhere.2013-01-03
20130005189ELECTRICAL CHARGER LOCKING ASSEMBLY - There is provided an electrical charger including a charger assembly and a locking assembly. The charger assembly includes a base unit configured for being electrically coupled to an electronic device, and an adaptor unit configured for being electrically coupled to a power supply. The external surfaces of the base unit and the adaptor unit include co-operating external geometries that provide a visual indication whether the charger assembly is disposed in the locked state or the unlocked state.2013-01-03
20130005190CARD EDGE CONNECTOR - A card edge connector is provided for mounting to a printed circuit board (PCB). The card edge connector includes a housing having a mating side, a mounting side, and a card slot that extends into the mating side. The card edge connector also includes first and second contacts held by the housing. The first and second contacts include mounting segments that extend outwardly from the mounting side of the housing. The mounting segments include mounting interfaces. The mounting segments of the first and second contacts are configured to be electrically connected to corresponding contact pads on the PCB at the mounting interfaces. The mounting interface of the first contact is offset from the mounting interface of the second contact in a direction generally away from mounting side of the housing.2013-01-03
20130005191POWER CONNECTOR HAVING SIMPLIFIED CENTRAL CONTACT - An electrical connector includes an insulative housing, a first contact and a central contact being of a uni-configuration respectively retained in the housing. The housing has a mating cavity extending through a front face thereof, a receiving hole extending through a rear face thereof, and a projection rearwards projecting from the rear face. The projection defines a retaining slot opened sideward and a supporting portion disposed between the retaining slot and the rear face of the housing, a connecting portion of the central contact climbs over the supporting portion and runs through the retaining slot.2013-01-03
20130005192BOARD-TO-BOARD CONNECTOR - A plug connector comprising an insulative housing comprising an insulative longitudinal base with an insulative wall having a first face and a second face, the insulative wall extending from the longitudinal base and separating the longitudinal base into a first portion and a second portion, a first group and a second group of first passageways, a set of second passageways configured alongside the first passageways wherein each second passageway has a first segment extending from the first face of the insulative wall to the first portion of the longitudinal base and a second segment extending from the second face of the insulative wall to the second portion of the longitudinal base and a third segment connecting the first segment to the second segment and a plurality of signal contacts disposed in the first passageways.2013-01-03
20130005193DUPLEX MALE ELECTRICAL CONNECTOR WITH SOCKET SHELL - A duplex male electrical connector includes an insulating base, two rows of first connection contacts and a socket shell. The insulating base has a front section formed with a connection board. The connection board has opposite top and bottom surfaces with larger plate surfaces. The two rows of first connection contacts are exposed from the top and bottom surfaces of the connection board, respectively. The socket shell is formed with a connection slot having a front end serving as an insert port. The connection board is disposed in the connection slot. The socket shell and the connection board can vertically float and move relative to each other, such that the connection board can vertically float and move relative to the socket shell or the socket shell can vertically float and move relative to the connection board.2013-01-03
20130005194FUSE BLOCK AND ELECTRIC CONNECTION BOX HAVING THE SAME - For providing a fuse block in which a printed circuit board can be miniaturized, the fuse block includes a plurality of busbars formed into an L-shape. Each of the busbars is provided at one end thereof with at least one tuning-fork shaped connecting portion to be connected with a fuse, and at the other end thereof with at least one board connecting portion to be connected with a printed circuit board by soldering. The busbars are arranged in parallel along a direction X and overlapped along a direction Y to form four layers. The board connecting portion of the busbar in a third layer numbered from the printed circuit board and the board connecting portion of the busbar in a second layer are arranged in one row on one straight line, so that total number of the rows is smaller than total number of the layers.2013-01-03
20130005195TERMINAL BLOCK COVER WITH NUT RETENTION FEATURE - A terminal block cover includes a base having a base surface configured to be secured against a terminal block. First and second spaced apart sidewalls extend from and adjoin the base. An outer wall is spaced apart from the base and is secured to the base by and adjoins with the first and second sidewalls. A lateral wall is arranged at a first lateral side and extends between and adjoins the first and second sidewalls, the outer wall and the base, which together provide at least one terminal pocket. An inner surface is provided on the outer wall facing the terminal pocket and has first and second surfaces. The first and second surfaces are at first and second distances respectively from the base surface, and the first distance is greater than the second distance. The second surface retains a terminal nut.2013-01-03
20130005196SERVICEABLE ELECTRICAL CONNECTION AND METHOD - An electrical connection includes an electrically conductive first contact member, an electrically conductive second contact member, an interface, and an attachment. The first contact member includes a first contact surface for passing current. The second contact member includes a second contact surface for passing current that directly contacts the first contact surface. The interface includes one of a cold weld and a fused section that physically joins the first contact member and the second contact member, and that forms a primary conductive path between the first contact member and the second contact member. The interface is formed by ultrasonic vibration of the first contact surface relative to the second contact surface. The attachment is separate from the interface and mechanically joins the first contact member and the second contact member. A method for forming the electrical method is also provided.2013-01-03
20130005197STRUCTURE OF CONNECTION OF CRIMPING TERMINAL TO ELECTRIC WIRE - A crimping terminal (2013-01-03
20130005198Shielding Terminal Clamp - A shielding terminal clamp having a first limb, a second limb and a yoke having a base part, with an elastic element disposed between the first limb and second such that a pressure force is exerted on a pressure piece movably supported between first and second guide pieces of the first and second limbs, respectively, first and second ends of the elastic element being respectively disposed on the base part and the pressure piece such that the pressure force acts in the direction of an open end of the yoke opposite the base part, with a closing device, which is displaceable disposed on the yoke such that a movement in a direction extending orthogonally to the pressure force, with which the closing device and the yoke move toward one another, causes a shielding bus clamping of between the open end of the yoke and the closing device.2013-01-03
20130005199SYSTEM FOR MOUNTING A MOTORIZED CASSETTE TO A WATERCRAFT BODY - A system for mounting a motorized cassette to a watercraft body comprises a mounting assembly configured to releasably secure the system to the watercraft body, a housing, a tiller, and a motorized cassette. The housing includes a receiving space and the motorized cassette is configured to be at least partially inserted into the receiving space. Manipulation of the tiller causes rotation of the housing relative to the mounting assembly such that the tiller can be used to steer the watercraft body.2013-01-03
20130005200Methods of pulsed nuclear energy generation using piston-based systems - The invention describes a method of nuclear energy transformation into electric and/or mechanical energy by triggering criticality in a working cylinder by an approach of a piston with a neutron reflector layer to fissile heat elements. Optionally, liquid moderator should fill the heating element to provide for an additional condition of such triggering. The pulse reaction initiates a heat cycle by expanding working fluid, extracting mechanical work and compressing the working fluid using lower amount of energy. The energy released in reaction can drive a column of water as a liquid piston propelling a highly efficient hydraulic turbine and producing a simple economical method of energy conversion. The piston movements can also be converted in laser and electromagnetic pulses. Self-regulation of nuclear reaction by a reflector piston linked to a resilient spring can be used in marine propulsion. In one method, the approach of the reflector piston triggers a reaction that evaporates water in the pressure chamber and produces a reactive thrust in a noozle. A fraction of the steam is diverted to produce steam bubble envelope on the surface of the vessel to minimize drag. Another fraction of the diverted steam drives a pump, pumping sea water into the heating elements. Other practical and novel applications of the method are disclosed.2013-01-03
20130005201Apparatus for Performing Overhead Work Using Air-Propelled Vessel with Articulating Member - A wide, flat-bottom, buoyant, amphibious hull with a powered articulating member mounted on the deck. The hull has a shallow draft and distributes its weight over a large area and is propelled by at least one engine-driven propeller rotating above the hull. These features cooperatively provide a vehicle capable of performing overhead work, such as installing or servicing power transmission poles, towers, or other structures located in environmentally sensitive wetlands, swamps, marshes, shallow water, or terrain which is not efficiently accessible by other means.2013-01-03
20130005202Fin for Swimming, Diving and the Like - A fin includes a blade and a foot pocket mounted on a front end of the blade. The blade includes a rubber layer having two opposite sides, and two carbon fiber units mounted on the two opposite sides of the rubber layer respectively. The rubber layer is provided between the two carbon fiber units so as to enhance the elastic coefficient of the blade so that the blade has greater elasticity and flexibility. Thus, when the blade is worn by a user who is swimming or diving in the water, the blade can be flexed and deflected to respond to the moving direction of the water current so as to decrease the drag applied on the blade so that the blade is moved in the water easily, thereby greatly saving the user's energy.2013-01-03
20130005203Foldable flotation device - A vest type flotation device having means for holding the flotation device in a folded configuration for transport and storage. In one embodiment a transport and storage strap member is attached substantially at its outer end to one of the right and left sides. The transport and storage strap member has a first portion of a first releasable locking member set attached thereto adjacent its inner end. A second portion of the first releasable locking member set is attached to one of the right and left front portions of the device. A second portion of a second releasable locking member set is attached to the right or left side of the device opposite the side to which the outer end of the transport and storage strap member is attached.2013-01-03
20130005204SILYLATED AMINO RESINS - The present invention relates to silylated amino resins, to processes for preparing them, to their use, and to coating compositions comprising them.2013-01-03
20130005205PROCESS FOR MANUFACTURING COMPOSITE MATERIALS - The invention relates to a prepreg comprising a structural layer of conductive fibres comprising thermosetting resin in the interstices, and a first outer layer of resin comprising thermosetting resin, and comprising a population of conductive free filaments located at the interface between the structural layer and the outer resin layer which, when cured under elevated temperature, produces a cured composite material comprising a cured structural layer of packed conductive fibres and a first outer layer of cured resin, the outer layer of cured resin, comprising a proportion of the population of conductive free filaments dispersed therein, and to a process for manufacturing prepregs wherein the electrically conductive fibres pass a fibre disrupting means to cause a proportion of the fibres on an external face of the sheet to become free filaments.2013-01-03
20130005206FLEXIBLE SHEET-LIKE MATERIAL FOR BOUNDING A MATRIX MATERIAL FEED SPACE AND METHOD FOR THE PRODUCTION THEREOF - The flexible sheet-like material comprises a textile layer, which is coated at least on one side with a functional layer which is permeable to gas but impermeable to the matrix material, acting as a barrier layer for the matrix material, and is produced by coating the textile layer directly with a foam or a paste.2013-01-03
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