| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 716139000 | Layout editor (with ECO, reuse, GUI) | 29 |
| 20110023006 | CONNECTION NAVIGATION IN ELECTRONIC DESIGN AUTOMATION - Some embodiments provide a system that facilitates the creation of a design in an electronic design automation (EDA) application. During operation, the system obtains a set of parameters associated with parameterized connections in a hierarchy of the design and a set of net assignments to the parameters. Next, the system displays the parameters and the net assignments to a user of the EDA application through a graphical user interface (GUI) associated with the EDA application. Finally, the system enables modifications to the net assignments by the user through the GUI. | 01-27-2011 |
| 20110029945 | NetList Maintenance in a Circuit Diagram - Maintaining a netlist while editing a circuit diagram. The circuit diagram may be displayed on a display. The circuit diagram may include a plurality of electronic components connected by nets and may also include modular block(s) which represent a circuit portion in a hierarchical fashion. A global netlist may be stored that includes information regarding the nets of the circuit diagram. User input may be received which modifies the circuit diagram. Accordingly, the global netlist may be updated in response to the user input modifying the circuit diagram. The circuit diagram may be updated on the display based on updating the global netlist. Receiving the user input and updating the global netlist and circuit diagram may be performed a plurality of times, in a dynamic fashion during edit time. | 02-03-2011 |
| 20110035721 | DISPLAY SYSTEM OF ELECTRONIC MANUAL - A display system of electronic manual which allows easy identification of wirings. The display system of electronic manual is provided with a storage device in which stored is an electronic manual provided with a wiring diagram described in a vector image description language and constituted so as to allow reading by a browser program. In response to user's selection of a component on the wiring diagram displayed on a display, a wiring display system highlights the selected component. In response to user's operation of selecting the highlight, the wiring display system highlights wirings extending from the selected component. Moreover, while the wiring is highlighted, in response to user's operation of selecting gray display, the wiring display system switches the elements other than the selected component and the wirings extending from the component on the wiring diagram displayed on the display to be displayed in weak gray. | 02-10-2011 |
| 20110047524 | SYSTEM AND METHOD FOR INSPECTING LAYOUT OF A PRINTED CIRCUIT BOARD - A system and method for inspecting layout of a printed circuit board (PCB) provides a graphical user interface (GUI). The GUI displays a layout of the PCB. High side pins of a pulse width modulation (PWM) controller and a component connected to a high side pin are found. If the component is a metallic oxide semiconductor field effect transistor (MOSFET), the system calculate absolute a linear distance and a trace distance between a source pin of the MOSFET and a capacitor pin of a coupling capacitor connected to the source pin. If the linear distance, the trace distance and a capacitance of the coupling capacitor accord with a layout standard, the layout of the PCB is determined to be up to standard. | 02-24-2011 |
| 20110078649 | WAFER LAYOUT ASSISTING METHOD AND SYSTEM - A wafer layout assisting method is used to assist a circuit designer to estimate the layout related parameter during a circuit designing process. The wafer layout assisting method includes the following steps. A circuit information file is read. A graphic user interface (GUI) is generated according to the circuit information file. A coarse layout arrangement input by a user is received. It is determined whether the coarse layout arrangement is finished or not. A layout related parameter is generated according to device types, device parameters, and the coarse layout arrangement, if the coarse layout arrangement is finished. The circuit designer may increase an accuracy of a circuit simulation result by appropriately utilizing the layout related parameters. Through the wafer layout assisting method, the layout related parameter after the layout is performed may be pre-estimated, thus reducing a difference between the circuit simulation results before and after the layout is performed. | 03-31-2011 |
| 20110107293 | SIMULATION-BASED DESIGN STATE SNAPSHOTTING IN ELECTRONIC DESIGN AUTOMATION - Some embodiments provide a system that performs a simulation within an electronic design automation (EDA) application. During operation, the system obtains a design from a user of the EDA application. Next, the system performs the simulation using the design to create a set of current simulation results associated with the design. The system then automatically saves a current design state of the design which is associated with the current simulation results. Finally, the system enables subsequent access to the current design state and one or more previous design states of the design by the user through a graphical user interface (GUI) associated with the EDA application. | 05-05-2011 |
| 20110131543 | VISUALIZATION AND INFORMATION DISPLAY FOR SHAPES IN DISPLAYED GRAPHICAL IMAGES - Graphical viewing of shapes and descriptive information in displayed graphical images. In one aspect, shape information is displayed in a graphical interface using a computer system and includes causing a display of an image on a display device with or more shapes, and causing a display of multiple labels on the display device. Each of the labels is associated with a different one of the displayed shapes, and the labels are derived from stored connectivity information for the one or more shapes describing the connections of the shapes. | 06-02-2011 |
| 20110131544 | VISUALIZATION AND INFORMATION DISPLAY FOR SHAPES IN DISPLAYED GRAPHICAL IMAGES BASED ON A CURSOR - Graphical viewing of shapes and descriptive information in displayed graphical images. In one aspect, shape information is displayed in a graphical interface using a computer system and includes causing a display of an image and one or more shapes in the image, and causing a display of a cursor. Labels are also displayed, each of the labels associated with a different one of the displayed shapes. The plurality of labels are displayed within a predetermined zone relative to a displayed cursor, and wherein no labels are displayed outside of the zone. | 06-02-2011 |
| 20110185337 | METHODOLOGY FOR STORING AND UPDATING ON-CHIP REVISION LEVEL - Logic to indicate a revision level includes multiple cells for one bit of the revision level. The cells being wired to be a pass-through cell or a swap cell during fabrication. At least some of the cells are such that to change the bit of the revision level, it is sufficient to change any single mask of a group of masks. The change to the single mask switches at least one of the cells from pass-through cell to a swap cell, or vice-versa. | 07-28-2011 |
| 20110219352 | METHOD AND SYSTEM FOR SEARCHING AND REPLACING GRAPHICAL OBJECTS OF A DESIGN - Searching and/or replacing graphical objects of a design using a computer system. In one aspect of the inventions, a method includes searching a graphical design for all matching instances of graphical objects that match a search pattern. A graphical replacement pattern is received and caused to be displayed based on user input, and the matching instances in the graphical design are replaced with the graphical replacement pattern. At least one result of the replacement of the matching instances is caused to be displayed on a display device. | 09-08-2011 |
| 20110302549 | Wiring Harnesses - A method of designing a wiring harness using a wiring harness design tool can include allowing a first user to access and edit a first wiring harness design component in a wiring harness design workspace, allowing a second user to access and edit a second wiring harness design component in the wiring harness design workspace at least during a portion of the time that the first user is allowed to access and edit the first wiring harness design component, and displaying the first and second wiring harness design components to the first and second users during at least a portion of the time that access is allowed to the first and second users. | 12-08-2011 |
| 20110314437 | METHODS AND SYSTEMS FOR COMPUTER AIDED DESIGN OF 3D INTEGRATED CIRCUITS - Methods and systems for generating and verifying circuit layouts from computer-aided design tools for vertically integrated, three-dimensional integrated circuits are disclosed. In one instance, a 3-D technology file of these teachings is obtained by providing an identifier for two or more circuit levels, providing for each one of the two or more circuit levels an identifier for a 2-D technology file corresponding to each of the one or more circuit levels and providing a file structure including the two or more circuit levels and each identifier, corresponding to each one of the one or more circuit levels, for the 2-D technology file corresponding to each one of the two or more circuit levels. Other embodiments are disclosed. | 12-22-2011 |
| 20120030644 | METHOD AND SYSTEM FOR IMPLEMENTING STACKED VIAS - The invention is directed to a method, computer program product and apparatus for a body of code to specify how database elements are combined to create a complex element, a database grouping is created that receives the content of the evaluation without introducing a level of hierarchy, and provides graphical user interface (GUI) to interactively manipulate the element. | 02-02-2012 |
| 20120117530 | Circuit Visualization Using Flightlines - A system is disclosed for displaying circuitry interconnections as flightlines between a component specified as the local component and the foreign components connecting to the local component. Upon obtaining data of the circuit components and interconnections, a user can designate the local component from among all of the circuit components. The system determines the foreign components connected to that local component, retrieves the flightline appearance display settings for the computer display, and renders a view of the specified local component and its foreign components with flightlines representing each interconnection connection. The flightlines can be color coded to indicate inputs, outputs or other characteristics of interest to the user. | 05-10-2012 |
| 20120198411 | METHOD AND APPARATUS FOR AMS SIMULATION OF INTEGRATED CIRCUIT DESIGN - A method to create an integrated circuit that includes digital and analog components comprising: displaying on a computer system display, user input to the computer system that specifies parameter information to determine a binding between an analog circuit design component and a digital circuit design component; saving the user specified parameter information within a file that also specifies at least a portion of the analog circuit design; associating the analog circuit design component a first design block of an integrated circuit that also includes a second digital design block coupled to the first design block; using parameter information to determine a binding between the first analog circuit design component and the first digital circuit design component; saving the determined binding in computer readable storage media. | 08-02-2012 |
| 20120304146 | On-the-Fly Device Characterization from Layouts of Circuits - A design system includes a layout module and a user interface. The layout module includes a computing unit, which is configured to extract layout parameters of an integrated circuit device in a circuit during a layout stage of the circuit, and calculate circuit parameters of the device using the layout parameters. The user interface is configured to display the circuit parameters of the device in response to a user selection of the device. | 11-29-2012 |
| 20130047134 | VIEWING AND DEBUGGING HDL DESIGNS HAVING SYSTEMVERILOG INTERFACE CONSTRUCTS - Methods and systems for viewing and debugging HDL designs having SystemVerilog interface constructs are provided. An HDL design code is received, wherein the design code comprises a first module, a second module and a SystemVerilog interface construct. A first object corresponding to the first module, a second object corresponding to the second module and an interface object corresponding to the interface construct are displayed in a schematic view. The interface object is disposed between the first and second objects, and a shape of the interface object is different from that of the first and second objects. The interface signals from the first object to the second object and the interface signals from the second object to the first object pass through the interface object. | 02-21-2013 |
| 20130061198 | TECHNIQUES FOR FACILITATING ELECTRICAL COMPONENT DESIGN FOR A SOLAR ENERGY SYSTEM - Embodiments of the present invention include systems and methods for performing design automation on a mobile computer system. In one example embodiment the present invention includes a computer-implemented method comprising storing design automation data on a mobile device, displaying a plurality of design automation process steps to a user, the plurality of design automation process steps guiding the user through a design automation process for a project, receiving design automation input data from the user in the mobile device for a plurality of the design automation process steps, executing one or more data processing algorithms specific to at least one of the design automation process steps, and generating output data for the design project. | 03-07-2013 |
| 20130061199 | Navigating Analytical Tools Using Layout Software - A background process installs a system hook for message interception of integrated circuit chip layout display software. A call message is intercepted through the system hook, and current layout coordinates are read from the integrated circuit chip layout display software. A representation of the current layout coordinates is entered into tool control software configured to control a physical tool for analyzing integrated circuits, and the physical tool is controlled with the tool control software. In an “inverse” approach, a background process is used to install at least one system hook for message interception of tool control software configured to control a physical tool for analyzing integrated circuits, and a call message is intercepted through the system hook. Current coordinates are read from the tool control software. A representation of the current coordinates is entered into integrated circuit chip layout display software, and at least a portion of an integrated circuit layout is displayed. | 03-07-2013 |
| 20130117724 | METHOD FOR STRUCTURING A FUNCTION PLAN INTO FUNCTION PLAN SECTIONS - A method is disclosed for structuring a function plan into function plan sections. The function plan includes function modules. Individual function modules are connected to at least one other function module of at least one function module connection. If the function plan exceeds the predefined area of the function plan section, a first determination of the arising function module external connections in an assignment of the individual function modules to the individual function plan sections occurs for each function plan variant, and the individual function modules are assigned to the function plan sections according to the function plan variant having the least possible number of function module external connections. | 05-09-2013 |
| 20130125085 | DEVELOPMENT SUPPORT APPARATUS OF SEMICONDUCTOR DEVICE, DEVELOPMENT SUPPORT METHOD, AND DEVELOPMENT SUPPORT PROGRAM PRODUCT - Disclosed is a development support apparatus of a semiconductor device that makes it possible to easily develop the semiconductor device, a development support method, and a program product. A design evaluation apparatus is a design evaluation apparatus having an analog front-end unit for inputting a measurement signal of a sensor and an MCU unit, which has a GUI processing unit for displaying a GUI corresponding to a circuit configuration of the analog front-end unit and a register setting unit that generates setting information for setting up the circuit configuration and a circuit characteristic of the analog front-end unit based on an operation of the GUI by a user, and sets the generated setting information in the analog front-end unit through the MCU unit. | 05-16-2013 |
| 20130179855 | METHODS AND APPARATUSES TO DISPLAY INTERFACE PROTOCOL ACTIVITY - Protocol related data generated by a simulation application are captured. One or more protocol objects are displayed in a window on a display device based on the protocol related data. The protocol objects represent events associated with the interface protocol. In at least some embodiments, a location of the protocol objects on the display device is correlated to a simulation time. In at least some embodiments, protocol-related data are grouped according to an abstraction level of the interface protocol, and the protocol objects are displayed on the display device based on grouping. The protocol objects displayed on the display device can be associated with concurrent, interleaved protocol events, or both. | 07-11-2013 |
| 20130205274 | System and Method for Integrated Circuit Layout Editing with Asymmetric Zoom Views - An automated system, and method of operating the same, for assisting the layout of components and the routing of conductors in a layout of an integrated circuit. An asymmetric zoom command is provided, by way of which the user can magnify the current view of a portion of the layout in one dimension while maintaining the original magnification in the orthogonal dimension. The commands can be conveyed by keystrokes, or by a command in combination with a drawn rectangle indicating the extent of the asymmetric zoom magnification. Both asymmetric zoom-in and asymmetric zoom-out are supported. | 08-08-2013 |
| 20130275938 | REAL TIME DRC ASSISTANCE FOR MANUAL LAYOUT EDITING - Roughly described, while manually dragging shapes during IC layout editing, editing operations determine which edges of which shapes are moving at what speed ratios. Based on the edge information and the DRC rules, the system calculates and keeps track of the minimum of the maximum distance the edges are allowed to move with the cursor without violating DRC rules, in four linear directions and all corner directions. Once a next cursor destination point is known, a DRC clean destination point is calculated based on the linear and corner bounds. If the next cursor position is beyond a the push-through distance ahead of the new DRC clean point, the editing objects are moved to the user's destination point. Otherwise, the editing objects are moved to the new DRC clean destination point, thereby stopping movement at that point. | 10-17-2013 |
| 20140317589 | SYSTEM AND METHOD FOR CONCURRENT MULTI-USER CAX WORKFLOW - A system for concurrent CAx workflow includes a collaborative server that manages a model of an engineering object, the model comprising at least design data and analysis data corresponding to the design data, a design client for editing of the design data by a design user, an analysis client for editing of the analysis data by an analysis user concurrent with editing of the design data by the design user; and wherein the collaborative server and the analysis client are collectively configured (i.e., one or both are configured) to enable the analysis user to edit the analysis data, view a plurality of geometric elements within the design data, and create a reference within the analysis data to a selected geometric element of the plurality of geometric elements within the design data. A corresponding apparatus, method, and computer-readable medium are also disclosed herein. | 10-23-2014 |
| 20150294060 | VIEWING MULTI PAIRED SCHEMATIC AND LAYOUT WINDOWS ON PRINTED CIRCUIT BOARD (PCB) DESIGN SOFTWARE AND TOOLS - A method according to one embodiment includes receiving a printed circuit board design in a memory; generating, using a processor, multiple schematic windows of the printed circuit board design; generating, using the processor, multiple layout windows of the printed circuit board design; and outputting the multiple schematic windows of the printed circuit board design simultaneously with outputting the multiple layout windows of the printed circuit board design. A first of the schematic windows is paired with a first of the layout windows, the paired windows depicting representations of a common sub-portion of the printed circuit board design. | 10-15-2015 |
| 20150339421 | SENSOR CIRCUIT DESIGN TOOL - A system includes a user input engine to receive input via a graphical user interface (GUI) through a first window, the input including a distance value and an input resolution value. The system also includes a sensor circuit solution generation engine to generate a plurality of sensor circuit solutions based on the received input and to cause the plurality of sensor circuit solutions to be displayed. Each sensor circuit solution specifies information about a conductive coil. | 11-26-2015 |
| 20160078163 | MANAGEMENT APPARATUS, SUBSTRATE PROCESSING SYSTEM AND NON-TRANSITORY COMPUTER-READABLE RECORDING MEDIUM - A management apparatus includes: a manipulation & display unit including a user interface for selecting a reference device information, and configured to display: a difference between the device information obtained from the substrate processing device and the reference device information selected via the user interface; a content of the reference device information; and a content of the device information, and further configured to receive a command for modifying the device information; and a control unit configured to modify the device information based on the command received from the manipulation & display unit and configured to transmit a modified device information to the substrate processing device. | 03-17-2016 |
| 20160140277 | INFORMATION PROCESSING APPARATUS AND DESIGN SUPPORT METHOD - An information processing apparatus includes a storage unit and a processor. The storage unit is configured to store therein plural pieces of shape data indicating shapes of a plurality of components. The plural pieces of shape data are associated with a first window for displaying unarranged components. The processor is configured to generate, using the plural pieces of shape data stored in the storage unit, display information for displaying a shape of a substrate on a screen and for displaying the first window including the shapes of the plurality of components on the displayed substrate. The processor is configured to output the display information. | 05-19-2016 |
