| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 714380130 | Interrupt (i.e., halt the program) | 15 |
| 20110022896 | METHODS AND SYSTEMS FOR FIRST OCCURENCE DEBUGGING - An embodiment relates generally to an apparatus for debugging. The apparatus includes a memory configured to store data and an arithmetic logic unit configured to perform logical and arithmetic operations. The apparatus also includes a control unit configured to interface with the memory and arithmetic logic unit and to decode instructions. The control unit is configured to write a data state designated to be overwritten by a currently executing instruction to a buffer allocated in the memory in response to a trace debug flag being set. | 01-27-2011 |
| 20110296248 | SYSTEMS AND METHODS FOR RESTORING MACHINE STATE HISTORY RELATED TO DETECTED FAULTS IN PACKAGE UPDATE PROCESS - Embodiments relate to systems and methods for storing machine state history related to detected faults in a package update process. A classification tool can interface with a data store that can store machine state data on a client. The classification tool can record an initial machine state on the client and initiate a package update on the client. The classification tool can further record an updated machine state of the client subsequent to initiating the package update and detect a fault condition in the client subsequent to initiating the package update. The classification tool can examine the initial machine state and the updated machine state to categorize one or more causes of the fault condition as either related to the package update or to systemic conditions of the client. The classification tool can further notify a user of the client of the one or more causes of the fault condition. | 12-01-2011 |
| 20120030518 | LAST BRANCH RECORD INDICATORS FOR TRANSACTIONAL MEMORY - In one embodiment, a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken during program execution. This register may further store a transaction indicator to indicate whether the branch was taken during a transactional memory (TM) transaction. This register may further store an abort indicator to indicate whether the branch was caused by a transaction abort. Other embodiments are described and claimed. | 02-02-2012 |
| 20120047402 | Method and Apparatus for Monitoring Interrupts During a Power Down Event at a Processor - In a particular embodiment, a method of monitoring interrupts during a power down event at a processor includes activating an interrupt monitor to detect interrupts. The method also includes isolating an interrupt controller of the processor from the interrupt monitor, where the interrupt controller shares a power domain with the processor. The method also includes detecting interrupts at the interrupt monitor during a power down time period associated with the power down event. | 02-23-2012 |
| 20120159261 | DEBUGGER PRESENTATION OF PARALLEL APPLICATION THREADS - User interface technologies for viewing the state of threads of a target parallel application, such as a massively parallel application intended to run on a GPGPU system, during debugging of the target parallel application are disclosed. The target parallel application includes a kernel, and the kernel includes a set of threads. Coalesced thread information of the threads is presented with the user interface technologies based on user-controllable criteria. | 06-21-2012 |
| 20130036331 | DEBUGGING METHOD AND DEBUGGING DEVICE - A debugging method includes: modifying a fault handling function address corresponding to a page attribute fault in an interrupt descriptor table of a system processor to a user-defined fault handling function address; obtaining current information when a designated page attribute fault occurs in a target program; storing the current information into a virtual execution buffer corresponding to a current thread; pushing the current information in the buffer into a stack; determining whether an extended instruction pointer of the target program matches a preset breakpoint address of a faulty page; if the matching succeeds, interacting with a user; otherwise, copy-constructing an instruction, pointed to by the extended instruction pointer of the target program, to the virtual execution buffer corresponding to the current thread; and popping the current information out of the stack, executing the instruction in the buffer, and repeating the determination about whether the address matches the preset breakpoint address. | 02-07-2013 |
| 20130297975 | Device Having Configurable Breakpoint Based on Interrupt Status - A processor device with debug capabilities has a central processing unit, an interrupt controller, a status unit operable to be set into a first mode indicating an interrupt has occurred or in a second mode indicating normal execution of code, and a debug unit coupled with said status unit and comprising a configurable breakpoint, wherein a condition can be set that a breakpoint is only activated if the device is operating in an interrupt service routine. | 11-07-2013 |
| 20140101489 | Method, Apparatus, and System for Handling Virtual Machine Internal Fault - A method, an apparatus, and a system for handling a virtual machine internal fault. The method includes: monitoring, by a virtual machine internal fault detecting apparatus, a state of a virtual machine operating system; when detecting that the virtual machine operating system encounters an exception, obtaining, by an exception catching module in the virtual machine internal fault detecting apparatus, exception information corresponding to the exception according to a context of the virtual machine operating system; and reporting, by the exception catching module, the exception information to a virtual machine monitoring apparatus, so that the virtual machine monitoring apparatus determines, according to the exception information, a policy for resolving the exception corresponding to the exception information, and resolves the exception corresponding to the exception information by using the policy. The present invention is applicable to a virtualized environment having a virtual machine. | 04-10-2014 |
| 20140122937 | MONITORING METHOD AND APPARATUS FOR ARINC 653-BASED OPERATING SYSTEM - Disclosed herein is a monitoring method and apparatus for an ARINC 653-based operating system. In the monitoring method for an ARINC 653-based operating system according to the present invention, a client system transfers information about a breakpoint to a target system. The breakpoint information is set in the target system. A Micro Controller Unit (MCU) reads a Program Counter (PC). If the breakpoint information matches the PC, an interrupt is caused. A function contained in the breakpoint information matching the PC is executed. | 05-01-2014 |
| 20140201574 | System and Method for Writing Checkpointing Data - In part, the invention relates to a system and method for writing checkpointing data to a computer having a standby virtual machine for each checkpointed component on a computer having an active virtual machine. In one embodiment, the checkpointing data is processed on a per virtual machine basis. This is performed in a way that allows checkpointing data packets from multiple sources to be transferred asynchronously, subsequently reassembled into a coherent checkpoint message, and applied asynchronously. | 07-17-2014 |
| 20140298105 | IDENTIFYING AND TAGGING BREAKPOINT INSTRUCTIONS FOR FACILITATION OF SOFTWARE DEBUG - A processor stores an address of a first instruction of a first instruction set into a first register. The processor determines that a first instruction set location of the first instruction address matches a breakpoint instruction set location of a breakpoint instruction address stored in a second register, wherein the second register includes a state bit. The processor retrieves the first instruction. The processor determines that a breakpoint instruction offset of the breakpoint instruction address identifies the first instruction as the breakpoint. The processor sets the state bit of the second register. The processor removes the first instruction based on the state bit being set and then re-retrieves the first instruction. The processor tags the first instruction and generates an interrupt based on either the tagged first instruction being next to completion or the tagged first instruction being completed. | 10-02-2014 |
| 20140298106 | IDENTIFYING AND TAGGING BREAKPOINT INSTRUCTIONS FOR FACILITATION OF SOFTWARE DEBUG - A processor stores an address of a first instruction of a first instruction set into a first register. The processor determines that a first instruction set location of the first instruction address matches a breakpoint instruction set location of a breakpoint instruction address stored in a second register, wherein the second register includes a state bit. The processor retrieves the first instruction. The processor determines that a breakpoint instruction offset of the breakpoint instruction address identifies the first instruction as the breakpoint. The processor sets the state bit of the second register. The processor removes the first instruction based on the state bit being set and then re-retrieves the first instruction. The processor tags the first instruction and generates an interrupt based on either the tagged first instruction being next to completion or the tagged first instruction being completed. | 10-02-2014 |
| 20140351652 | METHOD FOR DETERMINING SOFTWARE ERROR IN VIRTUALIZATION BASED INTEGRATED CONTROL SYSTEM - A method for determining software errors in a virtualization-based integrated control system detects software errors for each partition (software of a vehicle controller) and recovers automatically. Thus, system reliability, which is an advantage of virtualization techniques, can be further enhanced, thereby providing an operator with stability, and software errors can be easily addressed by writing error information. | 11-27-2014 |
| 20150370692 | GUEST-INDEPENDENT TESTING OF GUEST FIRMWARE IN VIRTUALIZED SYSTEMS - A system and methods are disclosed for testing guest firmware in virtualized computer systems. In accordance with one embodiment, a hypervisor executed by a processing device infers that firmware has created a system table in a portion of memory of a virtual machine. In response to the inferring, the hypervisor locates the system table and executes one or more commands to test the system table. | 12-24-2015 |
| 20160124838 | METHOD AND APPARATUS FOR AUTOMATIC CROSS-SYSTEM PROGRAM DEBUGGING - The present invention discloses a method and apparatus for automatic cross-system program debugging. One embodiment of the present invention provides a method for cross-system program debugging. The method comprises: determining a first breakpoint in a first debugging session of a first system; determining a second breakpoint in a second debugging session of a second system, the second system being different from the first system; and responsive to a user performing a debugging action of associating the first breakpoint with the second breakpoint in the first debugging session and the second debugging session, recording an association between the first breakpoint and the second breakpoint for automating the program debugging across the first system and the second system. There is further described a corresponding apparatus. | 05-05-2016 |
