Class / Patent application number | Description | Number of patent applications / Date published |
710060000 | Transfer rate regulation | 25 |
20080201501 | VIRTUAL UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER FOR SERVER SYSTEMS - In one embodiment, a monolithic integrated circuit includes a first UART, a second UART, and a multiplexer. The first UART has a parallel IO interface to couple to a host system to transceive parallel data and a serial IO interface. The second UART has a parallel IO interface and a serial IO interface coupled to the serial IO interface of the first UART. The first and second UARTs convert parallel data into serial data and serial data into parallel data. The multiplexer has an output coupled to the serial input of the first UART, a first input coupled to the serial output of the second UART, a second input coupled to a serial input of a serial communication port, and a select input coupled to a control signal selectively coupling serial interfaces of first and second UARTs together for remote terminal services at a remote computer system over a network. | 08-21-2008 |
20080222325 | PROGRAMMABLE CONTROLLER WITH BUILDING BLOCKS - A PLC of building block type includes a switch module incorporating a switch part having N-to-N switch function between serial communication lines with a plurality of lines and a plurality of device modules individually incorporating device systems with various advanced-function device module characteristics. A CPU system having CPU functions of the PLC may be incorporated in the switch module, the switch module incorporating the CPU system and the plurality of device modules being connected together into a single body in a building block structure through module-connecting mechanisms. Dedicated serial communication lines each with a single line or a plurality of lines connect between the switch module incorporating the CPU system and each of the plurality of device modules such that a star-shaped serial communication network is formed with the switch module incorporating the CPU system as a central node and each of the plurality of device modules as a peripheral node. | 09-11-2008 |
20080270645 | METHOD AND APPARATUS FOR ADJUSTING TIMING SIGNAL BETWEEN MEDIA CONTROLLER AND STORAGE MEDIA - A storage system controller ( | 10-30-2008 |
20080270646 | Method and system for rate adaptation - A media access controller to adapt a rate of an output signal to a rate of an output medium is provided. The media access controller includes a register configured to output data to an external device, said register comprising a first input configured to control an output of the register and a second input configured to control an input to said register. The media access controller also includes a receiver configured to accept a signal from an external clock over the output medium and to provide said external clock signal to said first input of said register. An internal clock in the media access controller is configured to provide an internal clock signal from said internal clock to said second input of said register. | 10-30-2008 |
20080320186 | MEMORY DEVICE CAPABLE OF COMMUNICATING WITH HOST AT DIFFERENT SPEEDS, AND DATA COMMUNICATION SYSTEM USING THE MEMORY DEVICE - Provided is a memory device for high speed communication including a low speed data communication port and a low speed data input/output circuit, and a data communication system using the memory device. The memory device includes a high speed port interface for transmitting or receiving data to or from a host at a high speed, and a low speed port interface for transmitting or receiving data to or from the host at a low speed. | 12-25-2008 |
20090037621 | METHODOLOGY AND CIRCUIT FOR INTERLEAVING AND SERIALIZING/DESERIALIZING LCD, CAMERA, KEYPAD AND GPIO DATA ACROSS A SERIAL STREAM - A serializing/deserializing interface is discussed for reducing the number of connections and signals being carried over a flex cable as would be found in a hand held mobile device. In particular the interface interleaves data, multiplexes data and multiplexes control for a number of I/O devices. For example those I/O devices might include an LCD display, a camera, a keypad and a GPIO (general purpose I/O) device. | 02-05-2009 |
20090070498 | Dynamic Data Transfer Control Method and Apparatus for Shared SMP Computer Systems - As a performance critical (high or full speed) request for a computer system data bus travels down a central pipeline, the system detects whether the interface data bus is currently empty or there is an ongoing half-speed transfer. If there is an ongoing low speed transfer, the system dynamically time shift or slows down the read rate out of the interleave buffer to half speed, and utilizes the free half of the bandwidth. This dynamic “zippering” or time shifting of data prevents a pipe pass from being rejected because the whole data bus is unavailable. | 03-12-2009 |
20090070499 | CONTENT REPRODUCTION APPRATUS, CONTENT REPRODUCTION METHOD, AND CONTENT REPRODUCTION SYSTEM - A content reproduction method is provided, which acquires, from a data transmission apparatus, first streaming data that is used to play a content at a first speed, and records the first streaming data on a storage medium. The content reproduction method plays the content at the first speed, based on the stored first streaming data. The content reproduction method also starts acquisition of second streaming data in response to a varied-speed reproduction request for the content, wherein the second streaming data is used to play the content at a second speed, and plays the content at a transition speed based on the stored first streaming data, in response to the varied-speed reproduction request. The content reproduction method plays the content at the second speed based on the second streaming data, after the acquisition of the second streaming data progresses to a reproduction preparation complete state. | 03-12-2009 |
20090113087 | STREAM DATA TRANSFER CONTROL DEVICE - There are provided a stream I/F section | 04-30-2009 |
20090177812 | Synchronous Bus Controller System - A system for generating bus signals for a plurality of remote stations. Bus data packets are comprised of a plurality of data blocks. Each data block is directed to a remote station. The position of each data block in the data packet identifies the remote station to which the data block is directed. Each of the remote stations receives each data packet substantially synchronously. The remote stations decode the data packets to determine the type of data packet and identify the content of the data packet directed to it. Each remote station loads the corresponding content from the data packet. Each of the remote stations can then generate output signals based on the data packet content substantially synchronously with the other remote stations. | 07-09-2009 |
20090210588 | Output Circuit, Control Program Product, and Control Method - A computation unit computes an elapse time until second data stored in a storage unit is outputted since first data is stored in the storage unit. An output request unit changes a speed at which an output unit outputs data based on the elapse time. | 08-20-2009 |
20090265486 | SYSTEM FOR MANAGING A COST-CONSTRAINED RESOURCE - A system manages access to a cost-constrained resource. The system includes two or more resource consumers that may request access to the cost-constrained resource. Each of the resource consumers may calculate a respective need value corresponding to an amount of data stored in a buffer of the resource consumer relative to a total amount of data that may be stored in the buffer. A concurrency arbitrator may grant access to the cost-constrained resource to a given resource consumer of the plurality of resource consumers based on need values received by the concurrency arbitrator from the plurality of resource consumers. Additionally, or in the alternative, the concurrency arbitrator may grant access to the cost-constrained resource to a given resource consumer based on an amount of data stored in a buffer of the cost-constrained resource that is to be transferred to the given resource consumer. | 10-22-2009 |
20090271546 | Apparatus and method to set a communication speed for a SAS/SATA distance extender - A method to set a communication speed in a Serial-Attached Small Computer System Interface (“SAS”)/Serial-ATA (“SATA”) distance extender apparatus comprising a plurality of supported communication speeds and a local communication speed, a fibre channel interface, a memory, a processor, and a communication bus interconnecting the SAS/SATA Interface, the Fibre Channel interface, the memory, and the processor. The method detects traffic received by the Fibre Channel interface, and determines if the traffic comprises a SAS/SATA Open Address frame If the traffic comprises a SAS/SATA Open Address frame, the method then determines if the local communication speed matches a communication speed utilized by an interconnected remote SAS/SATA Interface. If the local communication speed matches a communication speed utilized by an interconnected remote SAS/SATA Interface, the method transmits the traffic using the local SAS/SATA Interface. | 10-29-2009 |
20090300236 | MEMORY DEVICE COMMUNICATING WITH A HOST AT DIFFERENT SPEEDS AND MANAGING ACCESS TO SHARED MEMORY - A memory device includes a high speed port, a low speed port, at least a first memory bank, a first register, and a multiplexer. The at least first memory bank is shared by the high speed port and the low speed port. The first register store information that indicates which one of the ports has permission to access the first memory bank. The multiplexer connects one of the high speed port or the low speed port to the first memory bank, in response to the information stored in the first register. | 12-03-2009 |
20100082859 | DISPLAYPORT I2C SPEED CONTROL - Circuits, methods, and apparatus that allow a DisplayPort compatible host device to control data transactions over an I | 04-01-2010 |
20110066772 | CONTROLLING ACCESS TO DIGITAL CONTENT - Method for utilizing digital content is provided. The method includes controlling a throughput rate for utilizing the digital content by an accessing system, where the throughput rate is associated with information related to the digital content and is stored as a file. The throughput rate is controlled by a storage system that is operationally coupled to the accessing system. | 03-17-2011 |
20110179201 | USB Hub Apparatus Supporting Multiple High Speed Devices and a Single Super Speed Device - Hub apparatus that supports multiple high speed devices and a super speed device. The hub apparatus may include at least one upstream port for coupling to a host device and at least one downstream port for coupling to at least one downstream device. The hub apparatus may further include an embedded device as well as an internal hub coupled to the upstream port, the embedded device, and the at least one downstream port. The internal hub may be configured to provide a connection between the host device and the embedded device at a first speed (e.g., USB high speed). However, when supported by the host device, the embedded device may communicate with the host device at a higher speed than the first speed (e.g., USB super speed), e.g., without using the internal hub. | 07-21-2011 |
20120066417 | SYNCHRONISATION AND TRIGGER DISTRIBUTION ACROSS INSTRUMENTATION NETWORKS - A system for synchronising the operation of a measurement instrument having a microcontroller, a local oscillator and function circuitry to an external timebase is provided. The system includes a USB Host Controller; an interrupt generator adapted to respond to ITPs by generating respective interrupts and passing the interrupts to the microcontroller; and a timer for measuring an interval between receptions of the ITPs in a time domain of the local oscillator. | 03-15-2012 |
20120089755 | Method of adjusting transfer speed after initialization of SATA interface - In a method of adjusting transfer speed after initialization of a SATA interface, a SATA link device transmits a first predetermined primitive to a SATA link partner for requesting to change a first transfer speed of the SATA link device from a first speed to a second speed, the SATA link partner replies to the SATA link device with a second predetermined primitive according to the first predetermined primitive, and the SATA link device and the SATA link partner respectively adjust the first transfer speed of the SATA link device and a second transfer speed of the SATA link partner according to the second predetermined primitive. | 04-12-2012 |
20120246357 | HOST COMPUTER, COMPUTER TERMINAL, AND CARD ACCESS METHOD - According to one embodiment, the host controller includes a transmission circuit that encodes transmission data, according to a serial transfer format, a reception circuit that decodes received data, according to the serial transfer format, a variable frequency clock generator that generates a card clock and a transfer clock, a card clock output unit that outputs the card clock to the memory card, an interface unit that includes both a transmission interface that transfers the transmission data from the transmission circuit to the memory card in synchronization with the transfer clock and a reception interface that transfers received data from the memory card to the reception circuit in synchronization with the transfer clock, and a setting register circuit that holds setting information for an input/output method of the memory card, and controls frequency of the transfer clock generated by the variable frequency clock generator, based on the setting information. | 09-27-2012 |
20130042033 | INTERFACE DEVICE FOR INPUT DEVICE - An interface device for input device includes a motherboard, a connector, a first video graphics array (VGA) interface electronically connected to motherboard, a second VGA interface electronically connected with the first VGA interface and a display. The connector is positioned on the display and electronically connected to the second VGA interface. The motherboard controls the connector via the first VGA interface and the second VGA interface to communicate with an input device mated with the connector. | 02-14-2013 |
20130080665 | SYSTEM AND METHOD FOR TRANSMITTING USB DATA OVER A DISPLAYPORT TRANSMISSION LINK - A data transmission system is provided. The data transmission system includes a source device having a source device controller and a register and a sink device having a sink device controller. The data transmission system also includes a transmission link coupling the source device and the sink device. The transmission link includes a unidirectional main line having a plurality of main link channels, a bidirectional auxiliary line configured to transmit data between the source device and the sink device at a first data rate, and a unidirectional interrupt line. The transmission link is configured to transmit data from the source device to the sink device over one of the main link lines at a second data rate and to transmit data from the sink device to the source device over the auxiliary line at the second data rate. The transmission link may comply with the DisplayPort standard, and the data may be transmitted in accordance with the USB standard. | 03-28-2013 |
20130159569 | METHODS AND DEVICES FOR SYNCHRONIZING TO A REMOTELY GENERATED TIME BASE - Devices and methods for generating timing signals at a rate that matches a rate of remotely generated timing signals are provided. In some embodiments, a host generates timing signals in accordance with a USB specification, such as keep-alives, start-of-frame packets, or ITPs. An upstream facing port transmits the timing signals over a network to a downstream facing port. The downstream facing port generates and transmits timing signals to a USB device at a predetermined rate, and alters the predetermined rate based on an analysis of the rate at which timing signals are received from the upstream facing port. | 06-20-2013 |
20140143459 | MOBILE DEVICE AND USB HUB - A mobile device includes a first function, a second function and a first universal serial bus (USB) port. The first function and the second function are respectively associated with a first host controller driver and a second host controller driver in a host. A composite USB cable connects the first host controller driver and at least a second host controller driver of the host and the mobile device and simultaneously provides a USB interconnection to the first and second functions therethrough depending upon whether a first USB identifier (ID) of the first function and a second USB ID of the second function are identical to each other. | 05-22-2014 |
20150347330 | THERMAL MITIGATION USING SELECTIVE I/O THROTTLING - A method and apparatus of a device that manages a thermal profile of a device by selectively throttling input/output operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilize storage of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first bandwidth range for the low priority process and maintains a second bandwidth range for the high priority process. The device further processes a storage request of the low priority process using the first bandwidth range and processing a storage request of the high priority process using the second bandwidth range. | 12-03-2015 |