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ELECTRICAL HYBRID CALCULATING COMPUTER

Subclass of:

708 - Electrical computers: arithmetic processing and calculating

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
708001000ELECTRICAL HYBRID CALCULATING COMPUTER11
20120215821SYSTEMS, DEVICES, AND METHODS FOR SOLVING COMPUTATIONAL PROBLEMS - Systems, devices, and methods for using an analog processor to solve computational problems. A digital processor is configured to track computational problem processing requests received from a plurality of different users, and to track at least one of a status and a processing cost for each of the computational problem processing requests. An analog processor, for example a quantum processor, is operable to assist in producing one or more solutions to computational problems identified by the computational problem processing requests via a physical evolution.08-23-2012
20120303688Fast Filter Calibration Apparatus - A fast filter calibration system comprises a multi clock generator, an analog filter comprising a variable capacitor and a fast calibration apparatus. The fast calibration apparatus further comprises a phase comparator, a frequency detector and a fast calibration unit. The fast calibration unit stores a binary code corresponding to a bandwidth frequency of a filter and initiates a fast filter calibration by calibrating the filter from a binary code close to a guaranteed-by-design binary code for the bandwidth frequency to be calibrated.11-29-2012
708003000 Particular function performed 9
20090013018Automatic calculation with multiple editable fields - A simplified transaction data management system using automatic calculation with multiple editable fields is provided. The system enables a user to manage transactions with a simplified interface, with multiple editable fields and automatic calculation of other fields based on mathematical relations with inputs that are received in any of the other editable fields. For example, either net amounts subject to a tax or gross amounts including the tax may be entered for a transaction, and the other value is automatically computed and displayed. Either value may subsequently be re-entered, and the other value may again automatically be computed and displayed, replacing the earlier input and output.01-08-2009
20110099213System And Method For Processing A Signal With A Filter Employing FIR And IIR Elements - A system and method for processing a signal with a filter employing FIR and/or IIR elements. The required controller function is decomposed into primary FIR and/or IIR elements and a compensation filter is provided to address the latency in the primary elements, which would result in undesired operation of the filter. Several configurations of suitable filters are discussed, including multi-rate filters and filters with reduced power requirements.04-28-2011
20110282924Channel Select Filter Apparatus and Method - Channel select filter circuits are described. One circuit implements a multiplying element and digital-to-analog converter as a differential current mode device. Another circuit implementing a multiplying element and digital-to-analog converter with weighted addition, deferred after multiplication of the digital-to-analog converter and multiplier combination. In one such circuit, substantially equal current source magnitudes are in different columns of the circuit. Another such circuit, with substantially equal current source magnitudes, uses non-radix2. Another such circuit, with substantially equal current source magnitudes, has partial segmentation. Another circuit implements a multiplying element and digital-to-analog converter, with partial segmentation, scrambling bit allocation for elements. One such circuit scrambles bit allocation on equally weighted segments, as described herein. Another circuit implements a multiplying element and digital-to-analog converter with selective enablement of duplicate current source devices. Another circuit implements a multiplying element and digital-to-analog converter with variable effective length of the digital-to-analog converter. In one such circuit one or more current sources of a multiplier element are deselected to remove a noise contribution of the multiplier element, as described herein. A complex filter circuit includes a pair of real finite impulse response filter circuits performing addition and subtraction in current domain, sharing a common resistor network to perform weighted addition. One such circuit further includes a second pair of real finite impulse response filter circuits performing addition and subtraction in current domain, sharing a second common resistor network to perform weighted addition.11-17-2011
708004000 Evaluation of trigonometric function 2
20080243971METHOD AND APPARATUS FOR CALCULATING AN SSD AND ENCODING A VIDEO SIGNAL - The present invention relates to a method and apparatus for calculating the Sum of Squared Differences (SSD) between a source block and a reconstructed block of image or video data encoding according to an encoding scheme such as H.264/AVC. In a preferred embodiment, the method computes the SSD by finding the SSD between coefficients of an integer transformed residual block and the corresponding inverse-quantized coefficients. Preferably the inverse quantized coefficients are found with the aid of a look up table. This method may save computing time and processing power compared to calculating the SSD directly from the source and reconstructed blocks. The SSD is related to the distortion caused by encoding and the method may be used in calculating the rate-distortion of a particular encoding mode. One embodiment of the invention encodes a block of data by selecting the encoding mode with the least rate-distortion.10-02-2008
20110225218LOW-RATE SAMPLING OF PULSE STREAMS - A method includes accepting an analog input signal that includes a sequence of pulses. The analog input signal is filtered so as to produce a filter output, using a filter whose time-domain response is confined to a finite time period and whose frequency-domain response is non-zero at a finite set of integer multiples of a frequency shift Δω, and is zero at all other integer multiples of Δω. The filter output is sampled so as to produce digital samples. Respective amplitudes and time positions of the pulses in the sequence are calculated based on the digital samples.09-15-2011
708005000 Correlation, convolution, or transformation 3
20080201394Computer Technical Solution Of The Digital Engineering Method Of Hybrid Numeral Carry System And Carry Line - The present invention relates to the digital engineering method and the field of computer, and it puts forward a new digital engineering method which can remarkably increase the computation speed and greatly reduce the error rate of written calculation. The present invention uses the “method of hybrid numeral carry system and carry line”, in which K common Q-ary numerals that participate in the computation of addition and subtraction are transformed into K or 2K numerals of hybrid numeral carry system, then said K or 2K numerals are added for the sum in the hybrid numeral carry system. “Adding by place” is performed from the lowest place or at each place at the same time, and the number of the sum is written into the next computation layer; meanwhile, the obtained “hybrid numeral carry” is put into the next computation layer or at the empty place or zero place of the adjacent high place of any data line that has not undergone the computation in the present computation layer. Such computation is repeated until only one numeral is obtained after the computation in the computation layer. Then the finally obtained numeral is the sum of the addition in the hybrid numeral carry system. The present invention also provides a computer technical solution of hybrid numeral carry system and carry line.08-21-2008
20110131260EFFICIENT DETECTION ALGORITHM SYSTEM FOR A BROAD CLASS OF SIGNALS USING HIGHER-ORDER STATISTICS IN TIME AS WELL AS FREQUENCY DOMAINS - An algorithm system to detect a broad class of signals in Gaussian noise using higher-order statistics. The algorithm system detects a number of different signal types. The signals may be in the base-band or the pass-band, single-carrier or multi-carrier, frequency hopping or non-hopping, broad-pulse or narrow-pulse etc. In a typical setting this algorithm system provides an error rate of 3/100 at a signal to noise ratio of 0 dB. This algorithm system gives the time frequency detection ratio that may be used to determine if the detected signal falls in Class Single-Carrier of Class Multi-Carrier. Additionally this algorithm system may be used for a number of different applications such as multiple signal identification, finding the basis functions of the received signal and the like.06-02-2011
20110184999Linear Transformation Circuit - A first device includes a linear transformation circuit to implement multiplication by a matrix D. The linear transformation circuit as an input to receive a vector having N digital values and an output to output N first output signals. The linear transformation circuit optionally includes a sign-adjustment circuit to adjust signs of a subset including at least M of the N first output signals in accordance with a set of coefficients H. The linear transformation circuit includes a digital-to-analog conversion (DAC) circuit coupled to the output of the sign-adjustment circuit. Outputs from the DAC circuit are summed to produce an output.07-28-2011
708008000 Function generation 1
20080320063Transacting accesses via unmanaged pointers - Various technologies and techniques are disclosed for transacting accesses via unmanaged pointers in a transactional memory system. A transactional memory system is provided. Source code is analyzed to identify operations that create unmanaged pointers. Information is tracked about the targets of unmanaged pointer values in pointer variables. The target information is used to determine how accesses through an unmanaged pointer argument are to be transacted. When an unmanaged pointer is created, a descriptor of the target with the resulting pointer value is associated with the location. Within the method that creates the unmanaged pointer, the target can be identified using the descriptor, thereby enabling accesses to be transacted. When an unmanaged pointer is being passed as an argument, a descriptor is also passed as an argument to allow the unmanaged pointer target to be identified.12-25-2008

Patent applications in all subclasses ELECTRICAL HYBRID CALCULATING COMPUTER

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