| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 455341000 | Amplifier | 48 |
| 20080214139 | Multistage Resonant Amplifier System and Method - A radio-frequency receiver for, e.g., receiving GPS signals in a cellular telephone has an input, a first gain stage in the form of a linear low noise amplifier with voltage-voltage feedback and a resonant load, and a second gain stage based on a common source input transconductor. Associated with the input and the first gain stage is a filter comprising a notch filter part for rejecting an interfering signal, e.g. a cell phone transmitter signal, and, connected between the parallel resonant circuit and the input, a series capacitance which, in combination with the inductor of the parallel-resonant circuit, forms a series-resonant circuit to provide a low impedance path at a wanted signal frequency. | 09-04-2008 |
| 20080227424 | Methods and apparatus to perform radio frequency (RF) analog-to-digital conversion - Methods and apparatus to perform radio frequency (RF) analog-to-digital conversion are described. According to one example, a receiver includes an amplifier to amplify received analog RF signals and a mixer-free circuit for converting the received analog RF signals to digital signals. | 09-18-2008 |
| 20080268807 | Audio Communication Unit and Integrated Circuit - An audio communication unit comprises a receiver for receiving an audio signal, a sigma-delta modulator operably coupled to the receiver and arranged to modulate the received audio signal, and a class-D amplifier stage operably coupled to the sigma-delta modulator and arranged to amplify the modulated received audio signal. One or more feedback path(s) is/are arranged from an output of the class-D amplifier stage to the sigma-delta modulator. The provision of one or more feedback path(s) from the output of the class-D audio amplifier to the sigma-delta modulator facilitates smaller die size; higher power efficiency and power supply rejection ratio/intermodulation cancellation performance. | 10-30-2008 |
| 20080274714 | AMPLIFIER, FILTER USING THE SAME, AND RADIO COMMUNICATION DEVICE - An amplifier includes an amplification unit which amplify a first difference between first and second input signals, a second difference between second and third input signals and a third difference between third and first input signals by a differential mode gain, and amplify an average of the first, second and third input signal by a common mode gain, for outputting a first output signal corresponding to a sum of the amplified first difference and the amplified average, a second output signal corresponding to a sum of the amplified second difference and the amplified average, and a third output signal corresponding to a sum of the amplified third difference and amplified average; first, second; and a reduction circuit which reduces the common mode gain less than the differential mode gain. | 11-06-2008 |
| 20080287090 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10Ω or so, for example, the resistor is set to about a few Ω to about 100Ω. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed. | 11-20-2008 |
| 20090075623 | APPARATUS AND METHOD FOR LOW-NOISE AMPLIFICATION IN A WIRELESS COMMUNICATION SYSTEM - A low-noise amplification apparatus and method in a receiver in a wireless communication system are provided, in which a main amplifier amplifies a received signal, a sub-amplifier amplifies a third-order harmonic component more strongly than a signal component in the received signal and cancels the third-order harmonic component by combining the amplified signal with the signal received from the main amplifier. A noise eliminator amplifies noise included in the received signal and eliminates the noise by combining the amplified noise with the signal received from the main amplifier or the signal received from the sub-amplifier. | 03-19-2009 |
| 20090088124 | Radio Frequency Receiver Architecture - A receiver includes a common-gate low noise amplifier (LNA) configured to receive an RF input signal and produce an amplified RF signal. A down-converting passive mixer is configured to mix the amplified received RF input signal with a local oscillator signal generated by a local oscillator to generate a down-converted amplified signal. An amplifier is configured to amplify the down-converted signal and has an input impedances in on the order of ohms. Only a single LNA may be required to receive RF inputs in all frequency bands of a multi-band communication standard. | 04-02-2009 |
| 20090124230 | SYSTEM AND METHOD FOR DECODING RDS/RBDS DATA - A method performed by a receiver is provided. The method includes generating an RDS/RBDS candidate codeword from a set of RDS/RBDS symbols where the RDS/RBDS candidate codeword has a subset of RDS/RBDS values that differs from corresponding subsets of RDS/RBDS values in all other possible RDS/RBDS codewords and determining whether the RDS/RBDS candidate codeword meets an acceptance criterion by comparing a first subset of reliability values determined from the set of RDS/RBDS symbols and having signs that differ from corresponding signs in the subset of RDS/RBDS values with a second subset of reliability values determined from the set of RDS/RBDS symbols and mutually exclusive with the first subset of the reliability values. A first number of values in the first and the second subsets of reliability values is less than a second number of values in the RDS/RBDS candidate codeword. | 05-14-2009 |
| 20090149151 | Quadrature Pulse-Width Modulation Methods and Apparatus - Switched-mode amplifiers and devices having such amplifiers include quadrature pulse-width modulation that is based on Cartesian (as opposed to polar) coordinates. Two sets of pulses that represent respective in-phase and quadrature components of a conventional cartesian-coordinates input signal can be combined such that the combined set of pulses can be provided to a switched-mode amplifier without nonlinear cartesian-to-polar transformation and its associated wider internal bandwidth and other problems. | 06-11-2009 |
| 20090176472 | POWER SUPPLY ADAPTER AND POWER SUPPLY SYSTEM - Disclosed herein is a power supply adapter for supplying DC power to a broadcast receiver that processes a broadcast signal. The power supply adapter includes: a converter configured to generate the DC power from AC power; a broadcast signal reception section configured to receive the broadcast signal; a mixer configured to mix the broadcast signal received by the broadcast signal reception section with an output from the converter; and a supply section configured to supply an output from the mixer to the broadcast receiver. | 07-09-2009 |
| 20090186592 | RADIO RECEIVER AND RECEIVING SEMICONDUCTOR INTEGRATED CIRCUIT - A first-stage amplifier of an AM receiving circuit is built into an IC | 07-23-2009 |
| 20090191838 | MODE-SWITCHING LOW-NOISE AMPLIFIER AND WIDE-BAND RF RECEIVER - A mode-switching LNA generally includes an input unit, an output unit and a bias voltage generator. The input unit amplifies an input signal to generate an amplified signal. The output unit receives the amplified signal from the input unit and operates either in an oscillation mode or in an amplification mode in response to a control signal to generate an output signal having a center frequency equal to a target frequency. The control signal indicates whether the center frequency of the output signal is the same as the target frequency. The bias voltage generator provides an input bias voltage to the input unit in response to the control signal, where the input bias voltage includes a first bias voltage in the amplification mode and a second bias voltage in the oscillation mode. | 07-30-2009 |
| 20090203348 | RECEIVER AND ELECTRONIC APPARATUS INCLUDING THE SAME - A receiver includes a first receiving section, a second receiving section, and a controller. A controller is operable to switch between a diversity receiving mode in which both of the first receiving section and the second receiving section are activated and a single receiving mode in which the first receiving section is activated while the second receiving section is deactivated. The controller allows the first mixer to heterodyne the signal output from the first RF amplifier with using the second oscillation signal and output the heterodyned signal in the first single receiving mode. | 08-13-2009 |
| 20100035573 | RF RECEIVER WITH OSCILLATION BASED BLOCKER - A radio frequency (RF) receiver includes an amplifier stage, a blocking module, and a down conversion module. The amplifier stage amplifies an inbound RF signal (includes a desired component and a blocking component) to produce an amplified inbound RF signal. The blocking module generates an oscillation corresponding to a frequency of the blocking component and filters the amplified inbound RF signal based on the oscillation to substantially attenuate the blocking component and to pass, substantially unattenuated, the desired component. The down conversion module converts the desired RF signal component into a baseband or near baseband inbound signal. | 02-11-2010 |
| 20100056097 | LOW POWER RADIO FREQUENCY RECEIVER - The invention relates to a low power radio frequency receiver which comprises: (a) an antenna for receiving a first radio frequency signal; (b) a radio frequency amplifier for amplifying the first radio frequency signal received by said antenna; (c) an oscillator for generating a second radio frequency signal having a predefined frequency and a predefined duty cycle to be mixed with said first radio frequency signal received by said antenna; (d) a mixer for mixing the first amplified radio frequency signal with second radio frequency signals and generating a third radio frequency signal; (e) an intermediate frequency filter for passing one or more intermediate frequencies of said third radio frequency signal and attenuating other frequencies of said third signal that are lower or higher than its cutoff frequencies, characterized in that it further comprises: (f) one or more switches for periodically and synchronously switching ON and OFF one or more of said radio frequency amplifier, said oscillator, and said mixer, said switches controlled by means of a control signal having a frequency that is higher than the frequency of data embedded within said first radio frequency signal; and (g) a control unit located within said radio frequency receiver for providing said control signal, wherein each of said switches is connected to a corresponding capacitor within said radio frequency amplifier, or oscillator, or mixer, said capacitor storing an operating point of said radio frequency amplifier, or oscillator, or mixer when said radio frequency amplifier, or oscillator, or mixer is switched OFF. | 03-04-2010 |
| 20100081410 | RADIO FREQUENCY CIRCUIT, RADIO FREQUENCY POWER AMPLIFIER, AND SEMICONDUCTOR DEVICE - A radio frequency circuit according to the present invention, is a radio frequency circuit for amplifying a radio frequency signal, the radio frequency circuit comprising: an amplifier circuit for amplifying the radio frequency signal and outputting an amplified signal obtained by the amplification of the radio frequency signal; a load circuit connected to an output of the amplifier circuit; a plurality of transmission lines; a selection circuit for selecting a transmission line among the plurality of transmission lines in accordance with a predetermined parameter of the amplified signal so as to connect the selected transmission line to an output of the load circuit; and a conversion circuit for converting, into a predetermined load impedance, a load impedance looking from the amplifier circuit toward an output side of the amplifier circuit, the conversion being performed in the transmission line selected by the selection circuit. | 04-01-2010 |
| 20100120391 | INPUT STAGE FOR AN AMPLIFIER - In one embodiment, the present invention includes an amplifier having an input to receive a radio frequency (RF) signal from an output node of a source. An input stage coupled to the amplifier input may include one or more components to aid in processing of incoming signals. One such component coupled between the source and the input of the amplifier is a coupling capacitor used to maintain a bias voltage of the amplifier at a different potential than a DC voltage of the output node. In certain applications, the amplifier and the coupling capacitor may be integrated on a single substrate. | 05-13-2010 |
| 20100167685 | DISCRETE TIME RECEIVER - A discrete time receiver includes a low noise transconductance amplifier (LNTA), a discrete time sampler, a passive discrete time circuit, and a switched capacitor amplifier. The LNTA amplifies a received RF signal and provides an amplified RF signal. The discrete time sampler samples the amplified RF signal (e.g., with multiple phases of a sampling clock) and provides first analog samples. The passive discrete time circuit decimates and filters the first analog samples and provides second analog samples. The switched capacitor amplifier amplifies the second analog samples and provides third analog samples. The discrete time receiver may further include a second passive discrete time circuit, a second switched capacitor amplifier, and an analog-to-digital converter (ADC) that digitizes baseband analog samples and provides digital samples. The discrete time receiver can flexibly support different system bandwidths and center frequencies. | 07-01-2010 |
| 20100240336 | Front end and high frequency receiver having quadrature low noise amplifier - A front end and a high frequency receiver ( | 09-23-2010 |
| 20100248676 | SEMICONDUCTOR DEVICE - A semiconductor device includes a p-type semiconductor layer and an n-type semiconductor layer that are joined by sandwiching a depletion layer with a thickness that allows transmission of a plurality of electrons and holes by direct-tunneling. | 09-30-2010 |
| 20110034143 | METHOD AND CIRCUIT FOR A FAST REDUCTION IN VOLTAGE OF A DC COMPONENT AND LOW-FREQUENCY COMPONENTS AT A MIXING CIRCUIT OUTPUT IN A RECEIVER OF A UHF TRANSCEIVER - A difference between an output current signal (mos) of the mixing circuit (MC) and a current from a controlled current source (CCS) is conducted to an input of an operational amplifier (A). A control voltage (cv) for said current source is a voltage at the output of the operational amplifier (A) being filtered by a low-pass filter, whose limiting frequency equals a low frequency limit of the modulation signal in the received signal (rs). The method is speeded up in that the limiting frequency of the low-pass filter is increased by two to three orders of magnitude at the beginning and is gradually lowered to said value. A rather short time duration of the transient process is achieved so that the working point with a low voltage of the DC component and low-frequency components is set at least five times faster than so far. | 02-10-2011 |
| 20110070859 | LOW NOISE AMPLIFIER AND RADIO FREQUENCY SIGNAL RECEIVER - The invention provides a low noise amplifier. The low noise amplifier includes a first transistor, a second transistor, and a first resistor. The first transistor has a gate to receiving a radio frequency input signal, wherein the source of the first transistor is coupled to a ground voltage. The second transistor has a drain to output a radio frequency output signal, wherein the gate of the second transistor is coupled to a first reference voltage. The first resistor is coupled between the drain of the first transistor and the source of the second transistor. | 03-24-2011 |
| 20110092180 | Transconductance Enhanced RF Front-End - Embodiments of an RF receiver front-end are presented herein. In an embodiment, the RF receiver front-end comprises a transconductance LNA, a passive mixer, and a g | 04-21-2011 |
| 20110092181 | Electromagnetic Field Detection Systems and Methods - Detectors and other apparatus for determining the presence of electromagnetic events are disclosed. One such system includes an electromagnetically shielded enclosure and a detector configured to detect an electromagnetic field event occurring in the proximity of the enclosure. The detector includes an antenna and a circuit electrically connected to the antenna. The circuit includes electronics communicatively connected to the antenna via a direct current isolation circuit, and an equalizer compensating for the differentiating frequency response of the antenna. The circuit also includes a logarithmic amplifier electrically connected to the equalizer and configured to generate a range of signals based on signals received at the antenna, and a peak detector receiving signals from the logarithmic amplifier and configured to capture a peak value of the signals. An electromagnetic field event is detected at least in part based on the peak signal value. | 04-21-2011 |
| 20110217945 | DUAL CARRIER AMPLIFIER CIRCUITS AND METHODS - In one embodiment, the present disclosure includes a circuit comprising first and second transconductance stages that receive an RF signal and a current combiner circuit. The current combiner circuit couples current from the first transconductance stage to (i) one of a first output path or a second output path or (ii) both the first output path and second output path. The current combiner circuit decouples current from the second transconductance stage from both the first output path and second output path when the first transconductance stage couples current to one of the first output path or the second output path. The current combiner circuit couples current from the second transconductance stage to both the first output path and the second output path when the first transconductance stage couples current to both the first output path and the second output path. | 09-08-2011 |
| 20110230158 | Partitioned radio-frequency apparatus and associated methods - Radio-frequency (RF) apparatus includes receiver analog circuitry that receives an RF signal and provides at least one digital signal to receiver digital circuitry that functions in cooperation with the receiver analog circuitry. The receiver analog circuitry and the receiver digital circuitry are partitioned so that interference effects between the receiver analog circuitry and the receiver digital circuitry tend to be reduced. | 09-22-2011 |
| 20120021713 | Concurrent impedance and noise matching transconductance amplifier and receiver implementing same - According to one embodiment, a concurrent impedance and noise matching transconductance amplifier designed for implementation in a receiver comprises an input device configured to couple to a matching network of the receiver, and a boost capacitor connected to the input device to increase an input capacitance of the transconductance amplifier. The boost capacitor is selected to substantially minimize the receiver noise and to enable the concurrent impedance and noise matching of the receiver and the matching network. In one embodiment, the receiver comprises the transconductance amplifier to provide an amplified receive signal, and a mixer to produce a down-converted signal corresponding to the amplified receive signal, wherein the mixer is coupled to the transconductance amplifier by a blocking capacitor. The blocking capacitor is selected to substantially increase an amplitude ratio of the down-converted signal to the amplified receive signal to substantially increase the front-end gain of the receiver. | 01-26-2012 |
| 20120034895 | Circuit and Method for Peak Detection with Hysteresis - In a communication system, the signal received or transmitted is required to be maintained within a range for proper operation. For example, a radio frequency signal received from an antenna is usually amplified by a low-noise amplifier (LNA) with adjustable gain. The input RF signal is properly amplified by the LNA further processing by subsequently receive path of the receiver. A peak detector may be used to detect the peak amplitude of the amplified input and provides a proper gain for the LNA. The detected peak amplitude may be affected by the noises which may inadvertently cause the gain control to fluctuate randomly. In order to avoid the above issues, some hysteresis has to be built into the peak detection so that the gain control will not be so sensitive to the noise. The present invention discloses a system and method for peak detection with accurate hysteresis. The peak detection uses a high threshold path and a low threshold path to derive the high and low thresholds for gain control with hysteresis. The high threshold path and the low threshold path use pre-amplifiers with different gain factors to amplify low level signals to overcome the non-linearity issue of input-output transfer characteristic of the peak detectors and consequently results in a peak detection system with accurate hysteresis. | 02-09-2012 |
| 20120064852 | LOW NOISE AMPLIFIER HAVING BOTH ULTRA-HIGH LINEARITY AND LOW NOISE CHARACTERISTIC AND RADIO RECEIVER INCLUDING THE SAME - Disclosed herein is a low noise amplifier having both ultra-high linearity and a low noise characteristic and a radio receiver including the low noise amplifier. The low noise amplifier includes a first main transistor unit, a first auxiliary transistor unit, and an optimum noise and input impedance matching capacitor. The first main transistor unit includes a first NMOS transistor and a first PMOS transistor configured to form a complementary common source amplifier, a feedback-type resistor connected between drains of the first NMOS transistor and the first PMOS transistor and configured to generate biases to the two transistors, and bias resistors connected to bodies of the first PMOS transistor and the first NMOS transistor. The first auxiliary transistor unit includes transistors connected to the two transistors. The optimum noise and input impedance matching capacitor is connected to output terminals of the first main transistor unit and the first auxiliary transistor unit. | 03-15-2012 |
| 20120077453 | REDUCING NON-LINEARITIES IN A DIFFERENTIAL RECEIVER PATH PRIOR TO A MIXER USING CALIBRATION - A receiver for a wireless device is described. The receiver includes a low noise amplifier that includes differential inputs. The receiver also includes a mixer coupled to the low noise amplifier. The receiver further includes second-order intermodulation reduction circuitry coupled to a stage subsequent to the low noise amplifier. The second-order intermodulation reduction circuitry provides a biasing of the differential inputs. | 03-29-2012 |
| 20120178400 | AMPLIFIERS AND RELATED RECEIVER SYSTEMS - Apparatus are provided for amplifier circuits and related receiver systems. An amplifier circuit includes a first common-source amplification stage and a second common-source amplification stage. The input of the second common-source amplification stage is coupled to the output of the first common-source amplification stage such that the first common-source amplification stage generates a first amplified signal, and the second common-source amplification stage generates a second amplified signal based on the first amplified signal. The first common-source amplification stage is coupled to a first node and the second common-source amplification stage is coupled to a second node, wherein the common-source amplification stages are configured such that a current between the first node and the second node flows in series through the common-source amplification stages. | 07-12-2012 |
| 20120178401 | SYSTEM INCLUDING RECEIVER FRONT ENDS - An integrated circuit chip includes an output node, receiver front ends, and control logic. The receiver front ends are configured to receive an input signal. Each of the receiver front ends is configured to receive the input signal and provide an output signal at the output node. At least one of the receiver front ends is configured to selectively consume less power. The control logic is configured to select the number of receiver front ends providing an output signal to the output node based on a received signal strength indication. | 07-12-2012 |
| 20120196555 | SEMICONDUCTOR INTEGRATED CIRCUIT AND OPERATION METHOD OF THE SAME - The present invention is provided to shorten the period of DC offset cancellation operation. One of terminals of two calibration resistors is connected to the differential output terminals of an active low pass filter having a filter process and an amplification function, and two input terminals of a voltage comparator and two terminals of a switch are connected to the other terminal of the two calibration resistors. In a calculation period of calculating digital control signals for reducing DC offset voltage, the voltage comparator detects calibration voltage depending on a voltage drop of one of the calibration resistors caused by analog current of a digital-to-analog converter. In a calibration period of reducing the DC offset voltage, the calibration analog current of the digital-to-analog converter responding to the digital control signal is passed to the input side of the filter via the switch. | 08-02-2012 |
| 20120202445 | RECEIVER - A receiver comprising: an antenna for receiving signals in a plurality of frequency bands; an integrated circuit including a plurality of amplifiers, wherein each of the plurality of amplifiers is configured to amplify signals in one of the plurality of frequency bands; and a plurality of selectable receive paths, each of the plurality of selectable receive paths connecting an output of the antenna to an input of one of the plurality of amplifiers and including a resonant circuit. | 08-09-2012 |
| 20120208484 | OPTIMIZED AUTOMATED TEST EQUIPMENT MULTI-PATH RECEIVER CONCEPT - A multi-path receiver for automated test equipment. The multi-path receiver includes an input for receiving low-power signals and high-power signals. The high-power signals have signal amplitude higher than the low-power signals. The multi-path receiver further comprises an output for outputting a received signal, a first path for transmitting a received high-power signal from the input to the output and a second path for transmitting a received low-power signal from the input to the output. The second path comprises an amplifier. A first switch is provided for switching a received high-power signal to the first path and for switching a received low-power signal to the second path. A high-power amplifier is also connected between the input and the first switch for amplifying the received signal independent of its input power before it is switched with the first path or the second path. | 08-16-2012 |
| 20120220255 | LOW NOISE AMPLIFIER (LNA) SUITABLE FOR USE IN DIFFERENT TRANSMISSION ENVIRONMENTS AND RECEIVER USING SUCH AN LNA - A low-noise amplifier includes first and second transconductance paths and first and second variable capacitive dividers. The first transconductance path has a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal. The second transconductance path has a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal. The first variable capacitive divider has a first terminal for receiving the first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to the control terminal of the second transconductance path. The second variable capacitive divider has a first terminal for receiving the second input signal, a second terminal coupled to the reference voltage terminal, and an intermediate terminal coupled to the control terminal of the first transconductance path. | 08-30-2012 |
| 20120231756 | RECEIVING APPARATUS - A receiving apparatus includes a variable gain unit to change between a first gain and a smaller second gain, and to amplify a received signal to obtain an amplified signal; a comparator to compare a power of the amplified signal with a reference value; and a controller to set a gain to the first gain while in a standby state, to reset a gain to a third gain between the first and second gains if in a standby state the power of the received signal is larger than the reference value, and then to set a gain to the first gain and return to the standby state if the power is equal to or lower than the reference value, or if not, to a fourth gain between the first and third gains. | 09-13-2012 |
| 20120264391 | RF-Demodulator, Calibration Circuitry and Methods for Calibrating an RF-Demodulator - An RF-demodulator includes an RF-input, a demodulator output, a mixing and amplification stage coupled between the RF-input and the demodulator output, and a calibration circuitry. The calibration circuitry is configured to apply a calibration input signal at the RF-input and sense a resulting calibration output signal at the demodulator output to derive a gain of the mixing and amplification stage based on the relationship between the calibration output signal and the calibration input signal. | 10-18-2012 |
| 20120309337 | MULTI-LAYER TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTOR (ADC) - A radio frequency (RF) receiver may comprise a first sampling module that is operable to sample in a first level at a particular main sampling rate; a plurality of second-level sampling modules, wherein each of the plurality of second-level sampling modules is operable to sample in a second level, an output of the first level, at a second sampling rate that is reduced compared to the main sampling rate; and a plurality of third-level modules, each comprising a plurality of third-stage sampling sub-modules that are operable to sample at a third sampling rate that is reduced compared to the second sampling rate, and a plurality of corresponding analog-to-digital conversion (ADC) sub-modules. | 12-06-2012 |
| 20120322400 | CURRENT MODE BLIXER WITH NOISE CANCELLATION - Blixers, which are a relatively recent development, have not be studied as extensively as many older circuit designs. Here, a blixer is provided that improves linearity and reduces noise over other conventional blixer designs. To accomplish this, the blixer provided here uses a differential amplifier and/or a dummy path within its mixing circuit to perform noise reduction (and improve linearity). | 12-20-2012 |
| 20130005289 | SYSTEM AND METHOD FOR HANDLING STRONG SIGNALS AND BLOCKERS IN THE RF FRONT END - An incoming RF signal can be amplified in a RF front end of a RF receiver by conveying the signal through one of a multiple amplification paths. On each path, the gain can be controlled by RF automatic gain control (AGC) circuits. Each amplification path can be designed to handle incoming signals in a designated power range and to optimize receiver performance characteristics such as the noise figure (NF) and odd harmonic linearity in that power range. Signal power can be measured at different locations of the receiver and bypass switches can be used to convey the RF signals down one of the multiple paths based on the power measurements, according to executable logical code. An incoming signal power hysteresis can be applied to stabilize the system. Further, signal power averaging and switch delaying mechanisms can be employed to stabilize the system for rapidly fluctuating signals. | 01-03-2013 |
| 20130029627 | AMPLIFIER AND ASSOCIATED RECEIVER - An amplifier receives an input signal with an input node, provides an output signal in response, and includes a main branch and an auxiliary branch. The auxiliary branch is coupled between the input node and a splitting node for input matching of the input node. The main branch, also coupled to the splitting node, has an output node of current mode, and is arranged to output the output signal at the output node. An associated receiver is also disclosed. | 01-31-2013 |
| 20130171954 | RECEIVER INCLUDING A TRACKING FILTER - A receiver includes a low noise amplifier having an input for receiving a radio frequency signal, and an output. The receiver further includes a tracking Filter having an input coupled to the output of the low noise amplifier. The tracking filter including a bandpass filter configured to pass the radio frequency signals. The bandpass filter includes a variable capacitor having a first electrode coupled to the input of the tracking filter for receiving the radio frequency signals, and a second electrode coupled to a power supply terminal. The bandpass filter further includes a transformer having a primary winding including a first terminal coupled to the first electrode of the variable capacitor and a second terminal coupled to a second power supply terminal. The transformer further includes a secondary winding. | 07-04-2013 |
| 20130316671 | Dual Mode Receiver with RF Splitter Using Programmable Passive Components - One embodiment of the present invention relates to a dual mode receiver that includes an RF splitter configured to operate in two modes, wherein in a first mode a single low noise amplifier is active to receive an RF input signal, and in a second mode two low noise amplifiers are active to receive the RF input signal. The receiver further includes a programmable degeneration component operably coupled to the RF splitter, and configured to provide a first performance characteristic in the first mode, and a second, different performance characteristic in the second mode, wherein the first and second performance characteristics influence an input impedance of the RF splitter to be substantially the same in the first and second modes. | 11-28-2013 |
| 20140155016 | RECEIVER FOR RECEIVING RF-SIGNALS IN A PLURALITY OF DIFFERENT COMMUNICATION BANDS AND TRANSCEIVER - A receiver for receiving RF-signals in a plurality of different communication bands, each communication band including a receive frequency range and a transmit frequency range includes a plurality of receiving ports, a plurality of input circuits, a first inductor and a second inductor. Each receiving port is configured to receive RF-signals in a receive frequency range of a communication band. Each input circuit is connected to an associated receiving port for processing RF-signals applied to the receiving port. The first inductor is connected to a first group of input circuits and the second inductor is connected to a second group of input circuits, wherein the first group of input circuits and the second group of input circuits are disjunct. The receiving ports associated with the first group of input circuits are configured to receive RF-signals in a first group of communication bands, wherein in the first group of communication bands, none of the transmit frequency ranges overlap with one of the receive frequency ranges. The receiving ports associated with the second group of input circuits are configured to receive RF-signals in a second group of communication bands, wherein in the second group of communication bands, none of the transmit frequency ranges overlaps with one of the receive frequency ranges. | 06-05-2014 |
| 20140256280 | DYNAMIC GAIN ASSIGNMENT IN ANALOG BASEBAND CIRCUITS - A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance. | 09-11-2014 |
| 20180027503 | HIGH-FREQUENCY SIGNAL PROCESSING APPARATUS AND WIRELESS COMMUNICATION APPARATUS | 01-25-2018 |
| 20190150100 | HIGH-FREQUENCY SIGNAL PROCESSING APPARATUS AND WIRELESS COMMUNICATION APPARATUS | 05-16-2019 |
