| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 455333000 | Transistor or integrated circuit | 33 |
| 20080207159 | RADIO FREQUENCY CIRCUIT WITH INTEGRATED ON-CHIP RADIO FREQUENCY INDUCTIVE SIGNAL COUPLER - A radio frequency (RF) circuit ( | 08-28-2008 |
| 20080220738 | Wireless communication system - A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow. | 09-11-2008 |
| 20080261552 | LOW VOLTAGE IQ DUAL MIXER - An IQ dual mixer for use in radio transmitters and receivers, comprising an in-phase (I) local oscillator transistor pair, a quadrature-phase (Q) local oscillator transistor pair, and a first radio frequency (RF) transistor. The I local oscillator transistor pair is operably coupled to receive an I local oscillator signal and connected in series with a first load pair to output an I product signal. The Q local oscillator transistor pair is operably coupled to receive a Q local oscillator signal and connected in series with a second load pair to output a Q product signal. The first RF transistor has an input terminal coupled to receive a first RF signal. The first RF transistor is coupled in anti-series with each transistor of the I and Q local oscillator transistor pairs. | 10-23-2008 |
| 20080261553 | RF input transconductor stage - A transconductor input circuit for a down converting quadrature mixer stage of a direct-conversion receiver comprises a pair of common-gate input transistors whose source electrodes are coupled to a differential radio frequency (RF) input signal outputted from an interstage RF filter. The transconductor circuit further comprises a pair of equally-sized biasing transistors for biasing the pair of common-gate input transistors. Source electrodes of the biasing transistors are coupled to the source electrodes of the transistors to sense the differential radio frequency input signal for canceling intermodulation distortion. | 10-23-2008 |
| 20080274712 | HIGH FREQUENCY SIGNAL COMBINING - A radio transceiver device includes circuitry for radiating electromagnetic signals at a very high radio frequency both through space, as well as through wave guides that are formed within a substrate material. In one embodiment, the substrate comprises a dielectric substrate formed within a board, for example, a printed circuit board. In another embodiment of the invention, the wave guide is formed within a die of an integrated circuit radio transceiver. A plurality of transceivers with different functionality is defined. Substrate transceivers are operable to transmit through the wave guides, while local transceivers are operable to produce very short range wireless transmissions through space. A third and final transceiver is a typical wireless transceiver for communication with remote (non-local to the device) transceivers. | 11-06-2008 |
| 20080280584 | MIXER USED FOR DIRECT CONVERSION RECEIVER - Provided is a mixer including a mixing unit configured to mix high frequency data signals and local oscillation (LO) signals, generate first and second low frequency data signals, and output the first and second low frequency data signals to first and second output terminals, respectively; a common mode amplification unit coupled to the mixing unit, the common mode amplification unit configured to compare a common mode voltage of the first and second low frequency data signals and a predetermined reference voltage, the common mode amplification unit further configured to output a feedback signal at a control node based on the comparison; a first load transistor coupled to the first output terminal and the control node, the first load transistor configured to provide the first output terminal with a first load current corresponding to the feedback signal; a first calibration transistor unit connected in parallel to the first load transistor in order to calibrate an input impedance of the first output terminal; and a first current mirror unit coupled to the first calibration transistor unit, the first current mirror unit configured to discharge a first calibration current that is output from the first calibration transistor unit to prevent the first calibration current from entering the first output terminal. | 11-13-2008 |
| 20080287088 | Subharmonically Pumped Mixer - The present invention relates to a sub-harmonically pumped conversion mixer arrangement comprising a transistor arrangement and transistor terminals for application of a local oscillator, LO-, signal and application of a radio frequency, RF-, signal and for extraction of a mixed intermediate frequency, IF-, signal. The transistor arrangement comprises at least one NMOS transistor and at least one PMOS transistor. The drain of said at least one NMOS transistor is interconnected with the drain of said at least one PMOS transistor, and in that the gate of said at least one PMOS transistor is interconnected with the gate of said at least one NMOS transistor. | 11-20-2008 |
| 20090023415 | SEMICONDUCTOR SWITCHING DEVICE - A semiconductor switching device includes, on one semiconductor substrate: a switching circuit configured to switch connection states between a plurality of terminals; a negative voltage generating circuit; and a control circuit connected to the switching circuit and the negative voltage generating circuit and configured to supply a control signal to the switching circuit, the control circuit including: a level shift circuit with a low-potential power supply terminal connected to the negative voltage generating circuit and an output node connected to the switching circuit, the level shift circuit being configured to supply a negative potential signal as a control signal at a low level to the switching circuit; a diode with its anode connected to the output node of the level shift circuit; and a transistor with its drain-source path connected between the cathode of the diode and ground, the drain-source path switching from a blocking state to a conducting state before the potential of the output node of the level shift circuit switches from a high level to the low level. | 01-22-2009 |
| 20090036087 | Highly Linear and Very Low-Noise Down-Conversion Mixer for Extracting Weak Signals in the Presence of Very Strong Unwanted Signals - A highly linear and very low-noise down-conversion mixer for extracting weak signals in the presence of very strong unwanted signals is disclosed. Aspects of an embodiment may include a source follower circuit in a transmitter front end of a mobile terminal. The source follower circuit may receive RF signals prior to the RF signals being amplified by a power amplifier for transmission. The RF signals may comprise in-phase and quadrature components. The source follower circuit may generate output RF voltage signals, and communicate the output RF voltage signals to a switching circuit via a coupling capacitor. The switching circuit may down-convert the communicated output RF voltage signals to generate differential baseband signals. The capacitance of the coupling capacitor may be changed to change gain and/or linearity of the differential baseband signals. Each of the differential baseband signals may be low-pass filtered to attenuate higher frequencies. | 02-05-2009 |
| 20090036088 | MULTI-MODE CELLULAR IC MEMORY MANAGEMENT - An RFIC includes first and second RF sections, first and second PHY processing modules, first and second upper layer processing modules, and memory. When the RFIC is in a first receive mode, the first RF section, the first PHY processing module, and the first upper layers processing module convert a first inbound RF signal into a first inbound audio signal in accordance with a first wireless communication protocol. When the RFIC is in a second receive mode, the second RF section, the second PHY processing module, and the second upper layers processing module convert a second inbound RF signal into a second inbound audio signal in accordance with a second wireless communication protocol. The memory stores the first and second inbound audio signals. The first PHY processing module retrieves, based on the receive mode, the first or second inbound audio signal from the memory and converts the first or second inbound audio signal into a first or second inbound analog audio signal. | 02-05-2009 |
| 20090068976 | FILTER CIRCUIT AND COMMUNICATION SEMICONDUCTOR DEVICE USING THE SAME - The present invention intends to provide a filter circuit in which an area occupied by the circuit can be reduced by suppressing the scale of its circuit configuration while a predetermined vicinity disturbance wave rejection ratio is maintained and a communication semiconductor device using the same, the filter circuit filtering an analog signal and including a voltage/current conversion circuit for converting the analog signal from voltage to current, and a capacitor array which executes signal processing by charging/discharging the current converted by the voltage/current conversion circuit to/from plural capacitors, the capacitor array being so constructed that the plural capacitors are divided to plural stages so that signals averaged by the capacitor on a preceding stage are accumulated in the capacitor on a next stage successively. | 03-12-2009 |
| 20090075621 | Mixer For Downconversion of RF Signals - A mixer for downconversion of RF signals includes at least one RF transistor ( | 03-19-2009 |
| 20090075622 | OFFSET CORRECTION FOR PASSIVE MIXERS - A downconversion mixer includes a configurable gate or bulk bias voltage to allow calibration and correction of device offsets. Calibration may be performed on the configurable bias voltages to minimize IM2 distortion in the mixer. The techniques have minimal impact on voltage headroom, impose no requirement for a signal path to be phase-matched with a calibration path, and are particularly well-suited for passive mixers. | 03-19-2009 |
| 20090088122 | APPARATUS AND METHODS FOR DOWNCONVERTING RADIO FREQUENCY SIGNALS - A noise isolation passive mixing apparatus is designed to mitigate noise contribution from intermediate frequency (IF) filters and amplifiers in a radio frequency translation stage. Common-gate configuration devices are inserted between passive mixer output and input of a transimpedance amplifier. In this way, circulation of the input-referred noise of the transimpedance amplifier is decreased, because of the relatively high output impedance of the common-gate devices, and the noise figure of the mixing apparatus can be improved. Since the radio frequency signal still sees low impedance, a radio frequency transconductance (RF gm) stage can be removed from the mixing apparatus, reducing current consumption. A double-balanced mixing apparatus with this general architecture may be implemented in a 0.18 micrometer CMOS technology and used in a low-IF global positioning system operating at 1.575 GHz, in an access terminal of a cellular communication system, and in other systems. | 04-02-2009 |
| 20090088123 | FREQUENCY CONVERTING CIRCUIT AND RECEIVER - A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element. | 04-02-2009 |
| 20090117871 | Switch circuit and method of switching radio frequency signals - An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. | 05-07-2009 |
| 20090143043 | SEMICONDUCTOR INTEGRATED CIRCUIT - In a communication semiconductor integrated circuit, a capacitance included in a filter on the output side of a mixer circuit is reduced without requiring the cutoff frequency of the filter to be changed. A Gilbert cell circuit is used as a mixer circuit which combines, for downconversion, a reception signal and a local oscillator signal. A low-pass filter for removing unwanted waves from output is composed of load resistors of upper stage differential transistors and a capacitive element provided between differential output terminals. The resistances of the load resistors are increased, and a current circuit for applying a current to emitters or collectors of the upper stage differential transistors is provided, so that a current to make up for a decrease in current amount attributable to the increase in load resistance can be applied from the current circuit to lower stage differential transistors. | 06-04-2009 |
| 20090239495 | DC-COMPENSATED IP2 CALIBRATION FOR WCDMA RECEIVER - Second-order intermodulation distortion can be suppressed in a direct conversion radio receiver having a downconversion mixer by calibrating resistors and a current source in the mixer. A test signal is applied to the signal inputs of the mixer transconductor. The resistances of first and second variable resistor circuits connected to the switching quad are then varied while also varying a variable current source. Each time the resistances and current are set to new values, the resulting mixer output signal is measured. When the measured output signal is determined to be at a minimum, the variable resistors and current source are left at the corresponding values to which they have been set. Adjusted in this manner, the current source counteracts the DC offset voltage at the mixer output. | 09-24-2009 |
| 20090270063 | Low-if integrated data receiver and associated methods - Integrated low-IF (low intermediate frequency) data receivers and associated methods are disclosed that provide advantageous and cost-efficient solutions. | 10-29-2009 |
| 20090305658 | Method Of Operating Radio Receiver Implemented In A Single CMOS Integrated Circuit - A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver, the IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal. | 12-10-2009 |
| 20100015941 | BROADBAND ACTIVE BALUN AND BALANCED MIXER USING REACTIVE FEEDBACK - A broadband active balun using reactive feedback and a balanced mixer using the balun are provided. The broadband active balun comprises a common gate FET having a source connected to an input terminal, a gate connected to the ground, and a drain connected to a first output terminal; a reactive impedance element having one end connected to the drain of the common gate FET and the other end connected to one of the gate and the source of the common gate FET, and a common source FET having a gate connected to the input terminal, a source connected to the ground and a drain connected to a second output terminal. Accordingly, the active balun has a small physical size and a wide frequency band. | 01-21-2010 |
| 20100029239 | UPCONVERTER AND DOWNCONVERTER WITH SWITCHED TRANSCONDUCTANCE AND LO MASKING - An upconverter and a downconverter having good performance are described. In one design, the upconverter includes first, second, and third sets of transistors. The first set of transistors receives baseband signals and provides an upconverted signal. The second set of transistors switches the transconductance of the transistors in the first set based on transmit (TX) local oscillator (LO) signals. The third set of transistors enables and disables the transistors in the second set based on a TX VCO signal. In one design, the downconverter includes first, second, and third sets of transistors. The first set of transistors receives a modulated signal and provides baseband signals. The second set of transistors switches the transconductance of the transistors in the first set based on receive (RX) LO signals. The third set of transistors enables and disables the transistors in the second set based on an RX VCO signal. | 02-04-2010 |
| 20100056095 | DYNAMIC CURRENT INJECTION MIXER/MODULATOR - A mixer is provided. The mixer comprises a Gilbert cell mixer core, a pair of load devices, a transconductor cell, and a current injection branch. The Gilbert cell mixer core has first and second nodes, receives a first differential input signal, and provides a differential output signal at the first nodes. The load devices are respectively coupled between the first nodes of the Gilbert cell mixer core and a first fixed voltage. The transconductor cell is coupled between the second nodes and a second fixed voltage and receives a second differential input signal. The dynamic current injection branch comprises first and second pairs of MOS transistors each connected in parallel and having drains commonly coupled to a corresponding second node and gates receiving a third differential input signal. There is a phase difference of 90° between the first and third differential input signals. | 03-04-2010 |
| 20100144304 | Reciever dynamically switching to pseudo differential mode for SOC spur reduction - A low noise amplifier in an integrated circuit, the circuit having a digital portion and an analog portion on a common substrate, the digital portion having at least one clocking frequency, includes an input configured to receive a signal at a tuned frequency and an output circuit. The output circuit is configurable to operate in either a single-ended mode or a pseudo differential-ended mode, wherein the output circuit is configured in the pseudo differential-ended mode when the tuned frequency is substantially similar to the at least one clocking frequency or one of its harmonics and otherwise configured in the single-ended mode. | 06-10-2010 |
| 20100159867 | RF RECEPTION SYSTEM AND INTEGRATED CIRCUIT WITH PROGRAMMABLE FILTER AND METHODS FOR USE THEREWITH - An integrated circuit includes an on-chip filter component that forms a programmable bandpass filter with the at least one off-chip bandpass filter component. The programmable bandpass filter is programmable based on a control signal. An RF receiver generates inbound data in response to a received signal from the programmable bandpass filter. | 06-24-2010 |
| 20100285770 | WIRELESS COMMUNICATION SYSTEM - A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow. | 11-11-2010 |
| 20100323656 | METHODS OF OPERATING ELECTRONIC DEVICES, AND METHODS OF PROVIDING ELECTRONIC DEVICES - Some embodiments include a method disposing an integrated circuit die within a housing, the integrated circuit die having integrated circuitry formed thereon, the integrated circuitry including first transponder circuitry configured to transmit and receive radio frequency signals, wherein the integrated circuit die is void of external electrical connections for anything except power supply external connections; and disposing second transponder circuitry, discrete from the first transponder circuitry, within the housing, the second transponder circuitry being configured to transmit and receive radio frequency signals, wherein the first and second transponder circuitry are configured to establish wireless communication between one another within the housing, the second transponder circuitry being disposed within 24 inches of the first transponder circuitry within the housing. | 12-23-2010 |
| 20110092179 | Switch Circuit and Method of Switching Radio Frequency Signals - An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit. | 04-21-2011 |
| 20110183641 | DRAIN-PUMPED SUB-HARMONIC MIXER FOR MILLIMETER WAVE APPLICATIONS - A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear operating region. The mixing transistor includes a drain coupled to the sources of the first transistor and the second transistor. The mixing transistor has its drain driven by a signal at twice a local oscillator (LO) frequency and its gate driven by a radio frequency (RF) signal while the mixing transistor is biased in the linear region such that a process of frequency doubling and mixing are performed simultaneously. | 07-28-2011 |
| 20120122416 | Signal receiving apparatus, signal receiving method and electronic apparatus - Disclosed herein is a signal receiving apparatus including a frequency conversion section configured to carry out frequency conversion on a modulated signal transmitted to the signal receiving apparatus by adoption of a radio transmission technique, wherein the frequency conversion section carries out the frequency conversion by adoption of a frequency conversion method selected from a plurality of frequency conversion methods adoptable by the frequency conversion section in the frequency conversion to be executed on the modulated signal. | 05-17-2012 |
| 20120135700 | FREQUENCY CONVERTING CIRCUIT AND RECEIVER - A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element. | 05-31-2012 |
| 20120238233 | WIRELESS COMMUNICATION SYSTEM - A wireless communication system includes: a filter; and a semiconductor chip including a signal processing integrated circuit having an amplifier, wherein a main surface of the semiconductor chip is provided with a plurality of electrode terminals along an edge portion thereof; wherein the amplifier has a transistor including a control electrode, a first electrode through which a signal is outputted, and a second electrode to which a voltage is applied; wherein the control electrode, the first electrode and the second electrode of the transistor are connected to the electrode terminals, respectively; and wherein none of wirings are arranged between the electrode terminals and placements of the control electrode, the first electrode and the second electrode, making space between the electrodes and the electrode terminals narrow. | 09-20-2012 |
| 20150303962 | LINEAR SAMPLER - A frequency conversion circuit having a plurality of N signal channels, each being fed an input signal and a train of pluses having a period T and a duty cycle T/N. Each signal channel includes: a column III-V semiconductor sampler coupled the input signal and being responsive to sampling signals; and a column IV semiconductor controllable time delay for producing the train of sampling signals in response to a train of pulses produced on the column IV semiconductor, the time delay imparting a time delay to the pulses in accordance with a time delay command signal fed to the time delay. Each one of the sampling signals is produced by the time delay in each one of the channels with the period T and the duty cycle T/N with the sampling signals in one of the trains of the sampling signals being delayed with respect to the sampling signals in another one of the trains the sampling signals a time T/N. | 10-22-2015 |
