| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 438087000 | Graded composition | 69 |
| 20090215220 | SOLID-STATE IMAGE CAPTURING DEVICE, IMAGE CAPTURING DEVICE, AND MANUFACTURING METHOD OF SOLID-STATE IMAGE CAPTURING DEVICE - A solid-state image capturing device, includes a semiconductor board, upon which same semiconductor board are disposed in a predetermined order: a first detecting unit for detecting a first wavelength region component within an electromagnetic wave; and a second detecting unit for detecting a second wavelength region component which is longer wavelength side than at least the first wavelength region component, wherein in the depth direction from the surface of the semiconductor board, a valid region where a first electroconductive type dopant of the second detecting unit is formed reaches a portion deeper than a valid region where a first electroconductive type dopant of the first detecting unit is formed. | 08-27-2009 |
| 20100047957 | METHOD FOR FORMING SOLAR CELL HAVING ACTIVE REGION WITH NANOSTRUCTURES HAVING ENERGY WELLS - A method and apparatus for solar cell having graded energy wells is provided. The active region of the solar cell comprises nanostructures. The nanostructures are formed from a material that comprises a III-V compound semiconductor and an element that alters the band gap of the III-V compound semiconductor. For example, the III-V compound semiconductor could be gallium nitride (GaN). As an example, the “band gap altering element” could be indium (In). The concentration of the indium in the active region is non-uniform such that the active region has a number of energy wells, separated by barriers. The energy wells may be “graded”, by which it is meant that the energy wells have a different band gap from one another, generally increasing or decreasing from one well to another monotonically. | 02-25-2010 |
| 20100240171 | Method of Fabricating a Multijunction Solar Cell with a Phosphorus-Containing Nucleation Layer - A multijunction solar cell is fabricated according to an embodiment by providing a substrate, depositing a nucleation first layer over and directly in contact with the substrate, depositing a second layer containing an arsenic dopant over the nucleation layer and depositing a sequence of layers over the second layer forming at least one solar subcell. The nucleation layer serves as a diffusion barrier to the arsenic dopant such that diffusion of the arsenic dopant into the substrate is limited in depth by the nucleation layer. | 09-23-2010 |
| 20100261305 | Method for making multi-cystalline film of solar cell - A method is disclosed to make a multi-crystalline silicon film of a solar cell. The method includes the step of providing a ceramic substrate, the step of providing a titanium-based film on the ceramic substrate, the step of providing a p | 10-14-2010 |
| 20100267188 | Diffusion Furnaces Employing Ultra Low Mass Transport Systems and Methods of Wafer Rapid Diffusion Processing - Multi-zone, solar cell diffusion furnaces having a plurality of radiant element (SiC) or/and high intensity IR lamp heated process zones, including baffle, ramp-up, firing, soaking and cooling zone(s). The transport of solar cell wafers, e.g., silicon, selenium, germanium or gallium-based solar cell wafers, through the furnace is implemented by use of an ultra low-mass, wafer transport system comprising laterally spaced shielded metal bands or chains carrying non-rotating alumina tubes suspended on wires between them. The wafers rest on raised circumferential standoffs spaced laterally along the alumina tubes, which reduces contamination. The bands or chains are driven synchronously at ultra-low tension by a pin drive roller or sprocket at either the inlet or outlet end of the furnace, with appropriate tensioning systems disposed in the return path. The high intensity IR flux rapidly photo-radiation conditions the wafers so that diffusion occurs >3× faster than conventional high-mass thermal furnaces. | 10-21-2010 |
| 20100304527 | METHODS OF THERMAL PROCESSING A SOLAR CELL - Embodiments of the invention contemplate the formation of high efficiency solar cells and novel methods for forming the same. Embodiment of the invention can be used to form a solar cell that has doped regions that act as a back surface field. The methods and apparatus disclosed herein may include the use of a doping source, a rapid annealer and a slow annealer. One embodiment of the methods used to form an improved emitter structure include disposing an amount of a dopant atom in a substrate and performing two or more thermal processing steps to cause the dopant to diffuse deeper into the substrate to achieve a desirable multi-facet doping profile. | 12-02-2010 |
| 20110045629 | SEMICONDUCTOR IMAGING DEVICE AND FABRICATION PROCESS THEREOF - A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel region part contains an impurity element with a concentration level lower than the impurity concentration level of the first channel region part. | 02-24-2011 |
| 20110053310 | PHOTOVOLTAIC DEVICE AND MANUFACTURING METHOD THEREOF - The manufacturing method includes: forming a P-type silicon substrate and a high-concentration N-type diffusion layer, in which an N-type impurity is diffused in a first concentration, on an entire surface at a light-incident surface side; forming an etching resistance film on the high-concentration N-type diffusion layer and forming fine pores at a predetermined position within a recess forming regions on the etching resistance film; forming recesses by etching the silicon substrate around a forming position of the fine pores, so as not to leave the high-concentration N-type diffusion layer within the recess forming region; forming the low-concentration N-type diffusion layer, in which an N-type impurity is diffused in a second concentration that is lower than the first concentration, on a surface on which the recesses are formed; and forming a grid electrode in an electrode forming region at a light-incident surface side of the silicon substrate. | 03-03-2011 |
| 20110070681 | Interdigitated Back Contact Silicon Solar Cells With Separating Grooves - Interdigitated back contact (IBC) solar cells are produced by depositing spaced-apart parallel pads of a first dopant bearing material (e.g., boron) on a substrate, heating the substrate to both diffuse the first dopant into corresponding first (e.g., p+) diffusion regions and to form diffusion barriers (e.g., borosilicate glass) over the first diffusion regions, and then disposing the substrate in an atmosphere containing a second dopant (e.g., phosphorus) such that the second dopant diffuses through exposed surface areas of the substrate to form second (e.g., n+) diffusion regions between the first (p+) diffusion regions (the diffusion barriers prevent the second dopant from diffusion into the first (p+) diffusion regions). The substrate material along each interface between adjacent first (p+) and second (n+) diffusion regions is then removed (e.g., using laser ablation) such that elongated grooves, which extend deeper into the substrate than the diffused dopant, are formed between adjacent diffusion regions. | 03-24-2011 |
| 20110092012 | PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE - A process for producing a photovoltaic device, wherein when providing an n-type amorphous silicon layer on an i-type amorphous silicon layer, a desired crystallization ratio can be achieved without reducing the deposition rate. The production process comprises a p-layer formation step of depositing a p-type amorphous silicon layer, an i-layer formation step of depositing an i-type amorphous silicon layer on the p-type amorphous silicon layer, and an n-layer formation step of depositing an n-type amorphous silicon layer on the i-type amorphous silicon layer, wherein the n-layer formation step comprises a first n-layer formation step of depositing a first n-layer on the i-type amorphous silicon layer, and a second n-layer formation step of depositing a second n-layer on the first n-layer, and the deposition conditions for the first n-layer formation step are conditions that yield a higher crystallization ratio than the deposition conditions for the second n-layer formation step, for deposition onto the same base material substrate. | 04-21-2011 |
| 20110097840 | REDUCING SURFACE RECOMBINATION AND ENHANCING LIGHT TRAPPING IN SOLAR CELLS - Methods of improving the anti-reflection properties of one or more dielectric layers and reducing surface recombination of generated carriers of a solar cell are disclosed. In some embodiments, dopants are introduced into the dielectric layers to improve their anti-reflection properties. In other embodiments, species are introduced into the dielectric layers to create electrical fields which repel the minority carriers away from the surface and toward the contacts. In another embodiment, mobiles species are introduced to the anti-reflective coating, which cause carrier to be repelled from the surface of the solar cell. By creating a barrier at the surface of the solar cell, undesired recombination at the surface may be reduced. | 04-28-2011 |
| 20110111550 | HYBRID WINDOW LAYER FOR PHOTOVOLTAIC CELLS - A novel photovoltaic solar cell and method of making the same are disclosed. The solar cell includes: at least one absorber layer which could either be a lightly doped layer or an undoped layer, and at least a doped window-layers which comprise at least two sub-window-layers. The first sub-window-layer, which is next to the absorber-layer, is deposited to form desirable junction with the absorber-layer. The second sub-window-layer, which is next to the first sub-window-layer, but not in direct contact with the absorber-layer, is deposited in order to have transmission higher than the first-sub-window-layer. | 05-12-2011 |
| 20110111551 | PHOTOELECTRIC CONVERSION DEVICE FABRICATION METHOD - Provided is a photoelectric conversion device fabrication method that realizes both high productivity and high conversion efficiency by rapidly forming an n-layer having good coverage. The fabrication method for a photoelectric conversion device includes a step of forming a silicon photoelectric conversion layer on a substrate by a plasma CVD method. In the fabrication method for the photoelectric conversion device, the step of forming the photoelectric conversion layer includes a step of forming an i-layer formed of crystalline silicon and a step of forming, on the i-layer, an n-layer under a condition with a hydrogen dilution ratio of 0 to 10, inclusive. | 05-12-2011 |
| 20110159636 | EDGE DELETION OF THIN-LAYER SOLAR MODULES BY ETCHING - The present invention relates to a fast and inexpensive method which can be carried out locally for the wet-chemical edge deletion of “solar modules” by applying etching pastes which are suitable for this purpose and, when the reaction is complete, removing the paste residues or cleaning the substrate surface in a suitable manner. An etching paste newly developed for the purpose is employed in the method. | 06-30-2011 |
| 20110201145 | PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE AND DEPOSITION APPARATUS - A process for producing a high-performance photovoltaic device by depositing a high-quality crystalline silicon layer, and a deposition apparatus for depositing the high-quality crystalline silicon layer. A process for producing a photovoltaic device that comprises forming a crystalline silicon-based photovoltaic layer comprising an i-layer on a substrate using a plasma-enhanced CVD method, wherein formation of the i-layer comprises an initial layer deposition stage and a bulk i-layer deposition stage, and the initial layer deposition stage comprises depositing the initial layer using a silane-based gas flow rate during the initial layer deposition stage that is lower than the silane-based gas flow rate during the bulk i-layer deposition stage, with the deposition time for the initial layer deposition stage set to not less than 0.5% and not more than 20% of the total deposition time for the i-layer, and with the SiH* emission intensity during the initial layer deposition stage not, more than 80% of the stabilized SiH* emission intensity during the bulk i-layer deposition stage. | 08-18-2011 |
| 20110294253 | POLYDIODE STRUCTURE FOR PHOTO DIODE - An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal. | 12-01-2011 |
| 20110306163 | METHOD OF FORMING ELECTRODE AND METHOD OF MANUFACTURING SOLAR CELL USING THE SAME - A method of forming an electrode, by which the resistance of the electrode can be reduced, and a method of manufacturing a solar cell using the method of forming an electrode are provided. The electrode forming method includes coating conductive paste on a substrate, forming a metal layer by drying the conductive paste or heating the same at low temperature, and annealing the metal layer by Joule heating using the metal layer by applying an electric field to the metal layer. | 12-15-2011 |
| 20120009727 | AVALANCHE PHOTODIODE HAVING CONTROLLED BREAKDOWN VOLTAGE - Avalanche photodiodes and methods for forming them are disclosed. The breakdown voltage of an avalanche photodiode is controlled through the inclusion of a diffusion sink that is formed at the same time as the device region of the photodiode. The device region and diffusion sink are formed by diffusing a dopant into a semiconductor to form a p-n junction in the device region. The dopant is diffused through a first diffusion window to form the device region and a second diffusion window to form the diffusion sink. The depth of the p-n junction is based on an attribute of the second diffusion window. | 01-12-2012 |
| 20120015473 | PHOTOELECTRIC CONVERSION DEVICE MANUFACTURING METHOD, PHOTOELECTRIC CONVERSION DEVICE, PHOTOELECTRIC CONVERSION DEVICE MANUFACTURING SYSTEM, AND METHOD FOR USING PHOTOELECTRIC CONVERSION DEVICE MANUFACTURING SYSTEM - A photoelectric conversion device manufacturing method manufactures a photoelectric conversion device in which a first photoelectric conversion unit and a second photoelectric conversion unit are sequentially stacked on a transparent-electroconductive film formed on a substrate. The method includes: forming each of a first p-type semiconductor layer, a first i-type semiconductor layer, a first n-type semiconductor layer, and a second p-type semiconductor layer in a plurality of first plasma CVD reaction chambers; exposing the second p-type semiconductor layer to an air atmosphere; supplying a gas including p-type impurities to inside a second plasma CVD reaction chamber before forming of the second i-type semiconductor layer; forming the second i-type semiconductor layer on the second p-type semiconductor layer that was exposed to an air atmosphere, in the second plasma CVD reaction chamber; and forming the second n-type semiconductor layer on the second i-type semiconductor layer. | 01-19-2012 |
| 20120021557 | METHOD FOR MANUFACTURING A SOLAR CELL - A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste. | 01-26-2012 |
| 20120021558 | SEMICONDUCTOR SUBSTRATE FOR SOLID-STATE IMAGE SENSING DEVICE AS WELL AS SOLID-STATE IMAGE SENSING DEVICE AND METHOD FOR PRODUCING THE SAME - There is provided a semiconductor substrate for solid-state image sensing device in which the production cost is lower than that of a gettering method through a carbon ion implantation and problems such as occurrence of particles at a device production step and the like are solved. | 01-26-2012 |
| 20120034731 | PHOTOELECTRIC CONVERSION DEVICE MANUFACTURING SYSTEM AND PHOTOELECTRIC CONVERSION DEVICE MANUFACTURING METHOD - A photoelectric conversion device manufacturing system in which a photoelectric conversion device is manufactured, the photoelectric conversion device including a p-type semiconductor layer, an i-type semiconductor layer, and an n-type semiconductor layer which are sequentially layered on a transparent-electroconductive film formed on a substrate in the photoelectric conversion device. The system includes: an i-layer-formation reaction chamber comprising at least a first film formation section, a second film formation section, and a third film formation section, the i-layer-formation reaction chamber forming the i-type semiconductor layer, the first film formation section, the second film formation section, and the third film formation section being sequentially arranged along a transfer direction in which the substrate is transferred; and a plurality of door valves separating the first film formation section, the second film formation section, and the third film formation section so that the length of the second film formation section is greater than the lengths of the first film formation section and the third film formation section in the transfer direction. | 02-09-2012 |
| 20120040490 | ENHANCED VISION SYSTEM FOR SCREEN PRINTING PATTERN ALIGNMENT - Embodiments of the invention also generally provide a solar cell formation process that includes the formation of metal contacts over heavly doped regions that are formed in a desired pattern on a surface of a substrate. Embodiments of the invention also provide an inspection system and supporting hardware that is used to reliably position a similarly shaped, or patterned, metal contact structure on the patterned heavily doped regions to allow an Ohmic contact to be made. The metal contact structure, such as fingers and busbars, are formed on the heavily doped regions so that a high quality electrical connection can be formed between these two regions. | 02-16-2012 |
| 20120077303 | Method for Fabricating Solar Cell Using Inductively Coupled Plasma Chemical Vapor Deposition - In one example, a method for fabricating a solar cell comprising a first electrode, a first-type layer, an intrinsic layer, a second-type layer and a second electrode is disclosed. The method comprising forming a second-type layer including an amorphous silicon (Si) carbide thin film by an inductively coupled plasma chemical vapor deposition (ICP-CVD) device using mixed gas including hydrogen (H | 03-29-2012 |
| 20120083067 | METHOD FOR FORMING PHOTODETECTOR ISOLATION IN IMAGERS - A first shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to a photodetector while a second shallow trench isolation region is disposed in the silicon semiconductor layer laterally adjacent to other electrical components in a pixel. The first and second shallow trench isolation regions each include a trench disposed in the silicon semiconductor layer that is filled with a dielectric material. An isolation layer having the second conductivity is disposed only along a portion of a bottom and only along a sidewall of the trench immediately adjacent to the photodetector. The isolation layer is not disposed along the other portion of the bottom and along the other sidewall of the trench adjacent the photodetector. The isolation layer is not disposed along the bottom and sidewalls of the trench adjacent to the other electrical components. | 04-05-2012 |
| 20120094426 | METHOD FOR MANUFACTURING A SOLAR CELL - A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste. | 04-19-2012 |
| 20120094427 | METHOD FOR MANUFACTURING A SOLAR CELL - A method for manufacturing a solar cell comprises disposing a first doping layer on a substrate, forming a first doping layer pattern by patterning the first doping layer to expose a portion of the substrate, disposing a second doping layer on the first doping layer pattern to cover the exposed portion of the substrate, diffusing an impurity from the first doping layer pattern which forms a first doping region in a surface of the substrate, and diffusing an impurity from the second doping layer which forms a second doping region in the surface of the substrate, wherein the forming of the first doping layer pattern uses an etching paste. | 04-19-2012 |
| 20120100665 | METHOD FOR MANUFACTURING SILICON THIN-FILM SOLAR CELLS - The present invention relates to a method for manufacturing silicon thin-film solar cells, including: providing a substrate; forming a first electrode on the substrate; forming a first doped semiconductor layer on the first electrode by chemical vapor deposition; forming an intrinsic layer on the first doped semiconductor layer by chemical vapor deposition, where the intrinsic layer includes a plurality of amorphous/nanocrystalline silicon layers, and the intrinsic layer has various energy bandgaps formed by varying average grain sizes of the amorphous/nanocrystalline silicon layers; forming a second doped semiconductor layer on the intrinsic layer by chemical vapor deposition, where one of the first doped semiconductor layer and the second doped semiconductor layer is a p-type amorphous silicon layer and the other is an n-type amorphous/nano-microcrystalline silicon layer; and forming a second electrode on the second doped semiconductor layer. Accordingly, the present invention can achieve broadband absorption in a single junction structure. | 04-26-2012 |
| 20120115272 | PRODUCTION METHOD AND PRODUCTION DEVICE FOR SOLAR BATTERY - When a solar battery configured by laminating a p-type layer, an i-type layer and an n-type layer in this order is produced, an n-type microcrystalline silicon thin film is formed as an n-type layer under film forming conditions wherein a ratio of the flow rate of an n-type dopant-containing gas to the flow rate of a silicon-containing gas is 0.03 or less, the ratio of the flow rate of a diluent gas to the flow rate of a silicon-containing gas is 70 or more, and the total pressure of a material gas is 200 Pa or more. | 05-10-2012 |
| 20120135561 | PHOTOELECTRIC-CONVERSION-DEVICE FABRICATION METHOD - An object is to obtain a high-efficiency photoelectric conversion device having a crystalline silicon i-layer in a photoelectric conversion layer. Disclosed is a fabrication method for a photoelectric conversion device that includes a step of forming, on a substrate, a photoelectric conversion layer having an i-layer formed mainly of crystalline silicon. The method includes the steps of determining an upper limit of an impurity concentration in the i-layer according to the Raman ratio of the i-layer; and forming the i-layer so as to have a value equal to or less than the determined upper limit of the impurity concentration. Alternatively, an upper limit of impurity-gas concentration in a film-formation atmosphere is determined according to the Raman ratio of the i-layer, and the i-layer is formed while controlling the impurity-gas concentration so as to have a value equal to or less than the determined upper limit. | 05-31-2012 |
| 20120149145 | METHOD FOR MANUFACTURING IMAGE SENSOR - A method for manufacturing an image sensor, wherein the method comprises several steps as follows: A semiconductor base doped with dopants having a first-type electrical conductivity is provided, wherein the semiconductor base comprises a handle wafer, an oxide insulator disposed on the handle wafer, and a silicon layer disposed on the oxide insulator. A front end process is then conducted, to form at least one imaging pixel disposed in the silicon layer and at least one metal layer disposed on the imaging pixel, whereby the first-type electrical dopants can be driven into the silicon layer to form a doping layer with the first-type electrical conductivity over the oxide insulator. | 06-14-2012 |
| 20120202315 | IN-SITU HYDROGEN PLASMA TREATMENT OF AMORPHOUS SILICON INTRINSIC LAYERS - Embodiments of the invention generally provide methods for forming amorphous silicon-based photovoltaic devices, such as solar cells, by utilizing deposition and plasma treatment steps during a plasma-enhanced chemical vapor deposition (PE-CVD) process. In one embodiments, the method includes exposing a transparent conductive oxide (TCO) layer disposed on a substrate to hydrogen plasma during pretreatment, forming a p-type α-Si film on the TCO layer, forming an α-Si intrinsic film on the p-type α-Si film during a PE-CVD process, and forming an n-type α-Si film on the α-Si intrinsic film. In some examples, the PE-CVD process includes depositing an α-Si intrinsic layer during a deposition step, treating the α-Si intrinsic layer to form a treated α-Si intrinsic layer during a plasma treatment step, and sequentially repeating the deposition step and the plasma treatment step until obtaining a desired thickness of the α-Si intrinsic film containing a plurality of treated α-Si intrinsic layers. | 08-09-2012 |
| 20120202316 | PLASMA TREATMENT OF TCO LAYERS FOR SILICON THIN FILM PHOTOVOLTAIC DEVICES - Embodiments of the invention generally provide methods for forming a silicon-based photovoltaic (PV) device containing a transparent conductive oxide (TCO) layer that is exposed to a very high frequency (VHF) plasma. In one embodiment, a method includes depositing a TCO layer on an underlying surface, such as a transparent substrate, and exposing the TCO layer to a VHF plasma to form a treated surface on the TCO layer during a plasma treatment process. The VHF plasma is generated by ionizing a process gas containing hydrogen (H | 08-09-2012 |
| 20120214273 | ANGLED MULTI-STEP MASKING FOR PATTERNED IMPLANTATION - An improved method of tilting a mask to perform a pattern implant of a substrate is disclosed. The mask has a plurality of apertures, and is placed between the ion source and the substrate. The mask and substrate are tilted at a first angle relative to the incoming ion beam. After the substrate is exposed to the ion beam, the mask and substrate are tilted at a second angle relative to the ion beam and a subsequent implant step is performed. Through the selection of the aperture size and shape, the cross-section of the mask, the distance between the mask and the substrate and the number of implant steps, a variety of implant patterns may be created. In some embodiments, the implant pattern includes heavily doped horizontal stripes with lighter doped regions between the stripes. In some embodiments, the implant pattern includes a grid of heavily doped regions. | 08-23-2012 |
| 20120252158 | Method for Manufacturing Lateral Germanium Detectors - An improved method for manufacturing a lateral germanium detector is disclosed. A detector window is opened through an oxide layer to expose a doped single crystalline silicon layer situated on a substrate. Next, a single crystal germanium layer is grown within the detector window, and an amorphous germanium layer is grown on the oxide layer. The amorphous germanium layer is then polished to leave only a small portion around the single crystal germanium layer. A dielectric layer is deposited on the amorphous germanium layer and the single crystal germanium layer. Using resist masks and ion implants, multiple doped regions are formed on the single crystal germanium layer. After opening several oxide windows on the dielectric layer, a refractory metal layer is deposited on the doped regions to form multiple germanide layers. | 10-04-2012 |
| 20120252159 | METHODS FOR FORMING OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION - Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side. | 10-04-2012 |
| 20120270362 | NEW INTRINSIC ABSORBER LAYER FOR PHOTOVOLTAIC CELLS - So as to manufacture an intrinsic absorber layer of amorphous hydrogenated silicon within a p-i-n configuration a solar cell by PeCvD deposition upon a base structure, thereby improving throughput an simultaneously maintaining quality of the absorber layer, a specific processing regime is proposed, wherein in the reactor for depositing the addressed absorber layer a pressure of between 1 mbar and 1.8 mbar is established and a flow of silane and of hydrogen with a dilution of silane to hydrogen of 1:4 up to 1:10 and generating an RF plasma with a generator power of between 600W and 1200W per 1.4 m | 10-25-2012 |
| 20120276684 | PATTERNED ASSEMBLY FOR MANUFACTURING A SOLAR CELL AND A METHOD THEREOF - Apparatuses and methods for manufacturing a solar cell are disclosed. In a particular embodiment, the solar cell may be manufactured by disposing a solar cell in a chamber having a particle source; disposing a patterned assembly comprising an aperture and an assembly segment between the particle source and the solar cell; and selectively implanting first type dopants traveling through the aperture into a first region of the solar cell while minimizing introduction of the first type dopants into a region outside of the first region. | 11-01-2012 |
| 20120288984 | Method for operating a vacuum Coating apparatus - A method for operating a vacuum coating apparatus, in particular for producing thin-film solar cells, a layer deposition step being carried out, after a coating chamber cleaning step using a cleaning gas and before a product production step, in order to apply a diffusion barrier layer onto the walls of the coating chamber. | 11-15-2012 |
| 20120288985 | METHOD FOR PRODUCING A PHOTOVOLTAIC CELL INCLUDING THE PREPARATION OF THE SURFACE OF A CRYSTALLINE SILICON SUBSTRATE - A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way. | 11-15-2012 |
| 20120329203 | Method for Forming Silicon Thin Film - The present invention is to provide a method of creating a PIN silicon thin film comprising the steps of providing a molten P-type, Intrinsic and N-type semiconductor material. Next, it is performing a down draw process or a casting process of the molten P-type. Intrinsic and N-type semiconductor material. Then, it is selectively performing a dual-side rolling process to create a P-type, Intrinsic and N-type semiconductor ribbon. Subsequently, it is performing a step of joining the P-type, Intrinsic and N-type semiconductor ribbon to form a PIN semiconductor ribbon. Finally, it is performing a roll press process or a pressing process to the PIN semiconductor ribbon to create the PIN semiconductor thin film. | 12-27-2012 |
| 20130034931 | Gallium arsenide solar cell with germanium/palladium contact - A method of forming a solar cell including: providing a semiconductor body including at least one photoactive junction; forming a semiconductor contact layer composed of GaAs deposited over the semiconductor body; and depositing a metal contact layer including a germanium layer and a palladium layer over the semiconductor contact layer so that the specific contact resistance is less than 5×10 | 02-07-2013 |
| 20130095599 | PHOTOVOLTAIC DEVICE USING NANO-SPHERES FOR TEXTURED ELECTRODES - An electronic device includes a substrate and a plurality of particles anchored to the substrate. An electrode material is formed over the particles and configured to form peaks over the particles. One or more operational layers are fog led over the electrode material for performing a device function. | 04-18-2013 |
| 20130095600 | METHOD FOR MANUFACTURING SOLAR CELL - Methods for manufacturing a solar cell are provided. The method may include forming a lower electrode on a substrate, forming a light absorption layer on the lower electrode, forming a buffer layer on the light absorption layer, and forming a window layer on the buffer layer. The window layer may include an intrinsic layer and the transparent electrode which have electric characteristics different from each other, respectively. The intrinsic layer and the transparent electrode may be formed by a sputtering process using a single target formed of metal oxide doped with impurities. | 04-18-2013 |
| 20130109130 | PROCESS FOR PRODUCING PHOTOVOLTAIC DEVICE | 05-02-2013 |
| 20130149809 | PHOTOELECTRIC CONVERSION ELEMENT AND METHOD FOR MANUFACTURING SAME - A photoelectric conversion element includes a first semiconductor layer that exhibits a first conductivity type and is provided in a selective area over a substrate, a second semiconductor layer that exhibits a second conductivity type and is disposed opposed to the first semiconductor layer, and a third semiconductor layer that is provided between the first and second semiconductor layers and exhibits a substantially intrinsic conductivity type. The third semiconductor layer has at least one corner part that is not in contact with the first semiconductor layer. | 06-13-2013 |
| 20130164882 | TRANSPARENT CONDUCTING LAYER FOR SOLAR CELL APPLICATIONS - Disclosed is a method which includes forming a bottom metallic electrode on an insulating substrate; forming a semiconductor junction on the metallic electrode; forming a transparent conducting overlayer in contact with the semiconductor junction; and forming a metallic layer in contact with the transparent conducting overlayer, wherein the metallic layer is formed by a plating process. The plating process may be an electroplating process or an electroless plating process. The transparent conducting overlayer may be carbon nanotubes or graphene. The semiconductor junction may be a p-i-n semiconductor junction, a p-n semiconductor junction, an n-p semiconductor junction or an n-i-p semiconductor junction. | 06-27-2013 |
| 20130224900 | SOLAR CELL MADE IN A SINGLE PROCESSING CHAMBER - Methods for forming a photovoltaic device include depositing a p-type layer on a substrate and cleaning the p-type layer by exposing a surface of the p-type layer to a plasma treatment to react with contaminants. An intrinsic layer is formed on the p-type layer, and an n-type layer is formed on the intrinsic layer. | 08-29-2013 |
| 20130267059 | METHOD OF MANUFACTURING PHOTOELECTRIC DEVICE - A method of manufacturing a photoelectric device, the method including: forming a first semiconductor layer on a semiconductor substrate through a first ion implantation; forming a second semiconductor layer having an inverted conductive type on a part of the first semiconductor layer through a second ion implantation; and performing thermal processing to restore lattice damage of the semiconductor substrate and activate a dopant into which ion implanted. | 10-10-2013 |
| 20130309804 | Method of Fabricating High Efficiency CIGS Solar Cells - A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25−0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency. | 11-21-2013 |
| 20130309805 | Method of Fabricating High Efficiency CIGS Solar Cells - A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25-0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency. | 11-21-2013 |
| 20130344643 | PIN structure semiconductor optical receiver - A PIN structure semiconductor optical receiver includes first and second electrical contact layers and an intrinsic layer disposed between them. The intrinsic layer includes a stud having a stud axis and a stud cross-section. The first and second contact layers have dimensions in a plane perpendicular to the stud axis that are greater than the stud's cross-section. These layers are also elongated and have longitudinal axes offset angularly relative to each other to minimize facing areas of said electrical contact layers. | 12-26-2013 |
| 20140004651 | HIGH EFFICIENCY SOLAR CELLS FABRICATED BY INEXPENSIVE PECVD | 01-02-2014 |
| 20140004652 | METHOD OF FABRICATING SOLAR CELL | 01-02-2014 |
| 20140024167 | METHOD FOR PRODUCING PHOTOELECTRIC CONVERSION ELEMENT - The method disclosed herein includes a first step of forming an i-type amorphous silicon layer | 01-23-2014 |
| 20140080248 | Optoelectronic Devices And Applications Thereof - In one aspect, optoelectronic devices are described herein. In some embodiments, an optoelectronic device comprises a fiber core, a radiation transmissive first electrode surrounding the fiber core, at least one photosensitive inorganic layer surrounding the first electrode and electrically connected to the first electrode, and a second electrode surrounding the inorganic layer and electrically connected to the inorganic layer. In some embodiments, the device comprises a photovoltaic cell. | 03-20-2014 |
| 20140154834 | USE OF DOPANTS WITH DIFFERENT DIFFUSIVITIES FOR SOLAR CELL MANUFACTURE - A method of tailoring the dopant profile of a substrate by utilizing two different dopants, each having a different diffusivity is disclosed. The substrate may be, for example, a solar cell. By introducing two different dopants, such as by ion implantation, furnace diffusion, or paste, it is possible to create the desired dopant profile. In addition, the dopants may be introduced simultaneously, partially simultaneously, or sequentially. Dopant pairs preferably consist of one lighter species and one heavier species, where the lighter species has a greater diffusivity. For example, dopant pairs such as boron and gallium, boron and indium, phosphorus and arsenic, and phosphorus and antimony, can be utilized. | 06-05-2014 |
| 20140170803 | CIGS Absorber Formed By Co-Sputtered Indium - In some embodiments, Cu—In—Ga precursor films are deposited by co-sputtering from multiple targets. Specifically, the co-sputtering method is used to form layers that include In. The co-sputtering reduces the tendency for the In component to agglomerate and results in smoother, more uniform films. In some embodiments, the Ga concentration in one or more target(s) is between about 25 atomic % and about 66 atomic %. The deposition may be performed in a batch or in-line deposition system. If an in-line deposition system is used, the movement of the substrates through the system may be continuous or may follow a “stop and soak” method of substrate transport. | 06-19-2014 |
| 20140179054 | METHOD FOR FORMING PATTERNS OF DIFFERENTLY DOPED REGIONS - The disclosed technology generally relates to forming patterns of doped semiconductor regions, and more particularly to methods of forming such patterns in fabricating photovoltaic devices. In one aspect, a method of forming a pattern of different doped regions at the same side of a semiconductor substrate comprises providing a patterned doped layer on a surface of the semiconductor substrate at predetermined locations where at least one first doped region is to be formed. The method additionally includes selectively growing at least one second doped region epitaxially at the same side of the semiconductor substrate using the patterned doped layer as an epitaxial growth mask. Furthermore, selectively growing comprises driving dopants from the patterned doped layer into the semiconductor substrate to form the first doped region at the predetermined locations. | 06-26-2014 |
| 20140213014 | ION IMPLANTATION BASED EMITTER PROFILE ENGINEERING VIA PROCESS MODIFICATIONS - A method of tailoring the dopant profile of a workpiece by modulating one or more operating parameters is disclosed. In one embodiment, the workpiece may be a solar cell and the desired dopant profile may include a heavily doped surface region and a highly doped region. These two regions can be generated by varying one or more of the parameters of the ion implanter. For example, the extraction voltage may be changed to affect the energy of the implanted ions. The ionization energy can be changed to affect the species of ions being generated from the source gas. In another embodiment, the source gasses that are ionized may be changed to affect the species being generated. After the implant has been performed, thermal processing is performed which minimizes the diffusion of the ions in the workpiece. | 07-31-2014 |
| 20140295613 | METHOD FOR FABRICATING HETEROJUNCTION INTERDIGITATED BACK CONTACT PHOTOVOLTAIC CELLS - The disclosed technology generally relates photovoltaic devices, and more particularly to methods of fabricating heterojunction interdigitated back contact photovoltaic cells having interdigitated emitter regions and back surface field regions. In one aspect, a method of forming on a substrate a patterned n+ a-Si:H layer and a patterned p+ a-Si:H layer, the patterned n+ a-Si:H layer and the patterned p+ a-Si:H layer being interdigitated and electrically isolated from each other, the method comprising: forming a patterned p+ a-Si:H layer on the substrate, the patterned p+ a-Si:H layer covering first regions of the substrate surface and leaving second regions of the substrate surface exposed; depositing a first intrinsic a-Si:H layer on the substrate; depositing an n+ a-Si:H layer on the first intrinsic a-Si:H layer; providing a patterned masking layer covering the n+ a-Si:H layer at least in the second regions; and selectively removing the n+ a-Si:H layer and the first intrinsic a-Si:H layer in regions not covered by the masking layer and stopping at an underlying portion of the p+ a-Si:H layer substantially without removing a substantial amount of the underlying portion of the p+ a-Si:H layer, wherein selectively removing the n+ a-Si:H layer and the first intrinsic a-Si:H layer comprises etching in a solution comprising a diluted TMAH solution. | 10-02-2014 |
| 20140370646 | ABSORBER LAYER FOR A THIN FILM PHOTOVOLTAIC DEVICE WITH A DOUBLE-GRADED BAND GAP - A gallium-containing alloy is formed on the light-receiving surface of a CIGS absorber layer, and, in conjunction with a subsequent selenization or anneal process, is converted to a gallium-rich region at the light-receiving surface of the CIGS absorber layer. A second gallium-rich region is formed at the back contact surface of the CIGS absorber layer during selenization, so that the CIGS absorber layer has a double-graded gallium concentration that increases toward the light-receiving surface and toward the back contact surface of the CIGS absorber layer. The double-graded gallium concentration advantageously produces a double-graded bandgap profile for the CIGS absorber layer. | 12-18-2014 |
| 20150340544 | METHOD FOR ANNEALING A THIN FILM PHOTOVOLTAIC CELL DEVICE - A method of method for annealing a thin film solar cell device is described. The method includes vacuum annealing an as-deposited photovoltaic cell stack composed of a first electrode, a p-i-n junction having at least one p-doped layer, at least one n-doped layer, and at least one intrinsic layer disposed there between, and a second electrode. The vacuum annealing is performed in a non-plasma, vacuum environment by elevating a temperature of the photovoltaic cell stack to an anneal temperature within the range of between 150 degrees C. and 250 degrees C. | 11-26-2015 |
| 20150372183 | SOLAR CELL AND MANUFACTURING METHOD THEREOF - A solar cell is formed to have a silicon semiconductor substrate of a first conductive type; an emitter layer having a second conductive type opposite the first conductive type and formed on a first surface of the silicon semiconductor substrate; a back surface field layer having the first conductive type and formed on a second surface of the silicon semiconductor substrate opposite to the first surface; and wherein the emitter layer includes at least a first shallow doping area and the back surface field layer includes at least a second shallow doping area, and wherein a thickness of the first shallow doping area of the emitter layer is different from a thickness of the second shallow doping area of the back surface field layer. | 12-24-2015 |
| 20160079456 | REDUCED LIGHT DEGRADATION DUE TO LOW POWER DEPOSITION OF BUFFER LAYER - Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer. | 03-17-2016 |
| 20160111590 | Manufacturing Method of Semiconductor Film, Manufacturing Method of Semiconductor Device, and Manufacturing Method of Photoelectric Conversion Device - A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed. | 04-21-2016 |
| 20160190373 | CZTS THIN FILM SOLAR CELL AND MANUFACTURING METHOD THEREOF - A thin film solar cell comprises a metal rear surface electrode layer formed on a substrate, a p-type CZTS light-absorbing layer formed on the electrode layer, an n-type high-resistance buffer layer containing a zinc compound as a material and formed on the p-type CZTS light-absorbing layer, and an n-type transparent electroconductive film formed on the n-type high-resistance buffer layer. When the Cu—Zn—Sn composition ratio (atom ratio) of the p-type CZTS light-absorbing layer is represented by coordinates with the Cu/(Zn+Sn) ratio shown on the horizontal axis and the Zn/Sn ratio shown on the vertical axis, the ratio is within the region formed by connecting point A (0.825, 1.108), point B (1.004, 0.905), point C (1.004, 1.108), point E (0.75, 1.6), and point D (0.65, 1.5), and the Zn/Sn ratio of the p-type CZTS light-absorbing layer surface in the n-type high-resistance buffer layer is 1.11 or less. | 06-30-2016 |
| 20160380138 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell includes a semiconductor substrate having a first conductivity type, an emitter layer on a surface of the semiconductor substrate, the emitter layer having a second conductivity type different from the first conductivity type, and electrodes including a first electrode electrically connected to the emitter layer, and a second electrode electrically connected to the semiconductor substrate. The emitter layer includes a high-concentration doping portion adjacent to the first electrode, and a low-concentration doping portion in a region that does not include the high-concentration doping portion. The low-concentration doping portion has a higher resistance than the high-concentration doping portion. The high-concentration doping portion includes a first region having a first resistance, and a second region having a second resistance higher than the first resistance. | 12-29-2016 |
| 20170236972 | SOLAR CELL AND METHOD OF MANUFACTURING THE SAME | 08-17-2017 |
