| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 382147000 | Inspecting printed circuit boards | 33 |
| 20080253643 | Component inspection imaging apparatus structure - An improved component inspection imaging apparatus structure comprises a component inspection imaging apparatus, a component retaining turntable and a plurality of image capturing devices. The component inspection imaging apparatus comprises an extension tube fixing rack, an extension tube, a mirror extending rack, a mirror fixing rack and a conical mirror. A mirror plane portion is disposed on an internal side of the conical mirror, and an inspecting component is put onto the component retaining turntable and rotated under the component inspection imaging apparatus. The component inspection imaging apparatus covers the inspecting component for inspection. An image of the surrounding at the head of the inspecting component is formed at the mirror plane portion in the conical mirror. The image capturing device at the top of the component inspection imaging apparatus captures an image of the head of the inspecting component from top to bottom to determine a defective component quickly. | 10-16-2008 |
| 20080267489 | METHOD FOR DETERMINING ABNORMAL CHARACTERISTICS IN INTEGRATED CIRCUIT MANUFACTURING PROCESS - A method for determining abnormal characteristics in integrated circuit manufacturing process is disclosed. The method comprises obtaining a charged particle microscope image of a sample test structure, wherein the sample including a reference pattern and a test pattern; measuring gray levels of the reference pattern and the test pattern; calculating a standard deviation from a distribution of the gray levels of the reference pattern measured; and determining the abnormal characteristics of the test pattern based on the gray levels measured and the standard deviation. | 10-30-2008 |
| 20090003683 | COMPONENT SENSOR FOR PICK AND PLACE MACHINE USING IMPROVED SHADOW IMAGING - A method of sensing a component held by a nozzle of a pick and place machine is provided. The method includes engaging a source of illumination and recording a reference background image when no component is held by the nozzle. Then, a component is adhered to the nozzle. A shadow image of the component is detected while the component is held by the nozzle. The detected shadow image of the component is adjusted based upon the recorded reference background image. Positional information relative to the component held on the nozzle is computed using the adjusted shadow image. The component is then mounted upon a workpiece using the positional information. | 01-01-2009 |
| 20090041333 | SCANNING ELECTRON MICROSCOPE - An object of the present invention is to provide a scanning electron microscope for reducing a process concerning inspection positioning or an input operation, thereby functioning with high precision at high speed. To accomplish the above object, the present invention provides a scanning electron microscope having a function for identifying a desired position on the basis of a pattern registered beforehand, which includes a means for setting information concerning the pattern kind, the interval between a plurality of parts constituting the pattern, and the size of parts constituting the pattern and a means for forming a pattern image composed of a plurality of parts on the basis of the information obtained by the concerned means. | 02-12-2009 |
| 20090087082 | PATTERN INSPECTION APPARATUS AND METHOD - A pattern inspection apparatus includes a stage configured to mount a target workpiece to be inspected thereon, a sensor configured to include a plurality of light receiving elements arrayed in a second direction orthogonal to a first direction which moves relatively to the stage, and to capture optical images of the target workpiece by using the plurality of light receiving elements, an accumulation unit configured to accumulate each pixel data of the optical images overlappingly captured by the sensor at positions shifted each other in the second direction by a pixel unit, for each pixel, and a comparison unit configured to compare the each pixel data accumulated for each pixel with predetermined reference data. | 04-02-2009 |
| 20090110263 | Coplanarity inspection device for printed circuit boards - A coplanarity inspection device for a printed circuit board includes a base, a supporting disk, a driver, a printed circuit board, a light source, an image acquisition means, and a controller. The supporting disk is arranged on the base, and the driver rotates the supporting disk. The printed circuit board is placed on the supporting disk, and includes a to-be measured side facing downward. The light source projects light beams on the to-be measured side of the printed circuit board. The image acquisition means aims at a specific area of the to-be measured side for image acquisition. The controller is to control the driver, and to store image taken by the image acquisition means. As such, the coplanarity inspection device for a printed circuit board can be employed to inspect whether the coplanarity of the printed circuit board satisfies the standard of setting values in a certain range. | 04-30-2009 |
| 20090123059 | INSPECTION APPARATUS AND INSPECTION METHOD USING ELECTRON BEAM - A visual inspection apparatus and method using the scanning electron microscope are disclosed. An electron beam is scanned repeatedly on a sample, and an inspection and a reference image are generated by the secondary electrons generated from the sample or reflected electrons. From the differential image between the inspection image and the reference image, a defect is determined. The number of pixels in the generated image along the direction of repetitive scanning by the electron beam can be changed. | 05-14-2009 |
| 20100027873 | BOARD APPEARANCE INSPECTION METHOD AND DEVICE - Problem to be Solved To efficiently perform a board appearance inspection with a simple structure. | 02-04-2010 |
| 20100080445 | Constructing Variability Maps by Correlating Off-State Leakage Emission Images to Layout Information - Improved techniques are disclosed for monitoring or sensing process variations in integrated circuit designs. Such techniques provide such improvements by constructing variability maps correlating leakage emission images to layout information. By way of example, a method for monitoring one or more manufacturing process variations associated with a device under test (e.g., integrated circuit) comprises the following steps. An emission image representing an energy emission associated with a leakage current of the device under test is obtained. The emission image is correlated with a layout of the device under test to form a cross emission image. Common structures on the cross emission image are selected and identified as regions of interest. One or more variability measures (e.g., figures of merit) are calculated based on the energy emissions associated with the regions of interest. A variability map is created based on the calculated variability measures, wherein the variability map is useable to monitor the one or more manufacturing process variations associated with the device under test. | 04-01-2010 |
| 20100290696 | METHOD OF MEASURING MEASUREMENT TARGET - In order to measure a measurement target on a PCB, height information of the PCB is acquired by using a first image photographed by illuminating a grating pattern light onto the PCB. Then, a first area protruding on the PCB by greater than a reference height is determined as the measurement target by using the height information. Thereafter, color information of the PCB is acquired by using a second image photographed by illuminating light onto the PCB. Then, the first color information of the first area determined as the measurement target out of the color information of the PCB is set as reference color information. Thereafter, the reference color information is compared with color information of an area except for the first area to judge whether the measurement target is formed in the area except for the first area. Thus, the measurement target may be accurately measured. | 11-18-2010 |
| 20110002529 | METHOD FOR INSPECTING MEASUREMENT OBJECT - An inspection method for inspecting a device mounted on a substrate, includes generating a shape template of the device, acquiring height information of each pixel by projecting grating pattern light onto the substrate through a projecting section, generating a contrast map corresponding to the height information of each pixel, and comparing the contrast map with the shape template. Thus, a measurement object may be exactly extracted. | 01-06-2011 |
| 20110235896 | BURR DETECTING APPARATUS AND BURR DETECTION METHOD THEREOF - A burr detection apparatus includes an imaging unit and a detection unit. The imaging unit captures an original image of a stencil. The original comprises black and white pixels. The detection includes a CPU and a memory. The CPU includes an extracting module, a deciding module, a counting module, and a comparing module. The extracting module obtains a matrix image with N*N pixels, wherein N is an odd number. The deciding module decides whether the center pixel of the matrix image is a black pixel. The counting module obtains a black pixel total counted among marginal pixels which position in the margin of the matrix image in a predetermined rule. The comparing module compares the black pixel total with a predetermined threshold number, and determines that the part of the stencil corresponding to the matrix image has a burr when the black pixel total is less than the threshold number. | 09-29-2011 |
| 20110262028 | IMAGE COMPARISON - Method and systems for comparing two images with an image processing system is disclosed. A target image and a selected image are aligned. The selected image is divided into a plurality of image regions, and properties of predetermined regions are combined. A primary image region within the selected image is selected, and a target image region within the target image is selected and properties of the two regions are compared. | 10-27-2011 |
| 20110280468 | METHOD AND SYSTEM FOR QUICKLY IDENTIFYING CIRCUIT COMPONENTS IN AN EMISSION IMAGE - A system and method for localization and resolvability of an integrated circuit includes selecting one or more electrical stimuli to be applied to a device under test such that the electrical stimuli are chosen to provide a baseline image and a distinguishing image effect as a result of the chosen stimuli when applied to the device under test. The one or more electrical stimuli are applied to the device under test. Emissions from the device under test are measured to provide a measurement data set from the one or more electrical stimuli using one or more measurement tools for collecting the baseline image and the distinguishing image effect. The measurement data set is analyzed to localize and evaluate circuit structures by comparing the baseline image and the distinguishing image effect. | 11-17-2011 |
| 20120128231 | INSPECTION METHOD - In order to inspect a board, firstly, a measurement area is set on a board, and reference data and measurement data of the measurement area are acquired. Then, a plurality of feature blocks is established by a block unit so as to include a predetermined shape in the measurement area, and a merged block is established by merging feature blocks overlapped in the feature blocks. Thereafter, a distortion degree is acquired by comparing reference data and measurement data corresponding to a feature block except for the merged block and/or the merged block, and the distortion degree is compensated for, to set an inspection area in the target measurement area. Thus, an inspection area, in which distortion is compensated for, may be correctly set. | 05-24-2012 |
| 20120301010 | COMPUTING DEVICE, STORAGE MEDIUM AND METHOD FOR IDENTIFYING COMPONENTS OF PCB - In a method for identifying components of a printed circuit board (PCB) using a computing device, the computing device connects to a digital scanner and a display device. The digital scanner scans a PCB to generate a PCB file. The method selects one or more location points from the PCB, locates a coordinate point for each location point according to the PCB file, and builds a coordinate relationship between each location point and the coordinate point. The method converts the PCB file into a PCB image using a visual graphic tool, searches a test point on the PCB image according to a name of a component of the PCB, identifies the component on the PCB according to the test point, and obtains a coordinate value of the component according to the coordinate relationship. The display device displays the name and the coordinate value of the component for users. | 11-29-2012 |
| 20130136335 | PATTERN GENERATING APPARATUS AND PATTERN SHAPE EVALUATING APPARATUS - Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern. | 05-30-2013 |
| 20130294679 | METHOD FOR INSPECTING MEASUREMENT OBJECT - An inspection method for inspecting a device mounted on a substrate, includes generating a shape template of the device, acquiring height information of each pixel by projecting grating pattern light onto the substrate through a projecting section, generating a contrast map corresponding to the height information of each pixel, and comparing the contrast map with the shape template. Thus, a measurement object may be exactly extracted. | 11-07-2013 |
| 20130315468 | PATTERN GENERATING APPARATUS AND PATTERN SHAPE EVALUATING APPARATUS - Although there has been a method for evaluating pattern shapes of electronic devices by using, as a reference pattern, design data or a non-defective pattern, the conventional method has a problem that the pattern shape cannot be evaluated with high accuracy because of the difficulty in defining an exact shape suitable for the manufacturing conditions of the electronic devices. The present invention provides a shape evaluation method for circuit patterns of electronic devices, the method including a means for generating contour distribution data of at least two circuit patterns from contour data sets on the circuit patterns; a means for generating a reference pattern used for the pattern shape evaluation, from the contour distribution data; and a means for evaluating the pattern shape by comparing each evaluation target pattern with the reference pattern. | 11-28-2013 |
| 20140119635 | Emission Curve Tracer Imaging - An apparatus, a method, and a computer-program product for identifying a location of abnormal emission on integrated circuits are disclosed. The location of abnormal emission on integrated circuits is identified by measuring an emission intensity for each of a plurality of voltages for each pixel in an emission image of an integrated circuit; generating a plot of the measured emission intensities as a function of the plurality of voltages for each area in the emission image of the integrated circuit; determining differences in emission intensities of the generated plot for a selected area compared to a plot for a corresponding area known to have no abnormal emission; and identifying location of abnormal emission corresponding to the selected area the detected difference of which exceeds a pre-determined threshold. | 05-01-2014 |
| 20140119636 | AUTOMATED DETECTION OF POTENTIALLY DEFECTIVE PACKAGED RADIO-FREQUENCY MODULES - Systems and methods for identifying defective individual packaged modules are presented. A Printed Circuit Board (PCB) having a set of individual module substrates can be received. Further, capturing an image of the PCB and loading a PCB recipe associated with the PCB can be performed. The image of the PCB can be captured by an image capture module that can include one or more cameras. For each individual module substrate, a portion of the image corresponding to the individual module substrate can be compared to the PCB recipe. In addition, it can be determined based on the comparison whether the individual module substrate matches the PCB recipe within a degree of tolerance. In response to determining that the individual module substrate does not match the PCB recipe within the degree of tolerance, a location of the individual module substrate within a map of the PCB can be stored. | 05-01-2014 |
| 20140119637 | SYSTEMS AND METHODS FOR PROCESSING PACKAGED RADIO-FREQUENCY MODULES IDENTIFIED AS BEING POTENTIALLY DEFECTIVE - Systems and methods for processing potentially defective individual packaged modules are presented. A Printed Circuit Board (PCB) that includes a set of individual module substrates can be received and an image of a first side of the PCB can be captured by an image capture module which can include one or more cameras. Based on the captured image, it can be determined whether the set of individual module substrates includes previously identified (e.g., inked) individual module substrates that correspond to potentially defective individual module substrates. In response to determining that the set of individual module substrates includes inked individual module substrates, a map of the inked individual module substrates can be created. Based on the map, locations corresponding to the inked individual module substrates can be marked with a laser on a second side of the PCB. | 05-01-2014 |
| 20140133735 | METHOD OF INSPECTING A LEAD OF AN ELECTRIC DEVICE - A method of inspecting leads of an electric device, which is capable of improve reliability of inspection regardless of noises induced by regions near the lead. The method uses a height or a brightness of a shoulder region of the lead to inspect existence or nonexistence or a height or a brightness of a tip region of the lead to inspect fastening or unfastening. Therefore, reliability of inspection is improved in comparison with a conventional inspection using colors of lead region. | 05-15-2014 |
| 20140177939 | METHOD OF FINAL DEFECT INSPECTION - Disclosed is a method of final defect inspection, including preparing a final defect inspection apparatus which includes a host device, a microscope, a bar code scanner, a support tool and a signal transceiver, using the host device to calibrate an original point in an outline of the circuit board based on a plurality of original mark positions generated by an electromagnetic pen, using the electromagnetic pen to mark each defect position on the inspection region on the circuit board where any defect is found through the microscope, using the signal transceiver to receive and transmit each defect position to the host device, and using the host device to calculate the coordinate of a scrap region based on a relative position between the original point and each defect position so as to generate a shipment file. | 06-26-2014 |
| 20140219542 | METHOD OF GENERATING HEIGHT INFORMATION IN CIRCUIT BOARD INSPECTION APPARATUS - A method of generating height information in a circuit board inspection apparatus, first, obtaining a first image corresponding to a first area and a second image corresponding to a second area with partially overlapped to the first area of a test board. Next, the first image and the second image are matched based on the overlapped area of the first and second area. Sequentially, a relative positional relationship of the first and second images is obtained from the result of matching. Sequentially, a combined grid image is generated by combining the first grid image and the second grid image based on the relative positioning relationship, wherein the first and second grid images are obtained by irradiating a grid patterned light toward a measurement object formed on the board inspection apparatus. Therefore, it is possible to generate an exact height information. | 08-07-2014 |
| 20140270472 | TIERED LATENCY OF ACCESS FOR CONTENT - A method substantially as shown and described in the detailed description and/or drawings and/or elsewhere herein. A device substantially as shown and described in the detailed description and/or drawings and/or elsewhere herein. | 09-18-2014 |
| 20140270473 | VIRTUAL ASSEMBLY AND PRODUCT INSPECTION CONTROL PROCESSES - A pick-and-place machine and method includes use of a passive component feeder cartridge including a feeder gear. Rotation of the feeder gear causes a component-bearing tape to be fed through the feeder cartridge. A pickup head includes a vacuum nozzle to pick up the components from the tape and a rack gear to engage and drive the feeder gear of the feeder cartridge via translational motion of the pickup head when operatively disposed with respect to a selected feeder cartridge. | 09-18-2014 |
| 20150131894 | VERIFICATION OF CIRCUIT STRUCTURES INCLUDING SUB-STRUCTURE VARIANTS - A method for controlling the functional output of a verification tool upon receipt of a circuit description comprises searching for a predetermined base pattern in the circuit description. The method further comprises searching for predetermined sub-patterns that are assigned to the base pattern, in the circuit description. The method further comprises the validation of each found sub-pattern based on a predetermined rule to minimize the set of reported errors that based on verification of the circuit description. | 05-14-2015 |
| 20150294456 | Method of Detection of Faults on Circuit Boards - A method of detection of faults on circuit boards comprising the steps of capturing an image ( | 10-15-2015 |
| 20150332449 | METHOD AND APPARATUS FOR INTEGRATED CIRCUIT DESIGN - A method for IC design is provided. Firstly, an IC design layout having a main feature with an original margin is received. Then, a first modified margin of the main feature is generated; and a first photolithography simulation procedure of the main feature with the first modified margin is performed to generate a first contour having a plurality of curves. Next, an equation of each of the curves is obtained; each equation of the curves is manipulated to obtain a vertex of each of the curves. After that, a first group of target points are assigned to the original margin. Each of the first group of target points respectively corresponds to one of the vertices. Finally, an optical proximity correction (OPC) procedure is performed by using the first group of target points to generate a second modified margin. An apparatus for IC design is also provided. | 11-19-2015 |
| 20150332452 | INSPECTION METHOD, TEMPLATE SUBSTRATE, AND FOCUS OFFSET METHOD - A substrate to be inspected includes a first pattern constructed with a repetitive pattern that is not resolved by a wavelength of a light source, and at least one alignment mark that is arranged on the same plane as the first pattern. The alignment mark includes a second pattern constructed with a repetitive pattern that is not resolved by the wavelength of the light source, and a programmed defect that is provided in the second pattern and not resolved by the wavelength of the light source. A focus offset is adjusted such that the strongest signal of the programmed defect is obtained with respect to a base value of a gradation value in an optical image of the programmed defect by capturing the optical image while changing a focal distance between the surface in which the first pattern is provided and an optical system. | 11-19-2015 |
| 20150371377 | METHOD AND SYSTEM FOR INSPECTION OF A PATTERNED STRUCTURE - A method and a system for inspection of a patterned structure are provided. In various embodiments, the method for inspection of a patterned structure includes transferring the patterned structure into a microscope. The method further includes acquiring a top-view image of the patterned structure by the microscope. The method further includes transferring the patterned structure out of the microscope and exporting the top-view image to an image analysis processor. The method further includes measuring a difference between a contour of the top-view image and a predetermined layout of the patterned structure by the image analysis processor. | 12-24-2015 |
| 20160025649 | METHOD OF INSPECTING FOREIGN SUBSTANCE ON SUBSTRATE - In order to inspect a substrate, an image information of a substrate before applying solder is displayed. Then, at least one inspection region on the substrate is image-captured to obtain an image of the inspection region that is image-captured. Then, image information that is to be displayed is renewed and the renewed image information is displayed. And, in order to inspect a foreign substance, obtained image of the inspection region is compared with a reference image of the substrate. Therefore, an operator can easily catch a region corresponding to a specific region of the image that is displayed, and easily detect a foreign substance on the substrate. | 01-28-2016 |
