| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 370359000 | Input or output circuit, per se (i.e., line interface) | 43 |
| 20080279179 | Ethernet Based Network for Distributing Ip and Non-Ip Signals - The present invention relates to a system and a method for distributing both IP signals and non-IP signals in an Ethernet based network, wherein the Ethernet based network comprises UTP cabling comprising a number of wires, the method comprises distributing said non-IP signals through a signal path based on wires comprised in said cabling and not being used for distributing said IP signals. The invention further relates to a gateway, a router and a switch for receiving both IP signals and non-IP signals, processing said IP signals and non-IP signals and transmitting said processed IP signals and non-IP signals via the Ethernet based network. | 11-13-2008 |
| 20080285549 | SYNCHRONOUS READ CHANNEL - A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL( | 11-20-2008 |
| 20080291907 | Data-Transmission Device and Method for Transmitting Data with a Reduced Outage Risk - The invention relates to a data transmission device having a number of N uplink interfaces (E1, UP) that can be directed via a processing line (A, B) provided with a data processing component (T, LIC) to a starting element (F). The invention is characterized in that a first processing line (A) and a second processing line (B) are provided, each comprising two separate processing rows (A | 11-27-2008 |
| 20090003326 | INTERFACE SWITCHING METHOD AND DEVICE - In a redundant system where multiple network interfaces can be switched, an interface switching device includes: a transformer for transforming automatic switch information between a predetermined type used for a predetermined network interface and each of other types used for network interfaces other than the predetermined network interface; a switch controller for performing switch control for automatic switch information of the predetermined type; and a control interface for connecting a first network interface to the switch controller via the transformer when first automatic switch information received from the first network interface is not of the predetermined type. | 01-01-2009 |
| 20090003327 | METHOD AND SYSTEM OF DATA COMMUNICATION, SWITCHING NETWORK BOARD - A method and system of data communication, switching network board are disclosed. The data communication system includes multiple line card chassis, each including multiple line cards, at least one switching chip and at least one relay chip. The line card is respectively connected to the switching chip and the relay chip of the same line card chassis. The switching chip of one line card chassis is connected to the relay chip of at least one of other line card chassis. The relay chip of the one line card chassis is connected to the switching chip of the at least one of other line card chassis. The switching network board includes a switching chip and a relay chip. By implementing the above embodiments, the networking complexity is reduced, the networking cost is saved and the system reliability is enhanced in the case that a few line card chassis are cascaded. | 01-01-2009 |
| 20090073967 | High-bandwidth interconnect network for an integrated circuit - A bus structure providing pipelined busing of data between logic circuits and special-purpose circuits of an integrated circuit, the bus structure including a network of pipelined conductors, and connectors selectively joining the pipelined conductors between the special-purpose circuits, other pipelined connectors, and the logic circuits. | 03-19-2009 |
| 20100118867 | SWITCHING FRAME AND ROUTER CLUSTER - A switching chassis includes more than one cascade unit and more than one switching unit, where: the cascade units have cascade interfaces to connect line processing chassis; the switching units have switching ports to connect the cascade interfaces; and any cascade interface of any cascade unit is connected to one switching port of any switching unit. A router cluster with the above switching chassis includes switching chassis and line processing chassis interconnected via optical fibers, where: any optical interface of any line processing chassis is connected to one cascade interface of any cascade unit; and any cascade interface of any cascade unit is connected to one switching port of any switching unit. With the present invention, the capacity of a router cluster can be expanded without the need to replace any component of the router cluster so that the expansion cost is lower. | 05-13-2010 |
| 20100150146 | DEVICE, SYSTEM AND METHOD OF COMMUNICATING BETWEEN CIRCUIT SWITCH INTERFACES OVER AN ANALOG MODULATION COMMUNICATION NETWORK - Some demonstrative embodiments of the invention include a method device and/or system of communicating circuit switch information, e.g., between two or more circuit switch interfaces, over an analog modulation communication network. The method, according to some demonstrative embodiments may include synchronizing at least one slave clock of at least one respective local circuit switch interface to a master clock of a master circuit switch interface which communicates with the at least one local circuit switch interface over an analog modulation communication network. Other embodiments are described and claimed. | 06-17-2010 |
| 20110268111 | PORT TEAMING - An embodiment may include circuitry to be comprised at least in part in a first host, and at least one process to be executed, at least in part, by the circuitry. The circuitry may comprise a first port and a second port. The at least one process may detect, at least in part, a first bandwidth condition of the first port, and may associate, at least in part, in response at least in part to the first bandwidth condition, the first port and the second port with a port team. The second port may have been, prior to being associated, at least in part, with the port team, in a relatively lower power state compared to a relatively higher power state. The second port may be in the relatively higher power state after the second port is associated, at least in part, with the port team. | 11-03-2011 |
| 20110317691 | INTERPROCESSOR COMMUNICATION SYSTEM AND COMMUNICATION METHOD, NETWORK SWITCH, AND PARALLEL CALCULATION SYSTEM - A network switch transfers data, which are to be transferred between nodes, in a time-division multiplex manner after allocating the data to slots, which are created by dividing a unit of time into a plurality of sections. An input unit includes a selection unit that selects a buffer unit according to an input slot in order to transfer the data input from the input port to the buffer unit, an input slot correspondence management table that stores a correspondence relationship between the input slots and the buffer units, and input port management information used to control a communication bandwidth of the input port. An output unit includes a multiplexing unit that selects the buffer unit according to an output slot in order for data, which is to be output to the output port, to be transferred from the selected buffer unit to the output port, an output slot correspondence management table that stores a correspondence relationship between the output slots and the buffer units, and output port manage information used to control a communication bandwidth of the output port. | 12-29-2011 |
| 20120057590 | RELAY SYSTEM, RELAY APPARATUS, AND RELAY METHOD - A relay system includes a first relay apparatus connected to a node through a first line and a second relay apparatus connected to the node through a second line. The first line and the second line belong to the same link aggregation group. The first relay apparatus includes a first control unit. The first control unit notifies, before relaying a received frame, the second relay apparatus of a source address included in the received frame in the absence of first relation information related to the source address in the first storage unit upon receiving the received frame via a port connected to the first line. The second relay apparatus includes a second control unit. The second control unit stores, in the second storage unit, second relation information regarding a relationship between the source address notified by the first relay apparatus and an output port connected to the second line. | 03-08-2012 |
| 20120163375 | SWITCHING DEVICE - A switching device in a network system for transferring data includes one or more source line cards, one or more destination line cards and a switching fabric coupled to the source line cards and the destination line cards to enable data communication between any source line card and destination line card. Each source line card includes a request generator to generate a request signal to be transmitted in order to obtain an authorization to transmit data. Each destination line card includes a grant generator to generate and send back a grant signal to the source line card in response to the request signal received at the destination line card to authorize the source line card to transmit a data cell to the destination line card. | 06-28-2012 |
| 20120170575 | METHODS AND APPARATUS FOR VALIDATION OF EQUAL COST MULTI PATH (ECMP) PATHS IN A SWITCH FABRIC SYSTEM - An apparatus includes a replication engine of a switch module of a multi-stage switch. The replication engine is configured to receive a first validation packet from an input port of the switch module. The replication engine is configured to determine multiple output ports of the switch module to which a data packet can be sent to reach a destination device associated with the first validation packet. The replication engine is configured to define multiple second validation packets based on a number of output ports from the multiple output ports such that each second validation packet from the multiple second validation packets is uniquely associated with an output port from the multiple output ports. The replication engine is configured to send the multiple second validation packets to an output module configured to forward each second validation packet from the multiple second validation packets to its associated output port. | 07-05-2012 |
| 20120218991 | High-Efficiency Preambles for Communications Systems Over Pseudo-Stationary Communication Channels - A method includes appending a preamble to a data packet and transmitting the preamble and data packet over a communication channel in the network. The preamble may be a Beacon, Admission, Broadcast, or High-Throughput Preamble. The Beacon Preamble includes the following symbols SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, LS | 08-30-2012 |
| 20120250679 | Network Transpose Box and Switch Operation Based on Backplane Ethernet - The deployment and scaling of a network of electronic devices can be improved by utilizing one or more network transpose boxes. Each transpose box can include a number of connectors and a meshing useful for implementing a specific network topology. When connecting devices of different tiers in the network, each device need only be connected to at least one of the connectors on the transpose box. One or more of the deployed electronic devices (e.g., switches, transpose boxes) in the network can transmit data based on a backplane Ethernet standard, such as 10GBASE-KR, 10GBASE-KX4, or 40GBASE-KR4. | 10-04-2012 |
| 20120263176 | Unified Bus Architecture for PoE Communication and Control - Embodiments of a unified communication and control bus architecture for Ethernet and/or PoE systems are provided. Embodiments enable a unified communication and control bus architecture that significantly simplifies communication and control in Ethernet and/or PoE systems. Embodiments enable significant savings both in terms of cost and complexity as the number of communication and control buses is reduced down to one. Embodiments can be used in various Ethernet and/or PoE implementations, including, for example, single PCB-single PoE, single PCB-multiple PoE, chassis-based switch, and stackable-based switch configurations. Further, embodiments can be implemented using standard Ethernet as well as proprietary implementations. | 10-18-2012 |
| 20120281693 | FIBRE CHANNEL SWITCHING FABRIC HUB - The Fibre Channel standard was created by the American National Standard for Information Systems (ANSI) X3T11 task group to define a serial I/O channel for interconnecting a number of heterogeneous peripheral devices to computer systems as well as interconnecting the computer systems themselves through optical fiber and copper media at gigabit speeds (i.e., one billion bits per second). Multiple protocols such as SCSI (Small Computer Serial Interface), IP (Internet Protocol), HIPPI, ATM (Asynchronous Transfer Mode) among others can concurrently utilize the same media when mapped over Fibre Channel. A Fibre Channel Fabric is an entity which transmits Fibre Channel frames between connected Node Ports. The Fibre Channel fabric routes the frames based on the destination address as well as other information embedded in the Fibre Channel frame header. Node Ports are attached to the Fibre Channel Fabric through links. | 11-08-2012 |
| 20120320909 | SENDING REQUEST MESSAGES OVER DESIGNATED COMMUNICATIONS CHANNELS - Techniques described herein provide for sending request messages. The request messages may be sent in order. The request messages may be sent over a designated communications channel. | 12-20-2012 |
| 20130058329 | WIRELESS ROUTER SYSTEM - Conventional routers employ a wired backplane that employs “long reach” serializer/deserializer (SerDes) links, but this type of architecture is complicated, costly, and uses a considerable amount of power. To address some of these issues, a new wireless backplane architecture is provided here. This wireless backplane employs direct millimeter wave links between line cards that replaces the convention, wired switching fabric. | 03-07-2013 |
| 20130058330 | WIRELESS BRIDGE IC - Conventional routers employ a wired backplane that employs “long reach” serializer/deserializer (SerDes) links, but this type of architecture is complicated, costly, and uses a considerable amount of power. To address some of these issues, a new wireless backplane architecture is provided here. This wireless backplane employs direct millimeter wave links between line cards that replaces the convention, wired switching fabric. | 03-07-2013 |
| 20130156028 | System and Method for Input/Output Virtualization using Virtualized Switch Aggregation Zones - A network switch includes a first network port, a second network port, and a port virtualization module associated with the first network port. The port virtualization module determines that a device coupled to the first network port includes a first virtual network interface and provides a second virtual network interface on the first network port. The second virtual network interface is associated with the first virtual network interface. The network switch provides an aggregation zone including the second network port, the first virtual network interface, and the second virtual network interface. | 06-20-2013 |
| 20130215884 | DIGITAL RACK INTERFACE POD SYSTEM AND METHOD - A digital rack interface pod (DRIP) that is able to establish a communications link between a remote access appliance and a server having a USB port and a video port, to facilitate a keyboard/video/mouse (KVM) session between the server and the appliance. The DRIP is also able to establish a communications link between the appliance and an Ethernet port of the server that is associated with a service processor (SP) of the server. In this manner the DRIP is able to route data from the SP of the server to the appliance as well as communications from the appliance to the SP Ethernet port of the server. The DRIP is able to intelligently determine which packets of information received from the appliance are intended for the SP Ethernet port of the server and routes those packets to the SP Ethernet port of the server. The DRIP also automatically monitors and dynamically reassigns its two Ethernet ports as needed so that whichever one of its two Ethernet ports it discovers a connection with the appliance on will be the port that it continues using to communicate with the appliance. | 08-22-2013 |
| 20130223439 | ETHERNET COMMUNICATION CIRCUIT WITH AUTO MDI/MDIX FUNCTION - An Ethernet communication circuit includes: a current source; a first transistor coupled between a first node and a third node, and having a control terminal coupled with a first signal pin; a second transistor coupled between the first node and a fourth node, and having a control terminal coupled with a second signal pin; a third transistor coupled between a second node and the fourth node, and having a control terminal coupled with a third signal pin; a fourth transistor coupled between the second node and the third node, and having a control terminal coupled with a fourth signal pin; a first switch coupled between the third node and the current source; a second switch coupled between the fourth node and the current source; and a transconductance circuit for generating an output voltage according to the current passing through the first node and the current passing through the second node. | 08-29-2013 |
| 20140092898 | METHODS, SYSTEMS AND APPARATUS FOR THE SERVICING OF FIBRE CHANNEL LOGIN FRAMES - Methods, apparatus and systems are provided for processing Fibre Channel Fabric Login frames by a FCoE device interconnection apparatus (FIA) and a FCoE device interconnection apparatus controller (FIAC). A Fabric Login (FLOGI) Fibre Channel frame is encapsulated into a Fibre Channel over Ethernet (FCoE) FIP FLOGI frame at a Fibre Channel device interconnection apparatus (FIA). The encapsulated frame is transmitted from the FIA to a FCoE device interconnection apparatus controller (FIAC). A FIP link service accept (LS_ACC) frame is transmitted by the FIAC to the FIA, and the FIP LS_ACC frame is received by the FIA. The FIP frame is decapsulated into a Fibre Channel LS_ACC frame at the FIA. The Fibre Channel LS_ACC frame is transmitted back to the said Fibre Channel device. | 04-03-2014 |
| 20140098810 | FABRIC CHIP HAVING A PORT RESOLUTION MODULE - A fabric chip includes a plurality of port interfaces, wherein each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module, and wherein the port resolution module is to determine which of the port interfaces is to receive a packet from the NCI block, and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. | 04-10-2014 |
| 20140185612 | Universal Network Interface Controller - A universal network interface controller (UNIC) is provided for interfacing a host computer to a switch fabric, a packet network, or both. The UNIC includes encapsulation logic configured to encapsulate a CBP communication for transmission as switch fabric data on the switch fabric. Finally, the UNIC includes transmit logic configured to transmit the encapsulated CBP communication to the remote CBP device using the switch fabric. | 07-03-2014 |
| 20140247825 | Switching Fabric for Embedded Reconfigurable Computing - An output switch fabric is disclosed that comprises an interleaved plurality of multiplexers for switching channels between first and second busses. The busses run in tracks that form a grid pattern. The interleaving of the multiplexers is arranged according to the grid pattern for the busses. | 09-04-2014 |
| 20140247826 | FABRIC CARD AND COMMUNICATIONS DEVICE - A fabric card and a communications device. The fabric card includes at least one fabric card chip and at least two fabric card connector groups, where each fabric card connector group of the at least two fabric card connector groups includes at least two fabric card connectors, the number of fabric card chips is less than the number of at least two fabric card connector groups, each fabric card chip of the at least one fabric card chip connects to all fabric card connectors in at least one fabric card connector group, all fabric card connectors in the fabric card connector group that connect to the fabric card chip exchange data using the fabric card chip. This fully utilizes an exchange capability of the fabric card chip and saves system resources. | 09-04-2014 |
| 20140254588 | REDUCED WAKE UP DELAY FOR ON-DIE ROUTERS - Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other. | 09-11-2014 |
| 20140314076 | CREDIT FLOW CONTROL SCHEME IN A ROUTER WITH FLEXIBLE LINK WIDTHS UTILIZING MINIMAL STORAGE - A method includes receiving flits forwarded from an upstream router into a first input virtual channel (VC) associated with an input port. The flits are associated with packets originated from a first Intellectual Property (IP) core and forwarded to a second IP core. The flits are stored in a VC storage associated with the first input VC. The method further includes performing link width conversion based on a width of the flits being different from a width of an output port. Link width conversion includes accumulation of the flits when the width of the output port is wider and unpacking of the flits when the width of the output port is narrower. Credits are generated based on the flits being forwarded from the first input VC to the output port. The credits are sent to the upstream router to enable receiving more flits from the upstream router. | 10-23-2014 |
| 20140321458 | Network Relay Device - A network relay device capable of shortening retrieval time for an address table or reducing a capacity of the address table is provided. When a transmission-source address of a frame received at first and second port groups is learned, a frame processing unit performs a hash calculation by using the transmission-source address and a first internal identifier 0.1. Then, an internal identifier etc., corresponding to the receiving port is registered in an entry inside an address table obtained by the hash calculation. On the other hand, when a transmission-destination address of a frame received at the first and second pot groups is retrieved, the frame processing unit performs a hash calculation by using the transmission-destination address and 0.1, reads out an entry inside the address table obtained by the hash calculation, and compares the internal identifier inside the address table with an internal identifier corresponding to the receiving port. | 10-30-2014 |
| 20150036681 | PASS-THROUGH ROUTING AT INPUT/OUTPUT NODES OF A CLUSTER SERVER - Node locations in the topology of a cluster computer server are designated as input/output (I/O) nodes that provide input and output for the cluster computer server. Examples of I/O nodes include network nodes that provide an interface for the cluster computer server to an external network, and storage nodes that provide access to storage devices for the cluster compute server. The I/O nodes are configured to analyze received messages and identify whether the message is targeted to the receiving I/O node or to another node of the cluster compute server. Those messages targeted to the I/O node are provided to a processing module of the I/O node for processing. | 02-05-2015 |
| 20150049758 | HOT CARRIER INJECTION TOLERANT NETWORK ON CHIP ROUTER ARCHITECTURE - For a hot carrier injection tolerant network on chip (NoC) router architecture, a coupling module modifies couplings of connecting wires to input buffer data bits in an NoC data channel. A connection module modifies connection points of an input buffer to the connecting wires. | 02-19-2015 |
| 20150319108 | RE-DRIVER FOR BIDRIECTIONAL UNIDRECTIONAL HIGH SPEED SIGNALING WHILE PERMITTING LOW SPEED BIDIRECTIONAL SIGNALING - A re-driver circuit includes a first channel comprising a receiver to receive an input signal from a first port to the re-driver circuit and a driver to receive a signal from the receiver and drive an output signal of the re-driver circuit through a second port. A second channel is also provided and is in parallel with the first channel and includes a bidirectional path switch. A channel control unit determines whether the input signal is indicative of a higher speed mode or of a lower speed mode and enables one of the first and second channels while disabling the other of the channels based on the determined mode. The first and second channels share the first and second ports. | 11-05-2015 |
| 20160014017 | METHODS AND APPARATUSES FOR PATH SELECTION IN A PACKET NETWORK | 01-14-2016 |
| 20160014048 | SERVERS, SWITCHES, AND SYSTEMS WITH SWITCHING MODULE IMPLEMENTING A DISTRIBUTED NETWORK OPERATING SYSTEM | 01-14-2016 |
| 20160134567 | UNIVERSAL NETWORK INTERFACE CONTROLLER - A universal network interface controller (UNIC) is provided for interfacing a host computer to a switch fabric, a packet network, or both. The UNIC includes encapsulation logic configured to encapsulate a CBP communication for transmission as switch fabric data on the switch fabric. Finally, the UNIC includes transmit logic configured to transmit the encapsulated CBP communication to the remote CBP device using the switch fabric. | 05-12-2016 |
| 20160156569 | Node and Method of Assigning Node to Space | 06-02-2016 |
| 20160164689 | REDUCED WAKE UP DELAY FOR ON-DIE ROUTERS - Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other. | 06-09-2016 |
| 20160182194 | SYSTEM AND METHOD OF USING UNDIRECTIONAL LINKS FOR TAP AGGREGATION | 06-23-2016 |
| 20160182355 | CONSTRAINED AND VIABLE PATH COMPUTATION SYSTEMS AND METHODS | 06-23-2016 |
| 20160191404 | SYSTEM AND METHOD FOR SUPPORTING CREDIT MANAGEMENT FOR OUTPUT PORTS IN A NETWORKING DEVICE - A system and method can support efficient packet switching in a network environment. A networking device, such as a network switch, which includes a crossbar fabric, can be associated with a plurality of input ports and a plurality of output ports. Furthermore, the networking device operates to detect a link state change at an output port on the networking device. The output port can provide one or more credits to an output scheduler, and the output scheduler allows one or more packets targeting the output port to be dequeued from one or more virtual output queues, based on the one or more credits. | 06-30-2016 |
| 20160191424 | SYSTEM AND METHOD FOR SUPPORTING EFFICIENT VIRTUAL OUTPUT QUEUE (VOQ) RESOURCE UTILIZATION IN A NETWORKING DEVICE - A system and method can support packet switching in a network environment. A networking device, such as a network switch, which includes a crossbar fabric, can be associated with a plurality of input ports and a plurality of output ports. Furthermore, the networking device can detect a link state change at an output port that is associated with the networking device. Then, the networking device can notify one or more input ports, via the output port, of the link state change at the output port. | 06-30-2016 |
