| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 369590170 | Binary signal level detecting using a reference signal | 6 |
| 20090073840 | Optical disk drive - According to one aspect of the present invention, there is provided an optical disk drive that is equipped with a land prepit detection circuit, the land prepit detection circuit including: a first peak hold circuit for inputting a push-pull signal to output a first peak voltage; a second peak hold circuit for inputting the push-pull signal through an LPF to output a second peak voltage; a bottom hold circuit for inputting the first peak voltage to output a bottom voltage; a slice level generation circuit for dividing the difference between the bottom voltage and the second peak voltage to generate a slice level used to detect a land prepit; and a comparator for comparing the push-pull signal with the slice level generated by the slice level generation circuit to detect the land prepit. | 03-19-2009 |
| 20090103412 | RECORDING CONTROL APPARATUS, RECORDING AND REPRODUCTION APPARATUS, AND RECORDING CONTROL METHOD - A recording control apparatus includes a waveform rectification section for receiving a digital signal generated from an analog signal representing information reproduced from an information recording medium, and rectifying a waveform of the digital signal; a maximum likelihood decoding section for performing maximum likelihood decoding of the digital signal having the waveform thereof rectified, and generating a binary signal representing a result of the maximum likelihood decoding; a reliability calculation section for calculating a reliability of the result of the maximum likelihood decoding based on the digital signal having the waveform thereof rectified and the binary signal; and an adjusting section for adjusting a shape of a recording signal for recording the information on the information recording medium based on the calculated reliability. | 04-23-2009 |
| 20090116357 | REPRODUCING APPARATUS - In a reproducing apparatus, a reading unit reads an information signal from a storage medium, and a converter converts the information signal reproduced by the reading unit into a first digital signal by sampling the information signal in accordance with a reference clock signal with a predetermined frequency higher than the frequency of the information signal. An oversampling unit generates a second digital signal by increasing the number of samples of the first digital signal output from the converter. A data detector selects two adjacent samples from the second digital signal on the basis of the frequency of the information signal reproduced by the reading unit and a phase change of the information signal. The data detector then generates read data using the selected samples of the digital signal. | 05-07-2009 |
| 20090316557 | INFORMATION REPRODUCING APPARATUS AND METHOD, AND COMPUTER PROGRAM - An information reproducing apparatus ( | 12-24-2009 |
| 20100097910 | INFORMATION READOUT DEVICE AND INFORMATION READOUT METHOD - An information readout device includes an equalizer and a maximum likelihood detector. The equalizer includes a second-order Volterra filter, and equalizes a readout signal read out from an information recording medium to a predetermined characteristic to output the equalization signal. The maximum likelihood detector outputs a binary signal through maximum likelihood detection based on the equalization signal. By limiting the number of second-order terms of the second-order Volterra filter to three terms or four terms, a nonlinear component can be effectively corrected. | 04-22-2010 |
| 20130235712 | DATA CAPTURE DEVICE AND METHOD THEREOF - A data capture device including a signal processing unit, a frequency locked circuit and a match circuit is provided. The signal processing unit converts a radio frequency signal to a return-to-zero signal. The frequency locked circuit estimates a minimum interval length by the return-to-zero signal in a plurality of detecting periods, and generates an enable signal according to the minimum interval length and the return-to-zero signal. The frequency locked circuit determines whether to calibrate the enable signal according to a distribution of a plurality of enable pulses in the enable signal to generate a sampling signal. The match circuit samples the return-to-zero signal by the sampling signal and generates a synchronization signal according to a sampling result. The match circuit generates a composite synchronization signal by a virtual signal and the synchronization signal, and captures a plurality of row data from the return-to-zero signal according to the composite synchronization signal. | 09-12-2013 |
