| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 365211000 | Temperature compensation | 33 |
| 20080247252 | Semiconductor Memory Device with Temperature Control - A memory device in a semiconductor substrate includes at least one temperature sensor to provide a temperature dependent signal and at least one circuit to dissipate heat in response to a control signal. A control circuit is coupled to the at least one circuit and is operable to generate the control signal in response to the temperature dependent signal. | 10-09-2008 |
| 20080247253 | NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DURING SENSE OPERATIONS - A non-volatile storage system in which temperature compensation of a bit line voltage is provided during a sense operation of a non-volatile storage element. A gate voltage of a transistor which couples a bit line associated with the non-volatile storage element to a sense module is temperature-compensated so that it is higher when temperature is higher to compensate for variations with temperature of the bit line voltage. The bit line voltage, in turn, varies due to variations in temperature of a threshold voltage of the non-volatile storage element. The sense module determines a programming condition of the non-volatile storage element, which may be provided in a NAND string, by sensing a voltage. The sense operation may be a read operation, verify operation, or erase-verify operation, for instance. Further, the threshold voltage of the non-volatile storage element may be positive or negative. In another aspect, a source voltage is temperature compensated. | 10-09-2008 |
| 20090003109 | METHODS AND APPARATUS FOR EXTENDING THE EFFECTIVE THERMAL OPERATING RANGE OF A MEMORY - Systems, methods, and apparatus are provided for thermal regulation of a non-volatile memory IC. The systems and apparatus may include a thermal sensor on a memory IC; and a heating element coupled to the thermal sensor and adapted to heat the memory IC in response to a signal from the thermal sensor. The methods may include sensing a temperature of a memory IC using an integrated thermal sensor on the memory IC and heating the memory IC, using an integrated heating element operatively coupled to the thermal sensor, if the sensed temperature is below a threshold temperature. | 01-01-2009 |
| 20090003110 | METHODS AND APPARATUS FOR EXTENDING THE EFFECTIVE THERMAL OPERATING RANGE OF A MEMORY - Systems, methods, and apparatus are provided for thermal regulation of a non-volatile memory IC. The systems and apparatus may include a thermal sensor on a memory IC; and a heating element coupled to the thermal sensor and adapted to heat the memory IC in response to a signal from the thermal sensor. The methods may include sensing a temperature of a memory IC using an integrated thermal sensor on the memory IC and heating the memory IC, using an integrated heating element operatively coupled to the thermal sensor, if the sensed temperature is below a threshold temperature. | 01-01-2009 |
| 20090052265 | Semiconductor Memory Device Changing Refresh Interval Depending on Temperature - A semiconductor memory device includes a memory core circuit having memory cells for storing data, a circuit configured to refresh the memory core circuit at a refresh interval, a temperature detecting unit configured to detect temperature, and a control circuit configured to shorten the refresh interval immediately in response to detection of a predetermined temperature rise by the temperature detecting unit and to elongate the refresh interval after refreshing every one of the memory cells at least once in response to detection of a temperature drop by the temperature detecting unit. | 02-26-2009 |
| 20090161464 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a memory cell array which includes a plurality of memory cells which are arrayed in a matrix at intersections between a plurality of word lines and a plurality of bit lines and a power supply circuit which includes a first band gap reference circuit which outputs a first output voltage, and a second band gap reference circuit which outputs a second output voltage having lower temperature characteristics than the first output voltage on a low temperature side, and generates a power supply voltage on the basis of the second output voltage at a time of a data write operation of the memory cells. | 06-25-2009 |
| 20090245003 | SEMICONDUCTOR MEMORY DEVICE, METHOD OF OPERATING SEMICONDUCTOR MEMORY DEVICE, AND MEMORY SYSTEM - A semiconductor memory device is provided which comprises: a sense amplifier; and a bit line, wherein the disconnection of the sense amplifier from the bit line is performed in a data read operation when temperature in the semiconductor memory device is at a first temperature, and wherein the disconnection of the sense amplifier from the bit line is not performed in the data read operation when the temperature in the semiconductor memory device is at a second temperature. | 10-01-2009 |
| 20090262593 | CIRCUIT AND METHOD FOR RETRIEVING DATA STORED IN SEMICONDUCTOR MEMORY CELLS - A circuit comprises at least one memory cell adapted to store data in terms of values of an electrical characteristic thereof, which exhibits a variability with temperature according to a first variation law; a voltage generator is provided for generating a voltage to be supplied to the at least one memory cell for retrieving the data stored therein, the voltage generator including first means adapted to cause the generated voltage take a value in a set of target values including at least one target value, corresponding to an operation to be performed on the memory cell. The voltage generator comprises second means for causing the value taken by the generated voltage vary with temperature according to a prescribed second variation law exploiting a compensation circuit element having said electrical characteristic. | 10-22-2009 |
| 20100046311 | ON-CHIP TEMPERATURE SENSOR - A temperature invariant reference voltage and a temperature variant physical quantity, such as a voltage or current, are generated. The temperature variant physical quantity changes in response to a temperature of the integrated circuit. A temperature sensor circuit generates a voltage that is linearly dependent on the temperature. A level generator circuit generates 2 | 02-25-2010 |
| 20100054067 | METHODS AND APPARATUSES FOR CONTROLLING FULLY-BUFFERED DUAL INLINE MEMORY MODULES - Methods and apparatuses are presented for controlling a fully buffered dual inline memory module. In one embodiment, the memory module may include at least two memory chips, a buffer coupled to the at least two memory chips (the buffer serially receiving data to be stored in the at least two memory chips), and a heat sink thermally coupled to the at least two memory chips and thermally coupled to the buffer such that heat generated by the buffer is coupled to a first memory chip within the at least two memory chips. The may be configured such that it operates at a higher temperature than the first memory chip and the refresh rate of the first memory chip may be adjusted when the temperature of the first memory chip is outside of a predetermined range. | 03-04-2010 |
| 20100054068 | TEMPERATURE COMPENSATION OF MEMORY SIGNALS USING DIGITAL SIGNALS - A temperature sensor generates a digital representation of the temperature of the integrated circuit. A logic circuit reads the digital temperature and generates a multiple bit digital representation of an operational voltage and a multiple bit digital representation of a timing signal, both being functions of the integrated circuit temperature. A voltage generator converts the digital representation of the operational voltage to an analog voltage that biases portions of the integrated circuit requiring temperature compensated voltages. In one embodiment, the temperature compensated voltages bias memory cells. A timing generator converts the multiple bit digital representation of the timing signal to a logic signal. | 03-04-2010 |
| 20100061172 | TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT - A temperature detector in an integrated circuit comprises a temperature-dependent voltage generator, a ring oscillator, a timer and a clock-driven recorder. The temperature-dependent voltage generator is configured to generate at least one temperature-dependent voltage. The ring oscillator is configured to generate a clock signal, which is affected by one of the at least one temperature-dependent voltage. The timer is configured to generate a time-out signal, which is affected by one of the temperature-dependent voltage. The clock-driven recorder has a clock input terminal in response to the clock signal and time-out signal. | 03-11-2010 |
| 20100110815 | Non-Volatile Memory Device Having Temperature Compensator and Memory System Thereof - Provided is a semiconductor memory device. The semiconductor memory device includes: a voltage generator adjusting a DC voltage supplied into the semiconductor memory device according to a current temperature; and a control logic activating a temperature detection operation of the voltage generator and an adjustment operation of the DC voltage according to an operation mode, wherein the voltage generator adjusts the DC voltage according to offset information about the semiconductor memory device. | 05-06-2010 |
| 20100124136 | TEMPERATURE COMPENSATION CIRCUIT AND METHOD FOR SENSING MEMORY - A temperature compensation circuit includes a voltage generator, a comparator and an emulation cell array. The voltage generator provides a predetermined voltage and a reference voltage. The comparator has a first terminal for receiving the predetermined voltage, and a second terminal for receiving the reference voltage. The emulation cell array is coupled to the first terminal of the comparator. When a voltage of the first terminal of the comparator is discharged, via the emulation cell array, to be lower than the reference voltage, the comparator outputs a read timing control signal to control a sense amplifier to perform a sensing operation. | 05-20-2010 |
| 20100271894 | METHODS AND APPARATUS FOR EXTENDING THE EFFECTIVE THERMAL OPERATING RANGE OF A MEMORY - Apparatus and systems are provided for thermal regulation of a memory integrated circuit (“IC”). The apparatus and systems may include a thermal sensor on a memory IC, and a heating element coupled to the thermal sensor. The heating element is adapted to heat the memory IC in response to a signal from the thermal sensor. Other aspects are also provided. | 10-28-2010 |
| 20110170366 | TEMPERATURE DETECTOR IN AN INTEGRATED CIRCUIT - A method for determining a temperature in a circuit comprises receiving a periodic signal. A frequency of the periodic signal is an increasing function of temperature. A number of oscillations of the periodic signal is determined during a time interval. A length of the time interval is an increasing function of temperature. The temperature is based on the determined number of oscillations. | 07-14-2011 |
| 20110205823 | Non-Volatile Storage With Temperature Compensation Based On Neighbor State Information - Data is programmed into and read from a set of target memory cells. When reading the data, temperature compensation is provided. The temperature compensation is based on temperature information and the state of one or more neighbor memory cells. In one embodiment, when data is read from set of target memory cells, the system senses the current temperature and determines the differences in temperature between the current temperature and the temperature at the time the data was programmed. If the difference in temperature is greater than a threshold, then the process of reading the data includes providing temperature compensation based on temperature information and neighbor state information. In one alternative, the decision to provide the temperature compensation can be triggered by conditions other than a temperature differential. | 08-25-2011 |
| 20110292751 | METHODS AND APPARATUS FOR EXTENDING THE EFFECTIVE THERMAL OPERATING RANGE OF A MEMORY - Apparatus and systems are provided for thermal regulation of a memory integrated circuit (“IC”). The apparatus and systems may include a thermal sensor on a memory IC, and a heating element coupled to the thermal sensor. The heating element is adapted to heat the memory IC in response to a signal from the thermal sensor. Other aspects are also provided. | 12-01-2011 |
| 20120008447 | SEMICONDUCTOR DEVICE HAVING VARIABLE PARAMETER SELECTION BASED ON TEMPERATURE - A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, a word line low voltage, or the like. In this way, operating specifications of a semiconductor device at worse case temperatures may be met without compromising performance at normal operating temperatures. Each temperature sensing circuit may include a selectable temperature threshold value as well as a selectable temperature hysteresis value. In this way, temperature performance characteristics may be finely tuned. Furthermore, a method of testing the temperature sensing circuits is disclosed in which a current value may be monitored an temperature threshold values and temperature hysteresis values may be thereby determined. | 01-12-2012 |
| 20120014198 | SEMICONDUCTOR MEMORY DEVICE WITH TEMPERATURE SENSING DEVICE CAPABLE OF MINIMIZING POWER CONSUMPTION IN REFRESH - A semiconductor memory device capable of measuring a temperature without the influence of noise includes a temperature sensing device for sensing a current temperature in response to a control signal, wherein the semiconductor memory device enters a power save mode for a predetermined time starting from an activation of the control signal and wherein the power save mode has substantially no power consumption. A method for driving a semiconductor memory device in accordance with the present invention includes sensing a current temperature in response to a control signal and entering a power save mode for a predetermined time starting from an activation of the control signal, wherein the power save mode has substantially no power consumption. | 01-19-2012 |
| 20120236670 | Non-Volatile Storage With Temperature Compensation Based On Neighbor State Information - Data is programmed into and read from a set of target memory cells. When reading the data, temperature compensation is provided. The temperature compensation is based on temperature information and the state of one or more neighbor memory cells. In one embodiment, when data is read from set of target memory cells, the system senses the current temperature and determines the differences in temperature between the current temperature and the temperature at the time the data was programmed. If the difference in temperature is greater than a threshold, then the process of reading the data includes providing temperature compensation based on temperature information and neighbor state information. In one alternative, the decision to provide the temperature compensation can be triggered by conditions other than a temperature differential. | 09-20-2012 |
| 20130083616 | TEMPERATURE DETECTION CIRCUIT OF SEMICONDUCTOR MEMORY APPARTUS - A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal. | 04-04-2013 |
| 20140204694 | SYSTEMS AND METHODS FOR ADAPTIVE SOFT PROGRAMMING FOR NON-VOLATILE MEMORY USING TEMPERATURE SENSOR - Erasing of a non-volatile memory (NVM) having an array of bit cells includes soft programming after an initial erasing of the bit cells. Over-erased bit cells are determined. A temperature is detected. A first soft program gate voltage based on the temperature is provided. Soft programming on the over-erased bit cells using the first soft program gate voltage is performed. Any remaining over-erased bit cells are identified. if there are any remaining over-erased bit cells, soft programming is performed on the remaining over-erased bit cells using a second soft program gate voltage incremented from the first soft program gate voltage. | 07-24-2014 |
| 365212000 | Semiconductor | 10 |
| 20080247254 | METHOD FOR TEMPERATURE COMPENSATING BIT LINE DURING SENSE OPERATIONS IN NON-VOLATILE STORAGE - Temperature-compensation is provided during a sense operation of a non-volatile storage element. A gate voltage of a transistor which couples a bit line associated with the non-volatile storage element to a sense module is temperature-compensated so that it is higher when temperature is higher to compensate for variations with temperature of the bit line voltage. The bit line voltage, in turn, varies due to variations in temperature of a threshold voltage of the non-volatile storage element. The sense module determines a programming condition of the non-volatile storage element, which may be provided in a NAND string, by sensing a voltage. The sense operation may be a read operation, verify operation, or erase-verify operation, for instance. Further, the threshold voltage of the non-volatile storage element may be positive or negative. In another aspect, a source voltage is temperature compensated. | 10-09-2008 |
| 20090022002 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device is provided for minutely changing a refresh interval according to a detected temperature and thereby lowering its power consumption. A temperature detector detects a temperature of a chip and outputs the corresponding temperature signal. A reference temperature signal output unit outputs the corresponding reference temperature signal with each of different reference temperatures to be compared with the chip temperature according to a selection signal. A temperature comparison unit compares the chip temperature with the reference temperature through the temperature signal and the reference temperature signal. A selection signal output unit outputs the selection signal according to the compared result of the temperature comparison unit. A refresh interval control unit changes the refresh interval according to the compared result of the temperature comparison unit. | 01-22-2009 |
| 20090052266 | TEMPERATURE THROTTLING MECHANISM FOR DDR3 MEMORY - A method for throttling a bus, e.g. a memory bus, may be used to compensate for potential inaccuracy of feedback information received for monitored characteristics, e.g. temperature, reported by sensors configured in monitored devices, e.g. memory devices, accessed through the bus. For example, in case of a memory bus, a memory controller may be configured to throttle the memory bus in a way that maximizes system performance while ensuring that the memory devices keep operating within their thermal limits. Readings obtained from the memory, or from close proximity to the memory, may indicate whether the temperature of the memory has crossed over one or more designated trip points, and one or more algorithms may be executed to perform throttling according to the readings and based on fixed and dynamic throttling modes. The memory controller may infer temperature changes taking place in the memory devices when successive readings are indicating that the temperature of the memory device has remained over a given trip point. Based on these inferences, the memory controller may then change the manner in which the bus is throttled. | 02-26-2009 |
| 20090080276 | Temperature Dependent Bias for Minimal Stand-by Power in CMOS Circuits - A circuit is disclosed which generates such a bias voltage that when this bias voltage is received by a large plurality of devices of a semiconductor chip, power consumption is reduced in the stand-by mode at any particular operating temperature. The disclosed circuit contains at least one monitor FET, which is kept in its off-state, and which has common properties with the large plurality of FET devices. The temperature dependent leakage current of the monitor FET is sensed, and used to generate the bias voltage in proportion to the leakage current. This bias voltage is received by the large plurality FET devices on their gate electrodes, or on their body terminals. | 03-26-2009 |
| 20090091996 | Solid state semiconductor storage device with temperature control function, application system thereof and control element thereof - A solid state semiconductor storage device with temperature control function comprises a non-volatile memory unit, a temperature sensing element, and a control unit. The temperature sensing element is used for sensing the operation temperature of the solid state semiconductor storage device so as to provide a temperature sensing signal to the control unit. According to the temperature sensing signal, the control unit controls the operation mode of the solid state semiconductor storage device for achieving the function of temperature control. | 04-09-2009 |
| 20090190427 | System to Enable a Memory Hub Device to Manage Thermal Conditions at a Memory Device Level Transparent to a Memory Controller - A memory system is provided that manages thermal conditions at a memory device level transparent to a memory controller. The memory systems comprises a memory hub device integrated in a memory module, a set of memory devices coupled to the memory hub device, and a first set of thermal sensors integrated in the set of memory devices. A thermal management control unit integrated in the memory hub device monitors a temperature of the set of memory devices sensed by the first set of thermal sensors. The memory hub device reduces a memory access rate to the set of memory devices in response to a predetermined thermal threshold being exceeded thereby reducing power used by the set of memory devices which in turn decreases the temperature of the set of memory devices. | 07-30-2009 |
| 20100157709 | Semiconductor memory device having shared temperature control circuit - A semiconductor memory device includes a plurality of memory banks; a plurality of temperature sensing circuits, and a shared control circuit. The temperature sensing circuits correspond to the memory banks and each is disposed in the vicinity of a corresponding memory bank. The shared control circuit is connected to the plurality of temperature sensing circuits and a plurality of refresh circuits for refreshing the plurality of memory banks, performs calibration on the plurality of temperature sensing circuits, performs digital processing on signals for separately controlling refresh intervals for the plurality of memory banks, and transmits the processed signals to the plurality of refresh circuits. Therefore, the refresh intervals for individual channels or banks are separately or selectively controlled. Further, since the plurality of temperature sensing circuits are connected to the shared temperature control circuit, the occupied area of the circuits in a chip is reduced or minimized. | 06-24-2010 |
| 20100315896 | TEMPERATURE DETECTION CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS - A temperature detection circuit of a semiconductor memory apparatus includes a fixed period oscillator, a temperature variable signal generating unit and a counting unit. The oscillator is configured to generate a fixed period oscillator signal when an enable signal is enabled. The temperature variable signal generating unit is configured to generate a temperature variable signal whose enable interval varies based on temperature variations, when the enable signal is enabled. The counting unit is configured to count the oscillator signal during the enable interval of the temperature variable signal to generate a temperature information signal. | 12-16-2010 |
| 20110026349 | CIRCUIT FOR COMPENSATING TEMPERATURE DETECTION RANGE OF SEMICONDUCTOR MEMORY APPARATUS - A circuit for compensating a temperature measurement range of a semiconductor memory apparatus is presented. The circuit includes an oscillator, a temperature variable pulse generating unit, a counter, and an output controlling unit. The counter enable signal generating unit inputs a temperature pulse and outputs a counter enable signal corresponding to the temperature pulse in response to receiving a control signal. The counter inputs and counts an oscillator signal in response to receiving the counter enable signal and outputs a counting signal. The output controlling unit outputs a temperature information code signal proportional to the counting signal or to output the temperature information code signal at a fixed level corresponding to a maximum value of the counting signal. | 02-03-2011 |
| 20130058181 | MEMORY WITH TEMPERATURE COMPENSATION - A memory element in which the temperature coefficient of a memory cell substantially matches the temperature coefficient of a reference cell and tuning either the temperature coefficient of a memory cell to substantially match the temperature coefficient of the reference cell provides for improved precision of sensing or reading memory element states, particularly so as to minimize the affect of temperature variations on reading and sensing states. | 03-07-2013 |
