| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 365185040 | Data security | 18 |
| 20080205143 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING PROTECTION FUNCTION FOR EACH MEMORY BLOCK - A nonvolatile semiconductor memory device includes a memory cell array constituted by a plurality of memory blocks, an interface, a write circuit, and a read circuit. A protect flag is written in the memory block. The readout protect flag can be output to an external device through the interface. When a write command is input from the interface, the write circuit executes the write command when the protect flag in the selected memory block has a first value and does not execute the write command when the protect flag has a second value. | 08-28-2008 |
| 20090067241 | DATA PROTECTION FOR WRITE ABORT - A portion of a nonvolatile memory array that is likely to contain, partially programmed data may be identified from a high sensitivity read, by applying stricter than usual ECC requirements, or using pointers to programmed sectors. The last programmed data may be treated as likely to be partially programmed data. Data in the identified portion may be copied to another location, or left where it is with an indicator to prohibit further programming to the same cells. To avoid compromising previously stored data during subsequent programming, previously stored data may be backed up. Backing up may be done selectively, for example, only for nonsequential data, or only when the previously stored data contains an earlier version of data being programmed. If a backup copy already exists, another backup copy is not created. Sequential commands are treated as a single command if received within a predetermined time period. | 03-12-2009 |
| 20090103362 | SYSTEM AND METHOD FOR SETTING ACCESS AND MODIFICATION FOR SYNCHRONOUS SERIAL INTERFACE NAND - The invention includes a system and method of modifying a setting of a NAND flash memory device using serial peripheral interface (SPI) communication from a master to the NAND flash memory device. One embodiment generally includes sending an enable signal to a first memory circuit input, sending a clock signal to a second memory circuit input, sending a command signal synchronized to the clock signal to a third memory circuit input, sending a memory register address signal synchronized to the clock signal to the third memory circuit input, and sending a setting signal synchronized to the clock signal to the third memory circuit input. | 04-23-2009 |
| 20090196100 | SYSTEMS AND METHODS FOR REDUCING UNAUTHORIZED DATA RECOVERY FROM SOLID-STATE STORAGE DEVICES - A memory system comprising one or more memory devices is purged to prevent unauthorized access to data stored therein. A host system passes control of purge operations to the memory system. The purge operations are configured to erase data, write a pattern to memory locations, physically damage the memory devices in the memory system, or combinations of the foregoing. The memory system can perform a purge operation on two or more memory devices in parallel. The memory system includes a destroy circuit to provide an over-current and/or over-voltage condition to the memory devices. The memory system also includes one or more isolation circuits to protect control circuitry in the memory system from the over-current and/or over-voltage condition. In some embodiments, the memory system includes a backup battery so it can complete a purge operation if it looses its power connection to the host system. | 08-06-2009 |
| 20100002511 | SECURE NON-VOLATILE MEMORY DEVICE AND METHOD OF PROTECTING DATA THEREIN - The invention relates to a non-volatile memory device comprising: an input for providing external data (D | 01-07-2010 |
| 20100080057 | Providing A Capacitor-based Power Supply To Enable Backup Copying Of Data From Volatile Storage To Persistent Storage - A system includes a volatile storage, a persistent storage, a capacitor-based power supply, and a controller coupled to the capacitor-based power supply. The controller detects interruption of main power, and in response to detecting the interruption of main power, begins backup copying of data from the volatile storage to the persistent storage. After beginning the backup copying of data, the controller checks whether the main power has resumed prior to depletion of the capacitor-based power supply. In response to detecting that main power has resumed prior to depletion of the capacitor-based power supply, the controller resumes operation using content of the volatile storage without restoring data from the persistent storage. | 04-01-2010 |
| 20100296339 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING PROTECTION FUNCTION FOR EACH MEMORY BLOCK - A nonvolatile semiconductor memory device includes a memory cell array constituted by a plurality of memory blocks, an interface, a write circuit, and a read circuit. A protect flag is written in the memory block. The readout protect flag can be output to an external device through the interface. When a write command is input from the interface, the write circuit executes the write command when the protect flag in the selected memory block has a first value and does not execute the write command when the protect flag has a second value. | 11-25-2010 |
| 20110007567 | TEMPORARY LOCKING OF AN ELECTRONIC CIRCUIT - A method and a circuit for protecting at least one piece of information contained in an electronic circuit by disabling at least one function of the circuit in case of detection of a number of abnormal operations greater than a threshold, in which the disabling of the function is temporary, of a duration independent from whether the circuit is powered or not. | 01-13-2011 |
| 20110122694 | LIMITATION OF THE ACCESS TO A RESOURCE OF AN ELECTRONIC CIRCUIT - A method and a circuit for controlling the access to at least one resource of an electronic circuit, in which a test of the value of a counter over at least one bit conditions the access to the resource, the counter being automatically reset after a time period independent from whether the circuit is powered or not. | 05-26-2011 |
| 20110128785 | APPARATUS AND METHOD FOR PROTECTING DATA IN FLASH MEMORY - An apparatus for securely protecting data in a flash memory upon power off is disclosed. In the apparatus, a power detector monitors a voltage output from a power supply unit, and outputs a power fail signal when the voltage drops by a predetermined reference voltage or more. A Programmable Logic Device (PLD) outputs a Write Protect (WP) signal for performing write protection on the flash memory upon receiving the power fail signal from the power detector. A WP controller outputs the WP signal output from the PLD to the flash memory, according to a Ready/Busy (R/B) state of the flash memory. | 06-02-2011 |
| 20110205794 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING PROTECTION FUNCTION FOR EACH MEMORY BLOCK - A nonvolatile semiconductor memory device includes a memory cell array constituted by a plurality of memory blocks, an interface, a write circuit, and a read circuit. A protect flag is written in the memory block. The readout protect flag can be output to an external device through the interface. When a write command is input from the interface, the write circuit executes the write command when the protect flag in the selected memory block has a first value and does not execute the write command when the protect flag has a second value. | 08-25-2011 |
| 20140133227 | NON-VOLATILE MEMORY DEVICE AND METHOD OF OPERATING - A method of operating a non-volatile memory includes; during power-on, reading control information from an information block and lock information from an additional information block, then upon determining that a secure block should be locked, generating a lock enable signal that inhibits access to data stored in the secure block, and a read-only enable signal that prevents change in the data stored in the additional information block. | 05-15-2014 |
| 20140146607 | SEMICONDUCTOR MEMORY DEVICE FOR PSEUDO-RANDOM NUMBER GENERATION - According to one embodiment, a semiconductor memory device includes a memory cell array including a plurality of memory cells, a random number generation circuit configured to generate a random number, and a controller configured to control the memory cell array and the random number generation circuit. The random number generation circuit includes a random number control circuit configured to generate a random number parameter based on data which is read out from the memory cell by a generated control parameter, and a pseudo-random number generation circuit configured to generate the random number by using the random number parameter as a seed value. | 05-29-2014 |
| 20140160844 | MEMORY REPAIRING METHOD, AND MEMORY CONTROLLER AND MEMORY STORAGE APPARATUS USING THE SAME - A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100° C.˜600° C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss. | 06-12-2014 |
| 20140219021 | DATA PROTECTION FOR UNEXPECTED POWER LOSS - A data storage device receives a write data command and data. The data is stored in a buffer of the data storage device. The data storage device issues a command complete status indication. After the command complete status indication is issued, the data are stored in a primary memory of the data storage device. The primary memory comprises a first type of non-volatile memory and the buffer comprises a second type of non-volatile memory that is different from the first type of non-volatile memory. | 08-07-2014 |
| 20150103598 | PROTECTION AGAINST SIDE-CHANNEL ATTACKS ON NON-VOLATILE MEMORY - A non-volatile memory (NVM) device includes an NVM array, which is configured to store data, and control logic. The control logic is configured to receive data values for storage in the NVM array, and to write at least some of the received data values to the NVM array and simultaneously to write complements of the at least some of the received data values. | 04-16-2015 |
| 20150131377 | METHOD AND DEVICE FOR PROTECTING DATA OF FLASH MEMORY - A method of protecting data of a flash memory is provided. The method includes detecting primary power applied to the flash memory, and applying secondary power converted from the primary power to the flash memory. The primary power is compared to first and second values, and a writing-protection pin of the flash memory is enabled when the detected primary power reaches a predetermined value. | 05-14-2015 |
| 20150146486 | Data Storage Device and Flash Memory Control Method - A data storage device using a FLASH memory with replay-protected blocks. The storage space of the FLASH memory is divided into blocks and each block is further divided into pages. A controller is provided in the data storage device to couple to the FLASH memory. The controller manages at least one replay-protected memory block of the FLASH memory. The controller programs a success flag and a write count into a system block of the FLASH memory after the controller programs two pages into the at least one replay-protected memory block of the FLASH memory. The controller may perform a power restoration process based on the success flag of the system block or/and based on the amount of programmed pages of the at least one replay-protected memory block. | 05-28-2015 |
