Class / Patent application number | Description | Number of patent applications / Date published |
361768000 | Having leadless component | 26 |
20080218985 | MULTILAYER PRINTED CIRCUIT BOARD AND METHOD OF MANUFACTURING SAME - A printed circuit board is provided which is capable of shortening intervals among core layer vias and suppressing high impedance. After the core layer vias each having a cylindrical conducting layer are formed so that conducting portions come into contact with one another, a punching process is performed along a symmetric axis of each of four core layer vias so that a through-hole of a specified diameter passes through a core board to form the core layer vias separated from one another and the through-hole is filled with an insulator and a punching process is performed along a central axis of the through-hole filled with the insulator so as to pass through the core board to form the through-hole having a diameter being shorter than that of the through-hole and the conducting layer is formed on an inside wall of the through-hole to form the core layer via. | 09-11-2008 |
20090016036 | CONDUCTOR REINFORCEMENT FOR CIRCUIT BOARDS - Conductors of a printed circuit board have conductive flanges between pads and traces. In one embodiment, the flange has a maximum width at least one half the maximum width of the pad. It is believed that such an arrangement can significantly reduce fractures or other damage to the conductors of the printed circuit board that may result from stress applied to the board during testing or further assembly operations. Other embodiments are described and claimed. | 01-15-2009 |
20090237901 | Monolithic Molded Flexible Electronic Assemblies Without Solder and Methods for their Manufacture | 09-24-2009 |
20090303691 | PORTABLE TERMINAL - Disclosed is a portable terminal, including a first circuit board coupled to a main body and having a first connection terminal mounted on a surface thereof; a second circuit board coupled to the main body so as to cover at least a portion of the first circuit board, having a first area where an intermediate connection terminal contacting the first connection terminal is mounted on a surface thereof, and a second area where a second connection terminal electrically connected to the intermediate connection terminal is mounted on a surface thereof; and an electronic component having at least a portion thereof contacted by the second connection terminal, and for being electrically connected to the first circuit board. | 12-10-2009 |
20090310320 | Low profile solder grid array technology for printed circuit board surface mount components - A standoff contact array is disposed between a mounting substrate of a flip-chip package and a board. The standoff contact array is formable by mating a low-profile solder bump on the mounting substrate with a low-profile solder paste on the board. Thereafter, the standoff contact array is formed by reflowing the low-profile solder paste on the board against the low-profile solder bump on the mounting substrate. | 12-17-2009 |
20090316375 | Electronic circuit board including surface mount device - An electronic circuit board includes a substrate, a plurality of devices mounted on the substrate, and a pattern part disposed on a surface of the substrate. The devices include a surface mount device having a heat capacity higher than other device. The surface mount device includes a terminal part. The pattern part has an area larger than a pattern area determined in accordance with a current capacity for securing a required current value to be supplied to the surface mount device. The pattern part includes a land part to which the terminal part of the surface mount device is coupled with a solder melted by heating in a reflow furnace. | 12-24-2009 |
20100149769 | CIRCUIT BOARD DEVICE AND INTEGRATED CIRCUIT DEVICE - A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode. | 06-17-2010 |
20110090659 | Package Having An Inner Shield And Method For Making The Same - The present invention relates to a package having an inner shield and a method for making the same. The package includes a substrate, a plurality of electrical elements, a molding compound, an inner shield and a conformal shield. The electrical elements are disposed on the substrate. The molding compound is disposed on a surface of the substrate, encapsulates the electrical elements, and includes at least one groove. The groove penetrates a top surface and a bottom surface of the molding compound and is disposed between the electrical elements, and there is a gap between a short side of the groove and a side surface of the molding compound. The inner shield is disposed in the groove and electrically connected to the substrate. The conformal shield covers the molding compound and a side surface of the substrate, and electrically connects the substrate and the inner shield. Therefore, the inner shield enables the electrical elements to have low electromagnetic interference and high electromagnetic compatibility. | 04-21-2011 |
20110134618 | CONNECTION STRUCTURE FOR CHIP-ON-GLASS DRIVER IC AND CONNECTION METHOD THEREFOR - A connection structure for a chip-on-glass (COG) driver IC and a connection method therefor are provided. The connection structure includes a driver IC having a surface provided with a plurality of polymeric bumps and a plurality of conductive bumps, and the height of the polymeric bumps in relation to the surface is smaller than that of the conductive bumps. When the driver IC is bonded to a glass substrate via an adhesive film by thermal compression bonding, the polymeric bumps are embedded into the adhesive film, and a gap is defined between the polymeric bumps and the glass substrate. Thus, the polymeric bumps can increase the contact area between the driver IC and the adhesive film, and enhance the connection reliability between the conductive bumps and pads of the glass substrate. | 06-09-2011 |
20110292625 | BONDING PAD STRUCTURE - A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes. | 12-01-2011 |
20110310578 | CUT-EDGE POSITIONING TYPE SOLDERING STRUCTURE AND METHOD FOR PREVENTING PIN DEVIATION - A cut-edge positioning type soldering structure and a method for preventing a pin deviation can prevent a plurality of pins of an electronic component from being deviated when the pins are soldered onto a printed circuit board by a solder, and each of at least two solder pads includes at least two cut edges, and the solder pads are installed in an alignment direction on the printed circuit board, such that the cut-edge positioning type soldering structure and the method for preventing a pin deviation can improve the efficiency of manufacturing processes and reduce the manufacturing cost. | 12-22-2011 |
20130033836 | CHIP-COMPONENT STRUCTURE - A chip-component structure includes an interposer and a multilayer capacitor mounted thereon. The interposer includes a substrate, a component connecting electrode, an external connection electrode, and a side electrode. The component connecting electrode and the external connection electrode are electrically connected by the side electrode. The component connecting electrode is joined to an external electrode of the multilayer capacitor. The substrate includes a communication hole that communicates between opposite spaces opening in both principal surfaces of the substrate. | 02-07-2013 |
20130039026 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device in which misalignment between a semiconductor die and a substrate (e.g., a circuit board) can be prevented or substantially reduced when the semiconductor die is attached to the circuit board. In a non-limiting example, the semiconductor device includes: a semiconductor die comprising at least one bump; and a circuit board comprising at least one circuit pattern to which the bump is electrically connected. In a non-limiting example, the circuit board comprises: an insulation layer comprising a center region and peripheral regions around the center region; a plurality of center circuit patterns formed in the center region of the insulation layer; and a plurality of peripheral circuit patterns formed in the peripheral regions of the insulation layer. The center circuit patterns may be formed wider than the peripheral circuit patterns, formed in a zigzag pattern, and/or may be formed in a crossed shape. | 02-14-2013 |
20130170165 | ELECTRONIC-COMPONENT MOUNTED BODY, ELECTRONIC COMPONENT, AND CIRCUIT BOARD - An electronic-component mounted body of the present invention includes an electronic component mounted on a circuit board. The electronic component includes multiple component-side electrode terminals, and the circuit board includes multiple circuit-board side electrode terminals for the component-side electrode terminals. The electronic-component mounted body further includes: multiple protruded electrodes formed respectively on the component-side electrode terminals of the electronic component to electrically connect the electronic component and the circuit board; and a dummy electrode formed on the electronic component and electrically connected to the component-side electrode terminal in a predetermined position out of the component-side electrode terminals. The protruded electrode on the component-side electrode terminal in the predetermined position is higher than the protruded electrode on the component-side electrode terminal in a different position from the predetermined position. | 07-04-2013 |
20140085848 | ASSEMBLED CIRCUIT AND ELECTRONIC COMPONENT - An assembled circuit is disclosed, wherein the assembled circuit comprises an inductor having a top surface, a bottom surface and side surfaces, wherein each of a plurality of conductors extends from the top surface to the bottom surface via one of the side surfaces of the inductor, wherein a circuit board is disposed over the top surface of the first electronic component and electrically connected to the plurality of conductors and a plurality of pins disposed on the bottom surface of the inductor for connecting to another circuit board. | 03-27-2014 |
20140204551 | CIRCUIT BOARD ASSEMBLY - A circuit board assembly with a printed circuit board, which has an SMD mounting location for attaching a first integrated circuit having an electrical circuit. A replacement circuit board having the electrical circuit is soldered at the SMD mounting location using SMD technology. | 07-24-2014 |
20150325508 | SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF AND CARRIER STRUCTURE - A carrier structure is provided, which includes: a metal oxide plate having opposite first and second surfaces and a plurality of through holes penetrating the first and second surfaces; a plurality of conductive portions formed in the through holes, respectively; and a plurality of conductive pads formed on the first surface of the metal oxide plate, wherein each of the conductive pads is correspondingly positioned on and in contact with a plurality of the conductive portions so as to be electrically connected to the plurality of the conductive portions. By replacing a conventional silicon interposer with the metal oxide plate, the present invention eliminates the need to form through silicon vias as required in the prior art and therefore simplifies the fabrication process. | 11-12-2015 |
20150359102 | Electronic Device, Test Board, and Semiconductor Device Manufacturing Method - Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path. | 12-10-2015 |
20160020163 | Wiring Substrate and Semiconductor Device - A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer. | 01-21-2016 |
20160057860 | METALLIZED PARTICLE INTERCONNECT WITH SOLDER COMPONENTS - An electrical connection is established between a first electrical component and a second electrical component of an assembly and a compression tool is used to apply a compression force to the assembly. The assembly also includes a metallized particle interconnect (MPI) between the first electrical component and the second electrical component and solder components outside a boundary of the MPI and extending from the first electrical component to the second electrical component. The solder components are melted by applying heat to the assembly. The solder components are solidified by cooling the assembly and the compression tool is removed. | 02-25-2016 |
20160057869 | VOIDING CONTROL USING SOLID SOLDER PREFORMS EMBEDDED IN SOLDER PASTE - Methods are provided for controlling voiding caused by gasses in solder joints of electronic assemblies. In various embodiments, a preform can be embedded into the solder paste prior to the component placement. The solder preform can be configured with a geometry such that it creates a standoff, or gap, between the components to be mounted in the solder paste. The method includes receiving a printed circuit board comprising a plurality of contact pads; depositing a volume of solder paste onto each of the plurality of contact pads; depositing a solder preform into each volume of solder paste; placing electronic components onto the printed circuit board such that contacts of the electronic components are aligned with corresponding contact pads of the printed circuit board; and reflow soldering the electronic components to the printed circuit board. | 02-25-2016 |
20160071807 | METHODOLOGY TO ACHIEVE ZERO WARPAGE FOR IC PACKAGE - A methodology for addressing package warpage is described. In an embodiment a package includes a die mounted on a wiring board. Portion of a metal plane within the wiring board includes a reduced portion, characterized by a reduced thickness that is less than a baseline thickness. | 03-10-2016 |
20160088733 | INTERPOSER, ELECTRONIC COMPONENT INCLUDING THE SAME, AND BOARD HAVING ELECTRONIC COMPONENT INCLUDING THE SAME - There are provided an interposer, an electronic component including the same, and a board having an electronic component including the same and the interposer may include an insulating board, connective electrodes disposed on the insulating board, a concave part disposed so that when a length of a region including the insulating board and the connective electrodes is defined as L and a width thereof is defined as W, an area of the region including the insulating board and the connective electrodes on a first main surface is smaller than L×W. | 03-24-2016 |
20160095218 | COMPOSITE WIRING BOARD AND MOUNTING STRUCTURE OF THE SAME - A composite wiring board includes a first wiring board having an opening for housing an electronic component, and including a plurality of first connection pads on an upper surface and a plurality of second connection pads on a lower surface, and a second wiring board having the electronic component mounted on a lower surface, including a third connection pad provided on the lower surface on an outer peripheral side and bonded to the first connection pad through a solder, and disposed on the first wiring board so as to cover the opening, in which a grounding inner wall conductor layer is deposited on an inner wall of the opening around the electronic component, and a grounding conductor layer is deposited on the lower surface of the second wiring board and connected to the inner wall conductor layer through a solder. | 03-31-2016 |
20160190053 | WIRING SUBSTRATE - A wiring substrate includes a first substrate and an electronic component mounted on an upper surface of the first substrate. A first pad is formed on an uppermost wiring layer of the first substrate. A connection terminal is formed on the electronic component and is located proximate to the first pad in a plan view. The wiring substrate further includes a connection member formed on the first pad to electrically connect the first pad and the connection terminal. The connection member includes a rod-shaped core and a solder layer, which is coated around the core and joined to the first pad. The solder layer includes a bulge that spreads from the core of the connection member in a planar direction. The bulge is joined to the connection terminal of the electronic component. | 06-30-2016 |
20160198568 | PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT MODULE | 07-07-2016 |