| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 348501000 | Reprocessing | 12 |
| 20090096922 | PCR JITTER REDUCTION IN A VSB AND/OR EVSB MULTIPLEXER SYSTEM - Program clock references in first and second MPEG data streams are re-stamped in accordance with delays introduced into the first and second MPEG data streams. Accordingly, the program clock references in the first MPEG data stream are re-stamped according to a variable delay in the first MPEG data stream, and the program clock references in the second MPEG data stream are re-stamped according to a variable delay in the second MPEG data stream. The re-stamped program clock references in the second MPEG data stream are corrected according to a fixed delay in the second MPEG data stream. The first and second MPEG data streams are multiplexed, and the multiplexed first and second MPEG data streams are transmitted and received. | 04-16-2009 |
| 20090122191 | Method and Apparatus for Replaying a Video Signal and One or More Audio Signals Related to Audio/Video Data That are Based on a 24Hz Frame Frequency Video Signal - Movies are produced in 24 Hz frame frequency and progressive scanning format (denoted 24p) for projection in film theatres, adhering to a worldwide standard for 35 mm film. However, the major TV systems in the world use interlaced scanning and either 50 Hz field frequency (denoted 50i) or 60 Hz field frequency (denoted 60i). Content providers would prefer providing single-picture-frequency single-audio-speed AV discs that can be replayed in most parts of the world. According to the invention, For a 50 HZ output mode, in the media player either audio signal frames are dropped adaptively or video fields or frames are repeated adaptively, depending on the current video and audio content. Thereby the less perceptible stream controls the synchronisation. | 05-14-2009 |
| 20090237559 | SYNCHRONIZING SIGNAL DETECTION CIRCUIT - The present invention provides a synchronizing signal detection circuit capable of always stably detecting a synchronizing signal. The synchronizing signal detection circuit predicts detection positions of synchronizing pulses every synchronization cycle peculiar to an input video signal. The synchronizing signal detection circuit further supplies the input video signal to a plurality of unnecessary signal eliminating paths in common and extracts synchronizing signals of every path respectively from video signals of every path obtained by eliminating unnecessary signals according to the characteristics of the paths every path. Then, the synchronizing signal detection circuit acquires detection positions of synchronizing pulses of the synchronizing signals of every path, selects a synchronizing signal of every path at which a difference in time between each of the detection positions of every path and the predicted detection position is minimal, and sets the selected synchronizing signal as an output synchronizing signal. | 09-24-2009 |
| 20100118192 | VIDEO SIGNAL SYNCHRONIZATION - The invention concerns receive circuitry for extracting horizontal and vertical synchronization signals from a digital synchronization signal associated with a video signal, the digital synchronization signal having a plurality of pulses, the receive circuitry including detection circuitry arranged to determine a first value indicative of the time delay between a timing edge of a first pulse and a timing edge of a second pulse of the digital synchronization signal; and a synchronization extraction block arranged to determine that one of the plurality of pulses is a vertical synchronization pulse based on a comparison between the first value and a reference value. | 05-13-2010 |
| 20110096234 | METHOD AND SYSTEM FOR MULTIPLEXED TRANSPORT INTERFACE BETWEEN DEMODULATORS (DEMODS) AND SET-TOP BOX (STB) SYSTEM-ON-CHIPS (SOCS) - A multiplexed transport interface (MTSIF) may be utilized during communication between a demodulation module and a video processing system-on-chip (SoC). The MTSIF may enable concurrent demodulation of a plurality of input modulated video streams, via a plurality of demodulator chips within the demodulation module, by multiplexing data generated by the demodulator chips via the MTSIF during communication between the demodulator module and the video processing SoC. The MTSIF may also be utilized for communicating control signals, which may be used in controlling and/or managing operations of the demodulation module, the video processing SoC, and/or the MTSIF. Communication via the MTSIF may be synchronized. Packets communicated via the MTSIF may be timestamped. Timestamp counters may be used in the demodulation module and the video processing SoC to generate and/or track timestamps in communicated packets. The timestamp counter may be synchronized, using control signals communicated via the MTSIF. | 04-28-2011 |
| 20110216241 | Devices for transmitting digital video and data over the same wires - A wired communication port comprising a transmitter operative to transmit, over a set of wires, a first transmission comprising a digital video clock multiplexed with a first direction of a bidirectional data channel. The transmitter is further operative to transmit video pixel data and video synchronization data over the same set of wires. And a receiver operative to receive a second transmission comprising a second direction of the bidirectional data channel, over at least a subset of the set of wires utilized for the first transmission. | 09-08-2011 |
| 20110249181 | TRANSMITTING DEVICE, RECEIVING DEVICE, CONTROL METHOD, AND COMMUNICATION SYSTEM - Disclosed herein is a transmitting device, including: a reproduction time information adding portion configured to add reproduction time information specifying timing of reproduction of data as an object of transmission to the data; a control time information adding portion configured to add control time information specifying control timing when circuit control is performed on a circuit, the data being to be transmitted through the circuit, to data transfer control information; and a transmitting portion configured to transmit data to which the reproduction time information and the control time information are added. | 10-13-2011 |
| 20130155321 | TIMING CONTROL APPARATUS AND VIDEO PROCESSING SYSTEM - A timing control apparatus includes: an extraction unit that outputs an input timing signal of an image signal; an input timing switch unit that selects whether to output the input timing signal output from the extraction unit or to input an external input timing signal; an input timing delay addition unit capable of adding delay information to the input timing signal output from the extraction unit; a reference timing generation unit that generates a reference timing signal from the input timing signal; a reference timing switch unit that selects whether to output the reference timing signal or to input an external reference timing signal; and an individual timing generation unit that generates, from the reference timing signal, a video processing timing signal and an output timing signal. | 06-20-2013 |
| 20140118617 | TRANSMISSION SYSTEM, TRANSMISSION APPARATUS, AND TRANSMISSION METHOD FOR TRANSMITTING VIDEO DATA - An HDMI® source determines whether or not an HDMI® sink can receive a sub-signal based on VSDB of E-EDID. When the HDMI® sink can receive the sub-signal, the HDMI® source adds a sub-signal to pixel data of a main image composed of pixel data whose number of bits is smaller than that of transmission pixel data transmitted by a transmitter, thereby constructing transmission pixel data. This data is transmitted by the transmitter through TMDS channels #0 to #2. Furthermore, the HDMI® source transmits a general control packet containing sub-signal information indicating whether or not the sub-signal is contained in the transmission pixel data in the control period of a vertical blanking period. The present invention can be applied to, for example, HDMI®. | 05-01-2014 |
| 20140300814 | METHOD FOR REAL-TIME PROCESSING OF A VIDEO SEQUENCE ON MOBILE TERMINALS - A method for embedding an image in a video sequence for a mobile terminal. Preferably, the mobile terminal is a tablet or smartphone. The method comprises the steps of choosing an image to be embedded, reading the video sequence, displaying a frame, and determining the presence of an embedding zone in the frame. The embedding zone having been previously identified or deduced according to a predefined algorithm. The method further comprises the step of applying a deformation to the image to be embedded such that the image to be embedded coincides with the form of the embedding zone. The image combining the frame and the image to be embedded is displayed/disposed in place of the embedding zone. | 10-09-2014 |
| 348502000 | Specified color | 2 |
| 20150098019 | VIDEO SIGNAL PROCESSING APPARATUS, VIDEO DISPLAY APPARATUS, AND ELECTRONIC DEVICE - The time necessary for specifying an improper video signal is significantly reduced. An input signal determination circuit and a signal distribution circuit are included, the input signal determination circuit determining, for video signals to be input to a synchronization circuit, whether or not each of the video signals satisfies a display reference for performing video display in a division display area corresponding to the video signal, the signal distribution circuit distributing, for another proper video signal for a video signal determined by the input signal determination circuit to be a video signal that does not satisfy the display reference for performing video display. | 04-09-2015 |
| 20160156892 | INFORMATION PROCESSING DEVICE, IMAGE PROJECTING SYSTEM, AND COMPUTER PROGRAM | 06-02-2016 |
