| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 345099000 | Particular timing circuit | 66 |
| 20080198126 | Display Apparatus and Display Drive Circuit - Disclosed is a display apparatus including: an X driver to drive signal lines; and a Y driver to drive scanning lines; wherein the X driver is provided with: a line buffer to latch the receive display data in a plurality of latch circuits; and a horizontal shift register to sequentially output latch signals to the latch circuits in accordance with an operation clock, wherein the horizontal shift register includes: a plurality of output lines; and a plurality of flip-flops to output the latch signals to each of the plurality of output lines, wherein the horizontal shift register is configured to output the latch signals from any of adjoining two output lines among the plurality of output lines by a same operation clock, and to output a latch signal from a subsequent stage output line following to the two output lines by the next operation clock. | 08-21-2008 |
| 20080231585 | DISPLAY APPARATUS OF DYNAMIC IMAGE AND DISPLAY METHOD THEREOF - A display apparatus of a dynamic image and a display method thereof are provided. The display method includes the following steps. An image signal is received and then displayed through either a black insertion (BI) technology or a dynamic backlight luminance (DBL) technology according to image luminance. The image signal is displayed through the BI technology when the image signal is in a bright state and through the DBL technology when the image signal is in a dark state, so as to prevent a zebra effect from being exerted by employing both technologies simultaneously. | 09-25-2008 |
| 20080231586 | DRIVING METHOD OR APPARATUS FOR FLAT PANEL DISPLAY DEVICE - A driving circuit board for a flat panel display device includes a substrate having a first surface and a second, opposite surface. A first timing controller is disposed on the first surface, and a second timing controller is disposed on the second surface of the substrate. At least one electrically conductive line electrically connects input terminals of the first and second timing controllers through the substrate. | 09-25-2008 |
| 20080252586 | Method for driving liquid crystal display with inserting gray image - An exemplary method for driving a liquid crystal display includes: dividing a frame into a first sub-frame period and a second sub-frame period; displaying a normal image in the first sub-frame period; and displaying a gray image in the second sub-frame period. The gray image includes a plurality of pixels, and some of the pixels are black, and each of the pixels is black at least one time in a predefined minimum period, the minimum period being at least two consecutive frames. | 10-16-2008 |
| 20080266233 | Liquid crystal panel and liquid crystal display device including the same - A liquid crystal panel includes a first type pixel and a second type pixel that are formed adjacent to each-other. The first type pixel has a first layout of respective first and second sub-pixels, and the second type pixel has a second layout of respective first and second sub-pixels. The first layout is different from the second layout such that the liquid crystal panel is driven according to dot inversion with alternating first and second sub-pixels determining the image displayed on the liquid crystal panel for preventing vertical faults. | 10-30-2008 |
| 20080273003 | Liquid crystal display device, manufacturing method thereof and driving method thereof - An LCD device includes first and second gate drivers coupled on a side of an LCD panel displaying an image, a data driver coupled to the LCD panel adjacent to the second gate driver, a timing controller generating a gate start pulse applied to the first gate driver and control signals applied to the data driver, and at least one gate start pulse supply line supplying the gate start pulse to the first gate driver, a manufacturing method thereof and a driving method thereof. | 11-06-2008 |
| 20080278430 | LIQUID CRYSTAL DISPLAY FOR IMPROVING DYNAMIC CONTRAST AND A METHOD FOR GENERATING GAMMA VOLTAGES FOR THE LIQUID CRYSTAL DISPLAY - An LCD for improving dynamic contrast by adjusting gamma voltages according to the brightness of an image is provided. The LCD includes: a liquid crystal display panel assembly having a plurality of pixels provided on crossing areas of a plurality of gate lines and a plurality of data lines; a gate driver applying voltage signals for sequentially scanning the gate lines; a source driver applying voltage signals for image display to the data lines; a timing controller providing image data and a control signal for the source driver, providing a gate line on/off control signal for the gate driver, and outputting digital gamma data to a digital/analogue (D/A) converter; and the D/A converter connected to the timing controller for converting the digital gamma data from the timing controller into analog signals to generate a plurality of gamma voltages and outputting the gamma voltages to the source driver. The LCD generates the gamma voltages by the D/A converter in place of using serially-connected resistors, and thus, the gamma voltages may vary depending on the brightness of the image. | 11-13-2008 |
| 20080278431 | Liquid crystal display with low flicker and driving method thereof - An exemplary liquid crystal display ( | 11-13-2008 |
| 20080309606 | TIMING CONTROLLER, LIQUID CRYSTAL DISPLAY INCLUDING TIMING CONTROLLER, AND METHOD OF DRIVING LIQUID CRYSTAL DISPLAY - A timing controller that can reduce malfunctions, a liquid crystal display (LCD) including the timing controller, and a method of operating the LCD, in which the timing controller includes a counter providing a converting enable signal; an analog-to-digital (A/D) converter converting a user command signal into a digital user command signal in response to the converting enable signal; and a control signal generator generating a module control signal that corresponds to the digital user command signal. | 12-18-2008 |
| 20080309607 | LIQUID CRYSTAL DISPLAY DRIVER AND LIQUID CRYSTAL DISPLAY DEVICE - A driver includes a delay-time adjuster. A data clock is inputted to the delay-time adjuster through a data-clock signal line. While receiving input of a load signal that is a sampling signal of a second register, the delay-time adjuster adjusts a delay time of the data clock so that a phase difference between the data clock and gradation data inputted into a first register through a gradation-data signal line can be set to a predetermined value. After the completion of the input of the load signal, the delay-time adjuster holds a data clock for the adjusted delay time, and outputs the delayed data clock as a shift clock for a shift register. | 12-18-2008 |
| 20090009461 | OVER-DRIVING DEVICE - An over-driving device is provided. In a first frame, a compression circuit compresses a first image signal to generate a first compression image signal, and a buffer temporarily stores the first compression image signal. In a following second frame, the compression circuit compresses a second image signal to generate a second compression image signal, and the buffer outputs the first compression image signal to serve as a first buffer image signal. A comparison circuit compares the second compression image signal and the first buffer image signal and generates an enable signal according comparison result. A decompression circuit decompresses the first buffer image signal to generate a previous image signal. An over-driving unit receives the second image signal to serve to a current image signal and receives the previous image signal and the enable signal. The over-driving unit over drives the display device or not according to the enable signal. | 01-08-2009 |
| 20090009462 | LIQUID CRYSTAL DISPLAY PANEL AND DRIVING METHOD THEREOF - An LCD panel including a liquid crystal cell array, gate driving integrated circuits (ICs), first source driving ICs, second source driving ICs and a timing control circuit is provided. The liquid crystal cell array has a first display area and a second display area. The first and the second source driving ICs are electrically connected with the first and the second display areas, respectively, while the timing control circuit is electrically connected with the source and the gate driving ICs. The LCD panel is driven by writing data into the first display area through the first source driving ICs via a first receiving/transmitting mode and writing data into the second display area through the second source driving ICs via a second receiving/transmitting mode. The first data receiving/transmitting mode is different from the second receiving/transmitting mode. | 01-08-2009 |
| 20090015536 | LIQUID CRYSTAL DISPLAY APPARATUS - A display area in a liquid crystal display apparatus is divided into five blocks extending in the lateral direction, is controlled to have a black writing period, a video writing period and a video holding period in each block in this order, and is controlled to delay the video writing period of the k | 01-15-2009 |
| 20090015537 | DISPLAY DEVICE TRANSFERRING DATA SIGNAL WITH CLOCK - A display device includes; a panel, a timing controller generating an embedded clock data signal combining image data and a clock signal, and a column driver driving the panel in response to the embedded clock data signal. The data bits within the embedded clock data signal are communicated at one of three voltage levels in a three-level signaling scheme, and the timing controller determines one of the three voltage levels for a current data bit (DIN[n]) within the embedded clock data signal in relation to a voltage level of a previous data bit (DIN[n−1]) within the embedded clock data signal. | 01-15-2009 |
| 20090040167 | PROGRAMMABLE NONVOLATILE MEMORY EMBEDDED IN A TIMING CONTROLLER FOR STORING LOOKUP TABLES - A timing controller in an LCD has an OTP memory—a one time programmable nonvolatile memory or a MTP memory—a multiple time programmable nonvolatile memory embedded in for storing lookup tables of overdrive functions, dynamic contrast adjustments, independent RGB Gamma curve corrections, and data conversion of cyclic DAC functions. The logic process of the OTP memory and the logic process of the timing controller are completely compatible, and the logic process of the MTP memory only needs two or three photomask processes more than the logic process of the timing controller. | 02-12-2009 |
| 20090046048 | Liquid crystal display - A liquid crystal display includes a plurality of pixels each of which has a liquid crystal layer and a plurality of electrodes for applying a voltage to the liquid crystal layer and which are arranged in a matrix of rows and columns. Each of the plurality of pixels has a first sub-pixel and a second sub-pixel which can apply mutually different voltages to the liquid crystal layer, where the first sub-pixel has a higher brightness than the second sub-pixel in certain gradations. | 02-19-2009 |
| 20090058788 | APPARATUS AND METHOD OF DRIVING DATA OF LIQUID CRYSTAL DISPLAY DEVICE - An apparatus and method of driving data of a liquid crystal display device is disclosed, which can minimize an electromagnetic interference EMI noise by decreasing an output peak current of a data driver, the apparatus comprising a timing controller for supplying a reference source output enable signal; a delay circuit for delaying the reference source output enable signal and supplying a plurality of source output enable signals provided with the different delay times; and a data driver, including a plurality of data ICs to divide and drive data lines of a liquid crystal panel into a plurality of data blocks, for dispersing data output timing of the plurality of data ICs in response to the plurality of source output enable signals. | 03-05-2009 |
| 20090073104 | Liquid crystal display capable of split-screen displaying and computer system using same - An exemplary liquid crystal display includes a liquid crystal panel having at least two pixel regions, a mode selector configured to provide a mode selection signal, and a timing controller configured to receive at least two video signal sets and in response to the mode selection signal, control the liquid crystal panel to display a picture corresponding to one of the at least two video signal sets using full-screen displaying or to simultaneously display at least two pictures, each of the at least two pictures corresponding to one of the at least two video signal sets using split-screen displaying. Each of the at least two pixel regions corresponds to one of the at least two pictures while using the split-screen displaying. A related computer system is also provided. | 03-19-2009 |
| 20090091527 | Display and Method of Transmitting Image Data Therein - A display is provided. The display includes a first timing controller, a second timing controller and drivers. The first timing controller receives and transmits a first portion of pixel values, in which the first portion of the pixel values includes the pixel values of at least two non-adjacent pixels. The second timing controller receives and transmits a second portion of the pixel values, in which the second portion of the pixel values includes the pixel values of at least two non-adjacent pixels. Each of the drivers receives respectively a part of the first portion of the pixel values transmitted by the first timing controller and a part of the second portion of the pixel values transmitted by the second timing controller. A method of transmitting image data in the display is also disclosed. | 04-09-2009 |
| 20090121997 | Display device - In accordance with one or more embodiments of the present invention, a display device includes a timing controller that generates a control signal and a data signal for displaying an image, a memory that records the data signal, and an I | 05-14-2009 |
| 20090184913 | DISPLAY DEVICE AND ELECTRONIC APPARATUS - A display device includes a plurality of pixels, and a time taken for writing a video signal into each of the pixels is changed according to the position of the pixel. | 07-23-2009 |
| 20090231262 | SPREAD SPECTRUM CLOCK GENERATOR AND DISPLAY DEVICE USING THE SAME - A spread spectrum clock generator and a display device having the same are disclosed. The spread spectrum clock generator includes: a spread spectrum clock generating circuit that receives a reference clock and generates a spread spectrum clock; and a modulation control circuit that provides a modulation control signal to the spread spectrum clock generating circuit, wherein the frequency of the spread spectrum clock is irregularly modulated by the modulation control signal. The spread spectrum clock is irregularly generated according to the modulation control signal. | 09-17-2009 |
| 20090243990 | Display device - A display device includes a display panel, a control circuit and a random number generating circuit. The random number generating circuit includes a plurality of shift registers, an output circuit, and registers which holds initial values. By providing a plurality of initial values, the randomness of random numbers can be enhanced. Further, the random numbers different from each other can be outputted from the plurality of shift registers and hence, it is possible to increase the frequency and to output the increased frequency by an output circuit. Further, by adding a noise control signal which suppresses the number of inversion of a digital signal, electromagnetic wave noises generated from a liquid crystal display device can be reduced. Further, by adopting an intermittent drive clock which intermittently repeats stopping thereof as a basic clock of the plurality of shift registers, electromagnetic wave noises generated from the display device can be reduced. The basic clock may be a clock which is in synchronism with a transmission clock of the display data or a clock which is in asynchronism with a transmission clock of the display data. | 10-01-2009 |
| 20090243991 | IMAGE DISPLAY SYSTEM - A system for displaying images includes a display device. The display device includes a timing control circuit, a display matrix, a horizontal driving circuit and a horizontal signal processing circuit. The timing control circuit generates a plurality of timing signals. The display matrix includes a plurality of display elements arranged in a matrix, wherein the display elements are vertically divided into N banks to be updated sequentially. The horizontal driving circuit is coupled to the timing control circuit for generating a plurality of switch signals according to the timing signals and sequentially turning on the banks. The horizontal signal processing circuit is coupled to the timing control circuit, the horizontal driving circuit and the display matrix for determining a turning-on period for each bank according to the timing signals and the switch signals. | 10-01-2009 |
| 20090262060 | Driving circuit for liquid crystal display and driving method thereof - An LCD driving circuit converts multiple data signals generated by an external circuit to a plurality of desired data signals. The driving circuit includes a detector detecting a current environmental temperature and outputting a corresponding electric signal, a timing controller receiving the data signals, and a look-up table storing a corresponding relationship among multiple electric signals corresponding to different environmental temperatures, the data signals and multiple of control signals driving the timing controller. The look-up table outputs a corresponding control signal according to the relationship stored therein to the timing controller. The timing controller processes the data signals using a frame rate algorithm under control of the corresponding control signal, thereby outputting the desired data signals to the data driving circuit. | 10-22-2009 |
| 20090273556 | Display Device - To make a conventional area grayscale display technique applicable to a driving method that is designed to write data in a vertical blanking interval. A display panel with multiple pixels and a display controller that receives an input video signal and a sync signal and gets an image presented on the display panel are provided. If one horizontal scanning period and one vertical scanning period of the input video signal are represented by 1H and V-Total, respectively, the display controller is able to form one vertical scanning period V-Total of a first period in which one horizontal scanning period of the display panel is 1Ho, which is as long as 1H, and a second period in which one horizontal scanning period of the display panel is 1Hn, which is not as long as 1H. | 11-05-2009 |
| 20100007597 | LIQUID CRYSTAL DISPLAY AND METHOD OF DRIVING THE SAME - A liquid crystal display (“LCD”) includes: a liquid crystal panel, a timing controller which receives previous image data and current image data, corrects or does not correct the current image data according to a reference bit of conversion image data generated using the previous image data, and outputs a display image signal to the liquid crystal panel, and a data driver which receives the display image signal and applies a data voltage corresponding to the display image signal to the liquid crystal panel. | 01-14-2010 |
| 20100026618 | Display device and signal driver - A display device includes a display portion; a signal driver; and a delay control circuit. The display portion is connected to a plurality of signal line groups. The signal driver is connected to the plurality of signal line groups and outputs a plurality of video data groups to the plurality of signal line groups at timings respectively in a single horizontal period. Each of the timings is shifted from an adjacent timing by a predetermined time. The delay control circuit varies the predetermined time every horizontal period and supplies the predetermined time to the signal driver. | 02-04-2010 |
| 20100045587 | DRIVING APPARATUS FOR LIQUID CRYSTAL DISPLAY - A driving apparatus for a liquid crystal display (LCD) is provided. The driving apparatus includes a plurality of data driving ICs and a control board. The data driving ICs are used for receiving and transmitting a clock signal, a plurality of data signals and a first reference voltage from the 1st data driving IC to the last data driving IC in series. The control board is used for providing the clock signal, the data signals and the first reference voltage, and changing the first reference voltage received by each data driving IC according to a variation of the clock signal and the data signals transmitted between the data driving ICs, so that the operation frequency of the data driving ICs is unrestricted. | 02-25-2010 |
| 20100045588 | TIMING CONTROL APPARATUS AND DISPLAY DEVICE HAVING THE SAME - A timing control apparatus includes a memory part, a multi-timing control part, and a power supply part. The memory part stores data. The multi-timing control part includes a plurality of timing controllers that sequentially read the stored data from the memory part in response to a reset signal, and outputs a power control signal that controls an output timing of a power. The power supply part outputs the power in response to the power control signal. | 02-25-2010 |
| 20100053059 | Liquid crystal display device and method for driving the same - The present invention relates to a liquid crystal display device and a method for driving the same, in which a difference of data charge quantities is compensated in a liquid crystal display panel having a reduced number of data lines, for reducing power consumption. | 03-04-2010 |
| 20100053060 | Control Signal Generation Method of Integrated Gate Driver Circuit Integrated Gate Driver Circuit and Liquid Crystal Display Device - A control signal generation method of integrated gate driver circuit includes the steps of: providing one gate control signal to an integrated gate driver circuit; and generating a plurality of internal control signals by the integrated gate driver circuit according to on the gate control signal to control internal operations of the integrated gate driver circuit. Furthermore, an integrated gate driver circuit is adapted to receive one external gate control signal. The integrated gate driver circuit includes an internal control signal generation circuit for generating a plurality of internal control signals according to the external gate control signal to control internal operations of the integrated gate driver circuit. In addition, a liquid crystal display device using the above-mentioned integrated gate driver circuit also is provided. | 03-04-2010 |
| 20100090939 | DISPLAY APPARATUS AND LUMINANCE CONTROL METHOD - A display apparatus according to the present invention using a cold cathode fluorescent lamp as a light source includes: a gradient detector which detects a condition in which one end of the cold cathode fluorescent lamp is disposed higher than an other end thereof; and a controller which conducts control so that emitted luminance of the cold cathode fluorescent lamp is inhibited when the condition in which the one end of the cold cathode fluorescent lamp is disposed higher than the other end thereof is detected by the gradient detector. | 04-15-2010 |
| 20100134401 | Liquid Crystal Display and Method of Driving the Same - A liquid crystal display (LCD) and a method of driving the LCD are provided. The LCD includes a display panel; and a timing controller providing a first data signal to the display panel during a first frame period, a second data signal to the display panel during a second frame period and a blank signal to the display panel during a blank period between the first and second frame periods, wherein the voltage of the blank signal varies among a plurality of levels between the voltage of the first data signal and the voltage of the second data signal. | 06-03-2010 |
| 20100149083 | Liquid crystal display and method of driving the same - A liquid crystal display and a method of driving the same are provided. The liquid crystal display includes a timing controller, N source drive integrated circuits (ICs), where N is an integer equal to or greater than 2, N pairs of data bus lines, each of which connects the timing controller to each of the N source drive ICs in a point-to-point manner, a lock check line that connects a first source drive IC of the N source drive ICs to the timing controller and cascade-connects the N source drive ICs to one another, and a feedback lock check line that connects a last source drive IC of the N source drive ICs to the timing controller. | 06-17-2010 |
| 20100164852 | LIQUID CRYSTAL DISPLAY DEVICE - Disclosed herein is a liquid crystal display device in which an image can be correctly seen even though a screen is rotated. The liquid crystal display device includes a storage unit for storing a plurality of screen change signals, and a timing controller for dividing image data of one horizontal line externally supplied thereto into k odd sub-image data and k even sub-image data, and sequentially outputting the k odd sub-image data and sequentially outputting the k even sub-image data. | 07-01-2010 |
| 20100164853 | DATA TRANSMISSION APPARATUS - A data transmission apparatus may include a delay locked loop for generating multi-phase clock signals synchronized to an input clock signal. A clock selector may select the multi-phase clock signals in response to a selection signal. A modulation controller may generate the selection signal using the input clock signal and modulation information, so that the clock selector selects the multi-phase clock signals within every predetermined interval. A clock generator may generate first and second latch clock signals according to the selected multi-phase clock signals. A data transmitter may transmit input data using the first and second latch clock signals. Therefore, the data transmission apparatus mitigates at least as much EMI as a related data transmission apparatus using spread spectrum clock generation for EMI mitigation, eliminates the probability of data error, and saves an IC area. It obviates the need for a FIFO memory, thus contributing miniaturization of the IC. The spread spectrum clock generation function of the related data transmission apparatus may be implemented inside the IC, thus increasing throughput. | 07-01-2010 |
| 20100171688 | Driving Method and Apparatus of LCD Panel, and Associated Timing Controller - A timing controller of an LCD panel is provided. The timing controller, for controlling a plurality of source drivers and a plurality of gate drivers of the LCD panel, includes a data processing module for generating a data signal carrying image data and black data, and a control signal generating module for generating a plurality of horizontal start signals, a first gate enable signal and a second gate enable signal. The horizontal start signals are for controlling the inputting of the data signals into the source drivers. The first and second gate enable signals correspond to different enable timings, and are selectively outputted to the gate drivers. | 07-08-2010 |
| 20100231496 | DISPLAY METHOD ON ACTIVE MATRIX DISPLAY - The present invention provides a display method of an active matrix display. First, image data is provided, and the image data is divided into a first image section and a second image section. Next, a first black frame section and a second black frame section are respectively inserted into the first image section and the second image section to form a first frame and a second frame. Then, the first frame and the second frame are displayed in turn so as to display the image data. | 09-16-2010 |
| 20100238104 | PIXEL DATA PREPROCESSING CIRCUIT AND METHOD - A pixel data preprocessing method includes the steps of: inputting a first frame data into a timing controller; performing a differential operation on the first frame data to generate a first frame differential data; writing the first frame differential data into a frame memory with the timing controller; reading a second frame differential data from the frame memory with the timing controller; performing an inverse differential operation on the second frame differential data to generate a second frame data; comparing the first frame data and the second frame data; and outputting a driving data with the timing controller according to a comparison result of comparing the first frame data and the second frame data. The present invention further provides a pixel data preprocessing circuit. | 09-23-2010 |
| 20100245226 | IMAGE SIGNAL PROCESSING DEVICE - An image signal processing device | 09-30-2010 |
| 20100271294 | Method for Reducing Resonance Energy of an LCD panel and Related LCD Device - A method for reducing resonance energy of an LCD panel includes providing a plurality of driving signal patterns, each defining a non-overlap area width of a synchronization signal and a scan-line charging frequency, and determining an order of the plurality of driving signal patterns to modulate driving signals of the LCD panel accordingly. | 10-28-2010 |
| 20100277407 | LIQUID CRYSTAL DISPLAY MODULE AND METHOD FOR USING THE SAME - A liquid crystal display (LCD) module includes a display unit for displaying images, a temporary storage unit electronically connected to the display unit for temporarily storing image data, and a timing unit electronically connected to the display unit. The display unit displays images corresponding to the image data stored in the temporary storage unit, and the timing unit generates a synchronous signal corresponding to the displaying operation. | 11-04-2010 |
| 20100315322 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF - A liquid crystal display includes a gate driver, a control circuit and a charge-sharing circuit. The control circuit provides a charge-sharing signal according to the parasitic capacitances at a first output end and a second output end in the gate driver. The charge-sharing circuit generates a third clock signal and a fourth clock signal by performing charge-sharing on a first clock signal and a second clock signal according to the charge-sharing signal. The third clock signal includes a signal falling edge which descends from a high level to a first level, and the fourth clock signal includes a signal falling edge which descends from the high level to a second level. The gate driver outputs a first gate driving signal and a second gate driving signal respectively at the first and the second output end according the third or the fourth clock signal. | 12-16-2010 |
| 20110012822 | LIQUID CRYSTAL DISPLAY - A liquid crystal display including a liquid crystal display panel including a plurality of data lines, a plurality of gate lines intersecting the data lines, and liquid crystal cells respectively formed at intersections of the data lines and the gate lines, and divided into a first area, a second area and a third area, a first data integrated circuit (IC) that drives the first area, a second data IC that drives the second area, a third data IC that drives the third area, and a timing controller that analyzes an input digital video data, generates a first selection signal and a second selection signal for controlling whether charge sharing is used, and independently controls the first, second, and third data ICs using the first and second selection signals, wherein the second area is divided into a first block adjoining the first area, a third block adjoining the third area and a second block located between the first block and the third block; and the first selection signal controls whether the charge sharing is used for the first and third data ICs, and the second selection signal controls whether the charge sharing is used for the second block and controls a charging delay variation so that the charging delay variation is lessened between the second block and the first area or between the second block and the third area in the first or third block. | 01-20-2011 |
| 20110109536 | LIQUID CRYSTAL DISPLAY AND METHOD FOR TESTING SAME - A liquid crystal display (LCD) includes an interface circuit configured to provide a test enable signal when the liquid crystal display is in a test mode; a timing control circuit configured to provide build in system test (BIST) data signals corresponding to at least one predetermined BIST image and a high voltage stress (HVS) start signal according to the test enable signal; a DC/DC converter configured to generate test-related voltages in response to the HVS starting signal; a data driver configured to provide a plurality of test gray voltage signals according to the BIST data signals and the test-related voltages; a scanning driver configured to provide a plurality of test scanning signals according to the test-related voltages; and a liquid crystal panel configured to receive the test gray voltage signals and test scanning signals. A method for testing an LCD is also provided. | 05-12-2011 |
| 20120182209 | LED Backlight Controller - The line banding image artifact that results from the interaction of LCD ripple and LED flicker in an LCD device that utilizes LED backlighting strings is substantially reduced by selecting a number of LED strings, individually driving the number of LED strings with a corresponding number of identical clock signals that are equally phase delayed, and selecting the frequency of the clock signals so that the product of the frequency of the clock signal multiplied by the number of LED strings is equal to the line clock frequency. | 07-19-2012 |
| 20120200483 | Timing Controller and Liquid Crystal Display Device Using the Same - Disclosed is a liquid crystal display (LCD) device, which facilitates to synchronize and output data being transmitted from an external system with a multi-port LVDS using 4 ports or more, and an LCD device using the timing controller, wherein the timing controller comprises a receiver which receives unsynchronized LVDS data of 4 ports or more; a synchronizer which synchronizes and outputs the data; and an arranger which arranges the data synchronized by the synchronizer, and transmits the arranged data to a gate driver and a data driver. | 08-09-2012 |
| 20130249781 | LEVEL SHIFTER FOR LIQUID CRYSTAL DISPLAY - A level shifter for a liquid crystal display is disclosed. The level shifter includes a pull-down transistor which includes a source terminal, to which the gate low voltage is supplied, and a drain terminal connected to an output terminal of the level shifter, and discharges a voltage of an output terminal of the level shifter, and an output stabilization circuit which is connected to a gate terminal of the pull-down transistor, controls a gate voltage of the pull-down transistor in the process of a power-on sequence, and discharges an output voltage of the level shifter. | 09-26-2013 |
| 20130293451 | LIQUID CRYSTAL DISPLAY APPARATUS AND SOURCE DRIVING CIRCUIT THEREOF - A liquid crystal display apparatus includes a liquid crystal panel and a panel driving device. The panel driving device includes a timing control circuit, a gate driving circuit, and a source driving circuit. The source driving circuit includes a low voltage differential signal (LVDS) receiver, a driving voltage generator, and a controller. The LVDS receiver includes a plurality of receive circuits and a power saving control circuit. Each of the receive circuit performs level conversion upon a data LVDS to generate a logic signal, and operates in a selected one of a normal energy consuming mode and a power saving mode. The power saving control circuit controls the receive circuits to operate in the power saving mode when the power saving control circuit does not receive a power adjustment signal from the controller. | 11-07-2013 |
| 20130314310 | DISPLAY APPARATUS AND OPERATION METHOD THEREOF - A display apparatus and an operation method thereof are provided. The display apparatus includes a display panel. The display panel includes a plurality of data lines, a plurality of scan lines and a plurality of pixels. The pixels are arranged in a matrix manner, and each pixel is electrically connected to one of the data lines and one of the scan lines. The operation method includes steps of: dividing the scan lines into N scan line groups, wherein N is an integer from 2 to the number of the scan lines; and in N frame periods sequentially driving the N scan line groups of scan line respectively and thereby sequentially updating display data of the pixels electrically connected to the N scan line groups of the scan line respectively. | 11-28-2013 |
| 20140071034 | DEVICE FOR REDUCING FLICKERS OF A LIQUID CRYSTAL DISPLAY PANEL AND METHOD FOR REDUCING FLICKERS OF A LIQUID CRYSTAL DISPLAY PANEL - A device for reducing flickers of a liquid crystal display panel is disclosed. The liquid crystal display panel is divided into a plurality of blocks. The device includes a memory, a common voltage generation unit, and a controller. The memory is used for storing a plurality of initial codes. Each initial code corresponds to a block of the plurality of blocks and a common voltage. The controller is used for generating a control signal to the common voltage generation unit when the controller starts to count scan start signals corresponding to the block. The common voltage generation unit is used for reading the initial code from the memory according to the control signal, and generating the common voltage to the block according to the initial code. | 03-13-2014 |
| 20140098014 | LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display panel includes a pixel array, a first shift register, M first output cells, a second shift register, and N second output cells. The first register is disposed on a first side of the pixel array. The M first output cells are coupled to and next to the first shift register for providing M gate signals to M rows of the pixel array according to a first clock signal. The second register is disposed on a second side of the pixel array. The N second output cells are coupled to and next to the second shift register for providing N gate signals to N rows of the pixel array according to a second clock signal. M and N are positive integers. | 04-10-2014 |
| 20140132495 | MODULE FOR DETERMINING THE DRIVING SIGNAL TIMING AND A METHOD FOR DRIVING A LIQUID CRYSTAL DISPLAY PANEL - Disclosed is a gate printed circuit board, a connector-free liquid crystal display (LCD) panel assembly, a driving-signal timing module included in the liquid crystal display (LCD) panel assembly, and a method of driving the liquid crystal display (LCD) panel assembly. According to the present invention, since a separate connector and a gate printed circuit board of a conventional LCD panel is not required for applying a gate-driving signal generated from an external information processing device, a thickness and the number of parts of the LCD device is reduced. Further, when the gate-driving signal is transmitted through the TFT substrate, the voltage V | 05-15-2014 |
| 20140176412 | IMAGE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME - An image display device and a method of driving the same, which reduce the number of transmission/reception lines of image data using a multi-drop intra-panel interface as well as to improve the bandwidth use efficiency. The image display device includes: an image display panel configured to display an image by including a plurality of pixel regions; a plurality of first gate integrated circuits (ICs) located at a first side of the image display panel so as to drive gate lines of the liquid crystal panel; a plurality of data integrated circuits (ICs) configured to drive data lines of the image display panel; and a timing controller configured to arrange image data received from an external part according to odd-th data ICs and even-th data ICs, and sequentially provide the odd-th and even-th arranged image data to the odd-th and even-th data ICs using a multi-drop scheme. | 06-26-2014 |
| 20140191936 | Driving Module and Driving Method - A driving module for a liquid crystal display device is disclosed. The driving module includes a data line signal processing unit, for generating a plurality of data driving signals, a scan line signal processing unit, for generating a plurality of gate driving signals, and a control unit, for generating a display clock, to control the data line signal processing unit and the scan line signal processing unit to address a plurality of pixels of the liquid crystal display device according to the display clock. The display clock is a normal operating clock under a normal operating mode and is a blanking backlight clock under a blanking backlight mode, wherein a frequency of the normal operating clock is less than a frequency of the blanking backlight clock. | 07-10-2014 |
| 20140191937 | THIN FILM TRANSISTOR THRESHOLD VOLTAGE OFFSET COMPENSATION CIRCUIT, GOA CIRCUIT, AND DISPLAY - An output thin film transistor threshold voltage offset compensation circuit, a GOA circuit, and a display. The circuit includes: a first capacitor, comprising a first electrode and a second electrode, the first electrode being connected to the gate of an output thin film transistor and receiving a charge signal, the second electrode being connected to the drain of the output thin film transistor, the first capacitor being used for, under the action of the charge signal, making the first electrode and the second electrode have a same voltage, so that a voltage difference between the drain and the source of the output thin film transistor is equal to a threshold voltage thereof; a first switch unit, connected to the drain and the source of the output thin film transistor, and opening under the action of a first clock signal, so that a voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage thereof. | 07-10-2014 |
| 20140198023 | GATE DRIVER ON ARRAY AND METHOD FOR DRIVING GATE LINES OF DISPLAY PANEL - A gate driver circuit including a plurality of gate driver stages is provided. The gate driver stages are combined on the display panel and configured to receive a plurality of clock signals and a start pulse. After being started by the start pulse, the gate driver stages generate a plurality of scan signals based on the clock signals. The scan signals respectively drive a plurality of gate lines of the display panel in a plurality of scan sequences during different frame periods based on the clock signals, wherein at least two scan sequences of the scan sequences are different. Furthermore, a method for driving gate lines of the display panel including the foregoing gate driver circuit is also provided. | 07-17-2014 |
| 20140204010 | DISPLAY DEVICE - A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period. | 07-24-2014 |
| 20140306872 | DRIVING CIRCUIT FOR DISPLAY DEVICE AND METHOD OF DRIVING THE SAME - A driving circuit for a display device, for reducing power consumption of a data driver, and a method of driving the driving circuit are disclosed. The driving circuit includes a data driver for maintaining buffers of the data driver in an on state every preset specific frame period and maintaining the buffers in an off state every remaining period except for specific frame periods in a refresh mode for processing image data of one image for the specific frame periods only. | 10-16-2014 |
| 20140368418 | TIMING CONTROLLER FOR LIQUID CRYSTAL PANEL AND TIMING CONTROL METHOD THEREOF - A timing controller for a liquid crystal panel and a timing control method thereof are provided. The timing controller includes a timing control unit for analyzing an input signal to generate a system state transition voltage (STV) signal and a base STV signal, and the timing control unit outputs a base trigger signal and a switch trigger signal having asynchronous frame rates to a select unit at the same time. A compare unit determines whether frequencies of the two state signals are same, so that the select unit determines to forward the base trigger signal or the switch trigger signal to a level shift circuit. Finally, a signal-time control unit controls an output time of the base trigger signal, and controls an output time of the switch trigger signal, so that a liquid crystal unit connected to each gate line has an equal charge time. | 12-18-2014 |
| 20150102990 | GATE DRIVING CIRCUIT, AND ARRAY SUBSTRATE AND DISPLAY PANEL THEREOF - The present invention relates to a gate driving circuit, and an array substrate and a display panel thereof, wherein gate driving circuit includes multi-level gate driving units. A gate driving unit of each level comprises a starting unit, an energy storage unit, a pull-up unit, a first pull-down unit, a second pull-down unit and a third pull-down unit, wherein the second pull-down unit is coupled to the energy storage unit and a gate line, and configured to intermittently generate a second control signal based on a driving voltage, a clock pulse signal and a second reference voltage, and to pull the driving voltage and a gate signal on the gate line down to the second reference voltage. In addition, to prevent leakage current between the first reference voltage and the second reference voltage from causing burnout of a chip for reference voltage supply, a transistor between the first reference voltage and the second reference voltage, through which the leakage current possibly passes, is modified to be a plurality of transistors in series connection, such that the possibility of current leakage is reduced. Therefore, the gate driving circuit and the array substrate thereof provided in the present invention have improved reliability and longer service life, and can be applied to various display panels. | 04-16-2015 |
| 20150294635 | Gate Driver and Display Apparatus Including the Same - A gate driver is disclosed. The disclosed gate driver includes a shift register configured to generate a shift signal. The shift signal is based on a gate start signal and a gate clock signal. The gate driver further includes a gate drive signal generator configured to generate a gate drive signal. The gate drive signal is based on a gate control signal and the shift signal. The rising edge of the gate control signal precedes the falling edge of the shift signal, and the falling edge of the gate control signal follows the falling edge of the shift signal. The gate drive signal falls from a second voltage to a third voltage in response to the falling edge of the shift signal and rises from the third voltage to a first voltage in response to the falling edge of the gate control signal. The first voltage is higher than the third voltage but lower than the second voltage. | 10-15-2015 |
| 20160049130 | LIQUID CRYSTAL DISPLAY - Disclosed is a display device having a display panel in which a plurality of gate lines and a plurality of data lines cross each other to define a plurality of pixels that may include a timing control unit that outputs a first data control signal and an image data; a first data driving unit on a first side of the display panel that generates a first data signal from the image data according to the first data control signal, outputs the first data signal to one of the plurality of data lines from the first side, and generates a second data control signal from the first data control signal; and a second data driving unit on a second side of the display panel that generates a second data signal from the first data signal according to the second data control signal, the second data signal substantially synchronized with the first data signal, and outputs the second data signal to the one of the plurality of data lines from the second side. | 02-18-2016 |
| 20160111056 | DISPLAY DEVICE AND ELECTRONIC APPARATUS - According to an aspect, a display device includes: a plurality of pixels aligned in row and column directions, each of the pixels including a drive element; a plurality of scan lines each coupled with the drive elements included in the pixels aligned in the row direction to transmit thereto a scan signal for selecting the pixels row by row; a plurality of signal lines each coupled with the drive elements included in the pixels aligned in the column direction to write display data; and a display control unit. The display control unit alternately repeats a display period and a stop period. In a latter term of the stop period, display control unit provides the display data written in the respective pixels in a row that has been selected during the display period immediately before the stop period, to the signal lines corresponding to the respective pixels. | 04-21-2016 |
| 20160133213 | LIQUID CRYSTAL DISPLAY AND DRIVING METHOD OF THE SAME - A liquid crystal display and a driving method of the same are provided, and which drive scanning lines and data lines by a timing controller. When writing data signals to a liquid crystal capacitor, the timing controller controls a source driving circuit to provide the data signals to each data line, and control a gate driving circuit to generate a high-voltage signal to each scanning line in sequence. The high-voltage signals of two adjacent scanning lines overlap. When the high-voltage signals overlap, the timing controller transmits the data signal to each liquid crystal capacitor sequentially. After finishing writing data signals to the liquid crystal capacitor, the timing controller controls the gate driving circuit to generate a pulse signal to each scanning line continuously. The pulse signals generated by the scanning lines do not overlap. Accordingly, it can avoid the leakage of data signal stored in the liquid crystal capacitors. | 05-12-2016 |
