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Plural storage devices

Subclass of:

345 - Computer graphics processing and selective visual display systems

345530000 - COMPUTER GRAPHICS DISPLAY MEMORY SYSTEM

Patent class list (only not empty are listed)

Deeper subclasses:

Class / Patent application numberDescriptionNumber of patent applications / Date published
345536000 Plural storage devices 66
20080278511INFORMATION STORAGE MEDIUM STORING GRAPHIC DATA AND APPARATUS AND METHOD OF PROCESSING THE GRAPHIC DATA - An information storage medium including graphic data and presentation information, and an apparatus and method of processing the graphic data are provided. The information storage medium includes the graphic data, page composition information which defines page composition of the graphic data, and the presentation information indicating when graphic screen data, which is composed with reference to the page composition information of the graphic data, is output to a display screen. Therefore, a graphic object is reusable in graphic data processing, and accordingly, a time taken to process the graphic data is reducible and memory area may be saved.11-13-2008
20090009523SYSTEM FOR INTERLEAVED STORAGE OF VIDEO DATA - An apparatus comprising a memory and a coder/decoder circuit. The memory may have a first memory portion and a second memory portion. The coder/decoder circuit may be configured to (i) position a set of atoms across the memory, (ii) define a strip across a portion of the atoms, (iii) designate a first atom within the strip, (iv) locate one or more second atoms to be paired with the first atom, (v) determine whether the one or more second atoms when paired with the first atom forms a legitimate pair, and (vi) read the legitimate pair from the first memory portion and the second memory portion.01-08-2009
20090021519DATA DISTRIBUTION DEVICE AND DATA DISTRIBUTION METHOD - A data distribution device includes a pair of first storage units, a second storage unit which includes a dual-port memory, a write unit which repeatedly writes drive data into one of the pair of first storage units and thereafter writes the remaining drive data and a read output unit which outputs the respective concurrently read drive data to the k corresponding drive circuits concurrently, where read addresses read from the dual-port memory are not overtaken by write addresses written to the dual-port memory during the period in which reading and writing of the drive data are being simultaneously performed with respect to the dual-port memory of the second storage unit.01-22-2009
20090096801DISPLAY DEVICE, OUTPUT DEVICE AND COMPUTER-READABLE RECORDING MEDIUM STORING OUPUT CONTROL PROGRAM - A display device includes a plurality of electronic papers that are each provided with a display surface outputting a piece of display data, a binding member that binds together the plurality of electronic papers, and an output device that controls output of the piece of display data to each of the plurality of electronic papers, a first storage device that stores rewrite information, a second storage device that stores a plurality of pieces of display data to be displayed on the plurality of electronic papers, an allocation device that respectively allocates the plurality of pieces of display data stored in the second storage device to a consecutive series of electronic papers for which the rewrite information permits rewriting, and a display control device that respectively displays the plurality of pieces of display data allocated by the allocation device on the consecutive series of electronic papers.04-16-2009
20090256850Method for Processing Display Data - A method for processing display data includes: storing an image data in a plurality of first-type memories by taking scanning line data as a unit; providing one of the scanning line data stored in a particular memory of the first-type memories to one of a plurality of second-type memories, the particular memory being one of the first-type memories, which are not receiving and storing the image data; and outputting the scanning line data stored in the second-type memories. Time periods for outputting the scanning line data of the image data from the second-type memories are not overlapped.10-15-2009
20090262120METHOD FOR LOADING IMAGES AND ELECTRONIC DEVICE - An image loading method applied to an electronic device having a display is provided. The method has the following steps. Firstly, an image is decompressed into a second bitmap file. Afterward, a bitmap attribute is obtained according to the second bitmap file. Following, a bitmap attribute is obtained according to the second bitmap file. Then, the bitmap attribute corresponding to an image is accessed. Next, a first bitmap file is generated in a first system memory according to the bitmap attribute. Then, the first bitmap file is outputted to the display.10-22-2009
20100045686Display Method Applied to Electrophoretic Display and Corresponding Electrophoretic Display - In a display method applied to an electrophoretic display, the electrophoretic display has a first memory, a second memory and an electrophoretic display panel. A plurality of data is stored in the first memory according to a predetermined sequence. The display method includes the following steps. Firstly, whether a first datum of the data is stored in the second memory is determined. Next, the first datum is read out from the first memory and stored in the second memory if the first datum is not stored in the second memory. Next, the first datum stored in the second memory is displayed on the electrophoretic display panel. Next, a second datum before the first datum and/or a third datum after the first datum are/is read out from the first memory and stored in the second memory during displaying the first datum on the electrophoretic display panel.02-25-2010
20100053182METHOD OF COMPENSATING IMAGE DATA, APPARATUS FOR COMPENSATING IMAGE DATA, AND DISPLAY DEVICE HAVING THE SAME - In a method of compensating image data, a lookup table (LUT) memory storing compensating data that corresponds to received image data is disabled when the received image data is substantially the same as previous image data that is stored in a cache memory. Compensating data that corresponds to the previous image data stored in the cache memory is outputted as compensating data that corresponds to the received image data. The previous image data stored in the cache memory and the compensating data are maintained.03-04-2010
20100053183LIQUID CRYSTAL DISPLAY AND METHOD OF DRIVING THE SAME - A liquid crystal display includes a liquid crystal panel and a timing controller. The timing controller includes a first memory unit which sequentially receives a first image signal and a second image signal at a first data rate and outputs the first and second image signals at a second data rate, a second memory unit which compresses and stores the first image signal at the second data rate as a compressed first image signal and outputs the compressed first image signal as a restored first image signal, and an image signal compensation unit which receives the second image signal and the restored first image signal at the second data rate, compensates the second image signal to generate a compensated second image signal using the restored first image signal at the second data rate, and outputs the compensated second image signal at the second data rate to the liquid crystal panel.03-04-2010
20100060654VIDEO PROCESSOR AND MEMORY MANAGEMENT METHOD THEREOF - Video processors and memory management methods thereof are provided, wherein the video processor is controlled by a central processing unit, and is coupled to a system memory to receive a macroblock. The video processor has two local memories, a control circuit and an image processing unit. The control circuit divides the macroblock into pixel segments, and disposes the pixel segments in the two local memories. The image processing unit accesses the two local memories for executing an image processing procedure. The system memory is refreshed by a processed macroblock in the two local memories.03-11-2010
20100123728MEMORY ACCESS CONTROL CIRCUIT AND IMAGE PROCESSING SYSTEM - A memory access control circuit includes a first internal register, an address transmitting unit that sets a state of the first internal register to a first state to transmit a first address and sets a state of the first internal register to a second state to transmit a second address, a second internal register, a data receiving unit that sets a state of the second internal register to a third state to receive first data corresponding to the first address, performs data processing on the first data without delay, sets a state of the second internal register to a fourth state to receive second data corresponding to the second address, and performs data processing on the second data after delaying the second data by a given delay time, a first backup unit and a second backup unit.05-20-2010
20100134504ELECTROPHORESIS DISPLAY - An electrophoresis display is provided to reduce writing time of a memory. The electrophoresis display includes: an electrophoresis display panel; a first memory and a second memory for alternatively storing a previous state image and a current state image; and a controller sets the first digital data generated by the system as the current state image and stores it alternately in one of the first and second memories every cycle, keeps storing the first digital data previously stored in the other one of the first and second memories in it as the previous state image, compares the current state image and the previous state image, and generates second digital data to be displayed on the electrophoresis display panel by use of waveform information corresponding to the result of the comparison among the plurality of waveform information.06-03-2010
20100141667Image Compensation Methods, Systems, And Apparatuses For Organic Light Emitting Diode Display Panel - One embodiment of the invention includes an image compensation module, an OLED display panel, and an OLED display apparatus. A target current value corresponding to a target gray level is stored in a compensation memory portion. A reference gray level and a reference current value corresponding to the reference gray level are stored in a reference memory portion. A compensation gray level can be obtained by an arithmetic compensation unit according to the target current value, reference gray level, reference current value, and gamma parameter. This may reduce the memory space needed for the compensation and reference memory portions, and compensate the images of the display apparatus and panel so that precise colors can be displayed with a high image quality.06-10-2010
20100156916DISPLAY DEVICE - A display device of the present invention displays a first image stored in first memory and a second image stored in second memory, by overlaying the first image on the second image. Once a display size/position of the first image is acquired, a first image generation unit is controlled to start generating the first image complying with the acquired display size/position. Until generation of the first image is completed, (i) a second image generation unit is controlled to generate an opaque second image that is opaque and large enough in size to cover the first image being generated, and (ii) the opaque second image is displayed. Upon completion of generation of the first image, (i) the second image generation unit is controlled to generate a partially transparent second image including a transparent part to be positioned over the first image, and (ii) the partially transparent second image is displayed.06-24-2010
20100201698METHOD OF CONTROLLING TIMING SIGNALS, TIMING CONTROL APPARATUS FOR PERFORMING THE METHOD AND DISPLAY APPARATUS HAVING THE APPARATUS - A method of controlling timing signals includes; selectively providing both master control data and slave control data, which are included in control data, to a memory part based on a write enable signal provided form an external device, reading control data stored in the memory part in response to a reset signal provided from an external device, and controlling output timing of at least one power voltage based on the stored control data.08-12-2010
20100238185METHOD FOR FULLY AUTOMATICALLY ALIGNING QUALITY OF IMAGE - A method for fully-automatically aligning the quality of an image is provided. The method processes the video signals provided by the Video Graphic Array (VGA) display card in the computer system through the multi-sync display itself, and further interprets whether a computer host ID stored in the VGA display card or the computer host matches with a computer host ID stored in the multi-sync display, so as to avoid repetitious aligning to the same computer system, and achieve full automatic aligning to the quality of the image displayed on the multi-sync display. Therefore, even if the multi-sync display is situated under different computer hosts or VGA display cards and placed where an user cannot touch, the inconvenience of pressing a button on the multi-sync display to align the quality of the image displayed on the multi-sync display in conventional techniques can be prevented.09-23-2010
20100309210Projector, projection display system, and corresponding method and recording medium - In response to a requirement of transferring a file from a personal computer PC to a projector 12-09-2010
20110001753METHOD, MODULE, AND DEVICE FOR DISPLAYING GRAPHICAL INFORMATION - A method, module and device for displaying graphical information on a screen are provided. In at least one embodiment, the method includes composing resulting image data from at least one application service, and transmitting the resulting image data to the screen. Further, in at least one embodiment, the composing of the resulting image data includes identifying items associated with each of the at least one application service, determining at least one item that is in a visible state, fetching information associated with the at least one item that is in a visible state, and calculating the resulting image data from the fetched information.01-06-2011
20110001754DISPLAY APPARATUS AND IMAGE DISPLAYING METHOD - A display apparatus includes: a display panel; and a frame memory configured to store an image data. An overdrive control section is configured to perform overdrive processing on a first image data read from the frame memory in a current frame period, by using a second image data read from the frame memory in a previous frame period to drive the display panel. A display panel drive control section is configured to drive the display panel based on the overdrive-processed image data.01-06-2011
20110037771Display Processing Line Buffers Incorporating Pipeline Overlap - Apparatus, systems and methods for display processing line buffers incorporating pipeline overlap are disclosed. For example, an apparatus is disclosed including processing logic to use pixel processing algorithms to process a pixel value of a first portion of an image, and line buffers coupled to the processing logic. The line buffers to hold at least some pixel values of other portions of the image adjacent to the first portion. Where the pixel values of the other portions of the image held by the line buffers correspond to pixel values of the adjacent portions of the image that are to be convolved by the pixel processing algorithms with the pixel value of the first portion. Other implementations are also disclosed.02-17-2011
20110063315OPTIMIZATION OF MEMORY BANDWIDTH IN A MULTI-DISPLAY SYSTEM - Graphics display adapters for driving multiple display monitors have become very popular. Graphics display adapters that drive multiple monitors can be used to provide terminal services to multiple independent terminals or be used to provide multiple displays to a single user. Generating video signals for multiple display systems puts a heavy burden on the video memory system since multiple different video signal generators may read from associated frame buffers in a shared video memory system. In one disclosed embodiment, a plurality of video memory read triggers are provided wherein at least two of which are staggered to reduce the load on the video memory system. In response to each read trigger, display data is read from a frame buffer to an associated video signal generation circuit. Each video signal generation circuit then provides a display signal to an associated display screen in a multi-screen environment.03-17-2011
20110090234APPARATUS AND METHOD FOR CONTROL OF MULTIPLE DISPLAYS FROM A SINGLE VIRTUAL FRAME BUFFER - A system and process for controlling multiple displays from a single graphical stack. Frame data is written to a single virtual frame buffer from a single graphical stack. The frame data is subsequently displaced from the virtual frame buffer to a plurality of display buffers. In this manner, a plurality of displays are updated. The system and process can operate with displays with different display technologies, such as an electronic paper display and a Liquid Crystal Display (LCD).04-21-2011
20110102445METHOD AND COMPUTER FOR CONTROLLING IMAGE PROCESSOR, AND MACHINE READABLE STORAGE MEDIUM FOR USE IN COMPUTER - A method is provided for controlling an image processor to perform display of an image on a first display device in synchronization with short frames and to perform display of an image on a second display device in synchronization with long frames each of which has a time length longer than a time length of each short frame. According to the method, a synchronization signal acquisition process acquires a first synchronization signal synchronized with switching of the short frames. An estimation process estimates, each time the first synchronization signal is acquired, a generation position of a second synchronization signal synchronized with switching of the long frames within a 2-frame period corresponding to two short frames after the first synchronization signal is acquired. The image processor is provided with a drawing command instructing generation of an image to be displayed on the first display device or the second display device controllably in accordance with results of the estimating by the estimation process.05-05-2011
20110169845SCREEN COMPRESSION FOR MOBILE APPLICATIONS - One embodiment of the invention sets forth a technique for compressing and storing display data and optionally compressing and storing cursor data in a memory that is local to a graphics processing unit to reduce the power consumed by a mobile computing device when refreshing the screen. Compressing the display data and optionally the cursor data also reduces the relative cost of the invention by reducing the size of the local memory relative to the size that would be necessary if the display data were stored locally in uncompressed form. Thus, the invention may improve mobile computing device battery life, while keeping additional costs low.07-14-2011
20110169846MEMORY SYSTEM AND METHOD FOR IMPROVED UTILIZATION OF READ AND WRITE BANDWIDTH OF A GRAPHICS PROCESSING SYSTEM - A system and method for processing graphics data which requires less read and write bandwidth. The graphics processing system includes an embedded memory array having at least three separate banks of single-ported memory in which graphics data are stored. A memory controller coupled to the banks of memory writes post-processed data to a first bank of memory while reading data from a second bank of memory. A synchronous graphics processing pipeline processes the data read from the second bank of memory and provides the post-processed graphics data to the memory controller to be written back to a bank of memory. The processing pipeline concurrently processes an amount of graphics data at least equal to that included in a page of memory. A third bank of memory is precharged concurrently with writing data to the first bank and reading data from the second bank in preparation for access when reading data from the second bank of memory is completed.07-14-2011
20110273462SYSTEM AND METHOD FOR STORING AND ACCESSING PIXEL DATA IN A GRAPHICS DISPLAY DEVICE - A graphics display device comprises a first and second memory, and a data transfer controller coupled with the first and second memory. In some embodiments, a method of storing pixel data comprises receiving and latching first pixel data associated with a first pixel, receiving second pixel data associated with a second pixel, and concurrently writing the first pixel data in the first memory and the second pixel data in the second memory. In other embodiments, a method of accessing pixel data of an image frame comprises accessing the first and second memory for reading out pixel data of each pair of adjacent pixels, when the image frame has an odd total number of pixels determining whether a final pixel data is in a latched state, and reading out the final pixel data from the data transfer controller when the final pixel data is in the latched state.11-10-2011
20110285729SUBBUFFER OBJECTS - A method and an apparatus for a parallel computing program using subbuffers to perform a data processing task in parallel among heterogeneous compute units are described. The compute units can include a heterogeneous mix of central processing units (CPUs) and graphic processing units (GPUs). A system creates a subbuffer from a parent buffer for each of a plurality of heterogeneous compute units. If a subbuffer is not associated with the same compute unit as the parent buffer, the system copies data from the subbuffer to memory of that compute unit. The system further tracks updates to the data and transfers those updates back to the subbuffer.11-24-2011
20110285730Controlling Display Updates For Electro-Optic Displays - A display controller may include a display update controller that may cause a color processing operation to be initiated in response to completion of an image data transmission, or a display update operation to be initiated in response to completion of the color processing operation. The display update operation may include updating display pixels of a display matrix of an electro-optic display device. A collision detector may determine whether a waveform for updating a display state of a particular display pixel has finished. The display update controller may cause the particular display pixel to be omitted from a display update operation if the waveform for updating the display state of the particular display pixel has not finished. A second display update operation may automatically be initiated when the waveform for updating the display state of the particular display pixel has finished.11-24-2011
20120026179IMAGE PROCESSING DIVISION - In an image processing device, an image data generation unit generates image data of an object to be displayed on a display device in each vertical scan period. A memory management unit manages a working memory for storing the image data generated by the image data generation unit. The memory management unit selects a storage region of the working memory for storing image data when the same is generated and stores the generated image data in the selected storage region, and releases another storage region which stores image data that has been used for display on the display device, thereby allowing said another storage to store new image data. A drawing unit reads image data required to draw one line on the display device in each horizontal scan period from the working memory through the memory management unit, then generates the image data of one line based on the read image data, and stores the generated image data of one line in a line buffer. A controller sequentially instructs the image data generation unit to generate image data of each object before image data of each object is displayed on the display device in each vertical scan period.02-02-2012
20120194530MULTIPLE SIMULTANEOUS UNIQUE OUTPUTS FROM A SINGLE DISPLAY PIPELINE - One embodiment of the present invention sets forth a system for generating multiple video output signals from a single video pipeline within a graphics processing unit. Pixel data from more than one display surface is retrieved and multiplexed before being transmitted to a video pipeline for processing. The resulting video pixel data is routed to video output encoders, which selectively accept the video pixel data for transmission to attached display devices.08-02-2012
20130147821Methods and Systems to Facilitate Operation in Unpinned Memory - In an embodiment, a method of processing memory requests in a first processing device is provided. The method includes generating a memory request associated with a memory address located in an unpinned memory space managed by an operating system running on a second processing device; and responsive to a determination that the memory address is not resident in a physical memory, transmitting a message to the second processing device. In response to the message, the operating system controls the second processing device to bring the memory address into the physical memory.06-13-2013
20140002468MEMORY, MEMORY ADDRESSING METHOD, AND DISPLAY DEVICE INCLUDING THE MEMORY01-02-2014
20140055474ACCESSING CONTENT IN A CONTENT-AWARE MESH - Content in a content-aware mesh may be accessed and/or manipulated. In one embodiment, a node may receive access to each of a plurality of images that are distributed among at least two nodes of a mesh. The at least two nodes may not be part of the same service. Accessing to each of the images may be performed without the node locally storing all of the images. The node may display an image of the plurality of images via a uniform interface without indication as to which of the nodes the image is stored on.02-27-2014
20140063031PIXEL BUFFERING - In an example method and system, image data to an image processing module. Image data is read from memory into a down-scaler, which down-scales the image data to a first resolution, which is stored in a first buffer. A region of image data which the image processing module will request is predicted, and image data corresponding to at least part of the predicted region of image data is stored in a first buffer, in a second resolution, higher than the first. When a request for image data is received, it is then determined whether image data corresponding to the requested image data is in the second buffer, and if so, then image data is provided to the image processing module from the second buffer. If not, then image data from the first buffer is up-scaled, and the up-scaled image data is provided to the image processing module.03-06-2014
20140085321DISPLAY DRIVER INTEGRATED CIRCUIT, A DISPLAY SYSTEM HAVING THE SAME, AND A DISPLAY DATA PROCESSING METHOD THEREOF - A display driver integrated circuit which includes a distributor configured to output display data; a plurality of first-in first-out (FIFO) memories configured to receive the display data from the distributor according to an external clock and output the display data in response to an internal clock; and a plurality of graphics memories configured to receive the display data from the FIFO memories.03-27-2014
20140240334DRIVING DEVICE OF DISPLAY DEVICE AND DRIVING METHOD THEREOF - A driver for pixels of a display, having pixels arranged into a plurality of pixel blocks including at least two pixels in a row and at least two pixels in a column is presented. The driver includes a first converter, a second converter, and a frame memory. The first converter receives input image signals for a pixel block of the plurality of pixel blocks and generates compressed image signals by compressing the input image signals based on compression reference image signals. The frame memory stores the compressed image signals. The second converter reads the compressed image signals from the frame memory, and restores the compressed image signals based on compression reference image signals to generate restoration image signals. A compression reference image signal for a first pixel of the pixel block is the restoration image signal for a second pixel of a neighboring pixel block. Compression reference image signals for the remaining pixels in the pixel block are restoration image signals for different pixels in the pixel block.08-28-2014
20140292789STEREOSCOPIC IMAGE DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME - Provided is a stereoscopic image display device comprising a display panel displaying a multi-view image in a three-dimensional (3D) mode, a switchable barrier forming a barrier in the 3D mode, a user position detecting unit outputting a user position data including a user position information, a switchable barrier controlling unit calculating an average picture level of the multi-view image in the 3D mode and controlling an aperture ratio of the switchable barrier according to the average picture level and the user position information, a switchable barrier driving unit supplying driving voltages to divided electrodes of the switchable barrier and supplying a common voltage to a barrier common electrode, and a display panel driving unit converting the multi-view image into data voltages to supply the data voltages to data lines of the display panel and sequentially supplying gate pulses to gate lines of the display panel.10-02-2014
20150116341Display Device, and Method for Adjusting Display Device - A display device includes a first storage unit that stores first adjusted values; a second storage unit that stores second adjusted values; and a control unit that determines, while power of the display device is on, whether or not a predetermined specific condition has been set, where if the specific condition has been set, the control unit executes a process of writing the first adjusted values stored in the first storage unit to the second storage unit according to the specific condition so as to switch the adjusted values pertaining to individual units of the display device to the first adjusted values.04-30-2015
20160055833HIGH-SPEED LOW-POWER ACCESS TO REGISTER FILES - Embodiments of a unified shading controller are disclosed. The embodiments may provide a first functional unit configured to send a write request to a second functional unit. The write request may include data and the data may include one or more control bits. Upon receiving the write request, the second functional unit may check the one or more control bits, and hold the data in a given queue dependent upon the control bits.02-25-2016
20160063668SEMICONDUCTOR DEVICE - A semiconductor device includes; a first memory that stores first and second layer image data portions used to generate first and second frame images on a display device, a second memory that stores a change map, a display controller that generates positional information associated with an image data portion in response to the change map, and an interface that receives image data and positional information and generates a command for updating the image data.03-03-2016
345537000 Data transfer between memories 15
20090115791LOADING AN INTERNAL FRAME BUFFER FROM AN EXTERNAL FRAME BUFFER - A system includes internal memory and external memory. A display controller reads a frame from the external memory. At least one of a processor and a graphics chip copies the frame from the external memory to the internal memory while the frame is read from the external memory by the display controller. After the frame is copied to the internal memory, the frame is stored in both the internal memory and the external memory.05-07-2009
20090262121METHOD AND SYSTEM FOR STREAMING DOCUMENTS, E-MAIL ATTACHMENTS AND MAPS TO WIRELESS DEVICES - A method for streaming a vector image to a client computer, including: accessing a pre-processed vector image that was generated from a vector image, the pre-processed vector image including a plurality of local rectangular regions and a plurality of local vector objects, each local vector object being associated with one of the local rectangular regions; receiving a request from a user of a client computer for a desired portion of the vector image, for display at a desired pixel display resolution; identifying at least one local rectangular region from among the plurality of local rectangular regions of the pre-processed vector image, which is appropriate for generating the desired portion of the vector image at the desired display resolution; and transmitting the local vector objects associated with the at least one local rectangular region to the client computer.10-22-2009
20100045687OVERLAP IN SUCCESSIVE TRANSFERS OF VIDEO DATA TO MINIMIZE MEMORY TRAFFIC - A method, system, and apparatus of overlap in successive transfers of video data to minimize memory traffic are disclosed. In one embodiment, a method includes identifying a reusable portion of a preexisting video data in an on-chip memory that corresponds to an overlapping video data in an off-chip memory, preserving the reusable portion of the preexisting video data in the on-chip memory in a reserved part of the on-chip memory, determining a non-overlapping video data in the off-chip memory, wherein the non-overlapping video data excludes the overlapping video data in the off-chip memory, defining a subsection of the non-overlapping video data, accessing the subsection of the non-overlapping video data, and selectively storing the subsection in the on-chip memory, such that the reusable portion of the preexisting video data of the on-chip memory is preserved in the reserved part of the on-chip memory.02-25-2010
20100201699DISPLAY APPARATUS AND DATA TRANSMITTING SYSTEM - A display apparatus, including: a nonvolatile display device that retains display of information even after the power is cut, a data receiving device that receives data to be displayed on the nonvolatile display device, a volatile storage device that stores the data received by the data receiving device, a nonvolatile storage device that retains the storage of the data even after the power is cut, a display control device that causes the nonvolatile display device to display the data stored in the volatile storage device, a storage determining device that determines whether to store the data stored in the volatile storage device into the nonvolatile storage device, and a storage control device that causes the nonvolatile storage device to store the data stored in the volatile storage device when the storage determining device determines to store the data into the nonvolatile storage device.08-12-2010
20120075319Hierarchical Memory Addressing - One embodiment of the present invention sets forth a technique for addressing data in a hierarchical graphics processing unit cluster. A hierarchical address is constructed based on the location of a storage circuit where a target unit of data resides. The hierarchical address comprises a level field indicating a hierarchical level for the unit of data and a node identifier that indicates which GPU within the GPU cluster currently stores the unit of data. The hierarchical address may further comprise one or more identifiers that indicate which storage circuit in a particular hierarchical level currently stores the unit of data. The hierarchical address is constructed and interpreted based on the level field. The technique advantageously enables programs executing within the GPU cluster to efficiently access data residing in other GPUs using the hierarchical address.03-29-2012
20140347379TECHNIQUE FOR REDUCING BANDWIDTH CONSUMPTION DURING FRAME ROTATION - A decode engine is configured to perform a rotation operation with a macroblock in conjunction with performing a deblocking operation that involves the macroblock. The decode engine decodes the macroblock and performs the deblocking operation to generate a deblocked macroblock, then rotates the deblocked macroblock and writes the rotated, deblocked macroblock to memory. With this approach, multiple, redundant reads of the macroblock, as required with conventional rotation techniques, may be avoided.11-27-2014
20140375661PAGE MANAGEMENT APPROACH TO FULLY UTILIZE HARDWARE CACHES FOR TILED RENDERING - Systems and methods may provide for identifying a tile associated with an image and ordering an entirety of the tile into a linear stream of pages associated with a frame buffer. Additionally, the linear stream of pages may be allocated to a cache. In one example, the linear stream of pages is allocated to the cache in accordance with a fixed set selection policy of the cache.12-25-2014
20150379678Techniques to Compose Memory Resources Across Devices and Reduce Transitional Latency - Examples include composing memory resources across devices and reducing transitional latency. In some examples, memory resources associated with executing one or more applications by circuitry at two separate devices may be composed across the two devices via use of a midstream buffer. The circuitry may be capable of executing the one or more applications using a hierarchical memory architecture including a near memory and a far memory. In some examples, near memories may be separately located at first and second devices and a far memory may be located at the first device. The near memory of the first device may be used as a midstream buffer to facilitate movement of data over a wired or wireless interconnect to or from the near memory of the second device.12-31-2015
20150379683DATA PROCESSING APPARATUS FOR ORGANIC LIGHT EMITTING DISPLAY DEVICE - Provided is a data processing apparatus of an organic light emitting display device, which performs encoding and decoding through different schemes according to frequency components and data components, thereby preventing loss of a high frequency component included in data.12-31-2015
20160063966METHOD AND APPARATUS FOR EFFICIENT STORAGE OF FREQUENCY VALUES FOR A DISPLAY DEVICE - A device and corresponding operational method for storing frequency values to a memory of the device, comprising an internal memory and an external memory, are provided. A frequency value in a memory cell of the internal memory is actualized by an increment or a decrement. After a specific number of increments and decrements in the memory cells of the internal memory, a maximum frequency value of the frequency values stored in the memory cells of the internal memory is determined, and the maximum frequency value is transferred to a corresponding memory cell of the external memory. The memory cell of the internal memory that contains the transferred maximum frequency value is reset. After a period, content of each memory cell of the internal and external memory is read, and each memory cell of the internal and external memory is reset.03-03-2016
20160180494LOW POWER DMA SNOOP AND SKIP06-23-2016
345538000 Data transfer between system memory display memory 4
20090102849Display Underflow Prevention - In devices in which display data is read from a memory for display, display underflow in a processing block is alleviated by controlling a clock frequency driving the processing block. Stages of the processing block send underflow detection signals to underflow prevention logic. The underflow prevention logic controls the frequencies of clock signals generated by a clock generator to alleviate the underflow condition.04-23-2009
20110109639POWER SAVINGS IN A COMPUTING DEVICE DURING VIDEO PLAYBACK - Display data and video data are stored within a graphics processing unit to reduce power consumed by the computing device during video playback. Storing display data and video data within the GPU reduces power consumption, because bus transaction activity is reduced and the need to read data from a larger, common main memory is avoided.05-12-2011
20130201195SCREEN COMPRESSION FOR MOBILE APPLICATIONS - One embodiment of the invention sets forth a technique for compressing and storing display data and optionally compressing and storing cursor data in a memory that is local to a graphics processing unit to reduce the power consumed by a mobile computing device when refreshing the screen. Compressing the display data and optionally the cursor data also reduces the relative cost of the invention by reducing the size of the local memory relative to the size that would be necessary if the display data were stored locally in uncompressed form. Thus, the invention may improve mobile computing device battery life, while keeping additional costs low.08-08-2013
20160078640MULTIMEDIA CONTENT DELIVERY SYSTEM - A computer-implemented method of transforming an image file by an image file transformation apparatus, the method including providing an image file in a pixel-based format having a plurality of pixels, dividing the pixels into a plurality of patches, sampling the pixels to generate boundary conditions relating to each of the patches, deriving Fourier coefficients of a solution to a partial differential equation according to the boundary conditions, and outputting the Fourier coefficients for each of the patches as a transformed image file.03-17-2016
345539000 Double buffered 8
20080278512INFORMATION STORAGE MEDIUM STORING GRAPHIC DATA AND APPARATUS AND METHOD OF PROCESSING THE GRAPHIC DATA - An information storage medium including graphic data and presentation information, and an apparatus and method of processing the graphic data are provided. The information storage medium includes the graphic data, page composition information which defines page composition of the graphic data, and the presentation information indicating when graphic screen data, which is composed with reference to the page composition information of the graphic data, is output to a display screen. Therefore, a graphic object is reusable in graphic data processing, and accordingly, a time taken to process the graphic data is reducible and memory area may be saved.11-13-2008
20090289947SYSTEM AND METHOD FOR PROCESSING DATA SENT FROM A GRAPHIC ENGINE - An image processing system is provided comprising a memory, a graphic engine and a data processing module. The graphic engine generates a sequence of input data, wherein each of the input data has an address information pointing to a corresponding memory address of the memory. The data processing module sequentially receives the input data from the graphic engine, buffers each of the received data into a corresponding buffer according to the address information thereof, and outputs buffered data in a buffer to the memory when the buffer is full, wherein memory addresses of the outputted data are continuous.11-26-2009
20100007673Double-Buffering Of Video Data - Data is written to one of two frame buffers in write access cycles having write and non-write sub-periods. Data is read out to a display device from the other of the two frame buffers in read access cycles having read and non-read sub-periods. The writing of data and the reading of data are switched to a respective opposite frame buffer during a switching opportunity, a switching opportunity occurring when a read access cycle is in a non-read sub-period and a write access cycle is in a non-write sub-period. A count of the number of times a switching opportunity is not executed because a read access cycle is in a non-read sub-period while a write access cycle is in a write sub-period is incremented. If the count exceeds a particular threshold, a write access cycle subsequent to the count exceeding the threshold is masked. When a write access cycle is a masked data is not written into a buffer.01-14-2010
20100026694PORTABLE TERMINAL - The portable terminal includes a display unit configured to display a screen; a first buffer and a second buffer configured to sequentially store display data for the displayed screen; a first determination unit configured to determine whether to perform single-buffer control or double-buffer control based on update data for the displayed screen; and a setting unit configured to set, if single-buffer control is appropriate, a display control method of the display unit to a display control method using the first buffer and to set, if double-buffer control is appropriate, a display control method of the display unit to a display control method using the first buffer and the second buffer.02-04-2010
20100265260Automatic Management Of Buffer Switching Using A Double-Buffer - An apparatus for double-buffering a sequence of frames of pixel data for display is disclosed. The apparatus comprises two frame buffers, a read unit to read a first frame of pixel data from a first one of the two frame buffers, a write-switch point determiner, and a write-buffer selector. The write-switch point determiner determines a safe write-switch point in the first one of the two frame buffers. The safe write-switch point is determined, at least in part, by an average rate at which data is written to the frame buffers and an average rate at which data is read from the frame buffers. The write-buffer selector determines if the reading of the first frame has progressed beyond the safe write-switch point, and selects one of the two frame buffers to write a second frame of pixel data based on the determination.10-21-2010
20140247270Switching Video Streams for a Display Without a Visible Interruption - The disclosed embodiments provide a system that facilitates driving a display in a computer system. During operation, the system receives an input video stream from a graphics source, wherein the input video stream comprises a sequence of video frames. Next, the system directs the input video stream through a set of two or more memory buffers including a front buffer and a back buffer to produce an output video stream, which is used to drive the display. While directing the input video stream through the set of memory buffers, the system writes a video frame from the input video stream into the back buffer, and concurrently drives the output video stream from a preceding video frame in the front buffer. When the writing of the video frame completes, the system switches buffers so that the back buffer becomes the front buffer, which drives the output video stream, and the front buffer becomes either a spare buffer or the back buffer, which receives a subsequent frame from the input video stream.09-04-2014
20150070369FAULT-TOLERANT PREEMPTION MECHANISM AT ARBITRARY CONTROL POINTS FOR GRAPHICS PROCESSING - This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.03-12-2015
20160118026DRIVE METHOD AND SYSTEM FOR LED DISPLAY PANEL - A drive method and system for an LED display panel. The method comprises: converting an HDMI/DVI video signal into an RGB signal; dividing the RGB signal into N independent code streams and re-ranking same; and periodically switching a direct current provided to an LED display module (04-28-2016
345540000 Interleaved 3
20100134505Image Rendering - Systems, methods, and computer program products receive an image request identifying an image having a width and a height. A number of interleaved buffers is identified, each of the interleaved buffers operable to store data associated with the image. The image is split into each of the interleaved buffers on a computing device. An interleaved image is displayed corresponding to at least one of the interleaved buffers, where the interleaved image having substantially the same width and height of the image.06-03-2010
20120147022Methods and Systems for Providing Access to Content During a Presentation of a Media Content Instance - Exemplary methods and systems for providing access to content during the presentation of a media content instance are disclosed herein. As described in more detail below, a content presentation system may detect a predefined motion of a mobile device during a presentation of a media content instance by a media content access device, identify the media content instance, and provide access to the identified media content instance by way of the mobile device in response to the predefined motion. Corresponding methods and systems are also disclosed.06-14-2012
20130286028ADDRESS GENERATOR OF IMAGE PROCESSING DEVICE AND OPERATING METHOD OF ADDRESS GENERATOR - A method of operating an address generator configured to map an image onto a plurality of memories via an interleaving includes detecting information associated with the image and the interleaving; selecting an address mapping scheme according to the detection result; and mapping the image onto the plurality of memories according to the selected address mapping scheme.10-31-2013

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