Class / Patent application number | Description | Number of patent applications / Date published |
341157000 | Intermediate conversion to frequency or number of pulses | 16 |
20080211704 | Distributed Sigma-Delta Sensor Network - The sensor network described herein uses a distributed sigma-delta converter, where each of a plurality of sensor nodes includes a sigma-delta modulator communicatively coupled to a remotely located sigma-delta processor in a control hub. Each sensor node generates a serial bit stream representative of a sensor output signal. The control hub includes a plurality of signal processors, each of which receive and digitally process the serial bit stream wirelessly transmitted by a corresponding sensor node. A controller in the control hub analyzes the digital output from each signal processor to determine one or more characteristics of the sensor network. | 09-04-2008 |
20080272950 | Analogue to Digital Conversion - An analog-to-digital conversion arrangement converting an input analog signal into an output digital representation. Two or more analog-to-digital conversion paths each applying a conversion mapping between input analog signal magnitudes and respective digital values generate an intermediate representation of the input analog signal, the conversion paths being operable to apply different respective conversion mappings. An output circuit combines the intermediate representations from at least two conversion paths to generate the output digital representation, the intermediate representations being combined according to a weighting dependent on the magnitude of the input analog signal. At least one of the conversion paths has an enhanced sensitivity mode appropriate to a range of magnitudes of the input signal that are below a threshold magnitude. Control logic inhibits operation in the enhanced sensitivity mode if the magnitude of the input analog signal exceeds the threshold magnitude. | 11-06-2008 |
20080284632 | PHASE DOMAIN ANALOG TO DIGITAL CONVERTER - An analog to digital converter that first converts an analog input voltage into first and second periodic signals having a phase difference there between that is a function of the analog input voltage and then introduces the first periodic signal into a forward direction data path through a series of consecutive delay cells so that the first periodic signal propagates through the cells via the first series of delay elements in a first direction, and introduces the second periodic signal into a reverse direction data path through the same series of delay cells so that the second periodic signal propagates through the cells via the second series of delay elements in an opposite direction, and using the second periodic signal to latch the first periodic signal in each cell so as to generate an output signal for each cell, said output signals of said cells collectively indicating the unique cell in which the leading edges of corresponding pulses in the first and second directions met, and decoding the outputs of the cells to generate a digital binary output value. | 11-20-2008 |
20080284633 | A/D converter circuit and A/D conversion method - An A/D converter circuit uses first and second ring delay lines. The first and second ring delay lines are supplied with input signals, which increase/decrease oppositely from each other with respect to change directions. In each ring delay line, a first counter counts the number of times of circulation of a pulse signal circulating therein to find a digital data, and a last digital data is subtracted from a present digital data. By adding the resulting first and second digital data of the first and second ring delay lines, a digital data of the input voltage of linear characteristics is provided. | 11-20-2008 |
20080284634 | DIFFERENTIAL AMPLIFYING CIRCUIT - Disclosed is a differential amplifying circuit including an amplifying circuit, wherein 1) a drain of a sixth transistor is connected to a drain of an eighth transistor, and a drain of a tenth transistor is connected to a drain of a fourth transistor, and 2) a ratio between a total of gate widths of the fourth (or eighth) and tenth (or sixth) transistors (converted per unit gate length, and gate widths that follow are the same) and a gate width of a fifth (or ninth) transistor is nearly proportional to a current ratio between a first (or third) and second (or fourth) current source circuits, the gate width of the fourth (or eighth) transistor being equal to or more than that of the tenth (or sixth) transistor. | 11-20-2008 |
20090079612 | Systems and/or Devices for Providing an Isolated Analog Output or Analog Input - Certain exemplary embodiments can provide a method, which can comprise transmitting a recovered analog input signal to a programmable logic controller. The recovered analog input signal can be converted, on a downstream side of an isolation device, from a converted signal. The recovered analog input signal can have a voltage value that varies according to a frequency value of the converted signal. | 03-26-2009 |
20090085789 | Analog To Digital Converter - An ADC, such as a CT SD-ADC, includes a clock generation circuit that produces charging and discharging clock signals such that a settling time for an integrator in the ADC is increased. The clock signals may control a feedback SD-DAC in the CT SD-ADC. The clock signals also may be asymmetric and/or may result in the settling time of the integrator being greater than half the system clock. | 04-02-2009 |
20090135040 | Method for controlling delay time of pulse delay circuit and pulse delay circuit thereof - An inverter circuit configuring a delay unit is a so-called CMOS transistor including a PMOS transistor and an NMOS transistor, of which respective gates are interconnected and respective drains are interconnected. The source and a back gate of the NMOS transistor are connected to the ground. The source of the PMOS transistor is connected to a positive drive terminal and controlled by an analog input signal. The back gate of the PMOS transistor is connected to a control terminal and controlled by a control signal. | 05-28-2009 |
20090212986 | SIGNAL READING SYSTEM - A signal reader system having a processor for reconstructing a relatively high-frequency input signal to a low-pass filter from an output of the filter based on a characterization of the filter. The characterization may be adapted to compensate for filter output changes due to temperature. A signal reader may be connected to the output of the processor to determine certain things, such as a pulse count, about the filter input signal. | 08-27-2009 |
20090267820 | ANALOG/DIGITAL, CONVERSION CIRCUIT, TIMING SIGNAL GENERATION CIRCUIT, AND CONTROL DEVICE - There are provided an analog-digital converter circuit capable of performing the same degree of operation as being performed at a high-frequency oscillation pulse using a low-frequency oscillation pulse without using the high-frequency oscillation pulse, a timing signal generating circuit generating a timing signal at the high frequency, and a control device using the circuits. In an analog-digital converter circuit, a periodic signal generating circuit allows the first to j-th pulse counting devices of the N pulse counting devices to count a count value X and allows the other pulse counting devices to count a count value X−1 in each sampling period by sequentially generating N serial periodic signals at a delay time interval of [approximate value of one period (T) of periodic signals]÷N. A digital signal generating circuit converts the analog signal to the digital signal. | 10-29-2009 |
20090295615 | Sigma-Delta Converter and Signal Processing Method - A sigma-delta converter comprises a sigma-delta modulator (SDM) with a signal processing block (SP) and a quantizer (QNT), as well as a stage adaptation element (DCC). The signal processing block (SP) is designed for deriving a modulated signal (MOD) in dependence on the respective signals at a signal input (SIN) and at a feedback input (FIN). The quantizer (QNT) comprises a quantization input (QIN) that is coupled to the signal output (SOT) and a quantization output (QOT) that is coupled to the feedback input (FIN), wherein the quantizer is designed for deriving a first quantized signal (Q1) from the modulated signal (MOD) by quantization with a first number of stages and for outputting this first quantized signal at the quantization output (QOT). The stage adaptation element is coupled to the quantization output (QOT) on the input side and to a converter output (COT) on the output side and is designed for deriving a second quantized signal (Q2) with a second number of stages that is smaller than the first number of stages from the first quantized signal (Q1). | 12-03-2009 |
20100109928 | FLEXIBLE DIGITAL TRANSPARENT TRANSPONDER - Embodiments disclosed herein relate generally to digital transponders. In one broad aspect, there is provided a digital transponder comprising: (a) an analog to digital converter configured to receive a real analog wideband multi-carrier signal and generate a real digital wideband multi-carrier signal from the real analog wideband multi-carrier signal, the real analog wideband multi-carrier signal spans M element channels, M being an integer greater than or equal to one; (b) a channelizer configured to channelize the real digital wideband multi-carrier signal into 2M channelized digital signals, the 2M channelized digital signals comprising M pairs of channelized digital signals, each pair of channelized digital signals comprising a primary channelized digital signal and a secondary channelized digital signal, the secondary channelized digital signal being an image of the primary channelized digital signal; (c) a switch matrix and signal construction module configured to generate a plurality of intermediate signals from only the primary channelized digital signals, the plurality of intermediate signals comprising pairs of intermediate signals, each pair comprising a primary intermediate signal and a secondary intermediate signal, the secondary intermediate signal being an image of the primary intermediate signal; (d) at least one synthesizer, the at least one synthesizer configured to combine at least one pair of intermediate signals to generate a real digital output signal; and (e) at least one digital to analog converter, the at least one digital to analog converter configured to convert the real digital output signal to an analog output signal. | 05-06-2010 |
20120075137 | A/D CONVERTER CIRCUIT - An A/D converter circuit includes first to fourth pulse circulation circuits and first and second counters and configured to provide high conversion accuracy irrespective of a temperature change. The first pulse circulation circuit operates with a difference voltage of a specified voltage and an analog input voltage. The first counter outputs a difference of the number of pulse circulation in the first and the second pulse circulation circuits. The third pulse circulation circuit operates with a difference voltage of the specified voltage and a set voltage. The fourth pulse circulation circuit operates with the set voltage. The second counter outputs a difference of the number of pulse circulation in the third and the fourth pulse circulation circuits. When an output value of the second counter reaches a specified value, an output value of the first counter at that time is outputted as A/D conversion data. | 03-29-2012 |
20120112945 | A/D CONVERSION APPARATUS - An A/D conversion apparatus includes an N-stage pulse circulating circuit including N (N is a natural number, N≧3) inverting circuits connected in a ring shape, the inverting circuits delaying an input pulse signal by a delay time corresponding to an amplitude of a separately input analog input signal, and outputting inverted pulse signals obtained by inverting the pulse signal, a counter unit that counts a number of circulations by which the pulse signal has circulated in the pulse circulating circuit within a predetermined time based on the inverted pulse signal output from one of the N inverting circuits, and a switching unit that switches an output destination of the inverted pulse signal, which is output from an inverting circuit of an M | 05-10-2012 |
20140152483 | METHOD AND DEVICE FOR TESTING THE MATERIAL OF A TEST OBJECT IN A NONDESTRUCTIVE MANNER - A method for testing the material of a test object ( | 06-05-2014 |
20150130649 | AD CONVERTER - In one embodiment, an AD converter includes a first (second) oscillation circuit, a first (second) counter, a first (second) arithmetic circuit, a first (second) subtracting circuit, an adder circuit, and a feedback circuit. The first oscillation circuit generates a first pulse signal having a frequency corresponding to a level of a first analog signal. The first counter counts the first pulse signal. The first arithmetic circuit generates a first signal corresponding to a change amount of a count value. The first subtracting circuit outputs a digital signal corresponding to a difference between the signals generated by the first and second arithmetic circuits. The adder circuit generates a sum signal of the signals generated by the first and second arithmetic circuits. The second subtracting circuit generates a difference signal between the sum signal and a reference signal. The feedback circuit inputs the difference signal to the first oscillation circuit. | 05-14-2015 |