| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 331111000 | Relaxation oscillator | 39 |
| 20080218283 | Triangular wave generating circuit, and charging and discharging control circuit - A triangular wave generating circuit capable of reducing a time lag between the time of input of a discharging start signal and the time of start of actual discharging is provided. A charging and discharging circuit of the triangular wave oscillation circuit includes: an inverter circuit; a discharging reference potential generating circuit; a first NMOS transistor having a drain connected with a connection point between a first current source circuit and the capacitor, and a gate connected with the discharging reference potential generated by the discharging reference potential generating circuit; a second NMOS transistor having a gate inputted with the switching signal through the inverter circuit, a drain connected with the gate of the first NMOS transistor, and a source connected with a source of the first NMOS transistor; and a third NMOS transistor having a gate inputted with the switching signal, a drain connected with a connection point between the source of the first NMOS transistor and the source of the second NMOS transistor, and a source grounded. | 09-11-2008 |
| 20080284532 | VOLTAGE- AND TEMPERATURE-COMPENSATED RC OSCILLATOR CIRCUIT - An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor. | 11-20-2008 |
| 20090085681 | HIGH-RESOLUTION DIGITALLY CONTROLLED OSCILLATOR AND METHOD THEREOF - A digitally controlled oscillator provides high resolution in frequency tuning by using a digitally controlled capacitive network that includes a tunable capacitive circuit, a first capacitor and a second capacitor. The tunable capacitive circuit generates a variable capacitance according to a digital control word. The first capacitor is coupled in an electrically parallel configuration with the tunable capacitive circuit. The second capacitor is coupled in an electrically serial configuration with a combination of the first capacitor and the tunable capacitive circuit. The first capacitor and the second capacitor are sized such that an effective capacitance of the digitally controlled capacitor network has a step size that is a fraction of a step size of the variable capacitance in response to an incremental change in the digital control word. | 04-02-2009 |
| 20090146749 | Low-Voltage Oscillator with Capacitor-Ratio Selectable Duty Cycle and Single-Input Sub-Threshold-Conducting Comparators to S-R Latch - An oscillator operates at a very low voltage yet has a duty cycle that is set by a ratio of capacitors that are charged and discharged. Sub-threshold p-channel transistors conduct sub-threshold currents below the normal threshold voltage, and drive set and reset inputs of a set-reset S-R latch. The S-R latch drives the oscillator outputs. The oscillator outputs feed back to charging p-channel transistors that charge one plate of the capacitors. During half of the cycle, the charging p-channel transistor is off, allowing one plate of the capacitors to discharge through an n-channel discharge transistor. After a period of discharge determined by the capacitance of the capacitor, the gate of a sub-threshold p-channel transistor falls enough for sub-threshold current to flow, triggering the set or reset input of the S-R latch. Since sub-threshold currents are needed to toggle the S-R latch, the oscillator begins to oscillate below the threshold voltage. | 06-11-2009 |
| 20100013566 | RESISTOR-CAPACITOR OSCILLATOR - An embodiment for low power-consumption RC oscillator is disclosed. A voltage transforming unit transforms a power supply voltage to an internal voltage. A current mirroring unit is coupled to the voltage transforming unit and receives the internal voltage to provide constant two current outputs with different phases. A current charging/discharging unit includes first and second nodes to receive the two constant current outputs of the current mirroring unit, wherein first and second capacitors are coupled to the first and second nodes, respectively. The first and second capacitors are charged by the two constant current outputs. A voltage sensing and outputting unit is coupled to the first and second nodes, senses voltage levels of the first and second nodes and outputs clock signals when one of the sensed voltage levels is greater than a logic threshold. A pulse generating unit generates pulse signals in response to the clock signals. The current charging/discharging unit further includes a connection switch to electrically connect the first and second nodes in response to the pulse signals. | 01-21-2010 |
| 20100066457 | LOW-POWER RELAXATION OSCILLATOR - The low-power relaxation oscillator comprises a first module ( | 03-18-2010 |
| 20100164638 | METHOD AND CIRCUIT FOR CANCELLING OUT COMPARATOR-DELAY IN THE RELAXATION OSCILLATOR - A relaxation oscillator includes a capacitor connected to a comparator input, current sources switched to supply power to the capacitor based on an output of the comparator, and a duplicate integrator shifting a voltage on the capacitor to offset a propagation delay through the comparator. The duplicate integrator includes current sources and a capacitor matching and switched in tandem with those within the relaxation oscillator, plus an additional current source, and is selectively switched into connection with the comparator input. By canceling the comparator propagation delay, the oscillator output frequency can be stably controlled through selection of resistive and capacitive values, using cheaper technology and tolerating large temperature, voltage and process variations. | 07-01-2010 |
| 20100176892 | Ultra Low Power Oscillator - A low power oscillator is disclosed in one embodiment of the invention as including a Schmitt trigger having an input, an output, and an input stage coupled to the input. The input stage may include multiple transistors connected in series between a power source and ground. A switch, controlled by the output of the Schmitt trigger, may be connected in series with the multiple transistors. The switch is configured to interrupt shoot-through current passing through the transistors when the transistors are turned on at the same time. In certain embodiments, the switch may reduce the shoot-through current by substantially half. | 07-15-2010 |
| 20100231312 | Oscillator Arrangement and Method for Generating a Periodic Signal - An oscillator arrangement is specified, in which a relaxation oscillator is refined to the extent that the comparator ( | 09-16-2010 |
| 20110001572 | RELAXATION OSCILLATOR - A relaxation oscillator. The relaxation oscillator includes a comparator and a latch. The comparator includes a comparator output and a comparator input that is configured to receive a first input signal in response to a first signal and configured to receive a second input signal in response to a second signal. The latch includes a latch-set input that is configured to be coupled to the comparator output in response to a third signal, a latch-reset input that is configured to be coupled to the comparator output in response to a fourth signal and a latch output that is configured to output the second signal. The relaxation oscillator is configured to achieve an approximately fifty percent duty cycle without requiring the use of a second comparator. | 01-06-2011 |
| 20110309889 | Variable-capacitance device - A variable-capacitance device includes a first capacitance element coupled between a first power supply terminal and an output terminal, a capacitance selection switch that is turned on and off in accordance with a capacitance switching signal, a second capacitance element coupled in parallel to the first capacitance element and in series to the capacitance selection switch, and an error correction circuit configured to operate such that in a state in which the capacitance selection switch is in an OFF state, in response to a charge reset signal that causes a voltage at the output terminal to be reset to a reset voltage, the error correction circuit substantially eliminates a difference between the voltage at the output terminal and a voltage at a capacitance switching node at which the second capacitance element is coupled to the capacitance selection switch. | 12-22-2011 |
| 20120086515 | RELAXATION OSCILLATOR - There is provided relaxation oscillator. The relaxation oscillator includes: a ramp wave generator generating ramp waves by a complementary operation between a first capacitor module charged and discharged according to a first switching signal and a second capacitor module charged and discharged according to a second switching signal; a negative feedback circuit unit generating a compensation voltage for compensating errors with reference voltage by being fedback with the ramp waves; and a switching signal generator generating the first switching signal controlling the charging and discharging of the first capacitor module and the second switching signal controlling the charging and discharging of the second capacitor module from the compensation voltage and the ramp waves. As a result, the present invention can generate ramp waves having a stable frequency while preventing a frequency from being changed due to a delay or an offset of the comparator. | 04-12-2012 |
| 20130021109 | Oscillator Circuit with Comparator - An oscillator circuit with a comparator is provided, wherein the comparator has a supply input. A supply circuit supplies the comparator with a first current during a first section of an oscillator period of the oscillator circuit and with a second current greater than the first current during a second, different section of the oscillator period. | 01-24-2013 |
| 20130082789 | OSCILLATION CIRCUIT AND OPERATING CURRENT CONTROL METHOD THEREOF - An oscillation circuit includes a condenser, a charging/discharging part configured to switch between charging and discharging of the condenser according to a control signal, a comparator configured to compare a voltage of the condenser with a reference voltage and output a comparison result signal, a flip-flop configured to be set or reset according to the comparison result signal, supply an output signal as the control signal to the charging/discharging part, and output the output signal as an oscillation signal, and a current control part configured to control an operating current of the comparator in correspondence with the voltage of the condenser. | 04-04-2013 |
| 20130200956 | RELAXATION OSCILLATOR - A relaxation oscillator is provided. A first current source provides a first current. A second current source provides a second current. A resistive element is coupled between the first current source and a ground. A capacitive element is coupled between the second current source and the ground. A comparator has a non-inverting input terminal, an inverting input terminal and an output terminal for outputting a compare result. A clock generator provides a clock signal according to the compare result. A switching unit alternately couples the non-inverting input terminal and the inverting input terminal of the comparator to the resistive element and the capacitive element according to the clock signal. | 08-08-2013 |
| 20130328636 | VDD-Independent Oscillator Insensitive to Process Variation - A method of providing an oscillating signal, comprising providing a first constant current flowing from a positive power supply node, the first constant current independent of a variation in a positive power supply node voltage, providing a second constant current flowing from a positive power supply node to a second electrode of a capacitor, a first electrode of the capacitor connected directly to the positive power supply node, the second constant current mirroring the first constant current and charging the capacitor by reducing a voltage across the capacitor. A third constant current is provided flowing from the positive power supply node through a first NMOS transistor and mirroring the first constant current, the first NMOS transistor having a gate connected directly to the second electrode of the capacitor and an oscillating signal generated by turning on the first NMOS transistor when the capacitor reaches a predetermined voltage level. | 12-12-2013 |
| 20130335156 | OSCILLATOR COMPRISING AN RC-CIRCUIT AND A PUSH-PULL STAGE AND ELECTRONIC DEVICE COMPRISING THE OSCILLATOR - Oscillator and electronic device comprising an oscillator, wherein the oscillator has an RC-circuit and a push-pull stage. A tapping point of the RC-circuit is coupled to an input of the push-pull stage and an output of the push-pull stage is fed back to a switching transistor which is coupled to the tapping point of the RC-circuit. | 12-19-2013 |
| 20140035688 | OSCILLATOR - There is provided an oscillator providing a clock signal having a uniform duty ratio by generating a toggled voltage by charging and discharging a capacitor with a voltage irrespective of a temperature from a band gap circuit. The oscillator includes: a band gap circuit providing a band gap reference voltage having a pre-set voltage level; a voltage-current conversion unit converting the band gap reference voltage from the band gap circuit into a current; a charging/discharging unit charging/discharging the converted current and providing a triangle wave signal; and a T flip-flop logically operating a pulse signal according to a maximum value of the triangle wave signal from the charging/discharging unit and providing a clock signal having a fixed duty. | 02-06-2014 |
| 20140091870 | Area Efficient Single Capacitor CMOS Relaxation Oscillator - Methods and circuits for CMOS relaxation oscillators are disclosed. A single capacitive element, a single current source and a switching network are utilized. A switching network of the oscillator allows both nodes of the capacitive element to rise and fall between a positive and a negative voltage with respect to ground supply, without causing leakage to substrate or risk of latch-up, i.e. the inadvertent creation of a low-impedance path. The oscillator requires minimum silicon area, has an improved duty cycle, is particular useful for implementing lower frequency clocks and is enabled for smaller technology nodes, lower than 250 nm, due to lower supply voltage. | 04-03-2014 |
| 20140118078 | RELAXATION OSCILLATOR - A relaxation oscillator for generating an output clock signal includes a RC circuit, a bias generation stage, first and second comparator stages, and a logic circuit. The RC circuit generates first and second comparator input signals that are transmitted to the first and second comparator stages. The bias generation stage generates first and second bias voltages that are provided to each of the first and second comparator stages. The first and second comparator stages generate first and second comparator output signals, respectively, based on the first and second comparator input signals and the first and second bias voltages. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal. | 05-01-2014 |
| 20140125421 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Provided are a semiconductor device including an oscillator arid a manufacturing method thereof, in which cost is low and design flexibility is high. The semiconductor device includes a wiring structure region and an oscillator region. The semiconductor device also includes, in the oscillator region, a metal resistive element as the same layer as a conducting film over uppermost metal wiring in the wiring structure region. | 05-08-2014 |
| 20140176249 | APPARATUSES AND METHODS FOR PROVIDING OSCILLATION SIGNALS - Apparatuses and methods are disclosed for oscillators that are substantially insensitive to supply voltage variations. In one such example apparatus, a capacitance circuit is configured to be charged and discharged. Charging and discharging circuits are coupled to the capacitance circuit and configured to charge and discharge, respectively, the capacitance circuit by charging and discharging currents responsive to charge and discharge signals. A control circuit is coupled to the charging circuit and the discharging circuit, and is configured to provide the charge and discharge signals responsive to a voltage of the capacitance circuit, and is further configured to provide an oscillation signal responsive to the voltage of the capacitance circuit. The charging current, the discharging current, or both the charging and discharging currents are proportional to a difference between a first reference voltage and a second reference voltage. | 06-26-2014 |
| 20140210564 | RELAXATION OSCILLATOR WITH SELF-BIASED COMPARATOR - A relaxation oscillator for generating an output clock signal includes an RC circuit, a self-biased comparator stage, and a logic circuit. The RC circuit generates first and second comparator input signals that are provided to the self-biased comparator stage. The self-biased comparator stage includes first and second input stages and a voltage reference circuit. Each of the first and second input stages in conjunction with the voltage reference circuit forms a comparator, i.e., first and second comparators corresponding to the first and second input stages, respectively. The self-biased comparator stage generates first and second comparator output signals, based on the first and second comparator input signals. The first and second comparator output signals are provided to the logic circuit that generates the output clock signal. | 07-31-2014 |
| 20140232480 | CLOCK APPARATUS - The invention provides a clock apparatus includes a clock source, a first resistor, a diode, an amplifier, and an oscillator. The current source provides a current, and the current has a first temperature coefficient. The first resistor has a first end, and the first end receives the current. The anode of the diode is coupled to a second end of the first resistor, the cathode of the diode is coupled to a reference ground. The diode has a second temperature coefficient. The amplifier receives a power source. The amplifier generates an output voltage according to the power source and a voltage on the first end of the first resistor. The oscillator receives the output voltage to be an operating power. Wherein, the first and second temperature coefficients are complementary. | 08-21-2014 |
| 20140312983 | Runtime Compensated Oscillator - Disclosed is a method for generating an oscillating signal and an oscillator circuit. | 10-23-2014 |
| 20140368284 | RELAXATION OSCILLATOR - A relaxation oscillator is provided in the present invention. The relaxation oscillator includes a R-S latch, a first delay circuit and a second delay circuit. The input terminal of the first delay circuit is coupled to the Q output terminal of the R-S latch, and the output terminal of the first delay circuit is coupled to the reset terminal of the R-S latch. The input terminal of the second delay circuit is coupled to the inversion Q output terminal of the R-S latch, and the output terminal of the second delay circuit is coupled to the set terminal of the R-S latch. When the input terminal of the first delay circuit inputs a first logic voltage, after a delay time, the output terminal of the first delay circuit outputs a second logic pulse. When the input terminal of the second delay circuit inputs the first logic voltage, after the delay time, the output terminal of the second delay circuit outputs the second logic pulse. | 12-18-2014 |
| 20140375392 | Low Power Relaxation Oscillator - A relaxation oscillator circuit includes a comparator including a first input, a second input, a bias input, and an output. The first input is coupled to a charging node, and the second input is configured to receive a reference voltage. The relaxation oscillator circuit further includes a first bias circuit configured to provide a bias signal to the bias input of the first comparator when a first node voltage on the charging node exceeds a first reference. | 12-25-2014 |
| 20150109065 | RELAXATION OSCILLATOR - A relaxation oscillator includes a first amplifier having a first input terminal receiving an output voltage signal, a second input terminal receiving a reference voltage signal, and an output terminal comparing the output voltage signal and the reference voltage signal and in response thereto outputting a control signal; a second amplifier having a first input terminal receiving the output voltage signal, a second input terminal connected to the output terminal of the first amplifier for receiving the control signal, and an output terminal connected to the first input terminal of the first amplifier and the first input terminal of the second amplifier for comparing the control signal and the output voltage signal and in response thereto outputting the output voltage signal; and a sensing capacitor for generating the output voltage signal by charging/discharging operations by the output terminal of the second amplifier. | 04-23-2015 |
| 20160013753 | RELAXATION OSCILLATOR WITH CURRENT AND VOLTAGE OFFSET CANCELLATION | 01-14-2016 |
| 20160056763 | SWITCHED-CAPACITOR RC OSCILLATOR - An RC oscillator includes a first capacitive element and a second capacitive element and a comparator having a first input, a second input, and an output for outputting an oscillating signal. The oscillator further includes an integrator having a first input, a second input coupled to a reference voltage source, and an output coupled to the second input of the comparator. The oscillator further includes a switch circuit configured to provide a voltage of the first capacitive element to the first input of the comparator in a cycle and a voltage of the second capacitive element to the first input of the comparator in a subsequent cycle. The integrator is configured to sample and to hold the voltage of the second capacitive element continuously in the cycle. | 02-25-2016 |
| 20160087582 | RC OSCILLATOR - An oscillator includes an oscillating circuit having an input and an output configured to oscillate between a first state and a second state. The oscillating circuit includes a resistor-capacitor circuit configured to bias the oscillating circuit input towards a target voltage. The oscillating circuit is configured to transition the oscillating circuit output from the first state to the second state in response to the oscillating circuit input reaching a threshold voltage before it reaches the target voltage. Another oscillator includes an oscillating circuit having an input and an output configured to oscillate between the first state and the second state. The oscillating circuit is configured to transition the oscillating circuit output from the first state to the second state in response to the oscillating circuit input reaching a threshold voltage. A starting circuit is configured to set the oscillating circuit input to the threshold voltage to start the oscillating circuit. | 03-24-2016 |
| 20160112038 | DELAY CIRCUIT, OSCILLATION CIRCUIT, AND SEMICONDUCTOR DEVICE - Provided is a voltage regulator which consumes low power and uses an NMOS transistor as an output transistor. A delay circuit includes, between a constant current circuit and a capacitor, a depletion type NMOS transistor having a gate and a back gate each connected to a ground terminal, the constant current circuit including a depletion type NMOS transistor and a resistor connected between each of a gate and a back gate of the depletion type NMOS transistor and a source thereof. | 04-21-2016 |
| 20160118937 | APPARATUSES AND METHODS FOR PROVIDING OSCILLATION SIGNALS - Apparatuses and methods are disclosed for oscillators that are substantially insensitive to supply voltage variations. In one such example apparatus, a capacitance circuit is configured to be charged and discharged. Charging and discharging circuits are coupled to the capacitance circuit and configured to charge and discharge, respectively, the capacitance circuit by charging and discharging currents responsive to charge and discharge signals. A control circuit is coupled to the charging circuit and the discharging circuit, and is configured to provide the charge and discharge signals responsive to a voltage of the capacitance circuit, and is further configured to provide an oscillation signal responsive to the voltage of the capacitance circuit. The charging current, the discharging current, or both the charging and discharging currents are proportional to a difference between a first reference voltage and a second reference voltage. | 04-28-2016 |
| 20160142011 | SEMICONDUCTOR DEVICE - A semiconductor device is formed by sealing, with a resin, a semiconductor chip (CP | 05-19-2016 |
| 20160204741 | SEMICONDUCTOR DEVICE | 07-14-2016 |
| 331113000 | Multivibrator type | 4 |
| 20090072918 | Oscillator and method for operating the same - An oscillator includes a first comparator circuit, a second comparator circuit, an oscillation signal generator circuit, and a frequency voltage generator circuit. The first comparator circuit generates a first pulse when a frequency voltage reaches a first reference voltage, and the second comparator circuit generates a second pulse when the frequency voltage reaches a second reference voltage. The oscillation signal generator circuit generates an oscillation signal by latching a first voltage in response to the first pulse and latching a second voltage in response to the second pulse. The frequency voltage generator circuit raises or lowers the frequency voltage in response to the oscillation signal. The driving capability of the first comparator circuit is reduced at the latching of the first voltage and is restored at the latching of the second voltage. The driving capability of the second comparator circuit is reduced at the latching of the second voltage and is restored at the latching of the first voltage. | 03-19-2009 |
| 20090251227 | CONSTANT GM OSCILLATOR - The present invention provides a constant gm circuit that generates a bias current for a emitter/source-coupled multivibrator oscillator. The stable gm bias limits the temperature dependence of the oscillator. Trimming a resistor in the constant gm circuit compensates for process variations, and current sources may be provided that are mirrors of the bias current that are also substantially independent of the supply voltage. The present invention provides an oscillator with less that 1% frequency changes due to PVT variations. | 10-08-2009 |
| 20130169372 | PULSE GENERATOR AND SEMICONDUCTOR INTEGRATED CIRCUIT - A pulse generator includes an oscillation circuit that generates a burst signal oscillated for ultrawideband band and a generation circuit that generates a trigger signal that causes oscillation by the oscillation circuit to be started. | 07-04-2013 |
| 20150035611 | VCO WITH LINEAR GAIN OVER A VERY WIDE TUNING RANGE - An oscillating circuit with linear gain is presented. The oscillating circuit may include a relaxation oscillator and a current compensation block. The relaxation oscillator includes a capacitor, a pair of resistors operative to deliver a first current to the capacitor, and a first current source adapted to generate the first current having a first predefined level. The current compensation block includes a second current source, and a pair of cross-coupled transistors coupled to the second current source and adapted to steer a current exceeding the first predefined level in the relaxation oscillator away from the capacitor and to the second current source. The proposed oscillating circuit generates an output signal which has a linear gain over a wide tuning range. | 02-05-2015 |
