Class / Patent application number | Description | Number of patent applications / Date published |
331044000 | WITH FREQUENCY CALIBRATION OR TESTING | 56 |
20080238555 | Systems, Modules, Chips, Circuits and Methods with Delay Trim Value Updates on Power-Up - Timing measurement is performed by a digital oscillator, using a calibration value which is calculated after chip fabrication is completed, and automatically loaded into selection logic at powerup. | 10-02-2008 |
20080278247 | Calibration of Voltage Controlled Oscillators - A calibration circuit ( | 11-13-2008 |
20090002081 | MEASUREMENT APPARATUS FOR IMPROVING PERFORMANCE OF STANDARD CELL LIBRARY - Disclosed herein is a measurement apparatus for improving performances of standard cells in a standard cell library when verifying performance of the standard cell library through a ring oscillator among various test element groups (TEGs). A built-in circuit is used to measure and verify performance of the standard cell library through a TEG. Therefore, it is possible to effectively improve performances of the standard cells in the standard cell library. Particularly, it is possible to not only remove human errors or internal errors of equipment, but also perform the measurement more readily, rapidly and accurately. Further, it is possible to curtail the use of high-performance equipment or manpower and time required in a measurement process. | 01-01-2009 |
20090015339 | APPARATUS, METHOD AND COMPUTER PROGRAM PRODUCT FOR TRACKING INFORMATION IN AN ELECTRIC GRID - An apparatus for rapidly tracking fundamental frequency information in the signal of an electric grid is a cross-coupled phase-lock loop filter (CCPLL) that includes the use of a phase-lock-loop (PLL) apparatus having a plurality individual filters, wherein an input for a first filter in the plurality of individual filters comprises the signal of the electric grid and an output signal from at least a second filter in the plurality of individual filters. A method for using the CCPLL includes applying a signal to the CCPLL and monitoring the output of the CCPLL. Use of the CCPLL may be accomplished or modeled via computer instructions stored on machine readable media. | 01-15-2009 |
20090045881 | Method And Apparatus For Calibrating A Voltage Controlled Oscillator By Varying Voltage Applied To Power Supply Input - Methods and apparatus are provided for calibrating a voltage controlled oscillator, such as an N-stage voltage controlled ring oscillator. The voltage controlled oscillator comprises a power supply input and at least one gate delay element and has a frequency that is a function of a delay of the gate delay element and a voltage applied to the power supply input. A voltage controlled oscillator is calibrated by varying an output voltage of a programmable voltage source through a range of values; applying the output voltage to the power supply input of the voltage controlled oscillator; comparing an output clock frequency of the voltage controlled oscillator to a reference frequency clock for each of the output voltage values; and selecting a value of the output voltage that provides an approximate minimum frequency difference between the output clock frequency and the reference frequency clock. | 02-19-2009 |
20090066426 | QUARTZ CRYSTAL DEVICE INCLUDING MONITOR ELECTRODE - A quartz crystal device includes: a crystal unit in which a crystal blank is hermetically encapsulated; and a mounting substrate housing an IC chip on which a circuit using the crystal blank is integrated. By joining an external terminal of the crystal unit and a bonding terminal of the mounting substrate, the mounting substrate is joined to the crystal unit to be integrated, and the quartz crystal device is configured. In the quartz crystal device, a crystal monitor terminal electrically connected to the bonding terminal is provided on an outer side surface of the mounting substrate, and even in a state in which the crystal unit and the mounting terminal are integrated, a vibration characteristic of the crystal blank is measurable by using the crystal monitor terminal. | 03-12-2009 |
20090079507 | System for compensation of VCO non-linearity - A nonlinearity-compensated section | 03-26-2009 |
20090115536 | PROGRAMMABLE LINEAR TRIMMING METHOD AND SYSTEM FOR PHASE LOCKED LOOP CIRCUIT CALIBRATION - The present invention implements an apparatus for calibrating a phase locked loop (PLL) circuit. The apparatus includes a detector for detecting frequencies of a reference signal and a controlled oscillator contained in the PLL circuit. The detector outputs the frequency difference to a control circuit. The control circuit is programmed to adjust one or more control signals to the controlled oscillator based upon the frequency difference in an orderly fashion to complete the calibration process. | 05-07-2009 |
20090115537 | Systems and Methods for Voltage Controlled Oscillator Calibration - Various systems, methods and apparatus for calibrating a clock generating circuit are discussed herein. As one example, a method for calibrating a voltage controlled oscillator is disclosed. The method includes fixing the control voltage of a fine tune capacitor in the voltage controlled oscillator at a predetermined level. A binary search is performed in a digital circuit for a value of a calibration word that is used to enable switched capacitors in a coarse tune capacitor bank in the voltage controlled oscillator. The calibration word is fixed at the value determined by the binary search, and the control voltage of the fine tune capacitor is released to enable adjustment of the control voltage by a feedback signal to the voltage controlled oscillator. | 05-07-2009 |
20090146744 | SYSTEM AND METHOD OF CALIBRATING REAL TIME CLOCK UTILIZING AVERAGE CALIBRATION - A system for real time clock (RTC) calibration includes: a timer counter; a clock generator; and a clock calibration unit coupled between the clock generator and the timer counter. The clock calibration unit receives calibration parameters comprising an average calibration value, a remainder calibration value and a calibration period, counts a plurality of clock cycles generated by the clock generator, calibrates a number of the counted clock cycles according to the average calibration value and remainder calibration value in the calibration period, and increments the timer counter by one second when a predetermined number of clock cycles have been reached. | 06-11-2009 |
20090160561 | SURFACE-MOUNT TYPE CRYSTAL OSCILLATOR - The surface-mount type crystal oscillator includes a container body made of laminated ceramics, having a flat bottom wall layer, a frame wall defining a recess and a step portion formed at an inner wall of the recess, a crystal blank fixed to the step portion, an IC chip fixed to an inner bottom surface of the recess and a pair of inspection terminals provided on outer side surfaces of the container body and used to measure a vibration characteristic of the crystal blank. The bottom wall layer is made up of a first layer making up an outer bottom surface of the container body and a second layer between the first layer and the frame wall, and the inspection terminals are formed so as to extend across an end face of the second layer and the outer side surface of the frame wall. | 06-25-2009 |
20090184772 | AGING COMPENSATION METHOD AND CONTROL MODULE FOR AN OSCILLATOR CIRCUIT DEVICE - An aging compensation method for an oscillator circuit device, in which the oscillator circuit device receives a control voltage from an application end, and outputs a clock signal with a predetermined frequency in response to the control voltage, includes the steps of: a) inspecting the control voltage from the application end to obtain a first value thereof; b) after a predetermined time period has elapsed, inspecting the control voltage from the application end to obtain a second value thereof; c) determining whether there is a difference between the first and second values of the control voltage; d) if it is determined that there is a difference, performing compensation on the value of the control voltage based on the difference; and e) repeating steps b) through d). | 07-23-2009 |
20090195322 | CRYSTAL OSCILLATOR FREQUENCY CALIBRATION - Techniques are disclosed for estimating a frequency of a crystal oscillator based on temperature. In an embodiment, the oscillator frequency is computed using a polynomial approximation. Techniques are disclosed for deriving and periodically updating the coefficients used in the polynomial approximation. | 08-06-2009 |
20090219100 | VOLTAGE-CONTROLLED OSCILLATOR GAIN CALIBRATION FOR TWO-POINT MODULATION IN A PHASE-LOCKED LOOP - A phase-locked loop (PLL) is arranged to receive high-pass data at a first input and low-pass data at a second input. A first digital input is coupled to a primary path through a digital-to-analog converter (DAC) and a second digital input is coupled to a feedback path of the PLL. The controller provides the first input and the second input during a calibration procedure. The controller adjusts first and second control inputs in an attempt to keep the input voltage to a voltage-controlled oscillator (VCO) in the PLL constant while determining the gain of the VCO in Hz/LSB. | 09-03-2009 |
20090251223 | TECHNIQUES FOR CHARACTERIZING PERFORMANCE OF TRANSISTORS IN INTEGRATED CIRCUIT DEVICES - A method, system and computer program product for characterizing FET transistors in an electronic circuit (IC) device using Performance Screen Ring Oscillator (PSRO) techniques. During PSRO testing, logic and non-logic bias voltages are applied to gate terminals of the being tested FETs to determine process-related variations and the relative strength of N-type and P-type transistors. | 10-08-2009 |
20090278616 | METHOD AND SYSTEM FOR CORRECTING OSCILLATOR FREQUENCY DRIFT - A method and apparatus for correcting oscillator frequency drift due to crystal aging. Correction signals that reflect a difference between an oscillator timing signal and a reference timing signal over a reference timing signal interval are modeled so that auxiliary correction signals can be generated in the event of loss of the reference timing signal. A temperature curve is generated to model how temperature variation impacts oscillator frequency drift. A rate of frequency drift due to crystal aging is also determined. During loss of a reference timing signal, auxiliary correction signals can be generated to maintain the oscillator at a desired frequency until the reference timing signal becomes available again. | 11-12-2009 |
20090278617 | Crystal-less Communications Device and Self-Calibrated Embedded Virtual Crystal Clock Generation Method - This invention discloses a crystal-less communication device and self-calibrated embedded virtual crystal clock generation method. In communication systems, the invention proposes a crystal-less scheme in the device for wireless or wired-line communications. The operation concepts are that the transmitter Device- | 11-12-2009 |
20090309666 | DYNAMIC CALIBRATION TECHNIQUES FOR DIGITALLY CONTROLLED OSCILLATOR - Techniques for calibrating digitally controlled oscillators (DCOs) are disclosed. In an aspect of the disclosure, an initial set of control codes for operating the DCO is determined. A range of output frequencies produced from the initial set is identified. Gaps or instances of overlap are identified in the frequency range. For the overlap case, control codes are removed from the initial set that correspond to the overlap instance to establish a revised set. For the gap case, control codes are added to the initial set for producing frequencies values that fill the gap. An apparatus for performing the same is also disclosed. | 12-17-2009 |
20100033254 | CRYSTAL OSCILLATOR TESTER - A crystal oscillator tester includes first and second test pins, first and second transistors, an indicator, a first diode, and first-third capacitors. The first test pin is connected to a power source. The collector of the first transistor is connected to the first test pin. The base of the second transistor is connected to the second test pin. The emitter of the first transistor is grounded via the indicator. The base of the first transistor is connected to the cathode of the first diode. The anode of the first diode is connected to the first test pin via the first and second capacitors one by one in series. The emitter of the second transistor is connected to a node between the first and second capacitors. The collector of the second transistor is grounded. The third capacitor is connected between the base and emitter of the second transistor. | 02-11-2010 |
20100060366 | TWO-STEP VCO CALIBRATION METHOD - The present invention discloses a two-step VCO calibration method. The two-step VCO calibration method, comprising power-on calibration, used to provide a coarse VCO tuning; real-time calibration, real-time calibration, used to provide a fine VCO tuning according to the loaded result of said power-on calibration. The two-step VCO calibration method according to the present invention can cover all the variation of process and temperature and gain the advantages of shorter calibration time, smaller gain of VCO, pretty smaller size of passive loop filter and less operating power consumption. | 03-11-2010 |
20100097152 | TUNABLE FILTER WITH GAIN CONTROL CIRCUIT - An apparatus includes a filter and a gain control circuit. The filter receives and filters an input signal and provides an output signal in a first mode and operates as part of an oscillator in a second mode. The gain control circuit varies the amplitude of an oscillator signal from the oscillator in the second mode, e.g., by adjusting at least one variable gain element within the oscillator to obtain a target amplitude and/or non rail-to-rail signal swing for the oscillator signal. The apparatus may further include a bandwidth control circuit to adjust the bandwidth of the filter in the second mode. The bandwidth control circuit receives the oscillator signal, determines a target oscillation frequency corresponding to a selected bandwidth for the filter, and adjusts at least one circuit element within the filter to obtain the target oscillation frequency. | 04-22-2010 |
20100102890 | Variable-Loop-Path Ring Oscillator Test Circuit and Systems and Methods Utilizing Same - Circuitry for determining timing characteristics, for example, access time, setup time, hold time, recovery time and removal time, of as-manufactured digital circuit elements, such as latches, flip-flops and memory cells. Each element under test is embodied in variable-loop-path ring oscillator circuitry that includes multiple ring-oscillator loop paths, each of which differs from the other(s) in terms of inclusion and exclusion of ones of a data input and a data output of the element under test. Each loop path is caused to oscillate at each of a plurality of frequencies, and data regarding the oscillation frequencies is used to determine one or more timing characteristics of the element under test. The variable-loop-path ring oscillator circuitry can be incorporated into a variety of test systems, including automated testing equipment, and built-in self test structures and can be used in performing model-to-hardware correlation of library cells that include testable as-manufactured digital circuit elements. | 04-29-2010 |
20100109787 | METHOD AND APPARATUS FOR OSCILLATOR STABILITY VERIFICATION - A technique for oscillator stability and accuracy verification involves analysis of parameters from a plurality of phase locked loops (PLLs). During testing, each PLL receives a stable reference clock to identify variations in its clock oscillator. Mathematical calculations on the data extracted from each PLL permit identification of clock oscillators having undesirable timing characteristics. Remedial measures may then be implemented to correct problems with any faulty oscillators. | 05-06-2010 |
20100237954 | SYSTEMS AND METHODS FOR SELF TESTING A VOLTAGE CONTROLLED OSCILLATOR - A method for self testing a multiband voltage controlled oscillator (VCO) is described. A first frequency band in a VCO is selected. An N value is selected for a frequency divider that produces a tuning voltage for the VCO that is between a low tuning voltage limit and a high tuning voltage limit for the VCO. The N value is adjusted in one direction until the tuning voltage reaches one of the tuning voltage limits. This N value at the tuning voltage is a first limit value. The frequency bands are switched from the first frequency band to a second frequency band that is adjacent to the first frequency band. | 09-23-2010 |
20100295622 | SYSTEMS AND METHODS FOR SELF TESTING A VOLTAGE CONTROLLED OSCILLATOR IN AN OPEN LOOP CONFIGURATION - Methods and apparatus for self testing a multiband voltage controlled oscillator (VCO) are disclosed. A tuning voltage of the VCO is adjusted where the output of the VCO does not affect the input to the VCO. Frequency bands in the VCO are selected. Output frequencies of the VCO are measured. | 11-25-2010 |
20100295623 | SYSTEMS AND METHODS FOR CALIBRATING REAL TIME CLOCK - Systems and methods for calibrating real time clock are provided. A representative receiver includes a GPS device comprising a real time clock (RTC) circuitry that generates RTC clock signals and a temperature compensated crystal oscillator (TCXO) that generates TCXO clock signals. A ratio counter circuitry receives both the RTC clock signals and the TCXO clock signals and determines a frequency ratio by comparing the RTC clock signals and the TCXO clock signals. A computing device receives the frequency ratio and estimates a current RTC frequency based on the received frequency ratio. The computing device is configured to calibrate an estimated RTC time being maintained at the RTC circuitry based on an estimated RTC frequency from a prior estimation, the current RTC frequency and an elapsed time of the RTC circuitry. | 11-25-2010 |
20100327982 | INVERTING DIFFERENCE OSCILLATOR - The described embodiments provide a configurable pulse generator circuit. More specifically, the described embodiments include a pulse generator circuit; an inverting difference oscillator (IDO) enabling circuit coupled to the pulse generator circuit; and a disable signal coupled to the IDO enabling circuit. When the disable signal is asserted, the IDO enabling circuit is disabled and the pulse generator circuit is configured as a pulse generator. In contrast, when the disable signal is deasserted, the IDO enabling circuit is enabled and the pulse generator circuit is configured as part of an IDO. | 12-30-2010 |
20110304402 | DEVICE AND METHOD FOR LOCKING AND CALIBRATING FREQUENCY - A device and a method for locking and calibrating a frequency is provided for receiving a precise external clock frequency to lock an adjustable oscillator that controls an oscillation frequency to a predetermined frequency. The device comprises a process unit and a frequency adjusting unit. The process unit is provided for comparing the oscillation frequency with a precise frequency to generate a frequency difference and a calibration signal according to the frequency difference. The frequency adjusting unit generates a locking voltage according to the comparison result of the calibration signal and the internal oscillation frequency for locking the oscillation frequency of the external adjustable oscillator to the predetermined frequency, so that the adjustable oscillator still can output a precise oscillation frequency without requiring a precise oscillator. | 12-15-2011 |
20120126902 | HIGH-PRECISION AND LOW-CONSUMPTION QUARTZ OSCILLATOR - A precise, low-consumption low-frequency oscillator includes a low-consumption low-frequency oscillator, operating at a frequency F | 05-24-2012 |
20120293270 | METHOD AND SYSTEM FOR TESTING OSCILLATOR CIRCUIT - An oscillator circuit generates a voltage signal. The magnitude of the voltage signal is measured and compared with predetermined upper and lower voltage signals by an internal test circuit. If the magnitude of the voltage signal is between the predetermined upper and lower voltage signals, then a pass test status signal is generated. If the magnitude of the voltage signal is not between the predetermined upper and lower voltage signals then a fail test status signal is generated. | 11-22-2012 |
20130076451 | Method for Trimming an Adjustable Oscillator to Match a CAN-Bus and a CAN-Bus Communication Controller - A method for trimming a cycle time of an adjustable oscillator to match a Controller Area Network-bus (CAN-bus) operating with a predetermined bit time includes determining a measured number of cycles of an adjustable oscillator between a first signal and a second signal within a CAN frame transmitted on a CAN-bus; determining an information about a present cycle time of the adjustable oscillator using the measured number of cycles and a nominal number of cycles per bit time; and trimming a cycle time of an adjustable oscillator to match the CAN-bus operating with a predetermined bit time based on the determined information. | 03-28-2013 |
20130082784 | OSCILLATOR CALIBRATION APPARATUS AND OSCILLATOR CALIBRATION METHOD - An oscillator calibration apparatus includes a counter, a comparator and an adjusting unit. The counter is utilized for receiving a first clock signal and a second clock signal, and utilizing the first clock signal to sample the second clock signal to generate at least one counting value, where the first clock signal is generated from a first oscillator, and the second clock signal is generated from a second oscillator different from the first oscillator; the comparator is coupled to the counter, and is utilized for comparing the counting value with a predetermined value to generate at least one calibration signal; and the adjusting unit is coupled to the comparator, and is utilized for adjusting a frequency of the second oscillator according to the calibration signal. | 04-04-2013 |
20130106523 | OSCILLATOR | 05-02-2013 |
20130147562 | MEASURING BIAS TEMPERATURE INSTABILITY INDUCED RING OSCILLATOR FREQUENCY DEGRADATION - A method establishes an initial voltage in a ring oscillator and a logic circuit of an integrated circuit device. Following this, the method enables the operating state of the ring oscillator. After enabling the operating state of the ring oscillator, the method steps up to a stressing voltage in the ring oscillator. The initial voltage is approximately one-half the stressing voltage. The stressing voltage creates operating-level stress within the ring oscillator. The method measures the operating-level frequency within the ring oscillator using an oscilloscope (after stepping up to the stressing voltage). | 06-13-2013 |
20130147563 | INTEGRATED CIRCUIT DEVICE AND METHOD FOR GENERATING A TUNING SIGNAL FOR CALIBRATING A VOLTAGE CONTROLLED OSCILLATOR - An integrated circuit device comprises tuning signal circuitry for generating a tuning signal for calibrating a voltage controlled oscillator (VCO). The tuning signal circuitry is arranged to receive a target voltage signal that is representative of a target voltage across at least one passive element within a resonant tank circuit of a VCO that is being calibrated, generate a VCO simulation signal representative of an average voltage difference across at least one active component of the VCO that is being calibrated, and output a tuning signal based at least partly on the received target voltage signal and the generated VCO simulation signal. | 06-13-2013 |
20130187720 | TEMPERATURE COMPENSATION TYPE OSCILLATOR - An oscillator includes a first crystal resonator, a second crystal resonator, a first amplifier circuit for oscillation, a second amplifier circuit for oscillation, a mixer circuit, a frequency selection circuit, and a first frequency conversion circuit. Assuming that resonance frequencies of the first and the second crystal resonators at a reference temperature are respectively F | 07-25-2013 |
20130222068 | OSCILLATION CIRCUIT, INTEGRATED CIRCUIT, AND ABNORMALITY DETECTION METHOD - There is provided an oscillation circuit including: a main oscillation circuit that outputs a specific main clock to an internal circuit; a sub oscillation circuit that outputs a sub clock having a different frequency to the frequency of the main oscillation circuit; a first abnormality detection section that detects an abnormality according to a number of main clock cycles output from the main oscillation circuit within a predetermined period corresponding to sub clock outputs from the sub oscillation circuit; and a second abnormality detection section that detects an abnormality according to a frequency divided clock of the main clock output from the main oscillation circuit that has been frequency-divided and the sub clock output from the sub oscillation circuit. | 08-29-2013 |
20130307632 | Time Base Management System - A time base management system facilitates early analysis, detection, and status messages (e.g., early warnings) concerning the operation of time bases in a device. In addition, the time base management system may adapt the time bases in the device according to the anticipated, selected, or actual operating conditions of the device. As one example, if the time base management system knows that a cell phone will switch to a high data rate (e.g., 4G or LTE) operation mode, the time base management system may configure a time base in the cell phone to operate with increased precision or accuracy, or otherwise meet any applicable time base operational profile for high data rate operation. | 11-21-2013 |
20140028403 | METHODS FOR ADDRESSING AGING OF XO CRYSTALS - Methods, apparatuses, systems and computer-readable media for addressing the aging of oscillation (XO) crystals are presented. Some embodiments may determine a change of age of the XO crystal since last prior use of the XO crystal. Embodiments may then determine that at least one calibration parameter is not suitable for use in at least one calibration technique of the XO crystal, based on the change of age of the XO crystal. Embodiments may then determine at least one fresh calibration parameter configured to update the at least one calibration parameter for suitable use in the at least one calibration technique of the XO crystal. | 01-30-2014 |
20140049327 | LOW-POWER OSCILLATOR - An integrated oscillator circuit comprises an oscillator configured to be switched between a first frequency and a second frequency. A switching circuit receives an input representing a target frequency and switches the oscillator between the first and second frequencies at intervals determined by the input, so as to cause the average output frequency of the oscillator to approximate the target frequency. | 02-20-2014 |
20140125419 | METHOD AND SYSTEM FOR TESTING OSCILLATOR CIRCUIT - An oscillator circuit generates a voltage signal. The magnitude of the voltage signal is measured and compared with predetermined upper and lower voltage signals by an internal test circuit. If the magnitude of the voltage signal is between the predetermined upper and lower voltage signals, then a pass test status signal is generated. If the magnitude of the voltage signal is not between the predetermined upper and lower voltage signals then a fail test status signal is generated. | 05-08-2014 |
20140167866 | Method and System to Improve Power Utilization Using a Calibrated Crystal Warm-Up Detection - A calibrated crystal warm-up method that can include determining the number of clock cycles of a crystal clock reference signal from a crystal oscillator occur during a single clock cycle of a low-power oscillator. Further, the determination can occur when the crystal oscillator is warmed up. The method can also include comparing a number of clock cycles of the crystal clock reference signal with a previously determined number of clock cycles of the crystal clock reference signal to indicate whether the crystal oscillator is warmed up. Further, the method can include counting the number of clock cycles of a low-power clock reference signal have occurred up until the time it has been determined that the crystal oscillator has been warmed up. | 06-19-2014 |
20140176246 | RESONATOR - A resonator has a main resonator body and a secondary resonator structure. The resonator body has a desired mode of vibration of the resonator alone, and a parasitic mode of vibration, wherein the parasitic mode comprises vibration of the resonator body and the secondary resonator structure as a composite body. In this way, unwanted vibrational modes are quenched by the second suspended body. | 06-26-2014 |
20140232475 | Single insertion trimming of highly accurate reference oscillators - A highly integrated monolithic self-compensated oscillator (SCO) with high frequency stability versus temperature variations is described, together with a cost effective single insertion point trimming (SPT) algorithm. The SPT is utilized to adjust the phase and frequency of the SCO to meet frequency stability versus temperature and frequency accuracy requirements for a reference clock. The techniques used in the SPT algorithm provide a robust, fast and low testing cost for the SCO. Moreover, the concepts and techniques utilized in the SCO SPT can be used effectively for any temperature compensated oscillator (TCO) including TCXO, MEMS, FBAR and RC oscillators. Additionally, the described SPT algorithm is capable of measuring the temperature sensitivity of any oscillator, estimating suitable temperature compensation parameters and adjusting the oscillator frequency to the required value simultaneously. | 08-21-2014 |
20140306771 | Method for Providing A Stabilized Oscillator Signal - A method for stabilizing the output frequency of an oscillator comprises providing a temperature model to capture the temperature characteristics of a second oscillator when measured by a first oscillator, measuring a value indicative of the frequency of the second oscillator by using the first oscillator, determine a temperature of the second oscillator based on the measured value indicative of the frequency of the second oscillator and the temperature model, determining a compensation amount for the frequency of the first oscillator from the determined temperature, and providing a compensated output frequency of the first oscillator as a stabilized output. | 10-16-2014 |
20140361842 | DUAL-MODE CRYSTAL OSCILLATOR - A dual-mode crystal oscillator includes a single AT-cut quartz crystal piece, a package, and an integrated circuit. The integrated circuit includes an oscillation circuit configured to cause the AT-cut quartz crystal piece to oscillate at a frequency in the MHz band, a dividing circuit configured to divide the frequency in the MHz band to generate a frequency of 32.768 kHz, a selection circuit configured to select one of a pause state where the frequency in the MHz band is not output and an active state where the frequency in the MHz band is output. The mounting surface includes three electrodes arranged in a direction along the long side and two electrodes arranged in a direction along the short side. The electrode to output the frequency of 32.768 kHz and the electrode to output the frequency in the MHz band are arranged not adjacent to one another. | 12-11-2014 |
20150035610 | Circuit, Device and Method in a Circuit - A method in a circuit comprises providing a first clock by a resistor-capacitor (RC) oscillator; demodulating a plurality of input signals to form a plurality of demodulated input signals; discriminating frequency ranges of the plurality of demodulated input signals according to the first clock; determining whether a first predetermined number of consecutive demodulated input signals among the plurality of demodulated input signals fall into a first predetermined frequency range; triggering a crystal oscillator to provide a second clock to calibrate the first clock if the first predetermined number of consecutive input signals fall into the first predetermined frequency range. | 02-05-2015 |
20150102861 | SHORT CURRENT-FREE EFFECTIVE CAPACITANCE TEST CIRCUIT AND METHOD - A method of determining an effective capacitance of a ring oscillator free of short current. The method comprises determining a frequency of an oscillator signal communicated from a ring oscillator to an inverter via a first communication path. The first communication path has connectivity to a first voltage source, a ground path and the inverter. The first communication path is divided into a second communication path and a third communication path. The method further comprises determining a voltage line current. The method additionally comprises determining an effective capacitance of the ring oscillator based on a first voltage of the first voltage source, the voltage line current and the frequency of the oscillator signal communicated to the inverter along the third communication path. | 04-16-2015 |
20150365049 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD OF ELECTRONIC DEVICE USING THE SAME - A semiconductor integrated circuit device having a function to perform oscillation in combination with a crystal oscillator, includes: a first impedance element including a first external terminal coupled to one terminal of the crystal oscillator, a second external terminal coupled to the other terminal of the crystal oscillator, and first and second terminals coupled to the first and second external terminals when the oscillation is performed; a first variable capacitance circuit coupled to the first terminal of the feedback impedance element, and a configuration circuit for setting a capacitance value of the first variable capacitance circuit. A measurement signal is supplied to the second terminal of the feedback impedance element, and in response to this, the capacitance value of the first variable capacitance circuit is set by the configuration circuit based on the delay time of an observation signal generated at the first terminal with respect to the measurement signal. | 12-17-2015 |
20150381185 | CIRCUIT ARRANGEMENT AND METHOD FOR CALIBRATING ACTIVATION SIGNALS FOR VOLTAGE-CONTROLLED OSCILLATORS - In order to develop a circuit arrangement ( | 12-31-2015 |
20160003877 | CRYSTAL UNIT AND METHOD OF MEASURING CHARACTERISTICS OF THE CRYSTAL UNIT - A crystal unit includes: a crystal piece; an excitation electrode configured to excite the crystal piece; a case configured to accommodate the crystal piece; an external electrode formed in the case and configured to be electrically connected to the excitation electrode; and an antenna formed in the case and configured to be electrically connected to the external electrode. | 01-07-2016 |
20160061895 | ADDRESSABLE RING OSCILLATOR TEST CHIP - An addressable ring oscillator test chip includes: a plurality of ring oscillator test units, and a peripheral structure including peripheral circuits and PADs. The peripheral circuits share a first power source and a first grounding. Each test unit is associated with an independent power source to thereby decrease voltage drop resulting from wiring and to reduce the influence from other test units. A method of generating a variety of ring oscillators includes: generating a cell template corresponding to a basic unit, including defining a parameterized cell template; generating a ring oscillator based on the cell template, including generating ring oscillators of different stages by selecting different parameters of the cell template; realizing internal connections of the ring oscillator; and generating an instantiated ring oscillator by replacing cell templates with corresponding basic units. | 03-03-2016 |
20160112052 | Low Power Automatic Calibration Method for High Frequency Oscillators - A clock calibrator for use in an electronic system comprising an integrated circuit such as a microcontroller. The clock calibrator embodies a frequency adjustment facility adapted dynamically to adjust the frequency of one or more high-frequency clock generators as a function of a lower-frequency reference clock. | 04-21-2016 |
20160156360 | SIGINAL GENERATOR AND CALIBRATING METHOD THEREOF | 06-02-2016 |
20160191063 | OSCILLATION MODULE AND SIGNALS CALIBRATING METHOD OF THE SAME - An oscillation module includes a frequency generator, a signal calibrator, a multiplexer, and a controller. The oscillation module is calibrated by using calibration parameters and a control instruction of which the frequency and phase are the same as the oscillation frequency signal generated by the frequency generator. As a consequence, an electronic pin used for processing asynchronous signals can be saved so as to reduce the chip area of the oscillation module. | 06-30-2016 |
20170237398 | PHASE-SELECTIVE ENTRAINMENT OF NONLINEAR OSCILLATOR ENSEMBLES | 08-17-2017 |