Class / Patent application number | Description | Number of patent applications / Date published |
330299000 | Including combined diverse-type semiconductor device | 9 |
20120154055 | POWER AMPLIFIER - A power amplifier includes a first amplifier unit, a second amplifier unit, and an attenuator. The second amplifier receives a signal from the first amplifier unit and amplifies the signal. The attenuator is provided between the first and second amplifier units. The attenuator has arms, including at least one parallel arm and at least one series arm, and has switches connected to the arms to switch the electrical connection states of the arms with respect to the first and second amplifier units. The at least one parallel arm and the at least one series arm are alternately arranged, in the order named, as viewed in the direction from the first amplifier unit to the second amplifier unit. | 06-21-2012 |
20120188021 | Low 1/f noise high-frequency broadband amplifier (DC-12 GHz) - A N-Channel HJ-FET cascode amplifier, with a High Frequency NPN Transistor differential error amplifier, having low 1/f noise, a DC to 12 GHz bandwidth, flat frequency response, excellent transient response, high linearity, and low input and output VSWR over a wide frequency range. | 07-26-2012 |
20130214868 | SENSE AMPLIFIER - A sense amplifier circuit includes a first transistor and a second transistor of a first type, a first transistor and a second transistor of a second type, a first resistive device, and a second resistive device. A first end of the first resistive device is coupled to a first data line. A second end of the first resistive device is coupled to a drain of the first transistor of the second type and a gate of the second transistor of the first type. A first end of the second resistive device is coupled to a second data line. A second end of the second resistive device is coupled to a drain of the second transistor of the second type and a gate of the first transistor of the first type. | 08-22-2013 |
20140049326 | COUPLED INDUCTOR AND CALIBRATED COMPLEMENTARY LOW NOISE AMPLIFIERS - A low noise amplifier (LNA) includes a bank of selectable first transistors and a bank of selectable second transistors complementary to the first transistors. The LNA also includes a plurality of switches to select one or more of the first transistors and to select one or more of the second transistors, the selected first transistors positioned in series with respect to the selected second transistors. The LNA also includes switching logic to control the plurality of switches, to simultaneously vary selection of the first transistors and the second transistors during calibration to substantially match output second-order distortion of the selected first transistors with that of the selected second transistors, to create high second-order intercept points. | 02-20-2014 |
330300000 | Bipolar or unipolar (FET) | 5 |
20090108942 | Low noise, low power and high bandwidth capacitive feedback trans-impedance amplifier with differential fet input and bipolar emitter follower feedback - A differential amplifier topology includes circuitry to create a higher bandwidth output using less current than an existing Capacitive Trans-Impedance Amplifier (CTIA) using an all Field Effect Transistor (FET) circuit design. A bipolar npn emitter follower in the circuit topology provides low output impedance and some degree of output inductive peaking, and the CTIA differential output is buffered by the bipolar npn emitter follower in the CTIA feedback loop such as the open-loop high voltage gain is maintained without being affected by output loads. | 04-30-2009 |
20130120070 | DUAL STAGE ACTIVE PIXEL DEVICES AND RELATED METHODS - Embodiments of dual stage active pixel devices are described herein. Other examples, implementations, and related methods are also disclosed herein. | 05-16-2013 |
20140159820 | SENSE AMPLIFIER - A sense amplifier circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first resistive device, and a second resistive device. The first resistive device is coupled to a first data line and to a drain of the third transistor. The second resistive device is coupled to a second data line and to a drain of the fourth transistor. A terminal of the fifth transistor is coupled to the gate of the first transistor. A terminal of the sixth transistor is coupled to the gate of the second transistor. | 06-12-2014 |
20140184340 | INTEGRATED CIRCUIT FOR USE IN A HYBRID OUTPUT STAGE - This invention generally relates to the technical field of integrated circuits. More specifically the invention relates to output stages for providing an output signal, into which an integrated circuit may be used. An aspect relates to an integrated circuit capable of driving an external class-B output stage in a manner that allows providing a continuous output signal over the full range of desired outputs. The integrated circuit may comprise a class-AB output stage working in conjunction with the class-B output stage so as to provide a hybrid output stage. The integrated circuit may prevent dead band problems commonly faced when employing a class-B output stage. The integrated circuit may also reduce the quiescent current of the hybrid output stage. This may have further advantages, such as for example, the output stage producing less heat/power than needs to be dissipated. | 07-03-2014 |
20160380602 | POWER AMPLIFIER MODULES INCLUDING RELATED SYSTEMS, DEVICES, AND METHODS - One aspect of this disclosure is a power amplifier module that includes a power amplifier configured to amplify a radio frequency (RF) signal and tantalum nitride terminated through wafer via. The power amplifier includes a heterojunction bipolar transistor and a p-type field effect transistor, in which a semiconductor portion of the p-type field effect transistor corresponds to a channel includes the same type of semiconductor material as a collector layer of the heterojunction bipolar transistor. A metal layer in the tantalum nitride terminated through wafer via is included in an electrical connection between the power amplifier on a front side of a substrate and a conductive layer on a back side of the substrate. Other embodiments of the module are provided along with related methods and components thereof. | 12-29-2016 |