| Class / Patent application number | Description | Number of patent applications / Date published |
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| 330259000 | Having D.C. feedback bias control for stabilization | 20 |
| 20080197927 | Constant bandwidth DC offset correction in an amplifier - According to one embodiment, a system for constant bandwidth DC offset correction in an amplifier includes a number of amplifier stages having an input and an output coupled together in series. The system for constant bandwidth DC offset correction further includes a number of DC offset correction feedback loops which include a variable gain transconductor coupled to an integration capacitor further coupled to a fixed gain transconductor. Each of the DC offset correction feedback loops are coupled to the input and output of each of the number of amplifier stages. The transconductance of the variable gain transconductor in each of the number of DC correction feedback loops is varied in relation to a gain of the number of amplifier stages, such that the DC offset correction feedback loops provide DC offset correction while maintaining a constant bandwidth. | 08-21-2008 |
| 20080218267 | Amplifier with level shifting feedback network - An amplifier circuit includes a low noise first stage and a wide dynamic range second stage. A feedback network coupled between the output of the second stage and the input of the first stage provides DC level shifting of the common mode input voltage. The common mode input voltage is shifted to a value that allows the output of the first stage to be compatible with the input of the second stage. | 09-11-2008 |
| 20080238547 | OFFSET CANCELING CIRCUIT AND OFFSET CANCELING METHOD - An offset canceling circuit includes a differential amplifier circuit configured to output a first output signal in response to a differential input signal; a latch circuit configured to hold a second output signal determined based on the first output signal; and an offset control circuit configured to supply a reference voltage to the differential amplifier circuit to adjust an offset of the differential amplifier circuit. The second output signal is a binary signal, and the latch circuit changes a signal level of the second output signal based on the first output signal. The offset control circuit acquires the second output signal from the latch circuit for every predetermined time and updates a voltage value of the reference voltage based on the signal levels of two of the second output signals which are acquired continuously in time series. | 10-02-2008 |
| 20090033421 | DIFFERENTIAL INPUT DRIVER USING CURRENT FEEDBACK AND CROSS-COUPLED COMMON BASE DEVICES - A differential input driver circuit ( | 02-05-2009 |
| 20090058527 | Common Mode Stabilization In A Fully Differential Amplifier - A fully differential amplifier circuit provided according to an aspect of the present invention contains a stabilization block to measure the common mode component at the output of an input stage, and to inject a current proportionate to the common mode component into each of a pair of paths forming the output of the input stage to stabilize a feedback loop formed by the input stage, an output stage and a common mode feedback block. In an embodiment, the stabilization block contains a buffer to receive the measured common mode component and to provide a buffered output. The injected current is generated based on the buffered output. Due to the presence of the buffer, the differential loop may not be affected by injection of the additional current, thereby avoiding any distortions in the output signal. | 03-05-2009 |
| 20090079502 | Differential circuit providing a function to cancel input offset voltage - A new offset canceling circuit for a differential circuit is disclosed whose input offset voltage may be cancelled independent of the variation of the input level, accordingly, enables the cut-off frequency of the canceling circuit unchanged. The offset canceller of the invention provides a buffer amplifier and a filter. The filter includes a capacitance multiplier including an operational amplifier (Op-Amp) operating in the inverting mode and a capacitor connected between the input and output of the Op-Amp. The Op-Amp operating in the inverting mode whose closed loop gain is solely determined by resistors, and the capacitance of the capacitor is multiplied by the closed loop gain of the Op-Amp by the Miller effect. | 03-26-2009 |
| 20090153247 | HIGH-SPEED, MULTI-STAGE CLASS AB AMPLIFIERS - A multi-stage Class AB amplifier system comprises a first Class AB amplifier circuit that receives an input signal. A bias circuit receives an output of the first Class AB amplifier circuit. A second Class AB amplifier circuit having an input that communicates with an output of the bias circuit and that generates an output signal. A common-mode feedback circuit generates a feedback signal to the first Class AB amplifier circuit based on the output signal. | 06-18-2009 |
| 20100045381 | LIMITING AMPLIFIERS - A limiting amplifier with an input stage with dc offset cancellation, identical gain stages, an output buffer and a feedback filter. The input stage receives a differential input signal and outputs a first intermediate differential signal. The gain stages are cascaded to amplify the first intermediate differential signal and generate a second intermediate differential signal, amplified by the output buffer to produce an output signal. The feedback filter provides a dc offset voltage of the output signal to the input stage for the dc offset cancellation. The input stage comprises a resistor network coupled between a pair of input nodes and a power line and comprising a common resistor, a pair of load resistors and a shunt resistor. The load resistors share a common terminal connected to the common resistor that is connected to the power line. The shunt resistor has two terminals respectively connected to the load resistors. | 02-25-2010 |
| 20100052787 | LIMITING AMPLIFIERS - A limiting amplifier with an input stage with dc offset cancellation, identical gain stages, an output buffer and a feedback filter. The input stage receives a differential input signal and outputs a first intermediate differential signal. The gain stages are cascaded to amplify the first intermediate differential signal and generate a second intermediate differential signal, amplified by the output buffer to produce an output signal. The feedback filter provides a dc offset voltage of the output signal to the input stage for the dc offset cancellation. The input stage comprises a resistor network coupled between a pair of input nodes and a power line and comprising a common resistor, a pair of load resistors and a shunt resistor. The load resistors share a common terminal connected to the common resistor that is connected to the power line. The shunt resistor has two terminals respectively connected to the load resistors. | 03-04-2010 |
| 20110133838 | LOW OUTPUT IMPEDANCE RF AMPLIFIER - A radio frequency (RF) power amplifier includes a low impedance pre-driver driving the input of a common-source output amplifier stage. The preamplifier includes a first transistor that has a first terminal coupled to a preamplifier RF input node, a second terminal coupled to a preamplifier RF output node, and a third terminal coupled to a supply voltage node. A first inductor is coupled between the RF output node and a bias voltage node. A voltage difference between respective first and second voltages on the RF input node and the RF output node that are substantially in phase, determines current through the first transistor. | 06-09-2011 |
| 20110273233 | MAINTAINING LOOP LINEARITY IN PRESENCE OF THRESHOLD ADJUSTMENT - In one embodiment, a method includes receiving, at a filter comprising a Miller amplifier, a differential data signal output by a limiting amplifier (LA), the data signal comprising an output direct current (DC) offset resulting at least in part from a threshold-adjustment signal applied to the LA or an intrinsic DC offset caused by physical characteristics of the LA. In one embodiment, the method additionally includes generating a compensation signal based on the threshold-adjustment signal, a polarity of the compensation signal being opposite a polarity of the threshold-adjustment signal or the DC offset, a magnitude of the compensation signal being a function of the magnitude of the threshold-adjustment signal. In one embodiment, the method further includes introducing the compensation signal to an internal node of the Miller amplifier to compensate for the DC offset to keep one or more amplifier stages of the Miller amplifier in their linear operating regions. | 11-10-2011 |
| 20120126896 | OFFSET CANCELLATION FOR CONTINUOUS-TIME CIRCUITS - One embodiment relates to a continuous-time circuit configured with an offset cancellation loop. The continuous-time circuit includes a multi-stage amplifier chain, including a first amplifier stage and a last amplifier stage, and an offset cancellation loop. The offset cancellation loop is configured to receive an output of the last amplifier stage and to provide an offset correction voltage signal to the first amplifier stage. The offset compensation loop may create one dominant pole and a single consequential parasitic pole so as to have greater stability and may advantageously achieve a second-order roll-off in response magnitude at higher frequencies. Other embodiments, aspects, and features are also disclosed. | 05-24-2012 |
| 20120126897 | INPUT COMMON MODE CIRCUIT - A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level. | 05-24-2012 |
| 20130257536 | OFFSET REDUCTION FOR ANALOG FRONT-ENDS - A circuit includes a first amplifier configured to amplify an input signal to generate an output signal. An offset sensor is configured to sense DC offset based on the output signal, where the offset sensor includes a second amplifier configured to generate an offset reduction signal for the first amplifier based on the sensed DC offset. A T-network in the circuit includes at least three resistors coupled to provide a feedback connection between the input signal and the output signal for the first amplifier and to receive the offset reduction signal to mitigate DC offset in the first amplifier. Since this method reduces the low-frequency component of the signal, it also shapes and reduces the flicker noise. | 10-03-2013 |
| 20130271217 | DIFFERENTIAL AMPLIFIER STAGE WITH INTEGRATED OFFSET CANCELLATION CIRCUIT - A differential amplifier stage and method for offset cancellation include an amplifier having an input and an output. An internal offset cancellation circuit has an input for receiving a control signal to control offset cancellation in the amplifier. The offset cancellation circuit is integrated with the amplifier but isolated from the input and the output of the amplifier, and, in accordance with its isolation, an impedance of the stage is unaffected by the offset cancellation circuit. | 10-17-2013 |
| 20130278338 | TRANS-IMPEDANCE AMPLIFIER FOR HIGH SPEED OPTICAL-ELECTRICAL INTERFACES - The differential trans-impedance amplifier uses trans-resistance(s) connected between the input nodes of a first differential amplifier, to implement a trans-impedance differential amplifier in a differential fashion and has two identical resistances, each connected between the photodiode and a respective DC voltage rail of a common bias network of the photodiode adapted to reverse bias the photodiode. The biasing resistances may be much larger than the trans-resistance(s) to prevent drawing any significant signal current from the photodiode. The amplifier may retain the advantages of a classical differential topology while effectively overcoming drawbacks that arise in high data rate applications. | 10-24-2013 |
| 20150022268 | DC OFFSET CANCELLATION CIRCUIT - A DC offset cancellation circuit is provided. The DC offset cancellation circuit includes a first operational amplifier and a feedback gain circuit. The first operational amplifier includes a first input transconductance stage, a second input transconductance stage and an output stage. An input terminal of the first input transconductance stage receives an input signal of the first operational amplifier through a first input terminal of the first operational amplifier. An output terminal of the output stage outputs an output signal of the first operational amplifier through an output terminal of the first operational amplifier. An input terminal of the feedback gain circuit is coupled to the output terminal of the first operational amplifier, and an output terminal of the feedback gain circuit is coupled to the input terminal of the second transconductance stage through a second input terminal of the first operational amplifier. | 01-22-2015 |
| 20160072447 | APPARATUS AND METHOD FOR DYNAMICALLY BIASED BASEBAND CURRENT AMPLIFIER - A dynamically biased baseband current amplifier is provided. The dynamically biased baseband current amplifier includes an input interface; a controller; a variable resistor network; an amplifier stage; a hybrid differential envelope detector and full-wave rectifier; a transconductor; a first variable transistor; a second variable transistor; a third variable transistor; and a fourth variable transistor. | 03-10-2016 |
| 20160072459 | DIFFERENTIAL TO SINGLE-ENDED SIGNAL CONVERSION - A circuit may include a signal converter configured to convert a differential signal to a single-ended signal. The circuit may also include a biasing circuit configured to set a bias of the signal converter based on a feedback of the single-ended signal such that a voltage level of the single-ended signal is at a target voltage level. | 03-10-2016 |
| 20160164467 | AMPLIFYING DEVICE AND OFFSET VOLTAGE CORRECTION METHOD - A state wherein offset voltage is reduced can be maintained regardless of environmental fluctuation. A differential amplification unit has differential pair transistors, and amplifies a difference between input voltages. An offset voltage measurement unit samples offset voltage generated due to an imbalance in the current drive capacities of the differential pair transistors in a first mode, and determines the polarity of the sampled offset voltage in a second mode. A control unit switches the operating mode between the first mode and second mode, and outputs a control signal for correcting the offset voltage in accordance with the polarity determination result when in the second mode. An offset voltage correction unit corrects the offset voltage based on the control signal. | 06-09-2016 |
