| Entries |
| Document | Title | Date |
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| 20080238546 | FULLY DIFFERENTIAL CLASS AB AMPLIFIER AND AMPLIFYING METHOD USING SINGLE-ENDED, TWO-STAGE AMPLIFIER - A fully differential amplifier includes a first single-ended current mirror type fully differential amplifier outputting a first output signal by two stage amplifying a difference between a first input signal and a second input signal and a second single-ended current mirror type fully differential amplifier outputting a second output signal by two stage amplifying a difference between the first input signal and the second input signal. A first tail of the first single-ended current mirror type fully differential amplifier and a second tail of the second single-ended current mirror type fully differential amplifier are connected to each other and the first output signal and the second output signal are differential signals. | 10-02-2008 |
| 20080272845 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) - Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA. | 11-06-2008 |
| 20080297252 | DIFFERENTIAL SIGNAL GENERATOR CIRCUIT - A differential signal generator circuit includes: a first amplifier for comparing an input signal with a threshold voltage and outputting differential signals; and a second amplifier for adjusting the threshold voltage in response to the differential signals. The second amplifier includes: a first transistor and a second transistor forming a differential pair, the gate of each transistor receiving a respective one of the differential signals; a third transistor and a fourth transistor forming a current mirror, the third transistor being connected between the drain of the first transistor and a reference potential point, the fourth transistor being connected between the drain of the second transistor and the reference potential point; a current source connected to the sources of the first and second transistors; and an adjusting section for adjusting drain current of the first transistor in response to an externally applied current or voltage. The threshold voltage is adjusted in response to drain voltage of the second transistor. | 12-04-2008 |
| 20090058525 | Common-mode bandwidth reduction circuit and method for differential applications - An amplifier driver circuit ( | 03-05-2009 |
| 20090091389 | LVDS RECEIVER CIRCUIT - The LVDS receiver circuit comprises a differential-input transistor pair, a control transistor pair, a current-mirror-load circuit, a first feedback inverter and a second feedback inverter. The first feedback inverter, the second feedback inverter and the control transistor pair constitute a feedback loop. The voltage change of the input voltage of the first feedback inverter is suppressed, and the input voltage is controlled around the threshold voltage of the first feedback inverter. | 04-09-2009 |
| 20090096523 | Differential amplification circuit - A differential amplification circuit is constituted of a differential transistor pair including a pair of n-channel MOS transistors whose sources are connected together, a constant current source circuit which is connected to the sources of the differential transistor pair, a current-mirror load circuit including a pair of p-channel MOS transistors whose gates are connected together, and a bias generation circuit which generates a gate bias voltage and a drain bias voltage applied to the current-mirror load circuit in such a way that the same potential is set to both the drains of the p-channel MOS transistors. Thus, it is possible to reduce the input offset voltage without reducing the margin of operation voltage and without increasing the overall chip size. | 04-16-2009 |
| 20090102560 | SLEW-ENHANCED INPUT STAGES AND AMPLIFIERS - Provided herein are input stages, and operation amplifiers including input stages. In an embodiment, an input stage includes a complimentary differential input transconductor, first and second npn-pnp current mirrors, and first and second pnp-npn current mirrors. The complimentary differential input transconductor includes a pair of differential inputs that accept a pair of voltage signals, a first pair of complimentary differential outputs that output current signals I | 04-23-2009 |
| 20090167437 | COMMON MODE FEEDBACK CIRCUIT SUPPORTING DUAL DATA RATE, PROGRAMMABLE GAIN AMPLIFIER HAVING THE SAME, AND IMAGE SENSOR HAVING THE PROGRAMMABLE GAIN AMPLIFIER - A common mode feedback circuit includes a first capacitor connected between a common mode feedback terminal and a first output terminal, a second capacitor connected between the common mode feedback terminal and a second output terminal, a first cell having a third capacitor sharing charges with the first capacitor and a fourth capacitor sharing charges with the second capacitor in response to a first clock control signal, and a second cell having a fifth capacitor sharing charges with the first capacitor and a sixth capacitor sharing charges with the second capacitor in response to a second clock control signal. The first clock control signal and the second clock control signal have respective logic states that do not overlap in time. | 07-02-2009 |
| 20090201086 | Current sense amplifier with extended common mode voltage range - A circuit includes an input stage configured to receive and amplify an input signal to produce an amplified signal, where the input signal is referenced to a higher voltage and is associated with a common mode voltage. The circuit also includes level shifter resistors configured to level shift the amplified signal to produce a shifted signal. The level shifter resistors are configured to provide a voltage drop so that the shifted signal is referenced to a lower voltage. The input stage may include multiple transistors floating in one or more isolated portions of a substrate, where the transistors perform amplification in the input stage. The circuit may also include circuitry configured to control current through the level shifter resistors so that the voltage drop depends on the common mode voltage of the input signal. In addition, the lower voltage may be between supply rails of the circuit. | 08-13-2009 |
| 20090201087 | DIFFERENTIAL INPUT AMPLIFIER - An amplifier comprises: first and second supply terminals intended to receive a DC supply voltage; a first branch coupled between the first and second supply terminals and including a first terminal of application of a differential signal to be amplified; a second branch coupled between the first and second supply terminals and including a second terminal of application of the differential signal to be amplified; a third branch coupled between the first and second supply terminals and including a first amplifier having an input terminal connected to the second branch and having an output terminal configured to be coupled to a load, and a measurement element configured to measure a current in the third branch; and a fourth branch coupled between the first and second supply terminals and including a second amplifier having an input terminal connected to the first branch, and a copying element configured to copy the current measured in the third branch. | 08-13-2009 |
| 20090219095 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER (OTA) - Apparatus and methods provide an operational transconductance amplifier (OTA) with one or more self-biased cascode current mirrors. Applicable topologies include a current-mirror OTA and a folded-cascode OTA. In one embodiment, the self-biasing cascode current mirror is an optional aspect of the folded-cascode OTA. The self-biasing can advantageous reduce the number of biasing circuits used, which can save chip area and cost. One embodiment includes an input differential pair of a current-mirror OTA. | 09-03-2009 |
| 20090261904 | MULTI-INPUT OPERATIONAL AMPLIFIER AND METHOD FOR REDUCING INPUT OFFSET THEREOF - A multi-input operational amplifier comprises two transconductors, two current mirrors, and a current source. Each transconductor generates a current according to a corresponding voltage difference. When the voltage difference is less than or equal to zero, the current is a constant. When the voltage difference exceeds zero, the current is proportional to the voltage difference. | 10-22-2009 |
| 20090278603 | ALL N-TYPE TRANSISTOR HIGH-SIDE CURRENT MIRROR - The present invention relates to an all n-type transistor current mirror for mirroring an input current to an output current. The current mirror comprises an input n-type transistor (T | 11-12-2009 |
| 20090322429 | Variable gain current input amplifier and method - Variable gain circuitry includes a first input transistor (M | 12-31-2009 |
| 20100039179 | Folded cascode operational amplifier having improved phase margin - A folded cascode operational amplifier having an improved phase margin due to pole-zero cancellation by using a plurality of cascode-connected bias circuits and frequency compensation capacitors. | 02-18-2010 |
| 20100045380 | LOW DROP VOLTAGE REGULATOR WITH INSTANT LOAD REGULATION AND METHOD - An LDO regulator ( | 02-25-2010 |
| 20100097141 | Current Mirror With Low Headroom And Linear Response - A current mirror circuit provided in an emitter follower configuration achieves linear output currents over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node. | 04-22-2010 |
| 20100148870 | ADAPTIVE FEEDBACK CASCODE - A current minor for generating a substantially identical current flow in two parallel current paths, each current path comprising a switching device and each switching device comprising first and second active terminals and a control terminal for controlling current flow between the first and second active terminals, the current minor comprising a first switching device arranged such that its first active terminal is arranged to receive a first voltage, its second active terminal is arranged to receive a variable voltage that varies independently of the first voltage and its control terminal is arranged to receive a control voltage, a second switching device connected such that its first active terminal is arranged to receive the first voltage and its control terminal is arranged to receive the control voltage and a voltage control device connected to the second switching device such that an input of the voltage control device is connected to the second active terminal of the second switching device, the voltage control device being arranged to receive a control signal indicative of the variable voltage and to alter the voltage at its input terminal in dependence on the control signal such that the difference between the voltage across the active terminals of the second switching device and the voltage across the active terminals of the first switching device remains substantially constant. | 06-17-2010 |
| 20100164626 | BOOST OPERATIONAL AMPLIFIER - A boost operational amplifier. A boot operational amplifier may include a differential amplifying unit amplifying and/or outputting an inputted differential voltage, a first mirroring unit mirroring a current flowing through a first output terminal of a differential amplifying unit, which may output a mirrored first mirror current, a second mirroring unit mirroring a current flowing through a second output terminal of a differential amplifying unit, which may output a mirrored second mirror current, a pull-up transistor connected between a first power source and an output node, which may switch based on a first and/or a second mirror current, and/or a pull-down transistor connected between a second power source and an output node, which may switch based on a first and/or a second mirror current. | 07-01-2010 |
| 20100176884 | TRANSCONDUCTANCE AMPLIFIER WITH IMPROVED LINEARITY - The invention relates to a transconductance amplifier, intended to supply current variations di when it receives voltage variations dv, with a desired conversion coefficient Gm called transconductance: Gm=di/dv. | 07-15-2010 |
| 20100231301 | AMPLIFIER CIRCUIT - An amplifier circuit, comprising a differential input stage (M | 09-16-2010 |
| 20100253432 | SIGNAL PROCESSOR COMPRISING AN AMPLIFIER - An amplifier (A | 10-07-2010 |
| 20100253433 | LOW PHASE NOISE AMPLIFIER CIRCUIT - The amplifier circuit ( | 10-07-2010 |
| 20100264987 | AMPLIFIER WITH BIAS STABILIZER - An amplifier with bias stabilizer includes first to forth transistors, an amplifier unit and a resistor. The first transistor and the second transistor are connected in series between first and second power supplies and generate a first current. The third transistor is connected in a current mirror configuration to the second transistor and generates a second current corresponding to the first current. The amplifier unit generates an output signal based on an input signal and includes a fourth transistor, the fourth transistor generating a control voltage according to the second current so as to control the first transistor. The resistor is connected in series to at least one of the first to fourth transistors. | 10-21-2010 |
| 20100277239 | CURRENT-MIRRORING SYSTEMS AND METHODS - One embodiment of the invention includes a current-mirror system. The system includes a current-mirror circuit configured to conduct an input current through a first current path that includes a first degeneration resistance device and to generate an output current that flows through a second current path that includes a second degeneration resistance device. The output current can be substantially proportional to the input current. The system also includes a degeneration control circuit configured to maintain a substantially constant degeneration voltage across each of the first and second degeneration resistance devices. | 11-04-2010 |
| 20100295618 | DIFFERENTIAL AMPLIFIER, REFERENCE VOLTAGE GENERATING CIRCUIT, DIFFERENTIAL AMPLIFYING METHOD, AND REFERENCE VOLTAGE GENERATING METHOD - A differential amplifier includes a main differential amplifier circuit that receives a pair of input signals and supplies a pair of output signals based on a difference between the input signals; and a bias control differential amplifier circuit that receives the pair of output signals, controls a control terminal of a current-limiting transistor making up the main differential amplifying circuit based on an offset voltage included in the output signals, and reduces the offset voltage. | 11-25-2010 |
| 20100308913 | OPERATIONAL AMPLIFIER - An operational amplifier includes a first amplifier to which an input signal is applied, and a second amplifier to which an output of the first amplifier is applied, wherein the second amplifier includes a first transistor including a gate to which the output of the first amplifier is applied, and a second transistor including a gate to which the output of the first amplifier is applied, and a drain coupled to a source of the first transistor. | 12-09-2010 |
| 20110102086 | INPUT COMMON MODE CIRCUIT - A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level. | 05-05-2011 |
| 20110121902 | ENHANCING DUAL OP-AMPS FOR DIFFERENTIAL CONNECTIONS - In an embodiment of the invention, a differential input signal is coupled to a plurality of transconductance blocks. In some embodiments, each of the transconductance blocks divide an input transconductance among a plurality of signal paths to a plurality of outputs in each transconductance block. In an embodiment, the input transconductance may be divided based a ratio of transistor areas in the plurality of signal paths, though other embodiments may divide the transconductance differently. In some embodiments, transconductance block outputs of a plurality of transconductance blocks may be cross-coupled to provide a gain path for a differential signal than is greater than that of a common mode signal. | 05-26-2011 |
| 20110148525 | CURRENT MIRROR WITH LOW HEADROOM AND LINEAR RESPONSE - A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node. | 06-23-2011 |
| 20110163809 | PUSH-PULL OUTPUT CIRCUIT - According to one embodiment, a first transistor is connected between a first power supply rail and an output unit. A second transistor is connected between the output unit and a second power supply rail. A gm amplifier includes an input unit and first and second output terminals and amplifies a difference between a signal input to the input unit and a reference voltage. First and second current mirror circuits are connected to be vertically stacked between the first rail and the first terminal as well as a gate of the second transistor. Third and fourth current mirror circuits are connected to be vertically stacked between the second rail and the second terminal as well as a gate of the first transistor. The gate of the first transistor is connected to the first and second circuits. The gate of the second transistor is connected to the third and fourth circuits. | 07-07-2011 |
| 20110181358 | DIFFERENTIAL AMPLIFIER CIRCUIT, OPERATIONAL AMPLIFIER INCLUDING DIFFERENCE AMPLIFIER CIRCUIT, AND VOLTAGE REGULATOR CIRCUIT - A differential amplifier circuit includes a differential input stage comprising first and second transistors whose sources are connected with each other, a constant current source connected between the sources of the first and second transistors and a ground, a current mirror circuit comprising third and fourth transistors whose sources are connected with a power supply source, a fifth transistor of a same conductive type as that of the first transistor, connected at a drain to a drain of the third transistor, connected at a source to a drain of the first transistor and connected at a gate to a reference voltage source; and a sixth transistor of a same conductive type as that of the second transistor, connected at a drain to a drain of the fourth transistor, connected at a source to a drain of the second transistor, and connected at a gate to the reference voltage source. | 07-28-2011 |
| 20110234319 | DIFFERENTIAL AMPLIFIER CIRCUIT - Provided is a differential amplifier circuit with a small circuit size. When a differential voltage (Vinp−Vinn) is higher than a predetermined voltage, a PMOS transistor ( | 09-29-2011 |
| 20110273231 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit receives an input current, and supplies, to a different circuit, an output current that corresponds to the input current. A first terminal of a first variable resistor is connected to an input terminal. A first transistor and a second transistor are sequentially arranged in series between a power supply terminal and a second terminal of the first variable resistor. A third transistor and a fourth transistor are sequentially arranged in series between the power supply terminal and an output terminal. The gates of the first transistor and the third transistor are each connected to the second terminal of the first variable resistor. The gates of the second transistor and the fourth transistor are each connected to the input terminal. The first variable resistor is configured to be capable of switching the resistance value thereof according to the input current. | 11-10-2011 |
| 20110273232 | DIFFERENTIAL AMPLIFIER CIRCUIT - Provided is a differential amplifier circuit in which an offset voltage is independent from input voltages. A first correction current generation circuit and a second correction current generation circuit are provided and configured to cause the same current as a current flowing through a folded cascode amplifying stage to flow into an output stage. Accordingly, transistors included in the folded cascode amplifying stage and transistors included in the output stage have the same bias condition. | 11-10-2011 |
| 20110279182 | Circuit for Power Amplification of an Input Signal and Signal Emission System Incorporating Such a Circuit - A circuit for power amplification of an input signal includes an input stage and an output stage, the said input stage including: a drive means incorporating a so-called main drive transistor, and a first so-called main input transistor able to receive the input signal, and mounted as a current mirror with the main drive transistor. The first main input transistor is coupled to the output stage via a second so-called main input transistor incorporated into the input stage and controlled by the drive means, the first and second main input transistors being coupled together and with the earth according to a structure of Darlington type by way of a resonant circuit. | 11-17-2011 |
| 20110291760 | Folded cascode differential amplifier and semiconductor device - A folded cascode differential amplifier includes a high-voltage input stage and a low-voltage output stage. The input stage is formed from high-voltage MOS transistors, two of which constitute a differential pair. The output stage is formed from low-voltage MOS transistors, some of which constitute a current mirror circuit connected to the differential pair. The output stage also includes at least one transistor that amplifies a voltage produced in the current mirror circuit to generate an output voltage signal. The high-voltage MOS transistors have higher breakdown voltages than the low-voltage MOS transistors. Incorporation of both types of transistors into a single amplifier reduces the necessary number of transistors and the necessary number of bias voltages. | 12-01-2011 |
| 20120025912 | DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit can reduce consumption current and the circuit size while improving a power supply rejection ratio. The differential amplifier circuit includes a power supply line and an input part that includes an input circuit and an active load. The input circuit includes two differential input elements, and the active load includes two transistors connected to the two differential input elements. The input part generates a differential signal in response to an input signal given to the two differential input elements. The differential amplifier circuit also includes an amplifying part for generating an output voltage generating signal by amplifying the differential signal. The differential amplifier circuit also includes an output part for generating an output voltage based on the output voltage generating signal and a power supply voltage. The differential amplifier circuit includes a noise permitting part located between control terminals of the two transistors and the power supply line. | 02-02-2012 |
| 20120044021 | DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit includes: P-type and N-type differential input units outputting respectively first and second outputs in response to first and second input voltages; a P-type current mirror circuit driven by the second output; an N-type current mirror circuit driven by the first output; an output unit outputting an output voltage in response to control outputs from the P-type and N-type current mirror circuits; a first sub-current source including first and second P-type transistors connected in series; and a second sub-current source including first and second N-type transistors connected in series. Control ends of the second P-type and second N-type transistors receive the control outputs from the P-type and N-type current mirror circuits, respectively. Control ends of the first P-type and first N-type transistors are coupled to a common node between the first and second P-type transistors, and a common node between the first and second N-type transistors, respectively. | 02-23-2012 |
| 20120081180 | LAYOUT METHOD FOR DIFFERENTIAL AMPLIFIER AND LAYOUT USING THE SAME - A differential amplifier layout includes a current mirror having a first transistor, a second transistor, and a third transistor. The current mirror receives a first power supply through the first transistor. The second transistor is part of a reference current branch and the third transistor is part of a mirror current branch. The first transistor comprises a first group of fingers disposed adjacent one side of the second transistor and a second group of fingers disposed adjacent one side of the third transistor. | 04-05-2012 |
| 20120081181 | COMPARATOR CIRCUIT HAVING LATCHING BEHAVIOR AND DIGITAL OUTPUT SENSORS THEREFROM - A digital output sensor includes a sensing structure that outputs a differential sensing signal and includes at least one sensing element. An integrated circuit includes a substrate including signal conditioning circuitry for conditioning the sensing signal that includes a differential amplifier coupled to receive the sensing signal and provide first and second differential outputs and a comparator having input transistors coupled to receive outputs from the differential amplifier. The comparator also includes first and second current-mirror loads that provide differential drive currents and are coupled to the input transistors in a cross coupled configuration to provide hysteresis. An output driver is coupled to receive the differential drive currents. An output stage includes at least one output transistor which is coupled to the output driver for providing a digital output for the sensor. A voltage regulator is coupled to receive a supply voltage and output at least one regulated supply voltage. | 04-05-2012 |
| 20120086509 | Amplifier Input Stage and Slew Boost Circuit - Various apparatuses, methods and systems for boosting an amplifier slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus including a pair of inputs connected to a pair of differential input devices in an amplifier, a current source, a first current path connected to the current source, a second current path connected to the current source and to the pair of differential input devices, a switch in the first current path, and a voltage difference signal connected between the pair of inputs and the switch. The voltage difference signal represents the voltage difference between the pair of inputs. The conductance of the switch is inversely proportional to the voltage difference signal. | 04-12-2012 |
| 20120119835 | CURRENT MODE POWER AMPLIFIER PROVIDING HARMONIC DISTORTION SUPPRESSION - A current mode power amplifier includes a current steering stage configured to steer a scaled current based on differential voltage inputs, a filtered current mirror connected to the current steering stage to receive the scaled current and produce a filtered output current, and a resonant load configured to receive the output current and generate an output voltage signal for transmission. | 05-17-2012 |
| 20120133438 | DIFFERENTIAL AMPLIFIER AND DATA DRIVER - A differential amplifier has an interpolating function and has: first and second differential pairs including transistors of a first conductivity type; third and fourth differential pairs including transistors of a second conductivity type; first and second current sources providing operating currents to the first and second differential pairs; third and fourth current sources providing operating currents to the third and fourth differential pairs; a first control circuit which controls, in a first operating range where the amounts of currents flowing through the first and second differential pairs become smaller, respectively, a changing point at which the operating current of the first differential pair changes; and a second control circuit which controls, in a second operating range where the amounts of currents flowing through the third and fourth differential pairs become smaller, respectively, a changing point at which the operating current of the fourth differential pair changes. | 05-31-2012 |
| 20120139634 | CIRCUITRY INCLUDING MATCHED TRANSISTOR PAIRS - Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region. | 06-07-2012 |
| 20120146726 | CIRCUIT AND METHOD FOR SENSING A CAPACITANCE - A transconductance amplifier mirror circuit is connected to an electrode for sensing the capacitance of the electrode with reference to ground, or the capacitance between the electrode and another electrode. A voltage level change is produced on the electrode connected to the transconductance amplifier mirror circuit to cause the transconductance amplifier mirror circuit to supply charges to or drain charges from a charge calculation circuit. The charge amount variation is converted to a signal for calculating the sensed capacitance. | 06-14-2012 |
| 20120161872 | COMPARATOR AND ANALOG-TO-DIGITAL - A comparator includes: a pre-amplification module, configured to generate two amplified differential signal reference currents according to an input voltage and a reference voltage; and a differential signal obtaining module, configured to obtain a differential signal according to the two amplified differential signal reference currents. The pre-amplification module includes a differential unit, an offset unit, and an amplification unit, where the differential unit is configured to generate two direct current bias currents according to the input voltage and the reference voltage; the offset unit is configured to generate an offset current of the two direct current bias currents according to the input voltage and the reference voltage, so as to reduce magnitude of the two direct current bias currents and obtain two differential signal reference currents; the amplification unit is configured to receive the two differential signal reference currents, and amplify the two differential signal reference currents. | 06-28-2012 |
| 20120169422 | Amplifier with Non-Linear Current Mirror - An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal. | 07-05-2012 |
| 20120188015 | AMPLIFIER - An amplifier includes an output stage circuit, a current source, a PMOS input pair, an NMOS input pair and a current transferring circuit. The output stage circuit is electrically coupled to a supply voltage and a ground voltage. The current source has a node to provide a current. The PMOS input pair is coupled to the node and the ground voltage and controlled by an input voltage. The NMOS input pair coupled to the supply voltage is controlled by the input voltage. The current transferring circuit is coupled to the node and the NMOS input pair. When the input voltage is less than a specific value, the current flows into the PMOS input pair through the node. When the input voltage is larger than or equal to the specific value, the current flows into the NMOS input pair through the node and the current transferring circuit. | 07-26-2012 |
| 20120200358 | COMPARATOR - A comparator includes: a wide-swing operation transconductance amplifier (OTA), having first and second differential input pairs for receiving first and second differential input signals respectively, the wide-swing OTA generating first and second intermediate output voltages in comparing the first with the second differential input signals; a current switch group; a current mirror group, wherein when an input common mode voltage of the first and the second differential input signal tends to one of a first and a second reference voltage, one of the first and the second differential input pair is turned off, and the current switch group and the current mirror group compensate a current flowing through the other of the first and the second differential input pair; and a decision circuit coupled to the wide-swing OTA, for enlarging a voltage difference between the first and the second intermediate output voltage to output a voltage comparison output signal. | 08-09-2012 |
| 20120206203 | DYNAMIC CURRENT BOOST IN CLASS AB AMPLIFIER FOR LOW DISTORTION - An apparatus comprises an amplifier circuit and a detection circuit. The amplifier circuit includes a high voltage supply rail, a low voltage supply rail, and an output stage. The detection circuit is electrically coupled to the amplifier output stage and generates an indication when the output voltage at the output stage exceeds a specified output voltage threshold value. The amplifier circuit further includes a bias circuit configured to bias the amplifier circuit with a first bias current value when the output voltage is less than the specified output voltage threshold value, and bias the amplifier circuit with a second bias current value when the output voltage exceeds the specified output voltage threshold value. | 08-16-2012 |
| 20120242409 | ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR - Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region. | 09-27-2012 |
| 20120293260 | Low-Offset Current-Sense Amplifier and Operating Method Thereof - A low-offset current-sense amplifier and an operating method thereof are disclosed. The low-offset current-sense amplifier includes a sense amplifier, a first current supply unit, a second current supply unit, and a processing unit. The first current supply unit is coupled to the sense amplifier, and includes a first transistor group and a first current output terminal. The second current supply unit is coupled to the sense amplifier, and includes a second transistor group and a second current output terminal. The processing unit controls the on/off of some transistors of the first transistor group and the second transistor group according to electric currents output from the first current output terminal and the second current output terminal, respectively. | 11-22-2012 |
| 20130002355 | DIFFERENTIAL AMPLIFIER AND COMPARATOR - According to one embodiment, a differential amplifier includes a differential circuit, an output circuit, and a clipper circuit. The differential circuit generates a pair of differential currents in accordance with a difference in potential between a pair of input signals. The output circuit receives the pair of differential currents and generates an output voltage in accordance with the current difference. The clipper circuit suppresses the output voltage within a range to be able to convert to a low level or to a high level being higher than the low level. | 01-03-2013 |
| 20130021101 | DIFFERENTIAL AMPLIFIER HAVING RAIL-TO-RAIL INPUT VOLTAGE RANGE - A differential amplifier having a rail-to-rail input voltage range, includes a first differential input stage, which is connected to a first supply voltage rail via a first power source and a second complementary differential input stage, which is connected to the second supply voltage rail via a second power source. To this end, switching device are provided, which deactivate the first differential input stage and activate the second differential input stage when the voltage value of the input voltage signal exceeds a predetermined first voltage threshold in the event of rising input voltage, and which deactivate the second differential input stage and activate the first differential input sage when the voltage value of the input voltage signal falls below a predetermined second voltage threshold in the event of falling input voltage. A constant input slope can thus be achieved, having a high phase reserve, which makes the device particularly applicable in the field of biosensory technology. | 01-24-2013 |
| 20130033323 | ELECTRONIC SYSTEM COMPRISING A SENSOR STRUCTURE AND AN ANALOG INTERFACE CONNECTED THERETO WITH SENSOR INDEPENDENT OPERATING RANGE - An electronic system comprises a resistive sensor structure and an electronic circuit portion whose design is selected such that different resistive sensor structures may be combined within the same electronic circuit. To this end, the resistive sensor structure is used as a voltage/current converter that provides input currents to a current amplifier, which in turn provides an amplified output voltage on the basis of a difference of the input currents. The operating range of the current amplifier is adjusted on the basis of a programmable current source irrespective of the configuration of the resistive sensor structure. | 02-07-2013 |
| 20130038394 | OPERATIONAL AMPLIFIER - The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode. | 02-14-2013 |
| 20130043949 | METHOD OF FORMING A CIRCUIT HAVING A VOLTAGE REFERENCE AND STRUCTURE THEREFOR - In one embodiment, two transistors are coupled in a current mirror configuration to form a delta voltage, and an amplifier is configured to control a first current carrying electrode of each of the first and second transistors at a substantially constant voltage. | 02-21-2013 |
| 20130069724 | SUPPLY INDEPENDENT BIASING CIRCUIT - A supply-independent biasing source includes an upper current mirror including first and second PMOS transistors and a lower current mirror coupled to the upper current mirror including first and second NMOS transistors. The first NMOS and first PMOS transistors have drain terminals coupled together and form a first stack of transistors and the second NMOS and second PMOS transistors have drain terminals coupled together and form a second stack of transistors. A first resistive load is connected to one of the first and second stacks, wherein the resistive load comprises a first MOSFET transistor biased at triode region. | 03-21-2013 |
| 20130076438 | Current Efficient Mixer Architecture - In one embodiment, the present invention includes a mixer having various stages, including a transconductance stage with a differential transistor pair, a bias circuit, and a feedback circuit. The transistor pair can include a first transistor having a first terminal to receive a first input radio frequency (RF) voltage and to output a first RF current via a second terminal of the first transistor, and a second transistor having a first terminal to receive a second input RF voltage and to output a second RF current via a second terminal of the second transistor. In turn, the bias circuit is coupled to the second terminals of the transistors to provide a bias current to these transistors. The feedback circuit is in turn coupled to the second terminals of the transistors to generate a feedback signal corresponding to a common mode voltage at the second terminals of the transistors. | 03-28-2013 |
| 20130076439 | Limiting Amplifier And Method Thereof - A limiting amplifier and method are provided. In one implementation an apparatus includes a plurality of amplifier stages including a first amplifier stage and a last amplifier stage configured in a cascade arrangement, and a transconductance amplifier, wherein the first amplifier stage is configured to receive an input signal; the last amplifier stage outputs an output signal; the transconductance amplifier is configured receive a voltage signal from the last amplifier stage via a first resistor; and the transconductance amplifier is configured to output a current signal to an output node of the first amplifier stage via a second resistor in a negative feedback manner. | 03-28-2013 |
| 20130076440 | OPERATIONAL AMPLIFIER CIRCUIT STRUCTURE - An operational amplifier circuit structure is provided. The operational amplifier circuit structure includes a first current mirror associated with a first current mirror ratio, a second current mirror coupled to the first current mirror and associated with a second current mirror ratio, an input portion coupled to the first current mirror and the second current mirror, an output portion coupled between the input portion and the first current mirror and the input portion and the second current mirror, and associated with a first output impedance and a second output impedance, respectively, and a current source coupled to the input portion. | 03-28-2013 |
| 20130082777 | BIAS CONTROLLING APPARATUS - The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor. | 04-04-2013 |
| 20130088298 | HIGH PERFORMANCE CLASS AB OPERATIONAL AMPLIFIER - A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage. | 04-11-2013 |
| 20130093518 | BALANCED-INPUT CURRENT-SENSING DIFFERENTIAL AMPLIFIER - The invention relates to a current-sensing differential amplifier having a balanced input. | 04-18-2013 |
| 20130106515 | METHOD AND APPARATUS OF COMMON MODE COMPENSATION FOR VOLTAGE CONTROLLED DELAY CIRCUITS | 05-02-2013 |
| 20130147559 | FULLY DIFFERENTIAL AUTOZEROING AMPLIFIER - A fully differential amplifier with automatic offset voltage zeroing including first and second dynamically switched current mirrors and an output circuit. Each dynamically switched current mirror toggles operation between an autozeroing phase in which it mirrors a first current level indicative of a level of a first input terminal to provide a mirrored current, and an output phase in which it applies a difference current to a common output node. The difference current is a difference between the mirrored current and a second current level indicative of a level of a second input terminal. The first and second dynamically switched current mirrors operate out of phase with respect to each other during respective periods of each cycle of a clock signal. The output circuit develops first and second output signals on first and second output terminals at first and second polarities, respectively, based on a level of the common output node. | 06-13-2013 |
| 20130154739 | ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR - Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region. | 06-20-2013 |
| 20130194040 | Limiting Amplifier And Method Thereof - A method including receiving an input signal; amplifying the input signal to generate an output signal using a cascade of a plurality of amplifier stages including a first amplifier stage and a last amplifier stage; generating a voltage signal by sensing the output signal in a noninvasive manner so that the sensing results in substantially no change to the output signal; generating a current signal from the voltage signal using a transconductance amplifier; and injecting the current signal into an output node of the first amplifier stage in a noninvasive manner so that the injecting results in substantially no change to an amplification function of the first amplifier stage. | 08-01-2013 |
| 20130307622 | DIFFERENTIAL AMPLIFIER CIRCUIT HAVING PLURAL CURRENT MIRROR CIRCUITS - Disclosed herein is a differential amplifier circuit that includes: first and second transistors coupled to form a differential circuit; a first current mirror circuit generating first and second currents in response to a third current flowing through the first transistor; and a second current mirror circuit generating a fourth current in response to a fifth input current. A sum of the second and fourth currents flowing through the second transistor. | 11-21-2013 |
| 20130314159 | OPERATIONAL TRANSCONDUCTANCE AMPLIFIER WITH INCREASED CURRENT SINKING CAPABILITY - An amplifier circuit includes an input terminal and an output terminal. A current sinking transistor includes a first conduction terminal coupled to the output terminal and a second conduction terminal coupled to a reference supply node. A voltage sensing circuit has a first input coupled to the input terminal and a second input coupled to the output terminal. An output of the voltage sensing circuit is coupled to the control terminal of the current sinking transistor. The voltage sensing circuit functions to sense a rise in the voltage at the output terminal which exceeds the voltage at the input terminal, and respond thereto by activating the current sinking transistor. | 11-28-2013 |
| 20130321081 | REGULATED CASCODE CURRENT MIRROR SCHEME FOR TRANSCONDUCTANCE AMPLIFIERS - There is described an amplification stage comprising: a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line; a current sink to the output signal line, under the control of the input signal; circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit. | 12-05-2013 |
| 20140028394 | CURRENT MODE LOGIC CIRCUIT AND METHOD - A circuit includes a bias generating circuit, an operational amplifier, and a current mode logic circuit. The operational amplifier has a first input terminal, a second input terminal, and an output terminal. The bias generating circuit is configured to provide a first bias voltage to the first terminal. The second terminal is configured to receive a second bias voltage. The second terminal and the output terminal are configured to form a negative feedback loop. The output terminal is coupled with the current mode logic circuit. | 01-30-2014 |
| 20140062596 | CHOPPED OSCILLATOR - Embodiments of the present disclosure may provide a relaxation oscillator with improved performance against phase noise error. The phase noise error may be reduced from sources whose power is greater at lower frequencies. To reduce the noise error, the relaxation oscillator may include chopping in the charging current driver; chopping in the trigger level generator; and/or chopping in the currents that feed the cells. A chopped amplifier may be provided to perform chopping of the input signals. | 03-06-2014 |
| 20140104000 | FEED-FORWARD CIRCUIT TO PREVENT PHASE INVERSION - An amplifier includes a bootstrap circuit for improving a linearity of the amplifier and a feed-forward circuit for modifying a voltage of the bootstrap circuit in response to a change in an input signal. Modifying the voltage using the feed-forward circuit prevents a phase-inversion condition of the amplifier. | 04-17-2014 |
| 20140111278 | DYNAMICALLY BIASED OUTPUT STRUCTURE - A transconductance amplification stage ( | 04-24-2014 |
| 20140139289 | SENSOR SIGNAL PROCESSING USING TRANSLINEAR MESH - Apparatuses and methods are described where input signals are supplied to a translinear mesh. In some embodiments an output of the translinear mesh is regulated to a desired value. | 05-22-2014 |
| 20140167850 | CURRENT FEEDBACK OUTPUT CIRCUIT - The current feedback output circuit includes first and second transistors. The current feedback output circuit includes a current amplifier that has a non-inverting input terminal, an inverting input terminal, a first output terminal and a second output terminal, an input impedance of the non-inverting input terminal being higher than an input impedance of the inverting input terminal, and flows a current obtained by amplifying the difference between a current of an input signal to the non-inverting input terminal and a current input to the inverting input terminal between the first output terminal and the second output terminal. The current feedback output circuit includes first to sixth current mirror circuits. The current feedback output circuit includes a current feedback circuit that supplies a current responsive to a voltage at the signal output terminal to the inverting input terminal. | 06-19-2014 |
| 20140266444 | POWER AMPLIFIER SYSTEM WITH SUPPLY MODULATION MITIGATION CIRCUITRY AND METHODS - A power amplifier system with supply modulation mitigation circuitry and methods is disclosed. The power amplifier system includes a regulator having an unregulated input and a regulated output along with a power amplifier having a supply input for receiving a supply current from the regulated output and having a signal input and a signal output that comprise a main signal path. The supply modulation mitigation circuitry is adapted to sense a supply modulation signal output from the regulator, generate a cancellation signal that is a scaled inverse of the supply modulation signal, and inject the cancellation signal into a node within the power amplifier system to sum the supply modulation signal and cancellation signal together to reduce the supply modulation signal from within the main signal path. | 09-18-2014 |
| 20140292411 | HIGH PERFORMANCE CLASS AB OPERATIONAL AMPLIFIER - A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage. | 10-02-2014 |
| 20140340149 | METHOD FOR LOW POWER LOW NOISE INPUT BIAS CURRENT COMPENSATION - Low power low noise input bias current compensation for an amplifier input stage is provided by recycling the tail current of the differential pair transistors. A local amplifier regulates the tail current and buffers the base current of the tail current transistor, which is mirrored back to the input transistors to provide input bias current compensation. | 11-20-2014 |
| 20150015333 | DIFFERENTIAL MEASUREMENTS WITH A LARGE COMMON MODE INPUT VOLTAGE - An apparatus comprises a differential amplifier circuit and a current source. The differential amplifier circuit is configured to receive a voltage at an input, wherein the differential amplifier circuit generates an output voltage having a magnitude proportional to the received voltage over a voltage range to be measured at a specified output common mode voltage. The current source is electrically connected to an input of the differential amplifier circuit and is configured to subtract a midpoint of a voltage range of the battery voltage to be measured at the input of the differential amplifier, wherein a circuit supply voltage provided to the differential amplifier circuit and the current source is less than the voltage at the input. | 01-15-2015 |
| 20150015334 | ANALOG CIRCUITS HAVING IMPROVED TRANSISTORS, AND METHODS THEREFOR - Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region. | 01-15-2015 |
| 20150022267 | APPARATUS AND METHODS FOR ELECTRONIC AMPLIFICATION - Apparatus and methods for electronic amplification are provided. In one embodiment, an amplifier includes first and second input terminals, an amplification circuit, a feedback circuit, and a current mirror. The amplification circuit includes a non-inverting voltage input electrically connected to the first input terminal and to a bias voltage, an inverting voltage input electrically connected to the second input terminal, a voltage output, and a current output. The amplifier includes a first feedback path from the voltage output to the inverting voltage input through the feedback circuit and a second feedback path from the current output to the inverting voltage input through the current mirror, which can mirror a current from the current output to generate a mirrored current. A current source such as a transducer can provide an input current between the first and second input terminals, and the mirrored current can substantially match the input current. | 01-22-2015 |
| 20150028954 | SIGNAL RECEIVER - A signal receiver includes a current source providing a current having a current value, a pair of active input devices, and a pair of resistors. Each active input device includes a control node, a first conduction node, and a second conduction node. One of the control nodes receives an input signal. The first conduction nodes are connected to each other and receive the current. One of the second conduction nodes serves as an output node. The active input devices output an output signal to a core circuit according to the current and the input signal. Each resistor has a resistance value. A target voltage value is determined according to the resistance value and the current value, such that a voltage swing of the output signal is limited within the target voltage value, and an operating voltage of the core circuit is substantially equal to the target voltage value. | 01-29-2015 |
| 20150035597 | OPERATIONAL AMPLIFIER WITH SELECTIVE INPUT - An operational amplifier includes a selective differential stage including a first current mirror and a current distribution circuit. First and second legs of the first current mirror are responsive to current in first and second paths of the current distribution circuit, which distributes a tail current in response to a first signal received by a first input of the operational amplifier. Current in a first path of a selection circuit in the second path of the current distribution circuit is responsive to a second signal received by a second input of the operational amplifier. Current in the second path of the selection circuit is responsive to a third signal received by a third input of the operational amplifier. An output stage generates an output signal responsive to a difference between the first signal and one of the second and third signals. | 02-05-2015 |
| 20150091647 | REDUCING A SETTLING TIME AFTER A SLEW CONDITION IN AN AMPLIFIER - In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A third stage receives the third and fourth line voltages and outputs an output voltage in response thereto. A slew boost circuit detects a slew condition, in which a threshold difference arises between the first and second input voltages, and outputs a slew current in response thereto for maintaining a slew rate of the output voltage during the slew condition. The first stage includes circuits for reducing a variable difference between the first and second line voltages. | 04-02-2015 |
| 20150130538 | DIFFERENTIAL AMPLIFIER CIRCUIT - In one embodiment, a differential amplifier circuit includes a first input terminal, a second input terminal, a first transistor, a second transistor, a third transistor, a current source, a first output terminal, a second output terminal, a first passive element, and a second passive element. The first (second) transistor has a control terminal connected to the first (second) input terminal. The third transistor has a control terminal. The control terminal is applied predetermined bias voltage. The current source is connected to a first terminal in each of the first transistor, second transistor, and third transistor. The first (second) output terminal is connected to a second terminal of the first (second) transistor. The first (second) passive element is connected between the first (second) input terminal and the first (second) output terminal. | 05-14-2015 |
| 20150303877 | SEMICONDUCTOR DEVICE - A semiconductor device comprises a first input terminal; a second input terminal; an inverting amplifier circuit that comprises an input node connected to a first input terminal, an inverting input node connected to a second input terminal, and an output node connected to an output terminal, amplifies a difference between a first input signal supplied to the input node and a second input signal supplied to the second input terminal, and that outputs an output signal whose polarity is inverted from that of the first input signal to the output node; and a non-inverting amplifier circuit that comprises an input node connected to a second input terminal, an inverting input node connected to a first input terminal, and an output node connected to an output terminal, amplifies a difference between the first input signal and the second input signal, and that outputs an output signal whose polarity is the same as that of the first input signal to the output node. | 10-22-2015 |
| 20150333713 | CONTROL CIRCUIT FOR LOW NOISE AMPLIFIER AND RELATED DIFFERENTIAL AND SINGLE-ENDED AMPLIFICATION DEVICES - A circuit includes a first pair of transistors connected in parallel between a first node and a second node with a diode-connected transistor coupled to the second node. A second pair of transistors has current terminals connected at a third node. A first and second current sink transistors are connected in a current mirror configuration with the diode-connected transistor and further coupled to the third node. A first differential amplifier has an output coupled to control terminals of the first and third transistors and an input coupled to a further current node of the third transistor. A second differential amplifier has an output coupled to control terminals of the second and fourth transistors and an input coupled to a further current node of the fourth transistor. | 11-19-2015 |
| 20160028355 | DYNAMIC CURRENT SOURCE FOR AMPLIFIER INTEGRATOR STAGES - An amplifier system may include a current source, an impedance element responsive to a current change, and a feedback controller generating a control signal based on impedance element response. Current source may supply current to a pair of output elements, one of which being controlled by an integrator, and a portion of the integrator. Impedance element may have terminals coupled to inputs of the output elements and may be configured to experience a change in voltage based on a change in current supplied to its input. Feedback controller may have a pair of inputs coupled to the terminals of impedance element and an output to control the current source based on a detected change in voltage across the impedance element. Current source may be varied based on the control signal to maintain a constant current supplied to the input of the impedance elements. | 01-28-2016 |
| 20160191006 | RECONFIGURABLE AMPLIFIER - An amplifier receives a differential signal and, in response, generates a first negative input current and a first positive input current. In a first operating mode, the amplifier receives a second differential signal, and, in response, generates a second negative input current and a second positive input current. In a second operating mode, the amplifier receives the second differential signal, and, in response, generates a third negative input current and a third positive input current. When the device is operating in the first operating mode, the first negative input current is summed with the second negative input current and the first positive input current is summed with the second positive input current. When the device is operating in the second operating mode, the first negative input current is summed with the third negative input current and the first positive input current is summed with the third positive input current. | 06-30-2016 |
| 20160254793 | CLOCK AND DATA DRIVERS WITH ENHANCED TRANSCONDUCTANCE AND SUPPRESSED OUTPUT COMMON-MODE | 09-01-2016 |
