| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 330002000 | WITH AMPLIFIER CONDITION INDICATING OR TESTING MEANS | 40 |
| 20080224767 | SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR ADJUSTING A CAPACITANCE VALUE OF A PHASE COMPENSATING CAPACITOR - A semiconductor integrated circuit has an amplifier circuit which includes a phase compensating capacitor and has a feedback loop, and a stability determining and adjusting circuit which measures an amplitude of a voltage outputted from the amplifier circuit at a predetermined plurality of frequencies and adjusts a capacitance value of the phase compensating capacitor on the basis of a ratio between measured values of the amplitude. | 09-18-2008 |
| 20090021300 | Apparatus and Method for Detecting Output Power From an Amplifier - An apparatus for detecting output power from an amplifier ( | 01-22-2009 |
| 20090027116 | METHOD AND INTEGRATED CIRCUIT INCLUDING AN AMPLIFIER CALIBRATION CIRCUIT - An integrated circuit including a circuit for calibration and offset compensation of an amplifier method is disclosed. In one embodiment, the method includes providing a reference input signal to the input of an amplifier, coupling the output signal of the amplifier to a comparator circuit as a first input signal, providing a target signal to the comparator circuit as a second input signal, and increasing or decreasing a control signal provided to amplifier VGA corresponding to the output of the comparator circuit by one adjustment process of small process size. | 01-29-2009 |
| 20090033412 | Remote Audio Amplifier Monitoring System - An apparatus is provided for remotely monitoring a plurality of amplifiers on a display device. The amplifiers are provided to process audio signals and directly or indirectly connected to a network. In the apparatus, a collecting section collects a group code from each of the amplifiers through the network. The group code is allocated to each amplifier according to a grouping system for grouping the plurality of the amplifiers. A display control section displays a tree diagram of the amplifiers according to the collected group codes on the display device as a graphical representation of the grouping system. | 02-05-2009 |
| 20090066411 | METHOD FOR DESIGNING INPUT CIRCUITRY FOR TRANSISTOR POWER AMPLIFIER - A circuit having: an input matching network; a transistor coupled to an output of the input matching network; and wherein the input matching network has a first input impedance when such input matching network is fed with an input signal having a relatively low power level and wherein the input matching network has an input impedance different from the first input impedance when such input matching network is fed with an input signal having a relatively high power level. | 03-12-2009 |
| 20090091381 | GAIN CONTROL DEVICE - The present invention aims to suppress degradation of a reception characteristic even in such an environment that the signal strength of an inputted analog signal varies due to a variation in a received electric field. A controller acquires characteristic information showing each gain characteristic indicative of a relationship between the signal strength of the analog signal and the gain corresponding to the analog signal at an amplifier from a CPU. An AGC controller derives gains each corresponding to the signal strength detected at an ADC according to the gain characteristics indicated by the acquired characteristic information, whenever necessary, and outputs the same to the amplifier through a terminal. | 04-09-2009 |
| 20090167429 | METHODOLOGY FOR ASSESSING DEGRADATION DUE TO RADIO FREQUENCY EXCITATION OF TRANSISTORS - One embodiment relates to an on-chip power amplifier (PA) test circuit. In one embodiment, a PA test circuit comprises a controllable oscillator (CO) configured to generate a radio frequency (RF) signal, a parallel resonant circuit tuned to the radio frequency, a pre-power amplifier (PPA) coupled to the CO and the parallel resonant circuit, the PPA configured to amplify and drive the RF signal from an output of the PPA into a load. The test circuit may further comprise a first transmission gate configured to couple the RF signal from the CO to an input of the PPA. One testing methodology for a PA test circuit comprises stressing the PPA with an RF signal, measuring a characteristic of the PPA, determining stress degradation from the characteristic measurements, and repeating the stressing and characteristic measurements until a maximum stress degradation is achieved or a maximum stress has been applied. | 07-02-2009 |
| 20090256630 | Method of power amplifier predistortion adaptation using compression detection - A method of power amplifier predistortion that makes use of a compression detector circuit in a feedback loop in order to adapt the channel gain for changing transmitter behavior. By monitoring the compression behavior of the amplifier, the signal is scaled to compensate for gain and compression point variations in the power amplifier and transmitter, while keeping a predistortion correction function constant. | 10-15-2009 |
| 20090261899 | Amplifier with Automatic Gain Profile Control and Calibration - Embodiments of the present invention provide systems and methods for automatic amplifier gain profile control, including a method for automatically configuring a variable gain profile amplifier according to received input and a variable gain profile amplification system. Further, embodiments of the present invention provide systems and methods for increased gain profile accuracy, including methods and systems to reduce the effects of temperature and/or process variations on the gain profile of an amplifier. | 10-22-2009 |
| 20090284312 | TEST CIRCUIT FOR PROGRAMMABLE GAIN AMPLIFIER - A test circuit, for checking whether at least one programmable gain amplifier (PGA) operates correctly, includes a signal generator, a gain controller, a test level output circuit, a comparison circuit and an identifying circuit. The signal generator is utilized for outputting a test input signal to a PGA to generate a test output signal. The gain controller is utilized for outputting a gain control signal to the PGA to adjust a gain of the PGA. The test level output circuit is utilized for referring to the test output signal to output a first test level and a second test level. The comparison circuit is utilized for comparing the first and second test levels to generate a result signal. The identifying circuit is utilized for identifying whether the PGA operates correctly according to the result signal. | 11-19-2009 |
| 20100026385 | METHOD FOR CALIBRATING A POWER AMPLIFIER AND DEVICE USING THE SAME - A calibration device for a power amplifier includes a calculation unit, a first storage unit and a multiplier. The calculation unit is utilized for generating a calibration factor according to a value of a characteristic parameter of the power amplifier. The first storage unit coupled to the calculation unit, for storing the calibration factor. The multiplier is coupled to the first storage unit and a baseband unit, for multiplying a baseband signal outputted from the baseband unit by the calibration factor for generating an input signal to the power amplifier. | 02-04-2010 |
| 20100045370 | TESTING OF TRANSIMPEDANCE AMPLIFIERS - Testing is performed on an amplifier wafer housing a transimpedance amplifier prior to packaging the transimpedance amplifier with an external photodetector, wherein the transimpedance amplifier includes a small, auxiliary, integrated silicon photodetector provided at the input of the transimpedance, in parallel with external photodetector attachment points. To test the transimpedance amplifier, the transimpedance amplifier is stimulated by optically exciting the small auxiliary photodetector, wherein the small auxiliary photodetector is excited using short wavelength light, whereby advantages such as higher efficiency may be obtained. The testing method includes placing the amplifier wafer in a testing system, probing the power and ground connections on the amplifier wafer, illuminating the small auxiliary photodetector on the amplifier wafer, and detecting the output of the transimpedance amplifier housed on the amplifier wafer. | 02-25-2010 |
| 20100127771 | DRIVING CIRCUIT INCLUDING TESTING FUNCTION - The disclosure provides a driving circuit including a testing function including: an amplification circuit that amplifies an input signal and that outputs an amplified signal from an output terminal to one of a pair of input terminals of an electric device; an inversion circuit that inverts the amplified signal and that outputs an inverted signal from an output terminal to the other input terminal of the electric device; and a switching circuit that, when testing the electric device, puts the amplification circuit and the inversion circuit into a non-operating state and that switches to connect one of the output terminal of the amplification circuit or the output terminal of the inversion circuit to a first potential, and to connect the other output terminal of the amplification circuit and the output terminal of the inversion circuit to a second potential which is lower than the first electric potential. | 05-27-2010 |
| 20100148860 | Multiport amplifier adjustment - The invention provides a method and apparatus for applying test signals to a multiport amplifier (MPA) and a method, apparatus and system for determining parameter adjustments for an MPA. Applying test signals to an MPA is performed so as to provide an output signal indicative of parameter adjustments for the MPA, the multiport amplifier arrangement comprising an input network, an amplifier unit and an output network, where the method includes providing a test signal directly to a point in the multiport amplifier arrangement between an output of the input network and an input of the amplifier unit. The method of determining parameter adjustments for a multiport amplifier arrangement includes receiving first and second output signals associated with an output of the multiport amplifier arrangement, the first output signal corresponding to a first signal path through the multiport amplifier arrangement and the second output signal corresponding to a second signal path through the multiport amplifier arrangement and determining parameter adjustments based on the first and second output signals. | 06-17-2010 |
| 20100327968 | OPTIMISING OPERATING TEMPERATURE IN A POWER AMPLIFIER - Method and system for optimising operating temperature in a power amplifier of a base station of a cellular telecommunications network. The system comprises:
| 12-30-2010 |
| 20110140772 | SELF-HEALING POWER AMPLIFIER: METHODS AND APPARATUS - An integrated power amplifier includes a divider and a combiner. The integrated power amplifier also includes two or more amplifiers. Each of the amplifier input terminals is electrically coupled to a divider output terminal and each of the amplifier output terminals is electrically coupled to a combiner input terminal. At least one power sensor is configured to provide a power amplifier performance metric. The divider and the combiner include a plurality of actuators. Each actuator has at least one actuator control terminal which is configured to provide an actuator setting. The actuators are configured via the actuator control terminals to optimize the power amplifier performance metric. Methods to simulate the operation of a self-healing power amplifier and a process for the operation of a self-healing circuit are also described. | 06-16-2011 |
| 20120001686 | HIGH FREQUENCY CIRCUIT - A high frequency circuit includes an amplifier part that includes a plurality of amplifier circuits amplifying a high frequency signal and connected in parallel, that synthesizes outputs of the amplifier circuit and that supplies the outputs to an antenna; a controller that outputs a low power signal during a low power mode in which the amplifier part operates at low power; and an operation suppressing circuit that disables one of the plurality of amplifier circuits based on the low power signal. | 01-05-2012 |
| 20120025906 | Systems and Methods of RF Power Transmission, Modulation, and Amplification, Including Embodiments for Compensating for Waveform Distortion - Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion. | 02-02-2012 |
| 20120075014 | SYSTEMS AND METHODS FOR HIGH-SENSITIVITY DETECTION OF INPUT BIAS CURRENT - The invention relates to systems and methods for high-sensitivity detection of input bias current. The invention more particularly relates to platforms and techniques for the calibration and measurement of input bias current in op amps or other devices. In embodiments, the platform can incorporate a servo loop connected to a high-sensitivity test amplifier, such as an instrumentation amplifier. The test amplifier can complete a switchable circuit with the servo loop and detect a calibration input bias current for the test platform, without a production device in place. The device under test can be switched into the servo loop, and the total bias current measured with both the device under test and test amplifier in-circuit. The difference between the measured current with the device inserted and the previously measured calibration current represents the bias current for the subject device, without attaching external meters or requiring reference parts of the production type. | 03-29-2012 |
| 20120262230 | AMPLIFIER CROSSTALK CANCELLATION TECHNIQUE - This document discusses apparatus and methods for configuring and providing crosstalk cancellation to maintain channel separation in a multi channel system. In an example, an amplifier circuit can include a crosstalk cancellation circuit configured to reduce crosstalk from a first output to a second load and from a second output to a first load where the first load and the second load share a return path. | 10-18-2012 |
| 20120326777 | AMPLIFIER CIRCUIT AND RADIO COMMUNICATION APPARATUS - An amplifier circuit of envelope tracking has a timing adjusting unit having a finite number of adjustment values for adjusting time by which the output is delayed from the input, and capable of adjusting a time difference between an input signal and a power supply voltage which reach an amplifier, by making a selection from the adjustment values; a test signal output unit capable of repeatedly sending out a test signal serving as the input signal at predetermined cycles; and an adjustment value determining unit sequentially measuring output power for m (≦k) periods from the amplifier while changing an adjustment value of the timing adjusting unit to a different value every k period of the test signal, searching for an adjustment value at which a total sum of the output power for m periods is maximum, and setting the adjustment value on the timing adjusting unit. | 12-27-2012 |
| 20130049854 | POWER EFFICIENT RADIO FREQUENCY TRANSMITTER - A power efficient, small-packaged radio frequency (RF) transmitter for use in avionics applications. The RF transmitter utilizes Cartesian feedback to operate a power amplifier with Class AB biasing and efficiency, while delivering Class A biasing performance. The RF transmitter includes interstage pads and high pass filters specially configured to meet demanding requirements for both adjacent channel power (ACP) limits and wideband spurious energy limits. The RF transmitter is much smaller in size and dissipates less DC power and heat than previous RF transmitters used in avionics applications. | 02-28-2013 |
| 20130049855 | INTEGRATED CIRCUIT - An integrated circuit comprising a Class-D amplifier for amplifying an input signal at an input terminal is disclosed. The Class-D amplifier is switchable between an operational mode, in which a comparator ( | 02-28-2013 |
| 20130088290 | Measurement of the Output Current of an Amplifier Circuit - An amplifier circuit includes a first and a second switching element connected in parallel between a first and a second voltage potential and are actuated in the amplifier mode in a clocked manner. A capacitive element is connected in parallel to at least one of the two switching elements, a measuring circuit for measuring the switching edges occurring during switching of the switching elements, and a current-determining circuit for determining the output current by means of the measured switching edges. | 04-11-2013 |
| 20130113552 | OFFSET COMPENSATION FOR SENSE AMPLIFIERS - A method of re-offsetting a plurality of amplifier is provided. The method includes testing the plurality of amplifiers based on a re-offset value at bulks of compensation transistors of the plurality of amplifiers; identifying a first group of first amplifiers of the plurality of amplifiers favoring reading a first logic level and/or a second group of second amplifiers of the plurality of amplifiers favoring reading a second logic level different from the first logic level, based on results of the testing step; changing the re-offset value to a new re-offset value; re-offsetting the first group of first amplifiers and/or the second group of second amplifiers based on the new re-offset value; and re-testing the first group of first amplifiers and the second group of second amplifiers. | 05-09-2013 |
| 20130187709 | AMPLIFYING CIRCUITS AND CALIBRATION METHODS THEREFOR - An amplifying circuit is provided and includes a signal processor, an edge detector, and a calibration controller. The signal processor transforms amplitude information of a first and second input signals into time domain to provide first and second output signals respectively. The edge detector detects a polarity of a voltage offset from a timing relationship of the first and second output signals. The calibration controller compensates the voltage offset according to a change of the detected polarity. | 07-25-2013 |
| 20130285740 | DYNAMIC CHARACTERISATION OF AMPLIFIER AM-PM DISTORTION - There is disclosed a method of determining an AM-PM distortion measurement for an amplifier, the method comprising: generating a test waveform to be provided to the input of the amplifier; periodically puncturing the test waveform with a fixed-level reference signal to generate a modified test waveform which alternates between test periods in which a portion of the test waveform is present and reference periods in which the fixed-level reference signal is present; measuring the amplifier AM-PM distortion in a test period; measuring the phase difference between the input and the output of the amplifier in reference periods either side of the test period; estimating a phase error in the test period in dependence on phase differences measured in the reference periods; and estimating the true amplifier AM-PM distortion by removing the estimated phase error from the measured amplifier AM-PM distortion. | 10-31-2013 |
| 20140070881 | QUIESCENT CURRENT DETERMINATION USING IN-PACKAGE VOLTAGE MEASUREMENTS - Apparatus, systems, and fabrication methods are provided for biasing amplifier arrangements inside device packages to a target quiescent current. In one embodiment, an amplifier device has an output interface and includes an amplifier arrangement having an amplifier output and impedance matching circuitry coupled between the amplifier output and the output interface. A method for biasing the amplifier arrangement involves measuring or otherwise obtaining a voltage between the amplifier output and the output interface, determining an estimated quiescent current through the amplifier arrangement based on that voltage, and adjusting a bias voltage provided to the input of the amplifier arrangement based on a difference between the estimated quiescent current. In exemplary embodiments, the bias voltage is adjusted until the estimated quiescent current is substantially equal to a target quiescent current. | 03-13-2014 |
| 20140077872 | SIGNAL AMPLIFICATION CIRCUIT AND SIGNAL AMPLIFICATION DETERMINATION CIRCUIT INCLUDING THE SIGNAL AMPLIFICATION CIRCUIT - A signal amplification circuit includes an input terminal; a first chopper modulation circuit; a first amplifier having an amplification circuit and a chopper demodulation circuit, a capacitance feedback circuit having a second chopper modulation circuit, a first switch constituting a voltage follower circuit with the amplification circuit; a second switch; a second amplifier to convert the differential output signal from the second output terminal into a single-end signal; and a filter to pass at least a predetermined frequency component of the chopping frequency from the single-end signal from the second amplifier to output an output signal of the signal amplification circuit. | 03-20-2014 |
| 20140159808 | Design and Analysis of Doherty Amplifiers - An analysis technique for (Doherty) amplifiers having a main amplifier branch and at least one peak amplifier branch. For a given input power level and assumed amplifier impedance levels, an output power level and phase response are obtained for each active device using appropriate load-pull data based on the impedance levels. The performance of the amplifier is analyzed based on the impedance levels, output power levels, and phase responses to generate updated impedance levels. The analysis is repeated until the updated impedance levels converge on steady state values. The analysis can be repeated for different input power levels. Main and peak output matching networks for the amplifier can be designed by iteratively adjusting impedance levels for the networks using appropriate load-pull contours. For the design and analysis phases, the load-pull contours include Class-AB data for the main amplifier device and Class-C data for the peak amplifier device. | 06-12-2014 |
| 20140327480 | INSTRUMENTATION AMPLIFIER WITH RAIL-TO-RAIL INPUT RANGE - A system and method for adjusting a common mode output voltage in an instrumentation amplifier is provided. In one aspect, the common mode output voltage is increased or decreased with respect to the common mode input voltage to enable high amplification of the signal input to the instrumentation amplifier. Moreover, the common mode output voltage can be driven to (or approximately to) a target voltage value such as, but not limited to, half the supply, even if the common mode input voltage is close to supply or ground rail voltage. Thus, a high amplification of the differential input voltage can be obtained and utilized for various applications requiring rail to rail input. | 11-06-2014 |
| 20150022264 | SENSE AMPLIFIER OFFSET VOLTAGE REDUCTION - A circuit includes a plurality of transistors responsive to a plurality of latches that store a test code. The circuit further includes a first bit line coupled to a data cell and coupled to a sense amplifier. The circuit also includes a second bit line coupled to a reference cell and coupled to the sense amplifier. A current from a set of the plurality of transistors is applied to the data cell via the first bit line. The set of the plurality of transistors is determined based on the test code. The circuit also includes a test mode reference circuit coupled to the first bit line and to the second bit line. | 01-22-2015 |
| 20150035593 | Input Power Detecting Arrangement and Method - An amplifier circuit with an input power detector and a related method are described. With the input power detector and related control network, the arrangement enables and/or disables a number of unit cells in power amplifiers. | 02-05-2015 |
| 20150048882 | APPARATUS AND METHOD FOR TESTING OF SUCCESSFUL OPERATION OF TRANSIMPEDANCE AMPLIFIERS - The present disclosure relates to an apparatus comprising at least two operational amplifiers, a first and a second current input, at least one voltage output, and at least two resistors, wherein a first current source is connectable to the first current input, and a test current source is connectable to the second current input, and wherein the first current input is connected to an inverting input of the first operational amplifier and the second current input is connected to an inverting input of the second operational amplifier, and a first feedback resistor is connected between the output and the inverting input of the first operational amplifier and a second feedback resistor is connected between the output and the inverting input of the second operational amplifier, and wherein the voltage output is connected to the outputs of the first and the second operational amplifier. | 02-19-2015 |
| 20150109054 | READY-FLAG CIRCUITRY FOR DIFFERENTIAL AMPLIFIERS - Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value. | 04-23-2015 |
| 20150130535 | Joint optimisation of supply and bias modulation - There is disclosed a technique for controlling at least one amplification stage, comprising: selecting a linearity objective for the amplification stage; in dependence on an input signal to said amplification stage, determining a combination of supply input and bias input for the amplification stage in order to meet said linearity objective; and in dependence on there being more than one combination of supply input and bias input for meeting the linearity objective, selecting the combination that optimises a further system performance objective for the amplification stage. The further system performance objective may be one or more of: an efficiency objective; an envelope signal bandwidth objective; or a robustness to production tolerance objective. | 05-14-2015 |
| 20150145594 | OVERSTRESS MANAGEMENT FOR POWER AMPLIFIERS - A power amplifier includes an amplifier element and overstress management circuitry coupled to the amplifier element. The overstress management circuitry is configured to detect an overstress condition of the amplifier element and adjust one or more operating parameters of the amplifier element in response to the detection of an overstress condition of the amplifier element. Using the overstress management circuitry prevents damage to the amplifier element that may occur due to uncorrected overstress conditions which may degrade or destroy a gate oxide of the amplifier element. Accordingly, the longevity of the amplifier element is improved. | 05-28-2015 |
| 20150326191 | DIGITAL AMPLITUDE MODULATION DEVICE AND DIGITAL AMPLITUDE MODULATION METHOD - A digital amplitude modulation device includes power amplifiers, a compositor, a filter, a measurement unit, a protection unit, and a controller. The power amplifiers are arranged in parallel and amplify an input signal in accordance with ON control and stop output in accordance with OFF control. The filter suppresses an unnecessary component to generate an AM signal. The measurement unit measures a measurement value between the filter and a signal output terminal and output the AM signal generated by the filter. The protection unit includes a calculator and a first processing unit. The calculator is formed from an analog circuit and calculates an evaluation value based on the measurement value. The first processing unit is formed from an analog circuit and generates a first control signal by referring to the evaluation value. Upon receiving the first control signal, the controller OFF-controls the power amplifiers. | 11-12-2015 |
| 20150372648 | TRANSIMPEDANCE AMPLIFIER - A TIA comprises a TIA core that converts a current signal to a voltage signal, a single-to-differential converter that generates a differential voltage signal from the voltage signal, a feedback circuit that generates a control signal from the differential voltage signal, a bypass circuit that generates the current signal by subtracting the bypass current from the input current so that an average value of the current signal is maintained at a predetermined value, and a monitor circuit that generates a monitor current proportional to the bypass current from the control signal | 12-24-2015 |
| 20160006403 | MULTISTAGE AMPLIFIER CIRCUIT WITH IMPROVED SETTLING TIME - Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions. | 01-07-2016 |
