| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 327542000 | With diverse type transistor devices | 6 |
| 20090243713 | REFERENCE VOLTAGE CIRCUIT - A reference voltage circuit which is less dependent on semiconductor process variations compared to bandgap based reference voltage circuits. The circuit comprises a first amplifier having an inverting input, a non-inverting input and an output. A current biasing circuit provides first and second PTAT currents, and a CTAT current. The CTAT current is equal in value to the second PTAT at a first predetermined temperature and opposite in polarity. A first load element is coupled to the non-inverting input of the first amplifier and arranged for receiving the first PTAT current such that a PTAT voltage is developed across the first load element. A feedback load element is coupled between the inverting input and the output of the amplifier for receiving the summation of the CTAT current and the second PTAT current. The feedback load element is such that at a second predetermined temperature the voltage at the output of the amplifier is substantially equal to the voltage at the output of the amplifier at the first temperature. | 10-01-2009 |
| 20100079200 | PROCESS/DESIGN METHODOLOGY TO ENABLE HIGH PERFORMANCE LOGIC AND ANALOG CIRCUITS USING A SINGLE PROCESS - A method for improving analog circuits performance using a circuit design using forward bias and a modified mixed-signal process is presented. A circuit consisting plurality of NMOS and PMOS transistors is defined. The body terminal of the NMOS transistors are coupled to a first voltage source and the body terminal of the PMOS transistors are coupled a second voltage source. Transistors in the circuit are selectively biased by applying the first voltage source to the body terminal of each selected NMOS transistor and applying the second voltage source to the body terminal of each selected PMOS transistor. In one embodiment, the first voltage source and the second voltage source are modifiable to provide forward and reverse bias to the body terminal of the transistors. | 04-01-2010 |
| 20100164609 | CIRCUIT FOR GENERATING REFERENCE VOLTAGE - A reference voltage generating circuit includes a reference voltage generating unit generating a uniform reference voltage in response to a bias voltage, a bias voltage generating unit generating the bias voltage, and a start-up circuit, after activating the bias voltage generating unit by receiving a first supply voltage, canceling a change of the first supply voltage to maintain a separation from the bias voltage generating unit. The circuit adopts a start-up circuit having a voltage distributing unit, thereby preventing a quiescent point of a bias voltage generating unit from entering a zero state and prevents a reference voltage from rising in a power-up state that an analog supply voltage rises according to a change of an external design environment such as a power, a temperature, a process parameter and the like, thereby generating a reference voltage more stably. As a result, current consumption and power consumption are minimized. | 07-01-2010 |
| 20110304387 | CURRENT MIRROR CIRCUIT - In one embodiment, a current mirror circuit includes first to fourth insulated gate field effect transistors (FETs), and a bias circuit. The gate electrodes of the first and second FETs are connected to each other. The source electrode of the third FET is connected to the drain electrode of the first FET, and the drain electrode of the third FET is connected to the gate electrodes of the first and second FETs and a current input terminal. The gate electrode of the fourth FET is connected to the gate electrode of the third FET, the source electrode of the fourth FET is connected to the drain electrode of the second FET, and the drain electrode of the fourth FET becomes a current output terminal. The bias circuit is configured to provide a bias voltage to the gate electrodes of the third and fourth FETs. | 12-15-2011 |
| 20130285738 | Voltage Generator With Adjustable Slope - A charging circuit includes a first current mirror including a first branch circuit, a second branch circuit and a third branch circuit for generating a first conduction current, a second conduction current and a third conduction current according to the input voltage, a second current mirror including a fourth branch circuit coupled to the first branch circuit and including a first channel width, and a fifth branch circuit coupled to the second branch circuit and including a second channel width, wherein a load circuit is coupled between the first current mirror and the second current mirror, and the first current mirror as well as the second current mirror correspondingly adjust values of the first conduction current, the second conduction current and the third conduction current according to the first channel width as well as the second channel width, so as to process a charging operation of the load circuit. | 10-31-2013 |
| 20190146542 | BASE CURRENT CANCELLATION CIRCUIT AND METHOD THEREFOR | 05-16-2019 |
