Entries |
Document | Title | Date |
20080197913 | ENERGY EFFICIENT VOLTAGE DETECTION CIRCUIT AND METHOD THEREFOR - A voltage detection circuit has a first MOSFET device having a drain, a gate, and a source terminal. A feedback element is coupled to the drain terminal and the gate terminal of the first MOSFET device. An input voltage is coupled to the gate terminal of the first MOSFET device. The voltage detection circuit is actively detecting a voltage from when the input voltage is in an OFF-state voltage region of the first MOSFET device. This detection continues through when the input voltage is at a sub-threshold voltage region of the first MOSFET, to when the input voltage exceeds the threshold voltage of the first MOSFET. This voltage detection circuit dissipates only a pre-selected drain-current at a level exceeding the drain-leakage current of the first MOSFET, as power dissipation. | 08-21-2008 |
20080197914 | Dynamic leakage control using selective back-biasing - Embodiments of a dynamic leakage control circuit for use with graphics processor circuitry are described. The dynamic leakage control circuit selectively enables back biasing of the transistors comprising the graphics processor circuits during particular modes of operation. The back biasing levels are controlled by two separate power rails. A first power rail is coupled to an existing power supply and the second power rail is coupled to a separate adjustable voltage regulator. A separate voltage regulator may also be provided for the first power rail. A hardware-based state machine or software process is programmed to detect the occurrence of one or more modes of operation and adjust the voltage regulators for the first and second power rails to either enable or disable the back biasing state of the circuit, or alter the threshold voltage of the circuit within a specified voltage range. | 08-21-2008 |
20080218252 | VOLTAGE REGULATOR OUTPUTTING POSITIVE AND NEGATIVE VOLTAGES WITH THE SAME OFFSETS - A voltage regulator has a first charge circuit, a second charge circuit, and a control circuit. The control circuit has five input terminals and two output terminals. The five input terminals are respectively coupled to a reference voltage, a first voltage source, a second voltage source, an output terminal of the first charge circuit, and an output terminal of the second charge circuit. The control circuit equalizes a voltage difference between the output terminal of the first charge circuit and the first voltage source and a voltage difference between the second voltage source and the output terminal of the second charge circuit. | 09-11-2008 |
20080231351 | VOLTAGE STEP-DOWN CIRCUIT - According to an aspect of the present invention, there is provided a voltage step-down circuit including: a first NMOS connected between an external and an internal power-supply voltages through a PMOS turned ON during an active state and turned OFF during a standby state; a second NMOS connected between the external and the internal power-supply voltages; and a current control circuit that sinks a current from the internal power-supply voltage to a ground level for a certain period of time after an operation state is switched from the active state to the standby state. | 09-25-2008 |
20080252363 | Semiconductor Device and Electronic Appliance Using the Same - A semiconductor device with less power consumption and an electronic appliance using the same. The semiconductor device of the invention is supplied with a first potential from a high potential power source and a second potential from a low potential power source. Upon input of a first signal to an input node, an output node outputs a second signal. With the semiconductor device of the invention, a potential difference of the second signal can be controlled to be smaller than a potential difference between the first potential and the second potential, thereby power consumption required for charging/discharging wires can be reduced. | 10-16-2008 |
20080278224 | Apparatus and method for recovery of wasted power from differential drivers - An apparatus and method for supplying power to circuits of an integrated circuit (IC) from the wasted power in low-swing high-speed differential line drivers used in the IC, is disclosed. In a high speed line driver the load resistors of the driver are connected to a power supply, either the local power supply or the receiver power supply. DC power for the driver is supplied through these resistors. A large portion of this power, supplied from the power supply is wasted in the DC set-up circuit of the differential line driver. It is proposed to use this wasted power to power selected circuits of an IC. The use of this wasted power from the drivers for powering the circuits reduces the overall power dissipation of the system. | 11-13-2008 |
20080284502 | CURRENT BIASING CIRCUIT - A current biasing circuit is provided, which is designed to suppress reference current drift caused by temperature variation with a low overall temperature coefficient of a constant-voltage circuit and at least one resistor. The constant-voltage circuit comprises a diode and/or a diode-connected transistor. This current biasing circuit is based on a current mirror architecture, is easy to implement, and is a relatively temperature-independent current source. | 11-20-2008 |
20080290933 | Method and circuit for an efficient and scalable constant current source for an electronic display - The present invention uses two transistors instead of a sensing resistor to provide a constant current source for a load such as an array of light emitting diodes (“LEDs”). In the present invention, a bias current is applied to a branch of the circuit. The drain-to-source voltages of two transistors are matched. The voltage at the gate of both transistors is controlled based on the bias current and the drain-to-source current of the first of the two transistors. The second of the two transistors is sized such that source current of the second transistor is a multiple of the source current of the first transistor for a given gate voltage. By the techniques of this invention, the load current in a circuit is efficiently kept constant at a multiple of the input bias current. | 11-27-2008 |
20080290934 | REFERENCE BUFFER CIRCUITS - A reference buffer circuit is disclosed, providing a reference voltage at an output node and comprising a closed-loop branch comprising an amplifier and first and second MOS transistors and an open-loop branch comprising third and fourth MOS transistors and a tracking circuit. The first MOS transistor has a gate coupled to an output terminal of the amplifier and a source coupled to a negative input terminal of the amplifier. The second MOS transistor is coupled to the source of the first MOS transistor. The third MOS transistor has a gate coupled to the output terminal and a source coupled to the output node. The fourth MOS transistor has a drain coupled to the source of the third MOS transistor. A gate voltage of the fourth MOS transistor tracks a drain voltage of the third MOS transistor through the tracking circuit. | 11-27-2008 |
20080297234 | CURRENT MIRROR BIAS TRIMMING TECHNIQUE - A reference current is generated by a current mirror circuit. An operational amplifier of a feedback circuit generates a control voltage for control of the feedback circuit transistor. The size of the feedback circuit transistor is trimmed, and the current through the feedback circuit transistor remains relatively constant via operation of the feedback circuit. The feedback circuit transistor is scaled in size relative to the size of current reference transistor(s) (e.g., current sources or sinks), which are tied to the same control voltage. The reference current of the current reference transistors thus varies with the size of the feedback circuit transistor. Further advantageously, transistors providing reference currents for resistor ladders can also be tied to the same control voltage, but scaled proportionally with changes in size to the feedback circuit transistor, thereby maintaining relatively constant voltage from taps of the resistor ladder, even when the feedback circuit transistor is trimmed. | 12-04-2008 |
20080297235 | METHOD FOR CONTROLLING AN OUTPUT VOLTAGE AND VOLTAGE CONTROLLER - A voltage controller for controlling an output voltage to a predetermined value. The voltage controller has a first terminal configured to connect a supply voltage, a second terminal configured to output the output voltage, a control voltage generating unit configured to provide a control voltage, and a control transistor. The control transistor is connected as a series controller between the first terminal and the second terminal. The control voltage can be applied to the control terminal of the control transistor, wherein the output voltage is controlled in a manner dependent on the supply voltage and the control voltage. Furthermore, an offset voltage is superposed on the control voltage. | 12-04-2008 |
20080297236 | SEMICONDUCTOR STORAGE DEVICE AND SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor storage device according to the present invention, comprising: a first semiconductor layer formed on a substrate via a buried insulation layer; an FBC (Floating Body Cell) having a channel body of floating type formed on the first semiconductor layer, a main gate which forms a channel at a first face side of the channel body, and an auxiliary gate formed to capacitively couple on a second face at an opposite side of the first face; a logic circuit formed on the first semiconductor layer, separate from the FBC by an insulation film, which transfers a signal for the FBC; a second semiconductor layer which locates below the FBC and is formed along an under face of the buried insulation film; and a third semiconductor layer which locates below the logic circuit and is formed along an under face of the buried insulation film, wherein the second and third semiconductor layers are set to be in a potential different from each other. | 12-04-2008 |
20090009236 | Step-down circuit with stabilized output voltage - The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage. | 01-08-2009 |
20090015320 | Temperature compensation for floating gate circuits - A system and method is provided for improving the accuracy of the voltage reference output of a floating gate voltage reference circuit by minimizing the temperature coefficient, Tc. The system and method provides a minimized Tc on output reference voltage, for a wide variety of such output voltages. In a dual floating gate voltage reference circuit wherein a voltage reference output (Vref) is generated as a function of the difference in charge of said floating gates, a method includes causing each of the floating gates to change voltage substantially the same amount as a function of temperature such that, during a read mode of the reference circuit, the temperature coefficient, Tc, of the voltage reference output is substantially reduced. The system and method achieves very low Tc over a wide range of reference or comparator voltages using low cost analog test equipment and methods. | 01-15-2009 |
20090039950 | INTERNAL POWER-SUPPLY CIRCUIT - An internal power-supply circuit generates an internal voltage based on a reference voltage, and has an external-power-supply terminal to which an external power-supply voltage having a first potential is applied during a normal operation and an external power-supply voltage having a second potential that is higher than the first potential is applied during a burn-in acceleration test, a reference-voltage generating unit for generating the reference voltage from the external power-supply voltage, and an internal-voltage generating unit for generating the internal voltage based on the reference voltage. The reference-voltage generating unit generates, during the normal operation, a normal reference voltage that is independent of the potential of the external power-supply voltage and generates, during the burn-in acceleration test, a first burn-in reference voltage that is dependent on the potential of the external power-supply voltage and a second burn-in reference voltage that has the same potential as the normal reference voltage. | 02-12-2009 |
20090140798 | SEMICONDUCTOR DEVICE INCLUDING REFERENCE VOLTAGE GENERATION CIRCUIT ATTAINING REDUCED CURRENT CONSUMPTION DURING STAND-BY - During operation, a control signal attains H level, a conventional type first reference voltage generation circuit is activated, and the first reference voltage generation circuit generates a reference voltage. During stand-by, the control signal attains L level, and the first reference voltage generation circuit is inactivated, whereby a through current does not flow through the first reference voltage generation circuit. Then, during stand-by, an internal voltage generation circuit is supplied with the reference voltage generated by a second reference voltage generation circuit including a resistance division circuit constituted of first to third resistors each having a high resistance value of T (tera) Ω order, in which a through current is extremely small. | 06-04-2009 |
20090167420 | DESIGN STRUCTURE FOR REGULATING THRESHOLD VOLTAGE IN TRANSISTOR DEVICES - A circuit and a design structure including the circuit embodied in a machine readable medium are disclosed. The circuit is for regulating a desired value of threshold voltage, Vt, for a given FET transistor device. The circuit is coupled to the FET for regulating the desired value of Vt, by providing a device body voltage, and, that additionally enables control of the voltage at the drain of the FET device independent of the applied body bias voltage. The coupled circuit includes an operational amplifier, or, a second MOS transistor, or, a Zener diode. | 07-02-2009 |
20090167421 | Step-down circuit, semiconductor device, and step-down circuit controlling method - A step-down circuit is connected between a power supply node for supplying a supply voltage and an internal power supply line for supplying a power to the object circuit and steps-down the supply voltage, and supplies the stepped-down voltage to the object circuit through the internal power supply line. The step-down circuit includes a comparison circuit that compares a reference voltage with the voltage of the internal power supply line, and a driver that adjusts a current flowing between the internal power supply line and the power supply node according to the comparison result of the comparison circuit. The activity level of the driver is controlled so as to rise in a predetermined rising period synchronously with an activated operation of the object circuit and to fall in a predetermined falling period that comes after the rising period. | 07-02-2009 |
20090167422 | TRANSISTOR OUTPUT CIRCUIT AND METHOD - A transistor circuit is provided. The transistor circuit includes a first output transistor, a second output transistor, and a switch arrangement. The first and second output transistors are arranged for providing an output signal to a common output of the transistor circuit. The switch arrangement couples an output of the first output transistor and the output of the second output transistor to the common output in sequence. The first and second output transistors are controlled to provide the same steady state output. The switch arrangement is adapted such that when the output of the first output transistor is coupled to the common output, changes in drive conditions voltage of the first output transistor are isolated from the second output transistor. | 07-02-2009 |
20090184756 | Semiconductor Power Device with Bias Circuit - An RF power circuit comprises a power transistor having a gate and drain, an output matching network coupled to the drain and an input matching network coupled to the gate. A closed-loop bias circuit is integrated with the power transistor on the same die and coupled to the gate for biasing the RF power transistor based on a reference voltage applied to the bias circuit. | 07-23-2009 |
20090184757 | SEMICONDUCTOR DEVICE HAVING INPUT CIRCUIT MINIMIZING INFLUENCE OF VARIATIONS IN INPUT SIGNALS - A semiconductor device stabilizes an operation of an input buffer. A semiconductor device includes an input potential detection unit, an input buffer, and a current sink unit. The input potential detection unit outputs a detection signal in response to a level of an input signal. The input buffer buffers the input signal by differentially amplifying the input signal through a first current sink unit. The current sink unit receives the detection signal, and in response to the detection signal, performs an auxiliary differential amplifying operation with respect to the input signal buffered by the input buffer. | 07-23-2009 |
20090201078 | Single-chip common-drain JFET device and its applications - A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation. | 08-13-2009 |
20090201079 | Single-chip common-drain JFET device and its applications - A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation. | 08-13-2009 |
20090206921 | Single-chip common-drain JFET device and its applications - A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation. | 08-20-2009 |
20090206922 | Single-chip common-drain JFET device and its applications - A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation. | 08-20-2009 |
20090243711 | BIAS CURRENT GENERATOR - A bias current generator for generating bias current is described. The generator comprises an amplifier having an inverting input, a non-inverting input and an output. A first bipolar transistor is associated with one of the inverting and non-inverting inputs of the amplifier. A load MOS device is associated with the other one of the inverting and non-inverting inputs of the amplifier. The load MOS device is driven by the amplifier to operate in the triode region with a corresponding drain-source resistance r | 10-01-2009 |
20090243712 | Device for reducing power consumption inside integrated circuit - The present invention discloses a device for reducing power consumption inside an integrated circuit (IC), comprising: an IC including an up-gate transistor and a low-gate transistor electrically connected with each other, and a control circuit controlling the up-gate transistor and the low-gate transistor; and a resistor located outside the IC, the resistor having one end electrically connected with a node between the up-gate transistor and the low-gate transistor, or electrically connected with an upper end of the up-gate transistor. | 10-01-2009 |
20090278592 | INTERNAL VOLTAGE DISCHARGE CIRCUIT AND ITS CONTROL METHOD - An internal voltage discharge circuit includes a differential comparator for differentially comparing a reference voltage with a feedback voltage to generate a discharge control voltage, a level detector for detecting a level of external power supply voltage and a discharge unit for adjusting an amount of discharge of an internal voltage based on the level signal detected by the level detector and the discharge control voltage from the differential comparator. | 11-12-2009 |
20100007408 | INTERNAL VOLTAGE GENERATING CIRCUIT - An output terminal of a first boost circuit is connected to a second boost circuit. After the second boost circuit is started up, a boost clock frequency of the second boost circuit is reduced. A time required to start up the second boost circuit is reduced, and in addition, a current supply capability of the first boost circuit is increased after the second boost circuit is started up. When the second boost circuit is driven, output voltages of the first and second boost circuits are stably supplied without instantaneously changing the output voltage of the first boost circuit. | 01-14-2010 |
20100019835 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased. | 01-28-2010 |
20100052774 | CIRCUIT ARRANGEMENT FOR CONTROLLING A HIGH SIDE CMOS TRANSISTOR IN A HIGH VOLTAGE DEEP SUB MICRON PROCESS - The present invention relates to a circuit arrangement, which is used for controlling a high side CMOS transistor (M | 03-04-2010 |
20100052775 | Voltage supply with low power and leakage current - In a semiconductor integrated circuit device, a circuit block has a first MOS transistor, and a leakage current control circuit having a second MOS transistor and a current source, a source and drain circuit of the second MOS transistor is formed between the power supply line of the circuit block and a voltage point where operating voltage is supplied. This current source is connected to the power supply line and in a first state, the power supply line is driven to a first voltage by the second MOS transistor. In a second state, the power supply line is controlled at a second voltage by current flow in the current source and, the voltage applied across the source and drain of the first MOS transistor in the second state is smaller than the voltage applied across the source and drain of the first MOS transistor in the first state. | 03-04-2010 |
20100127764 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit comprises a first transistor which has one end connected to a first node where a first voltage is output, and which transfers the first voltage to an output terminal, a second transistor which has one end connected to a second node where the second voltage is output, and which transfers the second voltage to the output terminal, a third booster circuit which supplies a third voltage obtained by further boosting the first voltage to a control terminal of the first transistor, and a fourth booster circuit which supplies a fourth voltage obtained by further boosting the second voltage to a control terminal of the second transistor. The third booster circuit lowers a voltage supplied to the control terminal of the first transistor to turn off the first transistor at a time after discharging of the first node is started. The fourth booster circuit increases, in accordance with a signal from the third booster circuit, a voltage supplied to the control terminal of the second transistor to turn on the second transistor after the first transistor is turned off. | 05-27-2010 |
20100134181 | CIRCUIT FOR SWITCHABLY CONNECTING AN INPUT NODE AND AN OUTPUT NODE - A switching circuit for switchably connecting an input node and an output node. The switching circuit comprises a switch operable to switchably connect the input node to the output node in response to a switching signal. A sensor is provided for sensing the voltage between the input and output nodes and providing a sense signal in response thereto. A driver coupled to the sensor adjusts the switching signal in response to the sense signal. | 06-03-2010 |
20100134182 | Apparatus and Method for Improving Drive-Strength and Leakage of Deep Submicron MOS Transistors - An apparatus and method of manufacture for metal-oxide semiconductor (MOS) transistors is disclosed. Devices in accordance with the invention are operable at voltages below 2V. The devices are area efficient, have improved drive strength, and have reduced leakage current. A dynamic threshold voltage control scheme comprised of a forward biased diode in parallel with a capacitor is used, implemented without changing the existing MOS technology process. This scheme controls the threshold voltage of each transistor. In the OFF state, the magnitude of the threshold voltage of the transistor increases, keeping the transistor leakage to a minimum. In the ON state, the magnitude of the threshold voltage decreases, resulting in increased drive strength. The invention is particularly useful in MOS technology for both bulk and silicon on insulator (SOI) CMOS. The use of reverse biasing of the well, in conjunction with the above construct to further decrease leakage in a MOS transistor, is also shown. | 06-03-2010 |
20100141333 | Reservoir capacitor array circuit - A reservoir capacitor array circuit capable of allowing an internal voltage to be maintained stably, comprises a plurality of reservoir capacitors, each of the reservoir capacitors including a switch element which is connected between a power source voltage and a prescribed node and switched in response to a test enable signal which is enabled depending on a test mode signal or whether the fuse is cut or not, and a capacitor connected between the node and a ground voltage. | 06-10-2010 |
20100207686 | VOLTAGE GENERATING APPARATUS - A voltage generating apparatus is disclosed. The voltage generating apparatus includes a first N-type transistor and an enhancement MOSFET transistor. The first N-type transistor has a first drain/source coupled to a first voltage, a second drain/source generating a first output voltage, and a gate coupled to a second voltage. The enhancement MOSFET transistor has a first drain/source coupled to the second drain/source of the first N-type transistor, and a second drain/source and a gate coupled to a second voltage. The first N-type transistor is a depletion metal oxide semiconductor field effect transistor (MOSFET). | 08-19-2010 |
20100214014 | SWITCHED CAPACITOR VOLTAGE CONVERTERS - An on-chip voltage conversion apparatus for integrated circuits includes a first capacitor; a first NFET device configured to selectively couple a first electrode of the first capacitor to a low side voltage rail of a first voltage domain; a first PFET device configured to selectively couple the first electrode of the first capacitor to a high side voltage rail of the first voltage domain; a second NFET device configured to selectively couple a second electrode of the first capacitor to a low side voltage rail of a second voltage domain, wherein the low side voltage rail of the second voltage domain corresponds to the high side voltage rail of the first voltage domain; and a second PFET device configured to selectively couple the second electrode of the first capacitor to a high side voltage rail of the second voltage domain. | 08-26-2010 |
20100231292 | ULTRA-LOW POWER HYBRID CIRCUITS - The present invention provides a solution to avoid the robustness problems of sub-threshold circuits by switching small parts of circuits to nominal-voltage only when they are being used, and switching them back to sub-threshold levels when the operation finishes. Such “hybrid sub-threshold” approach is capable of supporting ultra-low power operation without the disadvantages of sub-threshold circuits. Hybrid power saving mode for logic circuits provide significant power saving and fast recovery time without performance degradation. | 09-16-2010 |
20100253421 | Electronic Device for Supplying DC Power - An electronic device for delivering DC power includes a load, a power end, an upper gate switch including a first end coupled to the power, a second end, and a third end, for conducting connection between the first and third ends according to the signal level of the second end, a lower gate switch including a first end coupled to the third end of the upper gate switch, a second end, and a third end coupled to ground, for conducting connection between the first and third ends according to the signal level of the second end, an inductor, and a switch control unit, coupled to the second end of the upper gate switch and the second end of the lower gate switch, for switching the upper gate switch between an ON state and an OFF state, and switching the lower gate switch between an ON state and a semi-ON state. | 10-07-2010 |
20100271116 | VOLTAGE REGULATOR CIRCUIT - Embodiments of circuits, systems, and methods relating to a voltage regulator circuit are disclosed. In particular, in accordance with some embodiments, a voltage regulator having a field effect transistor (FET) portion and a heterojunction bipolar transistor (HBT) portion integrated into a common substrate is provided. Other embodiments may be described and claimed. | 10-28-2010 |
20100271117 | VOLTAGE CONVERTER - A voltage converter including a first transistor, a second transistor, an inductor and a control module is provided. The first transistor has a source terminal receiving an input signal, and a body terminal receiving a first bias voltage. The second transistor has a drain terminal coupled to a drain terminal of the first transistor, a source terminal coupled to ground, and a body terminal receiving a second bias voltage. The inductor has a first terminal coupled to the drain terminal of the first terminal and a second terminal generating an output voltage. The control module is coupled to a gate terminal of the first transistor and a gate terminal of the second transistor for controlling conducting states of the first transistor and the second transistor. | 10-28-2010 |
20100289562 | Gate drive device - A gate drive device which can suppress the fluctuation of an internal power source voltage and output voltage, while reducing the number of parts by omitting a bypass capacitor connected in parallel with a semiconductor integrated circuit, is provided. The gate drive device drives the gate of an active element with a large input capacity, such as an IGBT or MOSFET, and includes a semiconductor integrated circuit. The semiconductor integrated circuit has an internal power source based on an external power source, such as a battery. The semiconductor integrated circuit incorporates a voltage drop suppressing circuit, configured so that, if an input external power source voltage momentarily drops below a minimum operating voltage, a drop of an internal power source voltage below the minimum operating voltage, and a sharp drop in a voltage output to the gate, are prevented by the voltage drop suppressing circuit. | 11-18-2010 |
20100308902 | REFERENCE VOLTAGE GENERATORS FOR INTEGRATED CIRCUITS - A reference voltage generator circuit may include at least one MOS transistor and at least one bipolar transistor coupled together to provide an electrical path from an input reference potential to an output of the generator circuit. The electrical path may extend through a gate-to-source path of the MOS transistor and further through a base-to-emitter path of the bipolar transistor. The MOS transistor may be biased by a bias current that is proportional to T | 12-09-2010 |
20100315158 | Dynamic Biasing for Regulator Circuits - The disclosed invention provides apparatus and methods for dynamic biasing in electronic systems and circuits. The apparatus and methods disclosed provide non-linear biasing responsive to monitored load conditions. | 12-16-2010 |
20110001557 | VOLTAGE REFERENCE CIRCUIT WITH TEMPERATURE COMPENSATION - A voltage reference circuit with temperature compensation includes a power supply, a reference voltage supply, a first PMOS transistor with its source connected to the power supply voltage, a second PMOS transistor with its source connected to the power supply and its gate and drain connected to the first PMOS gate, a first NMOS transistor with its gate and drain connected the first PMOS drain, a second NMOS transistor with its drain connected to the second PMOS drain and its gate connected with the first NMOS gate to the reference voltage supply, a resistor connected to the second NMOS source and ground, and an op-amp with its inverting input and its output connected the first NMOS source and its non-inverting input connected to the ground. In another aspect, a voltage reference circuit output is coupled to an NMOS gate in saturation mode connected to another voltage reference circuit. | 01-06-2011 |
20110090001 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - A semiconductor integrated circuit device which substantially reduces drop in a supply voltage generated by a regulator and ensures stable supply of a supply voltage with high efficiency and high accuracy. In the device, a memory power supply includes a plurality of transistors and an error amplifier. In the transistors, source pads and drain pads are alternately arranged in a row along one edge of a semiconductor chip in a peripheral area of the chip. Transistor gates are formed in parallel with the alternately arranged source pads and drain pads (so that the longitudinal direction of the gates is parallel to the direction of the arrangement of the source pads and drain pads). Consequently, the length of wirings coupled to drains and sources is shortened and the sheet resistance is decreased. | 04-21-2011 |
20110102073 | Semiconductor device, system with semiconductor device, and calibration method - Variations of the impedance of each output driver of a semiconductor device can be reduced, and high-speed calibration is achieved. A calibration circuit including a replica circuit having the same configuration as each pull-up circuit or pull-down circuit included in an output driver of a semiconductor device is provided within a chip. During a first calibration operation, the replica circuit is provided with voltage conditions that allow the maximum current to flow through the output driver so that an impedance of the replica circuit is equal to a value of an external resistor. During a second calibration operation, table parameters obtained in the first calibration operation are used to adjust the impedance of the output driver without use of the replica circuit. | 05-05-2011 |
20110121890 | Semiconductor device - This invention allows for stable operation of a circuit to which an output voltage is supplied. The invention resides in a semiconductor device comprising a VREF | 05-26-2011 |
20110181348 | REFERENCE VOLTAGE GENERATING CIRCUIT AND ANALOG CIRCUIT USING THE SAME - A reference voltage generating circuit includes a first power supply, a second power supply, a first variable resistance circuit having one end connected to the first power supply and configured to be capable of adjusting a resistance value of the first variable resistance circuit, a series resistance circuit having at least one resistance and one end connected to the first variable resistance circuit, a second variable resistance circuit having one end connected to the series resistance circuit and the other end connected to the second power supply, and configured to be capable of adjusting a resistance value of the second variable resistance circuit, a first terminal arranged between the first variable resistance circuit and the series resistance circuit, a second terminal arranged between the series resistance circuit and the second variable resistance circuit, and a voltage selecting circuit configured to select one of a voltage of the first terminal and a voltage of the second terminal, and output the selected voltage as a reference voltage. | 07-28-2011 |
20110181349 | SEMICONDUCTOR DEVICE - The semiconductor device includes a power element which is in an on state when voltage is not applied to a gate, a switching field-effect transistor for applying first voltage to the gate of the power element, and a switching field-effect transistor for applying voltage lower than the first voltage to the gate of the power element. The switching field-effect transistors have small off-state current. | 07-28-2011 |
20110187446 | SEMICONDUCTOR DEVICE - A semiconductor device includes a bonding option pad, an internal power supply, and a MOS transistor. The bonding option pad is selectively wire-bonded to two voltage supply portions through which external power supply voltages with different power supply potentials are supplied from an external power supply. The internal power supply is caused to generate a pre-specified internal power supply voltage. The MOS transistor stabilizes an output level of the internal power supply voltage. The source and drain of the MOS transistor are shorted together and connected to the bonding option pad, and the gate there. | 08-04-2011 |
20110215862 | INTERNAL SUPPLY VOLTAGE CIRCUIT OF AN INTEGRATED CIRCUIT - The disclosure relates to a method for generating a setpoint voltage in an integrated circuit, comprising generating a substantially constant reference voltage, and generating from the reference voltage, a setpoint voltage comprising a component equal to the highest threshold voltage of all the CMOS transistors of a circuit of the integrated circuit and a component which may be equal to zero. The disclosure applies in particular to the provision of a power supply voltage of a circuit based on CMOS transistors. | 09-08-2011 |
20110227636 | REFERENCE VOLTAGE CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT - A reference voltage circuit includes a first amplifier configured to output a reference voltage, a second amplifier coupled to the first amplifier, an offset adjustment voltage generation circuit, a first load device and a first pn junction device, and second and third load devices and a second pn junction device. The offset adjustment voltage generation circuit is configured to generate a voltage which is input to the third and fourth input terminals of the second amplifier, and reduce an offset voltage between the first and second input terminals of the first amplifier through the second amplifier. The first input terminal is coupled to a coupling node of the first load device and the first pn junction device, and the second input terminal is coupled to a coupling node of the second load device and the third load device. | 09-22-2011 |
20110234309 | INTERNAL POWER SUPPLY VOLTAGE GENERATION CIRCUIT - Provided is an internal power supply voltage generation circuit with which a through current of a logic circuit supplied with an internal power supply voltage does not depend on a power supply voltage. A reference voltage (VREF) is generated based on a constant current of a current source ( | 09-29-2011 |
20110285456 | FOUR-TERMINAL SOI MESFET BASED LOW DROPOUT REGULATOR - Embodiments of a Low Dropout (LDO) regulator are provided in which an n-channel Metal Semiconductor Field Effect Transistor (MESFET) is utilized as a pass transistor of the LDO regulator. In one embodiment, the LDO regulator is implemented on an integrated circuit die and includes an n-channel Semiconductor-on-lnsulator (SOI) MESFET pass transistor. A voltage applied to a substrate of the SOI MESFET pass transistor is controlled to configure the LDO regulator in either an ultra-low dropout voltage mode or a high Power Supply Rejection (PSR) mode. In another embodiment, the LDO regulator includes an re-channel MESFET pass transistor and a switch that operates to disconnect the MESFET pass transistor from a supply voltage of the LDO regulator when the LDO regulator is desired to be shut off. | 11-24-2011 |
20110309879 | Internal Voltage Generation Circuit - An internal voltage generation circuit includes a first enable signal generator configured to delay an active signal to generate a first enable signal, a comparison signal generator configured to compare the internal voltage with an internal reference voltage to generate a comparison signal, a pulse signal generator configured to receive the first enable signal and to generate a pulse signal, a transmission device configured to buffer and transfer the comparison signal as a pull-down signal, and a drive device configured to drive the driving signal to the first level in response to the pull-down signal. | 12-22-2011 |
20120032734 | INTERNAL VOLTAGE GENERATING CIRCUIT OF SEMICONDUCTOR DEVICE - An internal voltage generating circuit of a semiconductor device includes a first voltage driver configured to pull up an internal voltage terminal during a period where a level of the internal voltage terminal is lower than a target level, and a second voltage driver configured to pull up the internal voltage terminal during a predefined time in each period corresponding to a frequency of an external clock. | 02-09-2012 |
20120044016 | ELECTRIC DEVICE AND CONTROL METHOD OF THE SAME - An electric device and a control method of the same, the electric device including a load terminal, a constant voltage output unit to generate an output voltage to the load terminal, a feedback circuit having a plurality of feedback circuit elements to generate a feedback signal to the constant voltage output unit to adjust the output voltage, and a controller to set a power mode of the electric device and to generate a control signal according to an enable signal and the set power mode such that the control signal corresponds to one or more of the feedback circuit elements to adjust the feedback signal, wherein the enable signal corresponds to a level of the output voltage. | 02-23-2012 |
20120081175 | INTERNAL VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR APPARATUS USING THE SAME - An internal voltage generation circuit includes a voltage detection unit configured to generate a voltage detection signal that indicates whether a voltage level of an internal voltage is a first target voltage level or a second target voltage level higher than the first target voltage level, according to control of a normal operation signal. The internal voltage generation circuit also includes an operation control signal generation unit configured to selectively activate an operation control signal in response to the normal operation signal and the voltage detection signal, a periodic pulse signal generation unit configured to generate a periodic pulse signal in response to the operation control signal and the normal operation signal, and a charge pumping unit configured to generate an internal voltage by performing a charge pumping operation according to control of the periodic pulse signal. | 04-05-2012 |
20120105141 | INTERNAL VOLTAGE GENERATION CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME - An internal voltage generation circuit includes an internal reference voltage generation unit configured to generate first and second reference voltages, a core voltage generation unit configured to receive the first reference voltage and to generate a core voltage based on the first reference voltage, and a bit line pre-charge voltage generation unit configured to receive the second reference voltage and to generate a bit-line pre-charge voltage based on the second reference voltage. | 05-03-2012 |
20120176187 | Method for Preventing the Over-Stress of MV Devices - A device includes a first power supply line carrying a first positive power supply voltage, and a second power supply line carrying a second positive power supply voltage lower than the first positive power supply voltage. The device further includes a protection circuit having a MOS transistor. A diode is coupled to the MOS transistor. The source-to-drain path of the MOS transistor and the diode are serially coupled between the first and the second power supply lines. The diode is forward biased by the first and the second positive power supply voltages. | 07-12-2012 |
20120176188 | POWER SWITCH FOR DECREASED RAMP RATE - A power switch for an integrated circuit provides a stepped profile supply potential. A supply potential generation block generates the stepped profile output supply to control the ramp rate of the output in order to prevent a false trigger of electrostatic discharge at the pads of the integrated circuit. | 07-12-2012 |
20120188005 | Field Device for Process Instrumentation - A field device for process instrumentation having an interface for connecting a two-wire cable and for outputting measurement values, wherein the interface comprises a series circuit having a transistor circuit by which the loop current is adjustable as a function of a control signal, a power supply, and a device by which the loop current can be captured as an actual value that is fed by a first feedback coupling to a regulator having integrated behavior. The regulator compares the actual value to a target value, and generates a control signal for the transistor circuit. The actual value is fed by a second feedback coupling to a summation point as a compensation signal for generating an input signal for the transistor circuit as a function of the control signal and the compensation signal to suppress interference coupled into the two-conductor line. | 07-26-2012 |
20120206193 | INTERNAL POWER SUPPLY VOLTAGE GENERATION CIRCUIT - Provided is an internal power supply voltage generation circuit, with which a through current can be prevented from being excessive due to manufacturing fluctuations during the operation of a logic circuit, to thereby suppress current consumption. Provided is an internal power supply voltage generation circuit for generating an internal power supply voltage at an internal power supply terminal and supplying the internal power supply voltage to a logic circuit, the internal power supply voltage generation circuit including: a transistor having a source follower configuration for outputting a voltage applied to a gate thereof; and a current limiting circuit for limiting a maximum current of the transistor having the source follower configuration for outputting the voltage applied to the gate thereof, to thereby suppress a maximum current supplied to the logic circuit and suppress current consumption. | 08-16-2012 |
20120235733 | DETECTOR CIRCUIT - A detector circuit, has a first diode, to an anode of which an AC signal is input and to which a constant voltage is supplied, a second diode, to an anode of which the constant voltage is supplied, and a difference current generation circuit, which generates the difference current between a first current flowing in the first diode and a second current flowing in the second diode. | 09-20-2012 |
20120262227 | REFERENCE CURRENT GENERATION CIRCUIT AND POWER DEVICE USING THE SAME - There is provided a reference current generation circuit, including a reference voltage generation unit configured to generate a reference voltage by using a depression type transistor, and a voltage/current conversion unit configured to generate a reference current from the reference voltage. | 10-18-2012 |
20130027122 | ON-CHIP ACTIVE DECOUPLING CAPACITORS FOR REGULATING VOLTAGE OF AN INTEGRATED CIRCUIT - On-chip active decoupling capacitors for regulating the voltage of an integrated circuit include a reference voltage generator, a latch-based comparator and switched DECAPs. The latched-based comparator is for comparing a reference voltage generated by the reference voltage generator and a supply voltage of the integrated circuit and outputting a comparison result. The switched DECAPs includes at least two capacitors and a plurality of switches, and coupling the at least two capacitors into a parallel configuration to sink current or a series configuration to source current based on the comparison result output by the latch-based comparator. The aforementioned on-chip active decoupling capacitors not only have lower power consumption, but also larger detection range. | 01-31-2013 |
20130069714 | SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE - A semiconductor device and a method of operating the semiconductor device. The semiconductor device includes a voltage generator configured to generate a test voltage, a graphene transistor configured to receive a gate-source voltage based on the test voltage, and a detector configured to detect whether the gate-source voltage is a Dirac voltage of the graphene transistor, and output a feedback signal applied to the voltage generator indicating whether the gate-source voltage is the Dirac voltage. | 03-21-2013 |
20130082765 | SEMICONDUCTOR DEVICE AND SIP DEVICE USING THE SAME - A semiconductor device includes a logic circuit and an active element circuit. The logic circuit is provided with semiconductor elements formed in a semiconductor substrate. The active element circuit is provided with transistors formed using semiconductor layers formed over a diffusion insulating film formed above a semiconductor substrate. The active element circuit is controlled by the logic circuit. | 04-04-2013 |
20130088286 | METHOD OF GENERATING MULTIPLE CURRENT SOURCES FROM A SINGLE REFERENCE RESISTOR - A differential voltage controlled current source generating one or more output currents is based upon a single external resistor. The differential voltage controlled current source may generate an output current that is proportional to a received differential voltage and a bias current with the use of a single external resistor. The technique may be used to generate multiple accurate and process independent current sources. The current sources may be a zero temperature coefficient (ZTC) current, a proportional to absolute temperature (PTAT) current, or an inversely proportional to absolute temperature (NTAT) current. The output of the current sources may be inversely proportional to the resistance of the external resistor. | 04-11-2013 |
20130113549 | Variable Capacitor Circuit and Method - A variable capacitor circuit is disclosed. The variable capacitor circuit includes a plurality of MOS capacitors, each MOS capacitor being implemented by a MOS transistor with the gate terminal connected to a first voltage signal and with the drain terminal shorted with the source terminal and connected to a second voltage signal, said MOS capacitors being connected in parallel through the gate terminal connected to the first voltage signal, and being operated in a cut-off region in which the equivalent capacitance of each MOS capacitor remains substantially constant for variations of the first voltage signal. | 05-09-2013 |
20130147545 | REFERENCE VOLTAGE GENERATION CIRCUIT AND INTERNAL VOLTAGE GENERATION CIRCUIT USING THE SAME - A reference voltage generation circuit includes a current source configured to generate a current by compensating for an internal temperature change, and output the generated current to an output node where a reference voltage is generated, and a resistor unit coupled to the output node and having a resistance value controlled in response to a control signal generated in a test mode. | 06-13-2013 |
20130214854 | SEMICONDUCTOR DEVICE AND METHOD OF DRIVING THE SAME - Provided is a semiconductor device, including an electrode, a first insulator, a first semiconductor having a bandgap of 2 eV or greater, a second insulator, and a second semiconductor, which are stacked on one another, and at least further including one or more electrodes in contact with the first semiconductor and two or more electrodes in contact with the second semiconductor. | 08-22-2013 |
20130271208 | GROUP III-N TRANSISTORS FOR SYSTEM ON CHIP (SOC) ARCHITECTURE INTEGRATING POWER MANAGEMENT AND RADIO FREQUENCY CIRCUITS - System on Chip (SoC) solutions integrating an RFIC with a PMIC using a transistor technology based on group III-nitrides (III-N) that is capable of achieving high F | 10-17-2013 |
20140015601 | POWER SUPPLY CIRCUIT - A power supply circuit to supply an internal voltage to an output node includes: a pull-up driver, in response to a result obtained by comparing the internal voltage to a first reference voltage, configured to generate the internal voltage from a power supply voltage, a pull-down driver, in response to a result obtained by comparing the internal voltage to a second reference voltage, configured to discharge the internal voltage, a pull-up drive blocking unit configured to block the pull-up driver from being driven, in response to the result obtained by comparing the internal voltage to the second reference voltage, and a pull-down drive blocking unit configured to block the pull-down driver from being driven, in response to the result obtained by comparing the internal voltage to the first reference voltage. | 01-16-2014 |
20140028386 | OUTPUT BUFFER AND SEMICONDUCTOR DEVICE - An output buffer has a first transistor and a voltage mitigation second transistor. The first transistor is configured to generate a voltage value corresponding to the power-supply voltage in response to an input signal. The second transistor is provided between an output line and the first transistor. A gate terminal of the second transistor is applied with a power-supply bias voltage which turns the second transistor on and makes a voltage between gate and source terminals of the second transistor constant in accordance with a power-supply voltage. | 01-30-2014 |
20140062584 | Semiconductor Integrated Circuit - A semiconductor integrated circuit includes a first internal voltage generator including a PMOS and a first comparator, and a second internal voltage generator including an NMOS, a second comparator, and a voltage pump generator configured to provide a pumping power voltage to the second comparator. A power control circuit switchably enables an output from the first internal voltage generator during a power-on of the semiconductor integrated circuit and enables an output from the second internal voltage generator after the power-on. | 03-06-2014 |
20140062585 | Circuit Arrangement with a First Semiconductor Device and with a Plurality of Second Semiconductor Devices - A circuit arrangement includes a first semiconductor device having a load path and a number of second semiconductor devices. Each second semiconductor device has a control terminal and a load path between a first load terminal and a second load terminal. The second semiconductor devices have their load paths connected in series and connected in series with the load path of the first semiconductor device. Each of the second semiconductor devices has a load terminal of one of the first semiconductor device and of one of the second semiconductor devices associated thereto and a voltage limiting element coupled between the control terminal of one of the second semiconductor devices and the load terminal associated with that one of the second semiconductor devices. | 03-06-2014 |
20140070877 | LIMITING CIRCUIT FOR A SEMICONDUCTOR TRANSISTOR AND METHOD FOR LIMITING THE VOLTAGE ACROSS A SEMICONDUCTOR TRANSISTOR - A limiting circuit for at least one semiconductor transistor. The circuit includes a limiting path which is coupled between a first power terminal and a second power terminal of the semiconductor transistor. The limiting path includes a limiting transistor. A node of the limiting path located between the limiting transistor and the second power terminal of the semiconductor transistor is coupled to a control terminal of the semiconductor transistor. A voltage source is coupled to the control terminal of the limiting transistor and is designed to apply a control voltage to said control terminal of the limiting transistor. The control voltage corresponds to a critical voltage for the voltage between the first power terminal and the second power terminal of the semiconductor transistor. The limiting transistor is switched to a conductive state when said critical voltage is exceeded at a power terminal of said limiting transistor. | 03-13-2014 |
20140152381 | RECONFIGURABLE SWITCHED-CAPACITOR VOLTAGE CONVERTER CIRCUIT, INTEGRATED CIRCUIT (IC) CHIP INCLUDING THE CIRCUIT AND METHOD OF SWITCHING VOLTAGE ON CHIP - A configurable-voltage converter circuit that may be CMOS and an integrated circuit chip including the converter circuit and method of operating the IC chip and circuit. A transistor totem, e.g., of 6 or more field effect transistors, PFETs and NFETs, connected (PNPNPN) between a first supply (V | 06-05-2014 |
20140184317 | ELECTRONIC DEVICE TO CONTROL VOLTAGE FLUCTUATIONS - An electronic device may include a power delivery system to provide a voltage, and an integrated circuit having a processor to receive the voltage. When the received voltage exceeds a prescribed value, the integrated circuit to perform an act to consume current from the power delivery system. | 07-03-2014 |
20140232455 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first semiconductor chip which includes a first power supply terminal and into which a circuit block which is operated by a power supply voltage supplied to the first power supply terminal is integrated, a power circuit that includes switching transistors and supplies the power supply voltage to the first power supply terminal, and a DCDC control unit that is formed on the first semiconductor chip and generates a control signal for controlling the turning on and off of the switching transistors in response to an information signal from the circuit block and a voltage information signal corresponding to an output voltage from the power circuit. | 08-21-2014 |
20140240038 | REFERENCE VOLTAGE GENERATION CIRCUIT - Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits ( | 08-28-2014 |
20140247087 | Current Control for Output Device Biasing Stage - Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher than the output voltage and regulates the drain-source voltage of the biasing device. The disclosure reduces power consumption in a driver stage in case the supply voltage is not higher than the output voltage. | 09-04-2014 |
20140292398 | Systems and Methods for Generation of Internal Chip Supply Bias from High Voltage Control Line Inputs - Systems and methods for generating internal chip supply bias from high voltage control line inputs are presented. One of a plurality of the high voltage control lines is selected and accordingly internal path switching circuitry is enabled to pass the selected high voltage control line while protecting the associated components from over-stress. | 10-02-2014 |
20140306751 | BIAS CIRCUIT - A bias circuit includes: a reference current generation circuit that has a first reference-current element disposed in a first current path and has a second reference-current element disposed in a second current path; a first current mirror circuit that has a first transistor connected in series with the first reference-current element and has a second transistor connected in series with the second reference-current element; a third reference-current element disposed in a third current path disposed between the power supply terminal and the reference-current element; a third transistor connected in series with the third reference-current element; a bypass capacitor connected between the power supply terminal and a second node connected to a control terminal of the third transistor; an activation circuit connected to the first node; and a first switch connected between the first node and the second node. | 10-16-2014 |
20140333370 | OUTPUT CIRCUIT AND VOLTAGE SIGNAL OUTPUT METHOD - An output circuit includes: a first PMOS transistor and a second PMOS transistor connected in series between a high potential side power supply and an output node;
| 11-13-2014 |
20140340143 | All-CMOS, Low-voltage, Wide-temperature Range, Voltage Reference Circuit - A CMOS voltage reference is disclosed. The CMOS voltage reference may include a PTAT current bias circuit including a start-up circuit, a core module implementing high order non-linear curvature compensation and an output stage supplying the reference voltage. The CMOS voltage reference may include a PTAT current bias circuit having a start-up and a CTAT feedback loop and a PTAT feedback loop and a compensating circuit summing the current from the CTAT feedback loop and the PTAT feedback loop. | 11-20-2014 |
20150070087 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a first power supply line to which an input power supply voltage is to be applied, a second power supply line configured to supply a bias voltage to a load circuit, a MOS transistor having a source-drain current path connected between the first and second power supply lines, an NMOS transistor having a source-drain current path connected between the first and second power supply lines, and a control circuit configured to generate a first control signal that is supplied to a gate electrode of the PMOS transistor at a first point in time, and a second control signal that is boosted to have a voltage level higher than the input power supply voltage and then supplied to a gate electrode of the NMOS transistor at a second point in time point that is after the first point in time. | 03-12-2015 |
20150123728 | MEMORY EFFECT REDUCTION USING LOW IMPEDANCE BIASING - A circuit includes a bias circuit for a biased transistor. The bias circuit includes a master-slave source follower circuit, a reference transistor, and a bias circuit voltage output coupled to the biased transistor and configured to provide a bias voltage. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. A signal ground circuit may be coupled between the biased transistor and one or more components of the bias circuit that do not generate significant return currents to a power supply ground. A method includes generating a current in a reference transistor according to a first voltage generated using a master source follower circuit, generating a second voltage substantially identical to the first voltage using a slave source follower circuit, and providing the second voltage to a biased transistor. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. | 05-07-2015 |
20150123729 | VOLTAGE REGULATING CIRCUIT - In various embodiments, a circuit is provided including a supply terminal, a logic circuit, an inverter and a control transistor which may include a body region, first and second source/drain regions, a gate insulating region having a layer thickness and a gate region. The first source/drain region may be coupled to the supply terminal. The logic circuit may have an internal supply terminal connected to the second source/drain region of the control transistor and a plurality of transistors each having a gate insulating region having a second layer thickness. The inverter input may be coupled to the internal supply terminal of the logic circuit and the output to the gate region of the control transistor. The inverter may include a transistor with a gate insulating region having a third layer thickness substantially equal to the first and second layer thicknesses | 05-07-2015 |
20150137880 | SYSTEM FOR BALANCING THE VOLTAGE OF SERIES-CONNECTED SEMICONDUCTOR ELEMENTS - A circuit for balancing a voltage across a semiconductor element series-connected with other semiconductor elements of the same type may include a comparator configured to compare data representative of a voltage across the semiconductor element with a reference voltage, and a resistive element of adjustable value and configured to be controlled by the comparator. | 05-21-2015 |
20150293546 | ACTIVE-MATRIX SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME - A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate ( | 10-15-2015 |
20150303924 | SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE - A semiconductor device includes a first semiconductor chip operating at a first power supply voltage and a second semiconductor chip operating at a second power supply voltage lower than the first power supply voltage to supply the second power supply voltage to the first semiconductor chip. The semiconductor chips according to the present invention are conveniently used for fabrication of the semiconductor device. The first semiconductor chip includes an output circuit including a first transistor and a second transistor, interconnected in series and turned on or off complementarily. The output circuit outputs a signal to a first external output terminal. The first semiconductor chip also includes a third transistor connected in series with the first and second transistors and having a gate electrode connected to a second output terminal. The entire chip area is reduced, as compared with the case where plural semiconductor chips, operated at different operating voltages, are interconnected and used as such in a semiconductor device provided with an input/output buffer operating at a voltage different from the respective operating voltages resulting in an increased chip area. | 10-22-2015 |
20150326208 | DIFFERENTIAL REFERENCE SIGNAL DISTRIBUTION METHOD AND SYSTEM - In a reference signal distribution system, a first subsystem is configured to distribute a reference signal to a second subsystem. The first subsystem includes multiple diode-connected devices biased by a reference current and configured to establish a differential voltage between a first node and a second node. The second subsystem includes multiple diode-connected devices driven by the differential voltage and configured to generate a copy current associated with the reference current. | 11-12-2015 |
20150331438 | COMPLETE POWER MANAGEMENT SYSTEM IMPLEMENTED IN A SINGLE SURFACE MOUNT PACKAGE - A complete power management system implemented in a single surface mount package. The system may be drawn to a DC to DC converter system and includes, in a leadless surface mount package, a driver/controller, a MOSFET transistor, passive components (e.g., inductor, capacitor, resistor), and optionally a diode. The MOSFET transistor may be replaced with an insulated gate bipolar transistor, IGBT in various embodiments. The system may also be a power management system, a smart power module or a motion control system. The passive components may be connected between the leadframe connections. The active components may be coupled to the leadframe using metal clip bonding techniques. In one embodiment, an exposed metal bottom may act as an effective heat sink. | 11-19-2015 |
20150364999 | SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY - A semiconductor integrated circuit includes: a die pad region; a plurality of external lead pins arranged around the die pad region; and DC/DC converters arranged in corners on the die pad region. | 12-17-2015 |
20150370279 | REFERENCE VOLTAGE CIRCUIT - A reference voltage circuit including a constant voltage circuit and a resistance voltage divider circuit. The constant voltage circuit includes a Zener diode, and a bias current circuit connected in series with the Zener diode and causing a constant current to flow into the Zener diode. The resistance voltage divider circuit is connected in parallel with the Zener diode, and includes first and second resistors connected in series. The first resistor is connected to a cathode side of the Zener diode, and is formed of a low temperature coefficient resistor body that is temperature-independent. The second resistor is connected to an anode side of the Zener diode, and is formed of a resistor body having temperature characteristics that are the reverse of output temperature characteristics of the Zener diode. | 12-24-2015 |
20150378375 | Cascode Circuit - An electronic circuit includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a load path and an internal voltage divider with a voltage divider tap. The second semiconductor device includes a load path and a control node. The first semiconductor device and the second semiconductor device have their load paths connected in series. The voltage divider tap of the first semiconductor device is coupled to the control node of the second semiconductor device. | 12-31-2015 |
20160011620 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE HAVING BULK BIAS CONTROL FUNCTION AND METHOD OF DRIVING THE SAME | 01-14-2016 |
20160048146 | INTERNAL VOLTAGE GENERATING APPARATUS - An internal voltage generating apparatus is provided. A regulating unit detects whether an internal voltage is lower than a threshold voltage, and outputs a compensation current provided by a first power pad to a second power line connected with a second power pad when the internal voltage is lower than the threshold voltage, so as to regulate the internal voltage provided by the internal voltage generating apparatus. | 02-18-2016 |
20160070289 | VOLTAGE GENERATING CIRCUIT - A voltage generating circuit includes a voltage control circuit that includes an output section and a reference voltage terminal to which a reference voltage is supplied, and outputs a voltage to the output section which is controlled so as to be equal to a voltage of the reference voltage terminal, a first voltage dividing MOS transistor having a first end connected to the output section, and a second voltage dividing MOS transistor having a first end connected to a second end of the first voltage dividing MOS transistor. The voltage generating circuit further includes an auxiliary circuit having a set terminal to which an enable signal is supplied. In response to the enable signal, the auxiliary circuit outputs a first target voltage to the first end of the first voltage dividing MOS transistor and outputs a second target voltage to the first end of the second voltage dividing MOS transistor. | 03-10-2016 |
20160072486 | SENSE AMPLIFIER WITH IMPROVED MARGIN - One aspect of the technology is an integrated circuit, comprising a bias circuit and a sense amplifier. The bias circuit has a diode-connected transistor and a first bias voltage. The first bias voltage is represented by a first term inversely dependent on a first mobility of charge carriers of the diode-connected transistor and inversely dependent on a first gate-to-channel dielectric capacitance of the diode-connected transistor. The sense amplifier is coupled to another transistor that has a gate coupled to the first bias voltage of the bias circuit. | 03-10-2016 |
20160087533 | Slab Inductor Device Providing Efficient On-Chip Supply Voltage Conversion And Regulation - A method is disclosed to operate a voltage conversion circuit such as a buck regulator circuit that has a plurality of switches coupled to a voltage source; a slab inductor having a length, a width and a thickness, where the slab inductor is coupled between the plurality of switches and a load and carries a load current during operation of the plurality of switches; and a means to reduce or cancel the detrimental effect of other wires on same chip, such as a power grid, potentially conducting return current and thereby degrading the functionality of this slab inductor. In one embodiment the wires can be moved further away from the slab inductor and in another embodiment magnetic materials can be used to shield the slab inductor from at least one such interfering conductor. | 03-24-2016 |
20160161969 | SEMICONDUCTOR DEVICE - A semiconductor device may include: a first reference voltage generation unit: suitable for outputting an external voltage as a first reference voltage and clamping the first reference voltage based on a preset voltage in a positive direction from a ground voltage; a first internal voltage generation unit suitable for receiving the external voltage to drive an internal voltage terminal with a drivability corresponding to the first reference voltage; and a second internal voltage generation unit suitable for receiving the external voltage to drive the internal voltage terminal based on a second reference voltage greater than the preset voltage in the positive direction from the ground voltage. | 06-09-2016 |
20160197549 | METHOD FOR CONTROLLING AN ELECTRONIC CIRCUIT | 07-07-2016 |
20160254744 | THREE-D POWER CONVERTER IN THREE DISTINCT STRATA | 09-01-2016 |
20160378129 | POWER SUPPLY VOLTAGE DETECTION CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, AND ELECTRONIC DEVICE - A power supply voltage detection circuit can detect the power supply voltage obtained by stabilizing a power supply voltage supplied from outside and also the magnitude of the power supply voltage before being stabilized. This power supply voltage detection circuit includes a selection circuit that selects one power supply potential from among a plurality of power supply potentials including a first power supply potential supplied from outside and a second power supply potential obtained by stabilizing the first power supply potential, a variable voltage dividing circuit that divides the voltage between the power supply potential selected by the selection circuit and a reference potential by a set division ratio, a comparison voltage generation circuit that generates a comparison voltage based on a reference voltage, and a comparator that compares the voltage divided by the variable voltage dividing circuit with the comparison voltage and outputs a signal representing a comparison result. | 12-29-2016 |
20180024584 | VOLTAGE SOURCE | 01-25-2018 |
20220137658 | SEMICONDUCTOR DEVICE WITH REFERENCE VOLTAGE CIRCUIT - Provided is a semiconductor device with a reference voltage circuit including an enhancement type transistor having P-type polycrystalline silicon as a first gate electrode, and a depletion type transistor having N-type polycrystalline silicon as a second gate electrode, in which the enhancement type transistor has an impermeable film that is locally provided to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and a nitride film that has an opening portion which is provided larger than the first gate electrode and smaller than the impermeable film, and is provided to cover a periphery of the impermeable film, and the depletion type transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type transistor without a gap. | 05-05-2022 |