Class / Patent application number | Description | Number of patent applications / Date published |
327403000 | Parallel controlled paths | 36 |
20080265977 | High isolation electronic multiple pole multiple throw switch - A high isolation electronic multiple pole multiple throw (MPNT) switching device is formed as a ring circuit that includes plural poles, plural throws, plural series switches and plural means for shunting. Each series switch receives a control signal, and each means for shunting receives shunt control signals. In one aspect, the shunt control signals include control signals received by distant series switches. In another aspect, the shunt control signals include control signals received by adjacent series switches. In another aspect, the shunt control signals include signals complementary to signals received by adjacent series switches. In another aspect, the shunt control signals include pole DC potentials or throw DC potentials. In another aspect, a switching device may operate in multiple transmission mode or multiple input multiple output (MIMO) mode. The MPNT switching device provides low insertion loss and high isolation at a wide range of frequencies. | 10-30-2008 |
20090206908 | Radio Frequency Switch - An RF switch includes first, second and third transmission lines for forming ports, respectively, and first, second and third slot line pattern portions connected to one another, for transferring signals to the first, second and third transmission lines, respectively. The first slot line pattern portion has a slot line pattern for transferring a signal received from the first transmission line to a connection point with the other slot line pattern portions, and a switching circuit for shorting the gap of a corresponding slot line and thus blocking the signal transfer. The second slot line pattern portion includes a loop slot line formed by a first and a second half loop slot line, a second sub-slot line for transferring a signal received from the connection point to the second transmission line through the loop slot line, and a switching circuit for shorting the gap of a corresponding slot line. | 08-20-2009 |
20090256620 | PROGRAMMABLE SIGNAL ROUTING - A distributed signal multiplexer circuit programmably routes electronic signals. The circuit includes at least two distributor subcircuits. Each distributor subcircuit is configured to connect an input port to an output port through a switch, with a state of each switch being controlled by information received at a control port. The first and second distributor subcircuits are part of a first and second power domain, respectively. The distributed multiplexer circuit also includes an aggregator subcircuit. The aggregator subcircuit is configured to have a first input port connected with the output port of the first distributor subcircuit, a second input port connected to the output port of the second distributor subcircuit, and the output port signal being a signal selected from among the signals received at the input ports of the distributor subcircuits. | 10-15-2009 |
20100019827 | INTEGRATED CIRCUIT - An integrated circuit includes a bypass signal path exchanging, between transceivers which are included in the integrated circuit, a signal transmitted/received between a transceiver of the transceivers and an internal logic circuit which processes data being input/output by transceiver with bypassing the internal logic circuit, a switch switching a pathway of the bypass signal path, and a switch changeover controller transferring a switch control signal that performs a changeover of the switch. | 01-28-2010 |
20100033230 | "OUTPUT STAGE HAVING ZENER VOLTAGE BALANCING" - An output stage, especially a switching output stage for switching inductive loads, having a plurality of individual output stages that are connected in parallel, which include degenerative transistors, in the degenerative path of which one respective Zener diode is present. The electric power during a switching-off process can be distributed in a particularly uniform manner to the individual output stages or transistors by disposing the Zener diodes near the associated transistors so that they are thermally coupled to the respectively associated transistor and their Zener voltage increases with increasing temperature. | 02-11-2010 |
20100231285 | MIPI ANALOG SWITCH FOR AUTOMATIC SELECTION OF MULTIPLE IMAGE SENSORS - An MIPI interface is connected to two sensor sources that each may be transferring both high and low speed information, typically video information in the high speed state. The clock signals are monitored and when one of the clock signals exceed a threshold, an analog switch between the MIPI interface and the sensors, may connect the other source to the MIPI interface. | 09-16-2010 |
20110163792 | HIGH FREQUENCY SWITCH - Provided is a high frequency switch wherein first switch circuits, each of which includes a first PIN diode, are connected in parallel to one or more first λ/4 signal transmitting paths which transmit transmitting signals, and second switch circuits, each of which includes a second PIN diode, are connected in parallel to one or more second λ/4 signal transmitting paths which transmit receiving signals to a receiving terminal. A first control voltage is applied to the cathode of the first PIN diode, and a second control voltage is applied to the cathode of the second PIN diode. Furthermore, a biasing circuit which applies a constant bias voltage is connected to each anode of the first PIN diode and the second PIN diode. | 07-07-2011 |
20110175668 | Cascode Switching Circuit - A switch circuit is disclosed. The switch circuit may include one or more arrangements of transistors coupled in a cascode configuration. The transistors used to implement the switch circuit may be configured for operation within a first range of voltages. The application in which the switch circuit may be implemented may require conveying signals within a second range of voltages that is greater than the first range of voltages. Thus, the switch circuit may include one or more additional transistors to ensure that a voltage drop between any two terminals of the transistors used in the switch circuit is within the first range of voltages. | 07-21-2011 |
20120286846 | SWITCHING CIRCUIT - A switching circuit employs switches operating at low on resistance and high off capacitance. In connection with various example embodiments, a switching circuit selectively couples a communication port to one of two or more internal circuits based upon a type of input at the communication port. A sensor circuit senses the type of the input and, based upon the sensed input type, actuates one or more switches in the switching circuit. | 11-15-2012 |
20120326764 | MIPI ANALOG SWITCH FOR AUTOMATIC SELECTION OF MULTIPLE IMAGE SENSORS - An MIPI interface is connected to two sensor sources that each may be transferring both high and low speed information, typically video information in the high speed state. The clock signals are monitored and when one of the clock signals exceed a threshold, an analog switch between the MIPI interface and the sensors, may connect the other source to the MIPI interface. | 12-27-2012 |
20130002334 | INTEGRATED CIRCUIT, ELECTRONIC DEVICE AND METHOD FOR CONFIGURING A SIGNAL PATH FOR A TIMING SENSITIVE SIGNAL - An integrated circuit comprising at least one signal path for a timing sensitive signal. At least one section of the signal path comprises a first section path comprising a first propagation timing factor, at least one further section path comprising a second propagation timing factor different to the first propagation timing factor, and a path selection component arranged to enable the selection of one of the first and at least one further section paths via which the timing sensitive signal is to propagate through the at least one section of the signal path based on at least one from a group consisting of: the first propagation timing factor, second propagation timing factor. | 01-03-2013 |
20130038377 | POOLED-RESOURCE ARCHITECTURE WITH ASYNCHRONOUS PACKET-BASED COMMUNICATION - A chip includes a pool of blocks. Each block is adapted to implement a communication protocol. A cross-connect configurably connects between the blocks. A configured connection through the cross-connect between a sending block and a receiving block includes a lane with a toggle line and multiple data lines. The receiving block uses the toggle line to determine when valid data is on the data lines. The sending block and receiving block are on different clock domains. | 02-14-2013 |
20130257512 | METHODS AND STRUCTURE FOR UTILIZING EXTERNAL INTERFACES USED DURING NORMAL OPERATION OF A CIRCUIT TO OUTPUT TEST SIGNALS - Methods and structure are provided for routing internal operational signals of a circuit for output via an external interface. The structure includes an integrated circuit. The integrated circuit comprises a block of circuitry components operable to generate internal operational signals for performing designated functions during normal operation of the circuit, a control unit, a test signal routing hierarchy, and an external interface. The test signal routing hierarchy is coupled to receive the internal operational signals and controllably selects the internal operational signals for acquisition and applies them to the control unit. The external interface provides communications between the integrated circuit and an external device during normal operation of the integrated circuit. The control unit receives the selected internal operational signals from the test signal routing hierarchy, and applies the selected internal operational signals to the external interface during normal operation of the integrated circuit. | 10-03-2013 |
20140070870 | Multipurpose Half Bridge Signal Output Circuit - The present invention discloses a multipurpose half bridge signal output circuit. The multipurpose half bridge signal output circuit is capable of selectively operating under a charge sharing mode or a gate pulsing modulation mode. The multipurpose half bridge signal output circuit includes: a first output pin; a second output pin; a first circuit zone having a first common end coupled to the first output pin; and a second circuit zone having a second common end coupled to the second output pin. | 03-13-2014 |
20140077862 | ELECTRICAL NETWORKS AND METHODS OF FORMING THE SAME - Electrical networks are formed to produce an approximation of at least one desired performance characteristic, based on the recognition that fabrication variations introduce slight differences in electronic sub-networks which were intended to be identical. These fabrication differences are turned to an advantage by providing a pool of sub-networks, and then selectively connecting particular combinations of these sub-networks to implement networks that approximate the desired performance characteristics. The sub-networks are of like kind (e.g., resistors) and have a like measure. | 03-20-2014 |
20140266398 | METHOD AND SEMICONDUCTOR APPARATUS FOR REDUCING POWER WHEN TRANSMITTING DATA BETWEEN DEVICES IN THE SEMICONDUCTOR APPARATUS - A semiconductor apparatus is provided herein for reducing power when transmitting data between a first device and a second device in the semiconductor apparatus. Additional circuitry is added to the semiconductor apparatus to create a communication system that decreases a number of state changes for each signal line of a data bus between the first device and the second device for all communications. The additional circuitry includes a decoder coupled to receive and convert a value from the first device for transmission over the data bus to an encoder that provides a recovered (i.e., re-encoded) version of the value to the second device. One or more multiplexers may also be included in the additional circuitry to support any number of devices. | 09-18-2014 |
327404000 | Field-effect transistor | 19 |
20080238527 | Switching Device for Bi-Directionally Equalizing Charge Between Energy Accumulators and Corresponding Methods - A switching device for bi-directionally equalizing charge between energy accumulators, particularly between capacitive energy accumulators in a motor vehicle electric system, includes: an integrated starter generator; a first connection coupled to the integrated starter generator; a second connection coupled to an energy source; a controllable transfer gate having a first load current-conducting path connected between the first and second connection, and a controllable switching controller having a second load current-conducting path connected between the first and second connection in parallel to the first load current-conducting path. There is also provided a motor vehicle electric system with such a switching device, and the implementation and use of a switching controller in a transfer gate for such a switching device. | 10-02-2008 |
20090102538 | ELECTRONICALLY SCANNABLE MULTIPLEXING DEVICE - An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable conducting channel with two oppositely formed depletion regions. The depletion width of each depletion region is controlled by a voltage applied to a respective control gate at each end of the multiplexing device. The present multi-bit addressing technique allows, for example, 10 to 100 bits of data to be accessed or addressed at a single node. The present invention can also be used to build a programmable nanoscale logic array or for randomly accessing a nanoscale sensor array. | 04-23-2009 |
20100019828 | ANALOG MULTIPLEXER WITH INSULATION POWER SUPPLY - An analog multiplexer with an insulated power supply includes: an analog signal transformer receiving an analog signal input in its primary winding via an FET, and ON/OFF driving the FET to generate a pulse with an amplitude of the analog signal in its secondary winding; a drive transformer receiving a drive pulse input in its primary winding via an FET to generate a pulse turning ON/OFF the FET in its secondary winding; an inhibit generation circuit generating an inhibit pulse having a wider pulse width than that of the drive pulse; an AND gate determining a logical product of a continuous pulse from a continuous pulse generation circuit and the inhibit pulse to obtain a power supply pulse train; and a rectifying/smoothing circuit obtaining a direct current voltage corresponding to the power supply pulse train to apply the direct current voltage to the primary winding of the transformer through high resistance. | 01-28-2010 |
20110006829 | ISOLATION CIRCUIT - An isolation circuit is provided. The isolation circuit is coupled to an output and an input node and includes a first set, a second switch set, and a body bias voltage generator. The first switch set couples a switch control node to a second voltage when a first voltage is at a first voltage level, and couples the switch control node to the input node when the first voltage is at a second voltage level. The second switch set couples the output node to the input node when the first voltage is at the first voltage level, and isolates the output node from the input node when the first voltage is at the second voltage level. The body bias voltage generator selectively provides a higher one of the first voltage and a voltage on the input node to a body of the second switch set. | 01-13-2011 |
20110050321 | HIGH VOLTAGE SWITCH IN LOW VOLTAGE PROCESS - A high voltage analog switch operable by a binary signal is implemented in a low voltage semiconductor process. The switch has three parallel circuit paths, with each path comprising at least three series connected transistors. Control signals are selectively applied to the control terminals of the transistors to control the switch and selectively turn on or turn off each of the three circuit paths depending on the input voltage range, so that the breakdown voltage of all of the transistors is never exceeded in any mode of operation. | 03-03-2011 |
20120313687 | CONNECTION APPARATUS - A connection apparatus for controlling the supply of electrical power to a load, the connection apparatus comprising first and second electrically controllable devices connected in parallel to each other and in series with the load; wherein the first and second electrically controllable devices are dissimilar, and where a safe operating area product of voltage, current and safe operating area time for the first device is greater than the product of voltage, current and the same safe operating area time for the second device, and an on state resistance for the second device is less than an on state resistance for the first device, and where a controller is provided to use the first device for a first period of time to power up the load, and thereafter the second device is used to maintain power to the load. | 12-13-2012 |
20130082760 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. | 04-04-2013 |
20130214844 | SWITCH CONTROL CIRCUIT, SEMICONDUCTOR DEVICE, AND RADIO COMMUNICATION DEVICE - A switch control circuit has a first terminal, a second terminal, a third terminal, a serial-parallel converter, a selector, a driver circuit and a tri-state buffer. The serial-parallel converter converts a serial switching control signal inputted from the third terminal into first parallel switching control signals when the first terminal is at a first power-supply potential. The selector selects either the first parallel switching control signals converted by the serial-parallel converter or second parallel switching control signals inputted into the second and third terminals, depending on the potential of the first terminal. The driver circuit converts potential levels of the first parallel switching control signals or the second parallel switching control signals selected by the selector and generates parallel switching control signals with potential levels capable of switching a switch circuit. | 08-22-2013 |
20130257513 | FULLY COMPLEMENTARY SELF-BIASED DIFFERENTIAL RECEIVER WITH STARTUP CIRCUIT - In accordance with at least one embodiment, an improved voltage headroom self-biased receiver is provided. In accordance with at least one embodiment, tail current sources are biased so as to be cross-coupled with respect to each other. In accordance with at least one embodiment, startup control is provided to counter defect-induced current and to ensure the circuit can function properly even with large amounts of defect current. In accordance with at least one embodiment, a positive type (p type) channel metal oxide semiconductor (PMOS) tail current transistor is modulated by a negative type (n type) channel metal oxide semiconductor (NMOS) differential pair virtual negative supply voltage and a NMOS tail current transistor is modulated by a PMOS differential pair virtual positive supply voltage. The amplifier's output common mode is thus self correcting to p type to n type transistor strength differences. | 10-03-2013 |
20130335134 | SEMICONDUCTOR DEVICE AND SYSTEM USING THE SAME - There exists a possibility that a semiconductor device configured with a normally-on JFET and a normally-off MOSFET which are coupled in cascade may break by erroneous conduction, etc. A semiconductor device is configured with a normally-on SiCJFET and a normally-off Si-type MOSFET. The normally-on SiCJFET and the normally-off Si-type MOSFET are coupled in cascade and configure a switching circuit. According to one input signal, the normally-on SiCJFET and the normally-off Si-type MOSFET are controlled so as to have a period in which both transistors are set in an OFF state. | 12-19-2013 |
20140035655 | MATRIX-STAGES SOLID STATE ULTRAFAST SWITCH - A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on. | 02-06-2014 |
20140077863 | SWITCH CONTROL CIRCUIT, SEMICONDUCTOR DEVICE, AND RADIO COMMUNICATION DEVICE - A switch control circuit has a first terminal, a second terminal, a third terminal, a serial-parallel converter, a selector, a driver circuit and a tri-state buffer. The serial-parallel converter converts a serial switching control signal inputted from the third terminal into first parallel switching control signals when the first terminal is at a first power-supply potential. The selector selects either the first parallel switching control signals converted by the serial-parallel converter or second parallel switching control signals inputted into the second and third terminals, depending on the potential of the first terminal. The driver circuit converts potential levels of the first parallel switching control signals or the second parallel switching control signals selected by the selector and generates parallel switching control signals with potential levels capable of switching a switch circuit. | 03-20-2014 |
20140111269 | THROUGH-SILICON VIA SELF-ROUTING CIRCUIT AND ROUTING METHOD THEREOF - A through-silicon via self-routing circuit includes a plurality of through-silicon vias (TSVs) and a plurality of planar die. The plurality of planar die are connected by the plurality of TSVs. And each one of the plurality of planar die includes a built-in self-tester, a built-in self-routing switching network, and a core circuit. The built-in self-tester has a plurality of valid-bit leads and a plurality of through-silicon via leads to connect the plurality of TSVs. The built-in self-routing switching network is connected to the built-in self-tester, for selecting from the plurality of TSVs for conducting. The core circuit has a to plurality of I/O leads linked to the built-in self-routing switching network. | 04-24-2014 |
20140240028 | HIGH VOLTAGE SWITCHING CIRCUITS - The preferred embodiments of the present invention use low voltage transistors to support high voltage switching circuits by connecting low voltage circuits in a stacking configuration. High voltage switching signals are divided into a plurality of small amplitude switching signals before sending into transformers, filters or other circuits. The resulting circuits can support high voltage applications while achieving cost and performance advantages of low voltage circuits. | 08-28-2014 |
20160149570 | POWER CIRCUIT AND ELECTRONIC DEVICE UTILIZING THE SAME - A power circuit for an electronic device includes an input terminal, an output terminal, a voltage transform unit, and a control unit. The control unit controls the voltage transform unit to operate or not operate, according to the input terminal receives a first voltage or a second voltage. The first voltage is transformed to an output voltage, and is output by the output terminal, when the input terminal receives the first voltage. The second voltage is transmitted from the input terminal to the output terminal through the third switch unit, when the input terminal receives the second voltage. Therefore, the power circuit can receive the first voltage or the second voltage through the input terminal, and outputs the output voltage to other electronic components. | 05-26-2016 |
20160164494 | SEMICONDUCTOR DEVICE AND METHOD FOR ADJUSTING IMPEDANCE OF OUTPUT CIRCUIT - An impedance adjustment circuit includes a counter circuit outputting a count value thereof as a plurality of first impedance adjustment signals, a mode selection circuit setting a second impedance adjustment signal to be in an active/inactive state irrespective of the count value, and a level fixing circuit fixing a third impedance adjustment signal to be in an active state. A pre-stage circuit generates a plurality of first output control signals, a second output control signal, and a third output control signal in response to the first impedance adjustment signals, the second impedance adjustment signal, and the third impedance adjustment signal, respectively, and a data signal. An output circuit includes a plurality of first transistors, a second transistor, and a third transistor connected in parallel to each other between an output terminal and a first power supply wiring. Control terminals of the first transistors, the second transistor, and the third transistor receive the first output control signals, the second output control signal, and the third output control signal, respectively. | 06-09-2016 |
20160191054 | Independent Control of Branch FETs for RF Performance Improvement - A FET-based RF switch architecture and method that provides for independent control of FETs within component branches of a switching circuit. With independent control of branch FETs, every RF FET in an inactive branch that is in an “open” (capacitive) state can be shunted to RF ground and thus mitigate impedance mismatch effects. Providing a sufficiently low impedance to RF ground diminishes such negative effects and reduces the sensitivity of the switch circuit to non-matched impedances. | 06-30-2016 |
20160204213 | SEMICONDUCTOR DEVICE | 07-14-2016 |
20160204777 | CONTROL CIRCUIT FOR SOLID STATE POWER CONTROLLER | 07-14-2016 |
327405000 | Bipolar transistor | 1 |
20130162324 | CONTROL CIRCUIT FOR CONNECTOR - A circuit for controlling a connector to transmit data according to Low Pin Count (LPC) protocol or Joint Test Action Group (JTAG) protocol includes a switch unit, first and second electronic switches, and first and second switch chips. When the switch unit outputs a high level signal to the first electronic switch, the connector transmits data according to LPC protocol. When the switch unit outputs a low level signal to the first electronic switch, the connector transmits data according to JTAG protocol. | 06-27-2013 |