| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 327361000 | Summing | 55 |
| 20090039943 | MIXER AND TRANSCEIVER HAVING THE MIXER - Provided are a mixer and a transceiver having the mixer. The mixer includes: an local oscillation (LO) differential signal generator converting an input LO signal into a differential signal; and a mixing unit receiving the LO differential signal as a first input and a first signal having a first frequency as a second input and performing differential amplification on the LO differential signal and the first signal to output a second signal having a second frequency. | 02-12-2009 |
| 20090153221 | POLYPHONIC SOUND GENERATING METHOD - Method of driving an acoustic piezoelectric transducer ( | 06-18-2009 |
| 20090237140 | Voltage Adder Using Current Source - A voltage adder includes a first amplifier, a feedback resistor, and a control current source. The first amplifier includes a first input terminal to which a first voltage is input, a second input terminal connected to a feedback node, and an output terminal connected to an output node. The feedback resistor is connected between the output node and the feedback node. The control current source allows an addition current corresponding to a second voltage to flow through the feedback resistor. | 09-24-2009 |
| 20090243699 | SYSTEM AND METHOD OF COMPANDING AN INPUT SIGNAL OF AN ENERGY DETECTING RECEIVER - An apparatus configured as a compandor to achieve a defined dynamic range for an output signal in response to an input signal. In particular, the apparatus comprises a first circuit adapted to generate a first signal from the input signal, wherein the first signal includes a first dynamic range (e.g., a first sensitivity and first compression point); and a second circuit adapted to generate a second signal from the input signal, wherein the second signal includes a second dynamic range (e.g., a second sensitivity and second compression point) that is different from the first dynamic range of the first signal. The apparatus may further include a third circuit adapted to generate an output signal related to a sum of the first and second signals. By adjusting the first and second dynamic ranges, an overall dynamic range for the output signal of the companding apparatus may be achieved. | 10-01-2009 |
| 20090243700 | MIXER CIRCUIT FOR FREQUENCY MIXING OF DIFFERENTIAL SIGNALS - A mixer circuit designed for low voltage operation with rail-to-rail local signals. First and second transistors form a first input section to produce a first signal. Third and fourth transistors form a second input section to produce a second signal. Fifth and sixth transistors form a third input section to produce a third signal. Seventh and eighth transistors form a fourth input section to produce a fourth signal. A differential RF input signal drives the first, third, fifth, and seventh transistors, while a differential local signal drives the second, fourth, sixth, and eighth transistors. Ninth and tenth transistors form a positive output section to produce a non-inverted output signal. Eleventh and twelfth transistors form a negative output section to produce an inverted output signal. The ninth to twelfth transistors are driven by the first to fourth signals, respectively. | 10-01-2009 |
| 20090278588 | LOW VOLTAGE MIXER WITH IMPROVED GAIN AND LINEARITY - A frequency mixing apparatus with improved voltage gain and linearity is provided. The frequency mixing apparatus includes a transconductor, a separator, and a switching unit. A voltage gain of the transconductor is controllable, and the transconductor converts a Radio Frequency (RF) signal into a current signal under control of a self bias. The separator transfers the current signal to the switching unit. The switching unit outputs a signal having a frequency corresponding to one of a sum and a difference of a frequency of the RF signal and a frequency of a Local Oscillation (LO) signal by performing a switching operation according to the LO signal. | 11-12-2009 |
| 20090302925 | ORTHOGONAL SIGNAL OUTPUT CIRCUIT - An orthogonal signal output circuit having an error correction function for correcting an orthogonal error, including: first and second differential circuits; and first to fourth variable resistors, wherein the first variable resistor is connected to a positive output of the first differential circuit and a positive output of the second differential circuit; the second variable resistor is connected to the positive output of the first differential circuit and a negative output of the second differential circuit; the third variable resistor is connected to a negative output of the first differential circuit and the positive output of the second differential circuit; and the fourth variable resistor is connected to the negative output of the first differential circuit and the negative output of the second differential circuit. | 12-10-2009 |
| 20090315611 | QUADRATURE MIXER CIRCUIT - A mixer is disclosed. In one embodiment, the mixer includes a polyphase filter that generates linear quadrature signals. The mixer also includes a potentiometric mixer that performs a frequency-conversion operation on the quadrature signal. According to the embodiments disclosed herein, the output of the potentiometric mixer has high linearity. | 12-24-2009 |
| 20100026368 | HIGH Q TRANSFORMER DISPOSED AT LEAST PARTLY IN A NON-SEMICONDUCTOR SUBSTRATE - An assembly involves an integrated circuit die that is bonded, e.g., flip-chip bonded, to a non-semiconductor substrate by a plurality of low-resistance microbumps. In one novel aspect, at least a part of a novel high-frequency transformer is disposed in the non-semiconductor substrate where the non-semiconductor substrate is the substrate of a ball grid array (BGA) integrated circuit package. At least one of the low-resistance microbumps connects the part of the transformer in the substrate to a circuit in the integrated circuit die. At two gigahertz, the novel transformer has a coupling coefficient k of at least at least 0.4 and also has a transformer quality factor Q of at least ten. The novel transformer structure sees use in coupling differential outputs of a mixer to a single-ended input of a driver amplifier in a transmit chain of an RF transceiver within a cellular telephone. | 02-04-2010 |
| 20100066429 | POWER SUPPLY VOLTAGE FORMING DEVICE AND POLAR MODULATION TRANSMISSION DEVICE - Provided is a power voltage forming device which can correct an offset voltage of a high-frequency power amplifier without degrading distortion characteristic of a high-frequency power amplifier. The power voltage forming device ( | 03-18-2010 |
| 20100117712 | MIXER WITH SHORTING SWITCH - A double-balanced mixer is provided having a shorting switch connecting the signal inputs to the mixer core. A timer circuit provides pulses to close the switch, thereby shorting those inputs at times when the switches of the mixer core are switching. This is done because non-linear components in the output are produced at those times and therefore they can be removed if the signal input is shorted at those times. | 05-13-2010 |
| 20100164596 | MULTIVALUED LOGIC CIRCUIT - In a bridge adder circuit, a first and a second complementary pair of current mirrors is connected between the input terminals and a positive and a negative supply voltage bus, respectively, to control a first and a second push-pull output stage. The outputs of the push-pull output stages are connected to the respective inputs through first resistors and to a common output node through second resistors. As a result, a universal circuit element for a multivalued logic element, such as ternary logic or 5-valued logic is provided. | 07-01-2010 |
| 20100176867 | Noise Generator - A noise generator for generating band-limited noise from a plurality of sinusoidal signals at the same level and equidistant frequency position in the noise spectrum is provided. A noise signal has a low crest factor and for this purpose the phase position of each individual sinusoidal signal is determined. | 07-15-2010 |
| 20100214003 | Signal Transformation Arrangement and Method for Signal Transformation - A signal transformation arrangement comprises a first input tap ( | 08-26-2010 |
| 20100219876 | FM Tone Rejection - An interference rejection unit for at least partially rejecting a narrowband interferer from an input signal, the unit comprising: an interferer detector for detecting the phase of an interferer in the input signal; a signal generator for generating a cancellation signal in dependence on the phase detected by the interferer detector; and a signal combiner for combining the input signal with the tone cancellation signal to generate an output signal in which the interferer is at least partially cancelled from the input signal. | 09-02-2010 |
| 20100225374 | LOW NOISE MIXER - One embodiment relates to a mixer for providing a mixed output signal. The mixer includes a radio-frequency (RF) stage, first and second power dividers, and first and second frequency-conversion stages. The RF stage includes a first differential pair. The first power divider is coupled to a first transistor of the first differential pair, and the second power divider is coupled to a second transistor of the first differential pair. The first frequency-conversion stage, which is adapted to provide a first converted-frequency signal, includes a second differential pair coupled to the second power divider and a third differential pair coupled to the first power divider. The second frequency-conversion stage, which is adapted to provide a second converted-frequency signal, includes a fourth differential pair coupled to the second power divider and a fifth differential pair coupled to the first power divider. Other techniques are also provided. | 09-09-2010 |
| 20100225375 | REFERENCE SIGNAL GENERATOR CIRCUIT PROVIDED WITH TWO 90-DEGREE PHASE SHIFTERS AND TWO MIXER CIRCUITS - A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees. | 09-09-2010 |
| 20100237926 | VOLTAGE GENERATING CIRCUIT - A voltage generating circuit including first and second voltage sources, and a subtracting circuit. The subtraction circuit is configured as a differential amplifier including an op-amp and four resistors, with an inverting input terminal of the op-amp connected to the second voltage source via a first resistor, a second resistor connected between the inverting input terminal and an output terminal of the op-amp, a non-inverting input terminal of the op-amp connected to the first voltage source via a third resistor of the same size as the second resistor, the non-inverting input terminal of the op-amp connected to a reference potential terminal via a fourth resistor of the same size as the first resistor, the first voltage from the first voltage source and the second voltage from the second voltage source inputted to the subtracting circuit, and the subtracting circuit outputting a third voltage having a positive temperature coefficient. | 09-23-2010 |
| 20100253412 | PASSIVE HARMONIC-REJECTION MIXER - An electronic device comprising a passive harmonic-rejection mixer. The passive harmonic rejection mixer has an input connected to several sub-mixer stages, and the sub-mixer stages are connected to a summing module for generating the output. Each sub-mixing stage comprises a gating module and a respective amplifier, the gating module adapted to selectively pass the input signal or the input signal with inverted polarity under the control of control signals. | 10-07-2010 |
| 20100271107 | ANALOG FINITE IMPULSE RESPONSE FILTER - According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both a first and second differential output terminals of the FIR filter. The FIR includes a summing circuit that provides operational advantages to the FIR filter. | 10-28-2010 |
| 20100283526 | HARMONIC REJECTION MIXER UNIT AND METHOD FOR PERFORMING A HARMONIC REJECTION MIXING - A harmonic rejection mixer unit is provided which comprises an input (RF), at least one harmonic rejection unit (HRU) with at least two transistor units (T | 11-11-2010 |
| 20110001541 | POWER AMPLIFICATION DEVICE AND COMMUNICATION DEVICE - In a case where two constant envelope signals corresponding to an input signal are generated through analog signal processing, variation in detection sensitivities of amplitudes of those signals is suppressed. At least one of a mixer ( | 01-06-2011 |
| 20110095807 | FREQUENCY CONVERSION - A frequency conversion circuit configured to mix a first input signal (RF+,RF−) at a first frequency with a second input signal (LO+,LO−) at a second frequency to provide an output intermediate frequency signal (IF | 04-28-2011 |
| 20110102051 | HARMONIC REJECTION MIXER - A harmonic rejection mixer includes a differential in-phase signal path and a differential quadrature signal path, a shared differential transconductor for generating a shared transconductor output signal from a mixer input signal, a first selective mixing circuit disposed in the differential quadrature signal path and coupled to the shared differential transconductor, and a second selective mixing circuit disposed in the differential in-phase signal path and coupled to the shared differential transconductor, the first selective mixing circuit is controlled by a first selective control signal and the second selective mixing circuit is controlled by a second selective control signal to selectively supply the shared transconductor output signal to the differential quadrature signal path and the differential in-phase signal path, respectively. | 05-05-2011 |
| 20110140761 | POWER AMPLIFICATION DEVICE, AND TRANSMISSION DEVICE AND COMMUNICATION DEVICE USING SAME - To provide a power amplification device that can amplify an input signal having an envelope variation with high power-added efficiency in a wide frequency range, and a transmission device and a communication device using the power amplification device. A first orthogonal signal (Sd | 06-16-2011 |
| 20110175667 | LOW DISTORTION ACTIVE BALUN CIRCUIT AND METHOD THEREOF - A signal converting circuit includes: a first single-to-differential circuit arranged to generate a first signal having a first polarization and a second signal having a second polarization different from the first polarization; a second single-to-differential circuit arranged to generate a third signal having the second polarization and a fourth signal having the first polarization; and a combining circuit arranged to generate a first combined signal having the first polarization according at least two signals from the first signal, the second signal, the third signal, and the fourth signal, and output an output signal according to at least the first combined signal. | 07-21-2011 |
| 20110227628 | POWER LIMITING CIRCUIT - A power limiting circuit includes: a maximum value prediction filter section (MVPFS) interpolating data of one branched digital input signal; a maximum value detection section detecting maximum value of an output of the MVPFS and a time detection position thereof every constant period; a threshold subtraction section subtracting a threshold from detected maximum value and outputting a peak signal (zero when the subtraction result is negative); a coefficient selection section weighting the peak signal according to time detection position; a complex filter section limiting the weighted peak signal within a band of the input signal; a filter coefficient calculation section calculating filter coefficients of the complex filter section; a delay adjustment section delaying another of the branched input signals by a time period required for calculating the band-limited peak signal; and a subtraction section subtracting the band-limited peak signal from the other of the branched input signals subjected to delay. | 09-22-2011 |
| 20110234293 | LOW-POWER FREQUENCY DIVIDERS - A bias-shaping circuit for adjusting power consumption in a frequency divider to a temperature-dependent minimum includes a temperature-dependent bias source for producing a temperature-dependent bias. The bias is combined with an input signal to create an output bias. The output bias changes in response to a change in temperature to compensate for at least a portion of a temperature-induced change in the frequency divider, thereby adjusting power consumption in the frequency divider to a temperature-dependent minimum. | 09-29-2011 |
| 20110285452 | Heterodyne Dual Slope Frequency Generation Method for the Load Change of Power Supply - A heterodyne dual-slope frequency generation method for the load change of the power supply, which comprises a power transformer, a feedback control circuit, and a dual-slope charge-discharge circuit. The power supply generates different charge current to fit different operating mode through the feedback control circuit, feedback voltage generated into power transformer, and passes through the dual-slope charge-discharge circuit in accordance with the different outer load device and the different outer voltage rising speed. When the outer loading is changed, the feedback control circuit detects error voltage, feeds through power transformer, further changes the supplied current, and finally automatically adjusts the driving current and the output power. | 11-24-2011 |
| 20110298522 | OUTPUT APPARATUS AND TEST APPARATUS - Provided is an output apparatus that outputs an output signal corresponding to an input signal, comprising a plurality of drivers that each output an intermediate signal having a waveform corresponding to the input signal; an adding section that adds together the intermediate signals output from the drivers and outputs the result as the output signal; and a control section that controls a difference in delay amount, which is from when the input signal begins to change to when the intermediate signal begins to change, among the drivers according to a designated slew rate. | 12-08-2011 |
| 20120001675 | TRANSCONDUCTANCE AMPLIFIER - The present invention is intended to achieve a transconductance amplifier and a voltage/current converting method which can provide a sufficient amplitude and a high degree of design freedom. The method comprises the steps of converting a first voltage signal to a first current signal; converting a second voltage signal to a second current signal; obtaining the common-mode components of the first and second current signals; and subtracting the common-mode components from the first and second current signals to obtain third and fourth signals, and further, subtracting the fourth current signal from the third current signal to generate a first output, while subtracting the third current signal from the fourth current signal to generate a second output. | 01-05-2012 |
| 20120105127 | Method, System, and Apparatus for RF and DC Switching - Embodiments of RF and DC switching are described generally herein. Other embodiments may be described and claimed. | 05-03-2012 |
| 20120105128 | CALIBRATION OF PASSIVE HARMONIC-REJECTION MIXER - An electronic device comprising a passive harmonic-rejection mixer ( | 05-03-2012 |
| 20120212283 | COMBINED DIGITAL OUTPUT SYSTEM - A combined digital output system includes two quantization modules, a common mode counter, a differential mode counter, and a summing module. The quantization modules provide two digital signals, the common mode counter generates a common mode signal according to the digital signals, the differential mode counter generates a differential mode signal according to the two digital signals, and the summing module obtains the common mode signal and the differential mode signal, so as to generate a summing signal. | 08-23-2012 |
| 20120223761 | 360-DEGREE ANGLE DECODER - This disclosure is directed to techniques for decoding two or more signals that vary sinusoidally with respect to a parameter value to produce a decoded signal that varies linearly with respect to the parameter value. The techniques may include receiving a first signal and a second signal, the first signal varying with respect to a parameter value according to a first sinusoidal function having a period and a first phase, the second signal varying with respect to the parameter value according to a second sinusoidal function having the period and a second phase different from the first phase. The techniques may further include performing one or more arithmetic operations using the first signal, the second signal, and an offset value to generate a third signal that varies linearly with respect to the parameter value for at least one-half of the period of the first signal and the second signal. | 09-06-2012 |
| 20130093493 | ARBITRARY MULTIBAND OVERLAY MIXER APPARATUS ANDMETHOD FOR BANDWIDTH MULTIPLICATION - An apparatus and method for splitting a wide band input signal and overlaying multiple frequency bands on each path associated with one or more digitizers. All frequencies from the split signal on each path can be fed to a mixer. The local oscillator of each mixer receives a sum of signals, which can each be set to any arbitrary frequency, as long as an associated matrix determinant of coefficients is non-zero. Each oscillator signal is multiplied by a coefficient, which can represent phase and magnitude, prior to summing the oscillator signals together. Each mixer mixes a combined signal with the input, thereby generating a set of multiple overlaid frequency bands. The digitized signals are processed to substantially reconstruct the original input signal. Thus, the wide band input signal is digitized using multiple individual digitizers. In particular, a system can support two wide band signals using four digitizers of narrower bandwidth. | 04-18-2013 |
| 20130093494 | DIFFERENTIAL CURRENT BUFFER - Apparatus and methods provide a differential current buffer. The current buffer has cross-coupled feedback and offers relatively good common-mode rejection and a relatively low and linear input impedance, which can reduce intermodulation distortion. The current buffer can be used in, for example, an RF modulator, such as a quadrature modulator. | 04-18-2013 |
| 20130093495 | TRANSMITTER - There is provided a transmitter with a small area and low noise. A direct RF modulation transmitter is constituted by an N-number of input signal delay-attached direct RF converters to which an I digital baseband signal is input, an M-number of input signal delay circuit-attached direct RF converters (DDRCs) to which a Q digital baseband signal is input, a Divide-by-2 divider for generating a differential local signal differing in phase by 90 degrees, an output matching circuit, and a delay control circuit for controlling an input data delay amount for the DDRCs. This transmitter sets delay amounts for the DDRCs using the delay control circuit independently. Particularly when N is set to equal M and the same amount of delay is set for N-number of converters corresponding to the I digital baseband signal and the Q digital baseband signal, noise reduction effect in a predetermined frequency band is heightened. | 04-18-2013 |
| 20130162320 | COUPLING ARRANGEMENT FOR PHANTOM-MODE TRANSMISSION - In accordance with an embodiment, the coupling arrangement includes adders for adding a common-mode signal to a differential-mode signal and amplification units for individually and evenly amplifying input signals present on their input terminals, thereby yielding amplified common-and-differential-mode signals. Coupling units with capacitive coupling are configured to pass the amplified common-and-differential-mode signals towards a wire pair. | 06-27-2013 |
| 20130257509 | SIGNAL PROCESSING APPARATUS - The signal processing apparatus contains a first signal transforming circuit and a second signal transforming circuit. The first signal transforming circuit includes four first coupled lines and two second coupled lines, wherein two ends of each first coupled line are configured to carry a first pair of differential signals respectively, each second coupled line is magnetically coupled to two of the first coupled lines in parallel and comprises two signal ports, to which the two ends of each of the magnetically-coupled first coupled lines are placed symmetrically for transferring a second pair of differential signals. The second signal transforming circuit is configured to convert between the second pairs of differential signals at the signal ports and a third pair of differential signals at connecting ports of the second signal transforming circuit. | 10-03-2013 |
| 20130314144 | DETECTING METHOD AND DEVICE FOR SUPPRESSING INTERFERENCE OF LOW-FREQUENCY NOISE - The invention, upon receiving an input signal, sums the absolute values of the difference of each pair of values adjacent to each other within a series of detected signal values to suppress the interference of low-frequency noise. Furthermore, the invention sums the absolute values of the moving averages of the differences of each pair of values adjacent to each other within a series of detected signal values to suppress both the interference of low-frequency noise and the interference of high-frequency noise. No synchronization with the input signal is necessary. The detection can be started at any phase of the input signal. | 11-28-2013 |
| 20140028374 | SPUR REDUCTION CIRCUIT - A circuit for modulating an input signal including a dither signal generator configured to generate a first dither signal having a maximum amplitude, a deamplifier configured to reduce the amplitude of said input signal so as to generate a deamplified input signal having a maximum amplitude that is comparable to the maximum amplitude of the dither signal, and a summer configured to sum the dither signal with the deamplified input signal. | 01-30-2014 |
| 20140043088 | SEMICONDUCTOR DEVICE AND RECEIVER - According to one embodiment, there is provided a semiconductor device including a first amplifier and a second amplifier. The first amplifier has an input terminal to receive a first signal and an output terminal to output a second signal. The second amplifier is configured to receive the first signal and a correction data, to generate a correction signal according to the first signal and the correction data, and to output the generated correction signal to the output terminal of the first amplifier so as to add the first signal and the generated correction signal. | 02-13-2014 |
| 20140070868 | COMPLEMENTARY BIASING CIRCUITS AND RELATED METHODS - Embodiments of complementary biasing circuits and related methods are described herein. Other embodiments and related implementations are also disclosed herein. | 03-13-2014 |
| 20140191791 | ADDER - A circuit in which a storage function and an arithmetic function are combined is proposed by using a transistor with low off-state current for forming a storage element. When the transistor with low off-state current is used, electric charge can be held, for example, in a node or the like between a source or a drain of the transistor with low off-state current and a gate of another transistor. Thus, the node or the like between one of the source or the drain of the transistor with low off-state current and the gate of the another transistor can be used as a storage element. In addition, leakage current accompanied by the operation of an adder can be reduced considerably. Accordingly, a signal processing circuit consuming less power can be formed. | 07-10-2014 |
| 20140240023 | SUPER DELTA MONOPULSE BEAMFORMER - An improved approach to direction finding using a super delta monopulse beamformer is disclosed. A super delta channel signal that includes direction finding information from two circular delta channels is formed and output by the super delta monopulse beamformer. This super delta channel signal uses only two channels, but is able to realize the accuracy of conventional three channel systems. | 08-28-2014 |
| 20140285251 | ASYNCHRONOUS TIME-INTERLEAVED WAVEFORM GENERATOR USING HARMONIC MIXING - Waveforms generators include a splitter that splits a digital input signal into a number of split signals each having a split signal frequency bandwidth that is substantially similar to a digital input signal frequency bandwidth. The split signals are mixed with associated digital, harmonic signals to generate a number of digital, mixed signals, which are then converted to analog signals at an effective sample rate that is different from a first order harmonic signal of at least one of the digital, harmonic mixers. A number of analog, harmonic mixers mix the associated analog signals with associated analog, harmonic signals to generate mixed, analog signals. The mixed, analog signals are combined into an output signal having an output signal bandwidth that is greater than a bandwidth of at least one of the number of DACs. | 09-25-2014 |
| 20150035579 | LOW-RIPPLE POWER SUPPLY - The present invention is a low-ripple power supply comprising a clock generator, a plurality of charge pump modules, and an adder unit. The low-ripple power supply inputs each of a plurality of clock signals generated by the clock generator into each of the plurality of charge pump modules. Since each of the plurality of charge pump modules sends the inputted corresponding clock signal into two paths to be inputted into the first and the second charge pump, respectively, and the corresponding clock signal inputted into the second charge pump undergoes an inversion by the inverter, by adding the first voltage outputted by the first charge pump and the second voltage outputted by the second charge pump, the ripples may be eliminated; finally, the adder unit adds the voltages outputted by each of the plurality of charge pump modules to yield a low-ripple DC voltage. | 02-05-2015 |
| 20150061747 | PROPORTIONAL-TO-SUPPLY ANALOG CURRENT GENERATOR - A current generator includes first and second current generators and an output current generator. The first current generator has an output for providing a first current, the first current proportional to a difference between a first power supply voltage and a first gate-to-source voltage. The second current generator has an output for providing a second current, the second current proportional to a second gate-to-source voltage. The second gate-to-source voltage is approximately equal to the first gate-to-source voltage. The output current generator provides an output current proportional to a sum of said first current and said second current. | 03-05-2015 |
| 20150077169 | ASYNCHRONOUS TIME-INTERLEAVED DIGITAL TO ANALOG CONVERTER USING HARMONIC MIXING - Waveforms generators include a splitter that splits a digital input signal into a number of split signals each having a split signal frequency bandwidth that is substantially similar to a digital input signal frequency bandwidth. The split signals are mixed with associated digital, harmonic signals to generate a number of digital, mixed signals, which are then converted to analog signals at an effective sample rate that is different from a first order harmonic signal of at least one of the digital, harmonic mixers. A number of analog, harmonic mixers mix the associated analog signals with associated analog, harmonic signals to generate mixed, analog signals. The mixed, analog signals are combined into an output signal having an output signal bandwidth that is greater than a bandwidth of at least one of the number of DACs. | 03-19-2015 |
| 20150084683 | HARMONIC REJECTION MIXER - A harmonic rejection mixer is disclosed that is capable of supporting wideband reception without any increase in circuit area. In this apparatus, transistors convert an RF signal to currents. Transistors perform frequency conversion based on the currents from the transistors and local oscillation signals. Transistors distribute the currents from the transistors to all transistors or some transistors based on a predetermined ratio. A load adds up the currents from the transistors and converts the resultant current to a voltage. | 03-26-2015 |
| 20150137870 | MIXER - A mixer includes a first node to which an intermediate frequency (IF) signal is input; first and second transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the first node; a first filter that is connected between the output terminal of the second transistor and the first node and suppresses passage of the IF signal; a second node to which the IF signal is input; third and fourth transistors that respectively have control terminals supplied with local signals having mutually opposite phases and output terminals connected to the second node; a second filter that is connected between the output terminal of the fourth transistor and the second node and suppresses passage of the IF signal; and a combiner combining a signal output from the first node and a signal output from the second node. | 05-21-2015 |
| 20150326224 | CIRCUIT FOR GENERATING BIAS VOLTAGE FOR HIGH SPEED INPUT/OUTPUT PAD - The present invention provides a circuit for generating a bias voltage for a high speed input/output pad. To this end, a bias voltage generator according to an embodiment of the present invention is to supply at least one bias voltage to a buffer circuit connected to the pad, which includes: a bias generation part for generating a first bias voltage; and a reference voltage generation part for generating a voltage proportional to the pad voltage applied to the pad as a reference voltage, wherein the first bias voltage may be the sum of the reference voltage and a predetermined voltage. | 11-12-2015 |
| 20160147245 | VOLTAGE REFERENCE CIRCUIT - A voltage reference circuit is provided. In some embodiments, the voltage reference circuit includes a MOS stack that includes two or more MOS transistors having a substantially same voltage threshold. The voltage reference circuit is configured to generate, via the MOS stack, a first voltage waveform having a first temperature co-efficient and a second voltage waveform having a second temperature co-efficient. In some embodiments, the first temperature co-efficient has a polarity that is opposite a polarity of the second temperature co-efficient. In some embodiments, the first voltage waveform and the second voltage waveform are used to generate a reference voltage waveform, where the reference voltage waveform is substantially temperature independent due to the opposite polarities of the first temperature co-efficient and the second temperature co-efficient. | 05-26-2016 |
| 20160380593 | HARMONIC REJECTION TRANSLATIONAL FILTER - A harmonic-rejection translational filter includes: a first path, a second path and a signal combiner. The first path has a first translational filter that is driven by a plurality of first oscillation signals, and is arranged to generate a first output signal according to an input signal. The second path has a second translation filter that is driven by a plurality of second oscillation signals that are different from the first oscillation signals in phase. The second path is coupled to the first path and arranged to generate a second output signal according to the input signal. The signal combiner is coupled to the first path and the second path, and arranged to combine the first output signal and the second output signal to SIN generate a filtered signal. | 12-29-2016 |
