| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 327111000 | Having capacitive load | 48 |
| 20080238497 | OPERATIONAL AMPLIFIER HAVING ITS COMPENSATOR CAPACITANCE TEMPORARILY DISABLED - An operational amplifier includes a differential amplifier connected between an input and an output port of the operational amplifier, a phase compensator capacitance connected between the differential amplifier and the output port, a switching transistor for controlling the connection between the phase compensator capacitance and the differential amplifier, a detection transistor responsive to a potential difference between the input and output ports to be rendered conductive, and a control transistor responsive to the detection transistor for controlling the switching transistor. The operational amplifier has its slew rate improved without detracting from stability against oscillation and continuity of the output waveform. | 10-02-2008 |
| 20080265952 | Gate Driver Circuit for Power Transistor - A circuit arrangement with a gate driver circuit for a power transistor is disclosed which is suitable for low voltage applications, permitting a rail-to-rail output without a loss in speed/bandwidth, which is very simple, low cost, low current and area efficient. The gate driver circuit comprises a drain follower with a MOS driver transistor having the gate connected to an interconnection node of a capacitive divider. A first capacitor of the capacitive divider is connected between the drain and the gate and a second capacitor is connected between the gate and an input of the gate driver circuit. The gate driver has the required low impedance for driving the gate of the power transistor. | 10-30-2008 |
| 20090115465 | LOW POWER, HIGH SLEW RATE CCD DRIVER - A low power, high slew rate output driver circuit system is provided. The Circuit system comprises a cascade of two high-speed stages and a variable current biasing block. The combination of these two elements enables the realization of a high slew rate, yet low power output driver system. | 05-07-2009 |
| 20090140779 | METHOD AND APPARATUS FOR DRIVING CAPACITIVE LOAD, AND LCD - A potential supplied from a capacitive load drive unit to one end of a respective capacitive load is switched to an intermediate potential between a first and a second power supply potentials for a predetermined period of time prior to switching the potential of the one end of the capacitive load from the first to the second power supply potential, or vice versa, which minimizes charging and discharging currents of the load, variations of the potential supplied to the capacitive load, and hence power consumption involved, without providing a charging capacitor having a large capacitance in the capacitive load drive unit. | 06-04-2009 |
| 20090167371 | CAPACITIVE LOAD DRIVING CIRCUIT - It is aimed to reduce the area of an output circuit in a capacitive load driving circuit capable of high voltage output, such as a PDP scan driver for driving a plasma display panel. To achieve this, there are provided an arbitrary number of N-type MOS transistors | 07-02-2009 |
| 20090206888 | DRIVING CIRCUIT FOR CAPACITIVE LOAD AND LIQUID INJECTING APPARATUS - A driving circuit for a capacitive load includes a driving signal generating unit that generates a driving signal for driving the capacitive load by using a pair of driving transistors. A power source voltage generating unit generates high-voltage and low-voltage power source voltages that are higher and lower, respectively, than the voltage of the driving signal and applies the voltages to collectors of the driving transistors. The power source voltage generating unit includes a pair of power source transistors and a capacitor. The low-voltage power source voltage is generated in an output side of the power-source transistor pair as a voltage that is in a voltage region lower than that of the driving signal and follows the driving signal. The high-voltage power source voltage is output from a high-voltage terminal of the capacitor, is in a voltage region higher than that of the driving signal, and follows the driving signal. | 08-20-2009 |
| 20090212831 | IMAGE FORMING APPARATUS - An image forming apparatus including plural capacitive loads, with one terminal of each of the capacitive loads being connected to a common electrode and with each of the capacitive loads being charged/discharged on the basis of image data, and a first and second drive circuits is provided. The first drive circuit includes plural charge/discharge controllers that are individually connected to other terminals of the capacitive loads and individually control the charging and discharging of the capacitive loads and first and second electrical power wires that are connected to the charge/discharge controllers and charge and discharge the capacitive loads via the charge/discharge controllers. The second drive circuit is connected to each of the first and second electrical power wires and adjusts charge resistance and discharge resistance in response to control of the charge/discharge controllers. | 08-27-2009 |
| 20090212832 | LOAD CAPACITY DRIVING CIRCUIT - The present invention provides a load capacity driving circuit that is inexpensive and has a high driving capability. When an input signal changes to low potential, gate voltage of an output stage of an amplifying circuit increases, an NMOS transistor MNO turns on, and an NMOS transistor MN | 08-27-2009 |
| 20090302898 | MULTICHANNEL DRIVE CIRCUIT - The invention provides a multichannel drive circuit by which, even when there occurs a variation between channels in circuit characteristics of each channel including current source due to the semiconductor manufacturing process and the like, loads of each channel constituting a load array can be driven under conditions uniform between all the channels. The invention includes; an interchannel common connection line ( | 12-10-2009 |
| 20100013526 | Current driving circuit - In current driving circuit a desired value of a driving current is promptly written in a load of each pixel despite load variations that may occur in each pixel. A constant current source circuit delivers a driving current Idata to a load. An output voltage difference amplifier circuit detects a voltage change produced at a load driving end within a preset time period, and delivers a current or a voltage corresponding to the voltage change during a time period different from the preset time period. The output voltage difference amplifier circuit temporally repeats detection of the voltage change and delivery of the current or the voltage to the load. | 01-21-2010 |
| 20100060327 | HIGH VOLTAGE HIGH SIDE TRANSISTOR DRIVER - A transistor driver includes a sender module configured to generate a power input signal. A converter module includes a transformer including a first side and a second side. The first side of the transformer is configured to receive the power input signal. A rectifier is connected to the second side of the transformer. The converter module is configured to generate an output signal at an output of the rectifier. A first receiver module is connected to each of the second side of the transformer and the output of the rectifier. The first receiver module is configured to transition a first transistor between an ON state and an OFF state based on a first signal received from the second side of the transformer. | 03-11-2010 |
| 20100231271 | CIRCUIT FOR DRIVING A DISPLAY PANEL USING A DRIVING CAPACITOR - The present invention provides a circuit for driving a display panel using a driving capacitor, comprising an analog-to-digital converter receiving an analog input signal to generate a digital signal, a driving capacitor receiving the digital signal to generate a driving signal for the display panel, and a switching circuit in response to a switching signal, selectively coupling the analog-to-digital converter to the driving capacitor for transmission of the digital signal and coupling the driving capacitor to the display panel for transmission of the driving signal. Thus, the circuit area needed for a source driver processing images of large bit number is reduced, which decreases the cost. Further, the power system of the display having a large dynamic range of voltage can be also simplified. | 09-16-2010 |
| 20110006815 | HIGH PERFORMANCE VOLTAGE BUFFERS WITH DISTORTION CANCELLATION - A voltage buffer may include a first signal path extending from an input terminal to an output terminal in which the first signal path further may include a buffer transistor that may have a control terminal, and a first and second current terminals responsive to the control terminal. In the first signal path, the control terminal may be connected to the input terminal, the first current terminal may be connected to the output terminal, and the first signal path may supply a load current to a load device responsive to an input signal at the input terminal. The voltage buffer further may include a second signal path extending from the input terminal to a current source node. The second signal path may include a replica load device. The voltage buffer further may include a current source supplying substantially constant current and coupled to the current source node. The voltage buffer further may include a current buffer positioned between the current source node and the output node in which the current buffer may direct a replica current from the second signal path responsive to the input signal and the substantially constant current from the current source to the buffer transistor. | 01-13-2011 |
| 20110050293 | Driving circuit of optical gate switch - A driving circuit of a semiconductor optical amplifier type gate switch constituting a matrix optical switch is provided with an operation amplifier into which a driving signal is input and from which a current corresponding to the driving signal is output, an inductance element provided at an output terminal of the operation amplifier, and a circuit composed of a diode element and a resistor element connected in parallel and provided between the inductance element and the semiconductor optical amplifier. | 03-03-2011 |
| 20110089980 | CAPACITIVE LOAD DRIVER - A capacitive load driver includes a first switching element whose first end receives positive potential, an EL element arranged between a second end of the first switching element and the ground, a charge collecting capacitor whose first end is connected to a positive electrode terminal of the EL element, a voltage source connected between a second end of the charge collecting capacitor and the ground, and a controller. The controller charges a parasitic capacitance of the EL element and the charge collecting capacitor, and thereafter, applies negative potential from the voltage source to the second end of the charge collecting capacitor. Thereafter, the controller brings the output voltage of the voltage source to ground potential so that the charge collecting capacitor is discharged to charge the EL element. The capacitance of the charge collecting capacitor is set to be sufficiently greater than that of the parasitic capacitance. | 04-21-2011 |
| 20110204930 | SOURCE FOLLOWER INPUT BUFFER - Traditionally, input source follower buffers for analog-to-digital converters (ADCs) lacked sufficiently high linearity. This was due in part to source follower buffers having to drive external capacitive loads by generally providing a signal current to the capacitive load. Here, a buffer is provided that includes a source follower buffer and other biasing circuitry (which provided the signal current). Thus, the overall linearity of the input circuitry (namely, the input buffer) is improved. | 08-25-2011 |
| 20120119797 | CAPACITIVE LOAD DRIVE CIRCUIT, LIQUID INJECTOR, AND MEDICAL DEVICE - A drive waveform signal is pulse-modulated and a modulated signal is generated, the obtained modulated signal is power-amplified, and then, a drive signal is demodulated using a low pass filter. Thus obtained drive signal is negatively fed back, and thereby, the resonance peak of the low pass filter is suppressed. In this regard, by bringing gain in a wider frequency domain to take a fixed value or more, a drive signal having a voltage exceeding a power supply voltage may be stably generated. | 05-17-2012 |
| 20120249191 | Source or Emitter Follower Buffer Circuit and Method - In one aspect, a buffer circuit comprises a source or emitter follower input stage and output stage. A load is provided between the stages which comprises a representation of an output load of the buffer circuit. This improves the circuit linearity whilst enabling a high input impedance to be obtained. | 10-04-2012 |
| 20130043912 | START-UP CIRCUIT - Aspects of the disclosure provide a circuit. The circuit includes a depletion mode transistor coupled to a power supply and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. The current path has a first resistance during a first stage, such as when the circuit initially receives power, and has a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level. | 02-21-2013 |
| 20130088267 | APPARATUS FOR REDUCING SIMULTANEOUS SWITCHING NOISE - The invention provides an electronic device for reducing simultaneous switching noise (SSN). The electronic device includes: a driver, driving an external device according to an input signal, and including: an input end, receiving the input signal; a positive output end, coupled to an external capacitor of the external device; and a negative output end, coupled to a variable capacitor; and a loading calibration circuit, generating an adjusting signal to adjust a first capacitance of the variable capacitor so as to make the first capacitance approximately equal to a second capacitance of the external capacitor. | 04-11-2013 |
| 20130106471 | POTENTIAL GENERATION CIRCUIT AND LIQUID CRYSTAL DISPLAY DEVICE | 05-02-2013 |
| 20130135014 | Driver Circuit - A driver circuit is provided. The driver circuit includes a first transistor for receiving a preceding gate signal to generate a first control signal, a second transistor for pulling down the first control signal according to a second control signal, a third transistor for outputting a clock signal according to the first control signal, a fourth transistor for pulling down the clock signal according to the second control signal, a fifth transistor connected to a high voltage source for outputting the second control signal, a sixth transistor for pulling down the second control signal according to the first control signal, a seventh transistor for receiving a next gate signal to pull down the first control signal, and a capacity. The preceding gate signal charges the capacitor to generate the first control signal. | 05-30-2013 |
| 20130181751 | SLEW-RATE LIMITED OUTPUT DRIVER WITH OUTPUT-LOAD SENSING FEEDBACK LOOP - Output driver feedback circuitry is configured to sense an amount of output capacitance of an output pad and to adjust the strength of the output driver accordingly. The feedback circuitry adjusts the output driver within a single cycle. A chain of delay reference signals is generated by representative capacitive loads that replicate a range of actual output loads. Adjustments to the output driver are based on a comparison of the delay reference signals with output of the output driver. | 07-18-2013 |
| 20130181752 | TIMING CONTROL CIRCUIT FOR SWITCHING CAPACITOR DYNAMIC SWITCH AND CONTROL METHOD THEREOF - A timing control circuit for a switching capacitor dynamic switch includes a first time generator and a second time generator. The first generator includes a first capacitor. The first time generator determines a first time by charging to the first capacitor. The second time generator includes a second capacitor. The first time generator is connected to the second time generator. When the first time ends, the second time generator determines a second time by discharging to the second capacitor. | 07-18-2013 |
| 20130321039 | DRIVE UNIT FOR MEASURING DEVICE AND DRIVE METHOD THEREFOR - A measuring device comprises a plurality of variable capacitors as sensor elements. The plurality of variable capacitors are provided with a drive circuit for each pair. The first electrodes of the two variable capacitors in each pair are electrically connected to each other. The drive circuit for each pair includes a bias supply for applying two AC bias voltages relatively 90° out of phase to the second electrodes respectively of the two variable capacitors to produce an output signal at the first electrodes connected to each other, a multiplier for multiplying the output signal by two AC signals relatively 90° out of phase to produce two multiplication signals, and an integrator for integrating the two multiplication signals for each cycle of the corresponding AC bias voltages to acquire two integration signals for the two variable capacitors. | 12-05-2013 |
| 20140035631 | TUNABLE CAPACITANCE CONTROL CIRCUIT AND TUNABLE CAPACITANCE CONTROL METHOD - Disclosed herein are a tunable capacitance control circuit and a tunable capacitance control method. The tunable capacitance control method is a tunable capacitance control method by a tunable capacitance control circuit including an MIM capacitor, a plurality of FET switches, and a control unit, wherein the control unit outputs control signals allowing only one of the plurality of (n) FET switches to be switched on and the remaining (n-1) FET switches to be switched off to the plurality of FET switches, thereby obtaining a desired tunable capacitance value. | 02-06-2014 |
| 20140159779 | STICTION REDUCTION FOR MEMS DEVICES - A capacitive micro-electromechanical switch (MEMS) integrated circuit (IC) comprises a plurality of capacitors, each having a voltage terminal for applying an actuation voltage to the individual capacitor, wherein each capacitor is capable of being individually cycled. The MEMS IC further includes: a high voltage driver having a voltage distribution mechanism that couples to the voltage terminal of each of the plurality of capacitors to enable the high voltage driver to selectively provide a pre-determined voltage input required to actuate and charge a selected one or more of the plurality of capacitors; and control logic communicatively coupled to the high voltage driver and which deterministically applies power cycle times (less than a stiction limit) for an actuation and de-actuation of at least a first capacitor of the plurality of capacitors to substantially reduce an occurrence of stiction within at least the first capacitor during operation of the MEMS device. | 06-12-2014 |
| 20140253187 | CAPACITIVE LOAD DRIVE CIRCUIT, FLUID EJECTION DEVICE AND MEDICAL DEVICE - Operation of a digital power amplifier for power amplification of a modulated signal is stopped in a period in which a voltage value of a drive signal applied to a capacitive load is constant, to thereby suppress power loss. The power amplification is stopped either when half a period of time when the modulated signal in a first voltage state maintains the first voltage state elapses or when half a period of time when the modulated signal in a second voltage state which is lower in voltage than the first voltage state maintains the second voltage state elapses. Accordingly, when electric current does not flow in a inductor of a low pass filter, it is possible to stop the power amplification. Thus, it is possible to prevent generation of voltage fluctuation in the drive signal due to an electromotive force caused by a self-induction phenomenon of the inductor. | 09-11-2014 |
| 20150381165 | DRIVER FOR SWITCHED CAPACITOR CIRCUITS - There is described a driver for a switched capacitor circuit ( | 12-31-2015 |
| 20160036391 | SOURCE OR EMITTER FOLLOWER BUFFER CIRCUIT AND METHOD WITH MIRRORED CURRENT - In one aspect, a buffer circuit comprises a source or emitter follower input stage and output stage. A load is provided between the stages which comprises a representation of an output load of the buffer circuit. This improves the circuit linearity whilst enabling a high input impedance to be obtained. | 02-04-2016 |
| 20160039202 | Capacitive Load Drive Circuit - A capacitive load drive circuit, which may be embodied in a printer, includes capacitive elements; a first circuit substrate, on which is installed a control signal supply unit that generates control signals; a second circuit substrate, on which is installed a circuit that charges or discharges the capacitive elements according to the control signals; and a flexible flat cable, on which is formed wirings including control wiring, which transmits the control signals from the first to the second circuit substrate, and a wiring, which supplies power supply and ground voltages to the second circuit substrate. A total path length of the wirings between the first and second circuit substrates is shorter than the total path length of the wiring between the second circuit substrate and each of the capacitive elements. | 02-11-2016 |
| 20160079003 | METHOD OF CONTROLLING MEMS VARIABLE CAPACITOR AND INTEGRATED CIRCUIT DEVICE - According to one embodiment, a method of controlling a MEMS variable capacitor includes first and second electrodes, and having a capacitance varying according to a voltage applied between the first and second electrodes, the method includes applying a voltage between the first and second electrodes, evaluating whether the capacitance of the MEMS variable capacitor satisfies a predetermined condition while the voltage is being applied between the first and second electrodes, and determining that the voltage applied between the first and second electrodes is a voltage which should be applied therebetween, on a condition that the capacitance of the MEMS variable capacitor is evaluated as satisfying the predetermined condition. | 03-17-2016 |
| 20160101618 | LIQUID EJECTING APPARATUS AND HEAD UNIT - A liquid ejecting apparatus includes a signal modulation section that causes an original drive signal to be pulse-modulated to generate a modulation signal, a signal amplification section that amplifies the modulation signal to generate an amplification modulation signal, a coil that smooths the amplification modulation signal to generate a drive signal, a piezoelectric element that deforms when the drive signal is applied thereto, a cavity that expands or contracts due to a deformation of the piezoelectric element, and a nozzle that communicates with the cavity and ejects a liquid in accordance with an increase/decrease of a pressure inside the cavity. A core material of the coil is made of a Mn—Zn-based ferrite. | 04-14-2016 |
| 20160114579 | LIQUID DISCHARGE APPARATUS AND CONTROL METHOD OF LIQUID DISCHARGE APPARATUS - A liquid discharge apparatus includes a piezoelectric element in which a drive signal is applied and which is displaced to eject a liquid; a zeroth wire of a zeroth potential; a first wire of a first potential that is higher than the zeroth potential; a second wire of a second potential that is higher than the first potential; and a connection path selecting section that electrically connects one end of the piezoelectric element to the zeroth wire, the first wire, or the second wire in response to a voltage of a source drive signal that controls the voltage of the drive signal and a hold voltage of the piezoelectric element. Here, a first potential difference from the zeroth potential to the first potential is different from a second potential difference from the first potential to the second potential. | 04-28-2016 |
| 20160182036 | DRIVING CIRCUIT FOR DRIVING A CAPACITIVE LOAD, AND CONTROL METHOD OF A DRIVING CIRCUIT FOR DRIVING A CAPACITIVE LOAD | 06-23-2016 |
| 20160254811 | DRIVING CIRCUIT FOR DRIVING A CAPACITIVE LOAD | 09-01-2016 |
| 20160380621 | COMPACT HIGH VOLTAGE RF GENERATOR USING A SELF-RESONANT INDUCTOR - RF generators including active devices driving series resonant circuits are described. The series resonant circuits include a self-resonant dual inductor. The RF generators can be used to drive capacitive loads. | 12-29-2016 |
| 327112000 | Push-pull | 11 |
| 20080224739 | Equalizing Transceiver With Reduced Parasitic Capacitance - A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a corresponding one of the driver circuits. Each of the select circuits includes a control input to receive a respective select signal and a plurality of data inputs to receive a plurality of data signals. Each of the select circuits is adapted to select, according to the respective select signal, one of the plurality of data signals to be output to the control input of the corresponding one of the driver circuits. | 09-18-2008 |
| 20080278202 | Capacitive load driving device - An improved capacitive load driving device that provides increased signal voltage gain, over-voltage, over-current, and over-temperature protections, over-modulation prevention, output level control, minimized harmonic generation, and compensation for propagation medium distortion. The device includes driver/amplifier circuitry, protection circuitry, and an output stage. The driver/amplifier circuitry simultaneously modulates and discretizes an analog input signal by comparing it with a specified digitally-synthesized modulation waveform, which is a repeating series of approximately parabolic waveforms. The resulting PWM waveform is processed to generate a discrete low-harmonic sine wave approximation used to produce gate drive signals for the output stage. The protection circuitry monitors the device for fault conditions, and, in the event a fault condition is detected, controls startup and automatic shutdown. The output stage includes an H-bridge that drives an impedance-matching transformer feeding an inductor. When the device is used to drive a capacitive transducer, the impedance-matching transformer, the inductor, and the transducer form a series-resonant circuit for boosting the signal voltage gain, reducing power consumption, and filtering higher harmonics. | 11-13-2008 |
| 20090033377 | Drive Circuit and Inverter for Voltage Driving Type Semiconductor Device - A drive circuit for driving a semiconductor element is equipped with: a first switch connected to a positive side of a DC power supply; a second switch connected to the other terminal of the first switch and to a negative side of the DC power supply; a third switch connected to the positive side of the DC power supply; a fourth switch connected to the other terminal of the third switch; a fifth switch connected to the other terminal of the fourth switch and to the negative side of the DC power supply; and a capacitor connected to the other terminal of the first switch and to the other terminal of the fourth switch. A gate of the semiconductor element is connected to the other terminal of said third switch; and a source of the semiconductor element is connected to the negative side of the DC power supply. | 02-05-2009 |
| 20090066376 | Equalizing Transceiver With Reduced Parasitic Capacitance - A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a corresponding one of the driver circuits. Each of the select circuits includes a control input to receive a respective select signal and a plurality of data inputs to receive a plurality of data signals. Each of the select circuits is adapted to select, according to the respective select signal, one of the plurality of data signals to be output to the control input of the corresponding one of the driver circuits. | 03-12-2009 |
| 20090085615 | METHOD AND APPARATUS FOR SIMPLIFYING THE CONTROL OF A SWITCH - A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off. | 04-02-2009 |
| 20090121752 | SOURCE FOLLOWER - A source follower includes first through third switches, first and second transistors, and a first capacitor. The first switch is used to determine whether or not to couple the source of the first transistor with an input signal. The second switch is used to determine whether or not to couple a gate and a drain of the first transistor with a first voltage. A first end of the first capacitor is coupled with a first control signal, and a second end of the first capacitor is coupled to the drain of the first transistor and a gate of the second transistor. The third switch is used to determine whether to or not couple a drain of the second transistor with the first voltage, and a source of the second transistor serves as an output of the source follower. | 05-14-2009 |
| 20090140780 | DRIVING DEVICE AND DRIVING METHOD OF CAPACITIVE LOAD AND LIQUID JET PRINTING APPARATUS - A driving device of a capacitive load includes a modulator that executes pulse modulation on a drive waveform signal. An inductor performs low-pass filtering on the modulated drive waveform signal and outputs the low-pass filtered signal as a drive signal towards a load capacitor as the capacitive load. A load selection control circuit selects a load capacitor and a dummy load capacitor to be connected to the inductor so that a sum of the capacitances of the selected load capacitor and dummy load capacitor is kept within a predetermined range. A feedback circuit executes a filtering process on the drive signal so that a frequency characteristic of a passing band of the drive signal becomes substantially flat. The resulting signal is provided to the modulator as a feedback signal. The modulator executes the pulse modulation on a difference value between the drive waveform signal and the feedback signal. | 06-04-2009 |
| 20090322384 | Drive and startup for a switched capacitor divider - Drive and startup circuits are described particularly suitable for use with a switched capacitor divider. In one example, a drive circuit has a level shifter coupled to a gate of each switch of a switched capacitor drive circuit to couple alternating current into the respective gate, a positive phase low side driver coupled to each level shifter to drive the gates of the top switch path through the respective level shifters, and a negative phase low side driver coupled to each level shifter to drive gates of the bottom switch path through the respective level shifters. A startup circuit, such as a capacitive soft start circuit may be used to slow the application of the current to each switch. | 12-31-2009 |
| 20130162307 | HIGH VOLTAGE LINEAR AMPLIFIER DRIVING HEAVY CAPACITIVE LOADS WITH REDUCED POWER DISSIPATION - A capacitive load drive circuit may comprise a high current drive amplifier configured to be coupled to a capacitive load during a high current ramp up of the voltage across the capacitive load to a cut off voltage; a low current drive amplifier configured to be connected to the capacitive load during a low current ramp up of the voltage across the capacitive load, from the cut off voltage to a maximum voltage across the capacitive load; and the high current drive amplifier configured to be connected to the capacitive load during a high current ramp down of the voltage across the capacitive load. The low current drive amplifier may be connected to the capacitive load during a period of steady state of the voltage across the capacitive load, intermediate the low current ramp up and the high current ramp down. | 06-27-2013 |
| 20140266327 | METHOD FOR CHARGE SHARING/REUSE OF ELECTRONIC CIRCUITS - The present disclosure discloses methods and circuits to reduce power consumption of switching circuits comprising two or more units by applying charge sharing/reuse of capacitive loads between the units. The units are stacked in a way that, if an output potential of a unit is to be lowered and an output potential of a neighboring unit is to be lifted, a charge of the unit to be lowered is reused by transferring it to the unit to be lifted depending on input signals of the units. In case of input signals having an arbitrary relationship a storage unit is placed at a junction of two neighboring units to store the charge temporarily until a neighboring unit is to be lifted. | 09-18-2014 |
| 20160079860 | DIRECT CONVERSION OUTPUT DRIVER - A circuit and method for providing a fully integrated differential boost converter and amplifier. A first half bridge circuit has a first output node and a first switching node. A second half bridge circuit has a second output node and a second switching node. A capacitive load is coupled between the first output node and the second output node. An inductor is coupled between the first switching node and the second switching node. Control modes are provided to couple the first output node to a supply voltage and the first switching node to ground; to couple the first output node to the supply voltage and the second switching node to ground; to couple the second output node to the supply voltage and the first switching node to ground; and to couple the second output node to the supply voltage and the second switching node to ground. | 03-17-2016 |
