| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257790000 | Plural encapsulating layers | 33 |
| 20080258317 | SEMICONDUCTOR DEVICE - A resin layer covering a semiconductor chip on a wiring board is composed of a first resin layer and a second resin layer, wherein the first resin layer and the second resin layer differ in their plan view pattern, satisfying a relation of a| 10-23-2008 | |
| 20090085232 | METHOD OF REDUCING MEMORY CARD EDGE ROUGHNESS BY EDGE COATING - A method of forming a semiconductor package with smooth edges, and a semiconductor package formed thereby is disclosed. In embodiments, after encapsulation, the semiconductor packages may be at least partially singulated from the panel by making one or more cuts through the panel to define one or more edges of the semiconductor package. The one or more edges may be smoothed by applying a laminate to the edges. The edges receiving the laminate may include any edge between a top and bottom surface of the package. | 04-02-2009 |
| 20090091044 | DICING DIE ATTACHMENT FILM AND METHOD FOR PACKAGING SEMICONDUCTOR USING SAME - A dicing die attachment film includes a die attachment layer attached to one surface of a semiconductor wafer; a dicing film layer attached to a dicing die that is used for cutting the semi-conductor wafer into die units; and an intermediate layer laminated between the die attachment layer and the dicing film layer. The intermediate layer has a modulus of 100 to 3000 MPa, which is greater than a modulus of the die attachment layer and the dicing film layer. | 04-09-2009 |
| 20100044889 | Electrical Component and Film Composite Laminated On the Component and Method for Production - At least one film composite is laminated on a surface of at least one electrical component. The film composite includes at least one electrically-conducting plastic film with at least one electrically conducting conductor. The electrically-conducting plastic film has a high-ohmic resistance. This method may be used in planar large-surface electrical contacting technology for the production of modules with power semiconductors, where an electrical contacting of the components is achieved by the plastic films. A low lateral electrical conductivity is achieved, such that an electrical charging of the plastic films required for the contacting technology is prevented on operation of the component or the module. | 02-25-2010 |
| 20100201005 | MICROFLUIDIC COMPONENT AND METHOD FOR MANUFACTURING SAME - A microfluidic component having at least one first polymer layer, which is provided with a microstructure for at least one fluid, and having at least one second polymer layer. It is provided that at least one semiconductor component is situated on the first and/or the second polymer layer. Furthermore, a manufacturing method for such a microfluidic component is described. | 08-12-2010 |
| 20110079929 | KIT FOR OPTICAL SEMICONDUCTOR ENCAPSULATION - The present invention relates to a kit for optical semiconductor encapsulation including a liquid first encapsulating material containing inorganic particles and a liquid second encapsulating material containing a phosphor; a kit for optical semiconductor encapsulation including a sheet-shaped first encapsulating material containing inorganic particles and a liquid second encapsulating material containing a phosphor; and a kit for optical semiconductor encapsulation including a liquid first encapsulating material containing inorganic particles and a sheet-shaped second encapsulating material containing a phosphor. | 04-07-2011 |
| 20110309531 | MOLDED BEAM FOR OPTOELECTRONIC SENSOR CHIP SUBSTRATE - A substrate on which a plurality of epoxy over molded integrated circuit dies are formed includes a beam formed on the substrate for providing stiffness to the substrate. The beam includes structure having a cross-sectional shape, for example, substantially in the shape of a trapezoid, “T” or “L”, and may be formed on the top or bottom surface of the substrate. | 12-22-2011 |
| 20120187584 | Semiconductor Device and Method for Forming Semiconductor Package Having Build-Up Interconnect Structure Over Semiconductor Die with Different CTE Insulating Layers - A semiconductor device has a semiconductor die and encapsulant deposited over the semiconductor die. A first insulating layer is formed over the die and encapsulant. The first insulating layer is cured with multiple dwell cycles to enhance adhesion to the die and encapsulant. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. The second insulating layer is cured with multiple dwell cycles to enhance adhesion to the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. The first, second, and third insulating layers have different CTE. The second insulating layer or third insulating layer is cured to a dense state to block moisture. | 07-26-2012 |
| 20120199991 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME, AND POWER SUPPLY - A semiconductor device includes: a semiconductor chip including a nitride semiconductor layered structure including a carrier transit layer and a carrier supply layer; a first resin layer on the semiconductor chip, the first resin layer including a coupling agent; a second resin layer on the first resin layer, the second resin layer including a surfactant; and a sealing resin layer to seal the semiconductor chip with the first resin layer and the second resin layer. | 08-09-2012 |
| 20120273975 | SHEET FOR PROTECTING SURFACE OF SEMICONDUCTOR WAFER, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR WAFER PROTECTION METHOD USING SHEET - To provide a semiconductor wafer surface protection sheet having good adhesion to irregularities on a patterned surface of a semiconductor wafer and having good peelability after wafer grinding. Specifically, a semiconductor wafer surface protection sheet is provided that includes a base layer having a tensile elasticity at 25 C°, E(25), of 1 GPa or more; a resin layer A that satisfies the condition E | 11-01-2012 |
| 20120273976 | MOISTURE BARRIER COATINGS FOR ORGANIC LIGHT EMITTING DIODE DEVICES - A process for fabricating an amorphous diamond-like film layer for protection of a moisture or oxygen sensitive electronic device is described. The process includes forming a plasma from silicone oil, depositing an amorphous diamond-like film layer from the plasma, and | 11-01-2012 |
| 20130001808 | ENCAPSULATION DEVICE HAVING IMPROVED SEALING - An encapsulation device including two casings made of a flexible polymer material, each delimiting a sealed space, and at least one hydrophobic material filling each of the casings, the casings being stacked and sealingly interconnected at peripheral edges thereof, a sealed space then being defined between the two casings for receiving a device to be encapsulated. | 01-03-2013 |
| 20130140719 | Semiconductor Device and Method for Forming Semiconductor Package Having Build-Up Interconnect Structure Over Semiconductor Die with Different CTE Insulating Layers - A semiconductor device has a semiconductor die and encapsulant deposited over the semiconductor die. A first insulating layer is formed over the die and encapsulant. The first insulating layer is cured with multiple dwell cycles to enhance adhesion to the die and encapsulant. A first conductive layer is formed over the first insulating layer. A second insulating layer is formed over the first insulating layer and first conductive layer. The second insulating layer is cured with multiple dwell cycles to enhance adhesion to the first insulating layer and first conductive layer. A second conductive layer is formed over the second insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. The first, second, and third insulating layers have different CTE. The second insulating layer or third insulating layer is cured to a dense state to block moisture. | 06-06-2013 |
| 20130140720 | VOID FREE INTERLAYER DIELECTRIC - A method of manufacturing a non-volatile memory device includes forming a number of memory cells. The method also includes depositing a first dielectric layer over the memory cells, where the first dielectric layer is a conformal layer having a substantially uniform thickness. The method further includes depositing a second dielectric layer over the first dielectric layer. Together, the first and second dielectric layers form an interlayer dielectric without voids. | 06-06-2013 |
| 20140054803 | COMPOUND BARRIER LAYER, METHOD FOR FORMING THE SAME AND PACKAGE STRUCTURE USING THE SAME - An embodiment of the invention provides a compound barrier layer, including: a first barrier layer disposed on a substrate; and a second barrier layer disposed on the first barrier layer, wherein the first barrier layer and second barrier layer both include a plurality of alternately arranged inorganic material regions and organo-silicon material regions and the inorganic material regions and the organo-silicon material regions of the first barrier layer and second barrier layer are alternatively stacked vertically. | 02-27-2014 |
| 20140117569 | DEVICE COMPRISING AN ENCAPSULATION UNIT - A device that includes a component and an encapsulation arrangement for the encapsulation of the component with respect to moisture and/or oxygen, wherein the encapsulation arrangement has a first layer and thereabove a second layer on at least one surface of the component, the first layer and the second layer each comprise an inorganic material, and the second layer is arranged directly on the first layer. | 05-01-2014 |
| 20140138856 | FIBER-CONTAINING RESIN SUBSTRATE, DEVICE-MOUNTING SUBSTRATE AND DEVICE-FORMING WAFER, SEMICONDUCTOR APPARATUS, AND METHOD FOR PRODUCING SEMICONDUCTOR APPARATUS - A fiber-containing resin substrate for collectively encapsulating a semiconductor-device-mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor-device-forming surface of a wafer on which a semiconductor device is formed, including a resin-impregnated fibrous base material which is obtained by impregnating a fibrous base material with a thermosetting resin and semi-curing or curing the thermosetting resin and has a linear expansion coefficient (ppm/° C.) in an X-Y direction of less than 3 ppm, and an uncured resin layer formed of an uncured thermosetting resin on one side of the resin-impregnated fibrous base material. | 05-22-2014 |
| 20140210112 | ENCAPSULATION STRUCTURE FOR AN OPTOELECTRONIC COMPONENT AND METHOD FOR ENCAPSULATING AN OPTOELECTRONIC COMPONENT - An encapsulation structure for an optoelectronic component may include: a barrier thin-film layer for protecting an optoelectronic component against chemical impurities; a cover layer applied above the barrier thin-film layer and serving for protecting the barrier thin-film layer against mechanical damage; and an intermediate layer applied on the barrier thin-film layer between barrier thin-film layer and cover layer and including a curable material designed such that when the non-cured intermediate layer is applied to the barrier thin-film layer, particle impurities at the surface of the barrier thin-film layer are enclosed by the intermediate layer and the applied intermediate layer has a substantially planar surface, and that after the intermediate layer has been cured, mechanical loads on the barrier thin-film layer as a result of particle impurities during the application of the cover layer are reduced by the intermediate layer. | 07-31-2014 |
| 20140264960 | ENCAPSULATION OF ADVANCED DEVICES USING NOVEL PECVD AND ALD SCHEMES - Embodiments of a multi-layer environmental barrier for a semiconductor device and methods of manufacturing the same are disclosed. In one embodiment, a semiconductor device is formed on a semiconductor die. The semiconductor die includes a semiconductor body and a passivation structure on the semiconductor body. A multi-level environmental barrier is provided on the passivation structure. The multi-layer environmental barrier is a low-defect multi-layer dielectric film that hermetically seals the semiconductor device from the environment. In one embodiment, the multi-layer environmental barrier has a defect density of less than 10 defects per square centimeter (cm | 09-18-2014 |
| 20150014866 | Semiconductor Device And Method For Producing A Glass-Like Layer - A method for producing a glass-like layer ( | 01-15-2015 |
| 20150344697 | ENCAPSULATING COMPOSITION, BARRIER LAYER INCLUDING SAME, AND ENCAPSULATED APPARATUS INCLUDING SAME - The present invention relates to an encapsulating composition, a barrier layer including the same, and an encapsulated apparatus including the same, and the composition comprises (A) a photocurable monomer and (B) a photocurable monomer containing a carboxylic acid group, wherein (B) the photocurable monomer containing the carboxylic acid group has an amide bond. | 12-03-2015 |
| 20150348803 | DIRECT/LAMINATE HYBRID ENCAPSULATION AND METHOD OF HYBRID ENCAPSULATION - An encapsulated device achieves good water vapor transmission rates while reducing the amount of time needed in an inert environment, and thereby reducing the size of the deposition tool used to encapsulate the device. The encapsulated device includes a first barrier layer deposited directly on the device, and a first adhesive and first laminate on the first barrier layer. The laminate comprises a polymeric substrate and a second barrier layer on the substrate. The first barrier layer has a water vapor transmission rate suitable to allow lamination of the laminate on the first barrier layer in a non-inert environment. A method of making an encapsulated device comprises depositing a first barrier layer on the device in an inert environment, applying an adhesive on the first barrier layer in a non-inert environment, and applying a first laminate on the first adhesive in the non-inert environment. | 12-03-2015 |
| 20150353668 | PHOTOCURABLE COMPOSITION, BARRIER LAYER COMPRISING SAME, AND ENCAPSULATED DEVICE COMPRISING SAME - The present invention relates to: a photocurable composition comprising a silicone-based compound having a repeating unit represented by the chemical formula A (linear or branched alkylene oxide having a carbon number | 12-10-2015 |
| 20150357494 | GAS PERMEATION BARRIER MATERIAL AND ELECTRONIC DEVICES CONSTRUCTED THEREWITH - A gas permeation barrier structure comprises a rigid or flexible substrate, an oxide or nitride layer deposited thereon by atomic layer deposition (ALD), and a polymeric clear coat. The presence of the polymeric clear coat permits the barrier structure to maintain resistance to permeation of gases including oxygen and water vapor longer than would a structure in which the ALD layer is directly exposed to atmosphere. | 12-10-2015 |
| 20160035638 | SUPPORT BASE-ATTACHED ENCAPSULANT, ENCAPSULATED SUBSTRATE HAVING SEMICONDUCTOR DEVICES MOUNTED THEREON, ENCAPSULATED WAFER HAVING SEMICONDUCTOR DEVICES FORMED THEREON, SEMICONDUCTOR APPARATUS, AND METHOD FOR MANUFACTURING SEMICONDUCTOR APPARATUS - Support base-attached encapsulant for collectively encapsulating a semiconductor device mounting surface of a substrate or semiconductor device forming surface of a wafer, containing a support base having one fibrous film or a plurality of the fibrous films being laminated, the fibrous film subjected to surface treatment with an organosilicon compound, and a resin layer of thermosetting resin formed on one surface of the support base. The support base-attached encapsulant inhibit the substrate or wafer from warping and semiconductor devices from peeling away from the substrate, and collectively encapsulate the semiconductor device mounting surface of the substrate or the semiconductor device forming surface of the wafer even when a large-diameter wafer or large-area substrate is encapsulated. The support base-attached encapsulant has uniformity and homogeneity without opening or tangle of fiber, and is excellent in reliability such as heat resistance, electrical insulation property, moisture resistance, excellent in versatility, economical efficiency, and mass-productivity. | 02-04-2016 |
| 20160043012 | FIBER-CONTAINING RESIN SUBSTRATE, DEVICE-MOUNTING SUBSTRATE AND DEVICE-FORMING WAFER, SEMICONDUCTOR APPARATUS, AND METHOD FOR PRODUCING SEMICONDUCTOR APPARATUS - A fiber-containing resin substrate for collectively encapsulating a semiconductor-device-mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor-device-forming surface of a wafer on which a semiconductor device is formed, including a resin-impregnated fibrous base material which is obtained by impregnating a fibrous base material with a thermosetting resin and semi-curing or curing the thermosetting resin and has a linear expansion coefficient (ppm/° C.) in an X-Y direction of less than 3 ppm, and an uncured resin layer formed of an uncured thermosetting resin on one side of the resin-impregnated fibrous base material. | 02-11-2016 |
| 20160064299 | STRUCTURE AND METHOD TO MINIMIZE WARPAGE OF PACKAGED SEMICONDUCTOR DEVICES - A packaged semiconductor device includes a substrate, an electronic device coupled to the substrate, encapsulant including a first major surface surrounding the electronic device, and an oxygen barrier layer within fifty percent of a thickness of the encapsulant from a second major surface of the encapsulant. The oxygen barrier covers at least a portion of an area of the second major surface of the encapsulant to help reduce or eliminate warping of the encapsulant and/or the substrate of the packaged semiconductor device due to oxidation. A thickness of the oxygen barrier layer is less than 100 microns. | 03-03-2016 |
| 20160079137 | PRINTED CIRCUIT MODULE HAVING SEMICONDUCTOR DEVICE WITH A POLYMER SUBSTRATE AND METHODS OF MANUFACTURING THE SAME - A printed circuit module and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and a buried oxide (BOX) layer over the at least one device layer. A polymer layer is disposed over the BOX layer, wherein the polymer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 10 | 03-17-2016 |
| 20160133540 | MULTI-LAYER PACKAGING SCHEME FOR IMPLANT ELECTRONICS - The present invention provides a micropackaged device comprising: a substrate for securing a device with a corrosion barrier affixed to the substrate, wherein the corrosion barrier comprises a first thin-film layer, a metal film coating the thin-film layer and a second thin-film layer to provide a sandwich layer; and optionally at least one feedthrough disposed in the substrate to permit at least one input and or at least one output line into the micropackaged device, wherein the micropackaged device is encapsulated by the corrosion barrier. Methods of producing the micropackaged device are also disclosed. | 05-12-2016 |
| 20160189997 | AUXILIARY SHEET FOR LASER DICING - An auxiliary sheet for laser dicing is provided, with which partial adhesion of a substrate film to a processing table is not caused even when dicing a workpiece by using a high output laser light and at a high scan speed, therefore, workability does not decline after that. An adhesive layer is stacked on one surface of the substrate film in the laser dicing auxiliary sheet and a functional layer is stacked on the other surface (a surface to contact with a processing chuck table during dicing), and the functional layer is formed by using a mixture containing metal oxide fine particles, in which an average particle diameter of the primary particle is 5 to 400 nm, and emulsion particles of a thermoplastic resin as a binder material. | 06-30-2016 |
| 20180025960 | CIRCUIT PACKAGE | 01-25-2018 |
| 20190147312 | LAMINATION SYSTEM, IC SHEET, SCROLL OF IC SHEET, AND METHOD FOR MANUFACTURING IC CHIP | 05-16-2019 |
| 20190148670 | FLEXIBLE DISPLAY PANEL AND FLEXIBLE DISPLAY APPARATUS | 05-16-2019 |
