Entries |
Document | Title | Date |
20080224329 | PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES - Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a microelectronic device includes attaching a microelectronic die to a support member by forming an attachment feature on at least one of a back side of the microelectronic die and the support member. The attachment feature includes a volume of solder material. The method also includes contacting the attachment feature with the other of the microelectronic die and the support member, and reflowing the solder material to join the back side of the die and the support member via the attachment feature. In several embodiments, the attachment feature is not electrically connected to internal active structures of the die. | 09-18-2008 |
20080237894 | INTEGRATED CIRCUIT PACKAGE AND METHOD FOR THE SAME - Disclosed are an integrated circuit chip package and a method of connecting an integrated circuit chip and an attachment subject to each other while interposing an adhesive therebetween. The connection between integrated circuit chip and the attachment subject stress often leads to component failure and the addition of an interface layer with a similar thermal expansion coefficient improves reliability. The method may include applying the adhesive on the attachment subject, forming an interface layer between the integrated circuit chip and the adhesive wherein the interface layer has a thermal expansion coefficient similar to a thermal expansion coefficient of the integrated circuit chip. By connecting an integrated circuit chip and the attachment subject to each other by an adhesive via the interface layer, the generation of delamination is minimized and reliability is improved. | 10-02-2008 |
20080251947 | COF FLEXIBLE PRINTED WIRING BOARD AND SEMICONDUCTOR DEVICE - A COF flexible printed wiring board, used for a semiconductor device, contains an insulating layer, a wiring pattern formed of a conductor layer on one side of the insulating layer, on which a semiconductor chip is to be mounted, and a heat-resistant releasing layer, wherein the releasing layer is formed from a releasing agent and is provided on a surface of the insulating layer, which surface is opposite to the mounting side of the semiconductor chip, and the releasing layer and the insulating layer, as a whole, exhibit an optical transmittance of 50% or higher, excluding the area corresponding to the wiring pattern. | 10-16-2008 |
20080251948 | CHIP PACKAGE STRUCTURE - A chip package structure including a first substrate, a second substrate, a plurality of bumps, a first B-staged adhesive layer and a second B-staged adhesive layer is provided. The first substrate has a plurality of first bonding pads. The second substrate has a plurality of second bonding pads, and the second substrate is disposed above the first substrate. The bumps are disposed between the first substrate and the second substrate, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps. The first B-staged adhesive layer is adhered on the first substrate. The second B-staged adhesive layer is adhered between the first B-staged adhesive layer and the second substrate, wherein the first B-staged adhesive layer and the second B-staged adhesive layer encapsulate the bumps. | 10-16-2008 |
20080258313 | CONNECTING MICROSIZED DEVICES USING ABLATIVE FILMS - A method of providing connectivity to a microsized device, the method includes the steps of providing an ablative base material having at least a top surface; providing a die having a first and second surface and having bonding pads at least upon the first surface; placing the die with the at least first surface of the die contacting the at least first surface of the ablative base material; and ablating a channel in the ablative material proximate to the die. | 10-23-2008 |
20080265440 | Semiconductor Device with a Semiconductor Chip and Electrical Connecting Elements to a Conductor Structure - A semiconductor device with a semiconductor chip and electrical connecting elements to a conductor structure and a method for producing the same is disclosed. In one embodiment, the conductor structure has a chip island and contact terminal areas. These are arranged in a coplanar manner in relation to each other. The semi-conductor structure is selectively coated by a filled plastic film. Both the semiconductor chip and the electrical connecting elements are mechanically fixed and electrically connected by means of the film-covered chip island and the film-covered contact terminal areas, respectively. | 10-30-2008 |
20080265441 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The invention enhances moisture resistance between a supporting body and an adhesive layer to enhance the reliability of a semiconductor device. A semiconductor device of the invention has a first insulation film formed on a semiconductor element, a first wiring formed on the first insulation film, a supporting body formed on the semiconductor element with an adhesive layer being interposed therebetween, a third insulation film covering the back surface of the semiconductor element onto the side surface thereof and the side surface of the adhesive layer, a second wiring connected to the first wiring and extending onto the back surface of the semiconductor element with the third insulation film being interposed therebetween, and a protection film formed on the second wiring. | 10-30-2008 |
20080290529 | SEMICONDUCTOR DEVICE AND PROCESS FOR FABRICATION THEREOF - A semiconductor chip is attached to a lead frame with a filmy organic die-bonding material having a water absorption of 1.5% by volume or less; having a saturation moisture absorption of 1.0% by volume or less, having a residual volatile component in an amount not more than 3.0% by weight, having a modulus of elasticity of 10 MPa or less at a temperature of 250 ° C. The semiconductor device thus obtained can be free from occurrence of reflow cracks during reflow soldering for the packaging of semiconductor devices. | 11-27-2008 |
20080296782 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed. One embodiment provides a device including a carrier, an electrically insulating layer applied onto the carrier, an adhesive layer applied to the electrically insulating layer. A first semiconductor chip applied to the adhesive layer. | 12-04-2008 |
20080296783 | RESIN MOLDED SEMICONDUCTOR DEVICE - A semiconductor device includes a circuit board, a wiring part, a protective coating glass, and a resin part. The circuit board has an approximately rectangular shape. The protective coating glass is disposed on the circuit board and is arranged on an inside of the circuit board in such a manner that an outer-peripheral end of the protective coating glass is away from each of four sides of the circuit board at a first distance and is away from each of four corners of the circuit board at a second distance that is larger than the first distance. The resin part seals the circuit board, the wiring part, and the protective coating glass in such a manner that an outer-peripheral end portion of the circuit board that is located on an outside of the protective coating glass directly contact with the resin part. | 12-04-2008 |
20080303176 | Patterned Die Attach and Packaging Method Using the Same - A semiconductor die is attached to a packaging substrate by a patterned layer of conductive metal that includes voids. The voids provide a space into which the metal may expand when heated in order to avoid placing mechanical stress on the bonds caused by mismatches in the thermal coefficients of thermal expansion of the die, the conductive metal bond layer and the substrate. An additional coating of conductive metal may be flowed over the bond lines to reinforce the bonds. | 12-11-2008 |
20080308953 | FABRICATED ADHESIVE MICROSTRUCTURES FOR MAKING AN ELECTRICAL CONNECTION - An integrated circuit chip has one or more electrically conductive nano-fibers formed on one or more contact pads of the integrated circuit chip. The one or more electrically conductive nano-fibers are configured to provide an adhesive force by intermolecular forces and establish an electrical connection with one or more contact pads disposed on the surface of a chip package. | 12-18-2008 |
20080315439 | QUAD FLAT NON-LEADED CHIP PACKAGE - A Quad Flat Non-leaded (QFN) chip package including a patterned conductive layer, a first solder resist layer, a chip, a plurality of bonding wires and a molding compound is provided. The patterned conductive layer has a first surface and a second surface opposite to each other. The first solder resist layer is disposed on the first surface, wherein a part of the first surface is exposed by the first solder resist layer. The chip is disposed on the first solder resist layer, wherein the first solder resist layer is between the patterned conductive layer and the chip. The bonding wires are electrically connected to the chip and the patterned conductive layer exposed by the first solder resist layer. The molding compound encapsulates the pattern conductive layer, the first solder resist layer, the chip and the bonding wires. | 12-25-2008 |
20090001610 | SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER - A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die. | 01-01-2009 |
20090008802 | FLEXIBLE CARRIER FOR HIGH VOLUME ELECTRONIC PACKAGE FABRICATION - An assembly for producing partially packaged semiconductor devices is provided. In one embodiment, the assembly includes a magnetic plate; a flexible substrate disposed adjacent the magnetic plate and having two surfaces; a nonstick coating disposed on one surface of the flexible substrate thereby exposing a nonstick surface; and a tape layer having two surfaces. The tape layer is adhesively attached to the nonstick surface to expose a surface of the tape layer. A frame is disposed on the exposed surface of the tape layer, and a plurality of integrated circuit (IC) die is positioned within the frame and supported by the tape layer. A panel is formed within the frame that at least partially surrounds the plurality of IC die and that contacts the tape layer. | 01-08-2009 |
20090039532 | SEMICONDUCTOR DEVICE PACKAGE HAVING A BACK SIDE PROTECTIVE SCHEME - The present invention provides a semiconductor device package, comprising a die having a back surface and an active surface formed thereon; an adhesive layer formed on the back surface of the die; a protection substrate formed on the adhesive layer; and a plurality of bumps formed on the active surface of the die for electrically connection. The present invention further provides a method for forming a semiconductor device package, comprising providing a plurality of die having a back surface and an active surface on a wafer; forming an adhesive layer on the back surface of the die; forming a protection substrates on the adhesive layer; forming a plurality of bumps on the active surface of each die; and dicing the plurality of die into individual die for singulation. | 02-12-2009 |
20090039533 | ADHESION STRUCTURE FOR A PACKAGE APPARATUS - A packaging apparatus is disclosed having a substrate with an interior area and a peripheral area. The substrate is configured to have an integrated circuit chip bonded to an adhesion structure located substantially within the interior area of the substrate. The substrate is further configured to have the integrated circuit chip electrically coupled to either the interior area on a distal surface of the substrate or the peripheral area on a proximate side of the substrate through a conductive structure. The adhesion structure includes a bonding area configured to accept an adhesive layer formed between the integrated circuit chip and the interior area of the substrate, and at least one protrusion structure being formed substantially within the bonding area of the substrate and configured to define a gap between the integrated circuit chip and the interior area of the substrate. | 02-12-2009 |
20090045528 | Semiconductor device - An electronic structural member or a semiconductor device having conductive bumps is provided. The conductive bump includes an organic buffer layer with an undercut structure, and the conductive bump is deformable during the bonding process so as to compensate the height difference between the conductive bumps. In addition, an adhesive is further disposed between the IC chip and the substrate, and partial adhesive fills in the undercut structure, such that not only the adhesive area can be increased to enhance the bonding force between the IC chip and the substrate, but the return force of the adhesive can be reduced. | 02-19-2009 |
20090065953 | Chip module and a fabrication method thereof - A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure. | 03-12-2009 |
20090085228 | DIE WARPAGE CONTROL - A semiconductor package comprises a substrate; a semiconductor die that comprises a set of one or more interconnects on one side to couple to the substrate; and a shape memory alloy layer provided on another side of the semiconductor die to compensate warpage of the semiconductor die. The shape memory alloy layer deforms with warpage of the semiconductor die and changes from the deformed shape to an original shape to flatten the semiconductor die in response to rise of a temperature during coupling of the die to the substrate. | 04-02-2009 |
20090108473 | DIE-ATTACH MATERIAL OVERFLOW CONTROL FOR DIE PROTECTION IN INTEGRATED CIRCUIT PACKAGES - Methods, systems, and apparatuses for integrated circuit packages are provided. An integrated circuit package includes a metal layer, an integrated circuit die, and an adhesive material. The metal layer has a first surface that has a die-attach region. The metal layer further has one or more recessed regions formed in the first surface of the metal layer adjacent to the die-attach region. The adhesive material attaches a first surface of the die to the die-attach region and at least partially fills the recessed region(s). Excess adhesive material flows into the recessed region(s) during application of the die to the die-attach region, so that the side surfaces of the die remain substantially uncovered by the adhesive material. By preventing the excess adhesive material from covering the side surfaces of the die, the adhesive material is prevented from penetrating the side surfaces of the die, which could damage the die. | 04-30-2009 |
20090146320 | FABRICATED ADHESIVE MICROSTRUCTURES FOR MAKING AN ELECTRICAL CONNECTION - An integrated circuit chip has one or more electrically conductive nano-fibers formed on one or more contact pads of the integrated circuit chip. The one or more electrically conductive nano-fibers are configured to provide an adhesive force by intermolecular forces and establish an electrical connection with one or more contact pads disposed on the surface of a chip package. | 06-11-2009 |
20090179335 | PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME - A printed circuit board (PCB) and a semiconductor package that are configured to prevent delamination and voids. In one example embodiment, the semiconductor package includes a PCB having a base substrate on which conductive patterns are formed and which includes an interior region having a die paddle for receiving a semiconductor chip and an exterior region disposed outside the interior region. The PCB also includes a first solder resist formed on a portion of the base substrate corresponding to the interior region and a second solder resist formed on a portion of the base substrate corresponding to the exterior region. The second solder resist may also have a greater surface roughness than the surface roughness of the first solder resist. | 07-16-2009 |
20090218703 | Lamination Tape for Reducing Chip Warpage and Semiconductor Device Containing Such Tape - A lamination tape is disclosed which includes a base film with an adhesive layer on one side wherein the coefficient of thermal expansion (CTE) of the adhesive layer is adapted so as to reduce warpage of a semiconductor die when the lamination tape is attached to the passive side of the semiconductor die. | 09-03-2009 |
20090230567 | METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE - A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness, the package may be protected from excessive mechanical stress generated during grinding by applying a protective tape to enclose interconnects formed on the package. This way, the protective tape provides support to the semiconductor package during package grinding involving the mold material as well as the die. In the post-grind package, the grinded die surface may be exposed and substantially flush with the mold material. The protective tape may then be removed to prepare the post-grind package for connection with an external device or PCB. | 09-17-2009 |
20090236757 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING - A semiconductor device and method for manufacturing. One embodiment includes a carrier, a structured layer arranged over the carrier and a semiconductor chip applied to the structured layer. The structured layer includes a first structure made of an elastic material and a second structure made of an adhesive material. | 09-24-2009 |
20090261482 | SEMICONDUCTOR PACKAGE AND METHOD OF MAKING SAME - A semiconductor package ( | 10-22-2009 |
20090261483 | ADHESIVE COMPOSITION, ADHESIVE COMPOSITION FOR CIRCUIT CONNECTION, CONNECTED BODY SEMICONDUCTOR DEVICE - An adhesive composition containing: (a) a thermoplastic resin; (b) a radical-polymerizable compound including two or more (meth)acryloyl groups; (c) a curing agent that generates a radical by photoirradiation of 150 to 750 nm and/or heating at 80 to 200° C.; and (d) a liquid rubber having a viscosity of 10 to 1000 Pa·s at 25° C. | 10-22-2009 |
20090309241 | ULTRA THIN DIE ELECTRONIC PACKAGE - A method for forming an ultra thin die electronic package is provided. The method includes disposing a first polymer film on a first substrate. The method also includes applying a first adhesive layer to the first polymer film on the first substrate. The method further includes disposing at least one die on the first adhesive layer on the first substrate. The method also includes disposing a second polymer film on at least one additional substrate. The method further includes applying a second adhesive layer to the second polymer film on the at least one additional substrate. The method further includes attaching the first substrate and the at least one additional substrate via the first adhesive layer and the second adhesive layer such that the at least one die is interspersed between. The method also includes forming multiple vias on at least one of a top side, and at least one of a bottom side of the first and the at least one additional substrate, wherein the multiple vias are attached to the die. The method further includes forming an electrical interconnection between the first substrate, the at least one additional substrate and a die pad of the at least one die. | 12-17-2009 |
20100102459 | SEMICONDUCTOR DEVICE - The semiconductor device includes: a semiconductor chip; a die pad for holding the semiconductor chip; a lead; and a sealing resin material for sealing the semiconductor chip, the die pad and an inner portion of the lead. The die pad has an upset portion protruding upward to form a flat face smaller in area than the semiconductor chip, and the portion of the die pad excluding the upset portion is covered with a buffer resin material smaller in elasticity than the sealing resin material. | 04-29-2010 |
20100109168 | CONNECTING MICROSIZED DEVICES USING ABLATIVE FILMS - A method of providing connectivity to a microsized device, the method includes the steps of providing an ablative base material having at least a top surface; providing a die having a first and second surface and having bonding pads at least upon the first surface; placing the die with the at least first surface of the die contacting the at least first surface of the ablative base material; and ablating a channel in the ablative material proximate to the die. | 05-06-2010 |
20100123258 | Low Temperature Board Level Assembly Using Anisotropically Conductive Materials - An integrated circuit may be secured to a substrate using an anisotropically conductive adhesive that may be cured at a temperature of less than 150° C. In some embodiments, an acrylic resin with embedded metallic particles may be used as the anisotropically conductive adhesive. In some embodiments, the board level reliability of the resulting product may be improved through the use of the anisotropically conductive adhesive that may be cured at a temperature of less than 150° C. | 05-20-2010 |
20100127409 | MICROELECTRONIC DEVICE WAFERS INCLUDING AN IN-SITU MOLDED ADHESIVE, MOLDS FOR IN-SITU MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS, AND METHODS OF MOLDING ADHESIVES ON MICROELECTRONIC DEVICE WAFERS - A microelectronic device wafer includes an adhesive molded in-situ on the wafer. Adhesives and wafers are positioned in molds and a method that includes drawing in the molds at least a partial vacuum and partially curing the adhesive provides an in-situ molded adhesive that is positioned on the wafer. The adhesives can be in liquid, solid, or other forms prior to molding. During molding, the adhesive can be partially cured by heating or irradiating. | 05-27-2010 |
20100155966 | GRID ARRAY PACKAGES - A semiconductor device assembly includes a substrate and a semiconductor die adjacent to a first surface of the substrate. The substrate also includes a second surface opposite from the first surface, an opening extending from the first surface and the second surface, contact pads on the second surface, and substrate pads on the second surface, adjacent to the opening. Bond pads of the semiconductor die are aligned with the opening through the substrate. Intermediate conductive elements, such as bond wires, extend from bond pads of the semiconductor die, through the opening, to substrate pads on the opposite, second surface of the substrate. An encapsulant, which fills the opening and covers the intermediate conductive elements, protrudes beyond a plane in which the second surface of the substrate is located. Discrete conductive elements, such as solder balls, may protrude from the contact pads of the substrate. | 06-24-2010 |
20100237510 | PACKAGED MICROELECTRONIC DEVICES AND METHODS FOR MANUFACTURING PACKAGED MICROELECTRONIC DEVICES - Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die. | 09-23-2010 |
20100264553 | PACKAGED ELECTRONIC DEVICE HAVING METAL COMPRISING SELF-HEALING DIE ATTACH MATERIAL - A method of assembling an electronic device and electronic packages therefrom. A die attach adhesive precursor is placed between a top surface of a workpiece and an IC die. The die attach adhesive precursor includes metal particles, a first plurality of first microcapsules having a polymerizable material inside, and a second plurality of second microcapsules having a polymerization agent inside to form a first polymer upon rupture of first and second microcapsules. A force sufficient to rupture at least a portion of the first plurality of first microcapsules and at least a portion of the second plurality of second microcapsules is applied to form a self-healing die attach adhesive wherein the first polymer binds the plurality of metal particles and the remaining microcapsules and secures the IC die to the top surface of the workpiece. The self-healing die attach adhesive generally includes at least 90 vol. % metal. | 10-21-2010 |
20100289158 | ADHESIVE FILM, DICING DIE BONDING FILM AND SEMICONDUCTOR DEVICE USING THE SAME - The present invention relates to an adhesive film, a dicing die bonding film and a semiconductor device. More specifically, the adhesive film of the present invention is characterized by comprising a base film and an adhesive layer and having a yield strength of 20 to 50 gf and a slope of tensile elastic region of 30 to 80 gf/mm at a thickness of 5 to 50 μm. In the present adhesive film, the yield strength and the slope of tensile elastic region are controlled so that the incidence of burrs may be predicted and controlled depending on thickness of an adhesive layer. The dicing die bonding film, and the semiconductor device comprising the same have lower incidence of burrs and an excellent workability and reliability. | 11-18-2010 |
20100289159 | Semiconductor Die Collet and Method - Semiconductor device assembly die attach apparatus and methods are disclosed for improvements in attaching a semiconductor die to a die pad. Preferred methods of the invention include steps for positioning a semiconductor die on a bearing surface of a collet and retaining the die on the bearing surface of the collet using a vacuum force. A pushing force is also exerted on the die adjacent to the applied vacuum force. The pushing force opposes flexion of the die in the direction of the vacuum force. In further steps, the die is placed on a die pad, and die attach adhesive is interposed between the die and the die pad. A preferred method includes applying a pushing force to bow the central region of the die toward the die pad. In a preferred apparatus of the invention, a collet has a body including a bearing surface for receiving a die and a vacuum for holding it. A chamber encompassed by the bearing surface is adapted for applying the force of expelled gas against a die borne on the bearing surface. The collet is configured for holding a die surface against the bearing surface and for simultaneously pushing outward on the center region of the die so held. | 11-18-2010 |
20100295190 | PHOTOSENSITIVE ADHESIVE COMPOSITION, FILM-LIKE ADHESIVE, ADHESIVE SHEET, METHOD FOR FORMING ADHESIVE PATTERN, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A photosensitive adhesive composition comprising (A) an alkali-soluble polymer, (B) a thermosetting resin, (C) one or more radiation-polymerizable compounds and (D) a photoinitiator, wherein the 5% weight reduction temperature of the mixture of all of the radiation-polymerizable compounds in the composition is 200° C. or higher. | 11-25-2010 |
20100308475 | COMPOSITE OF AT LEAST TWO SEMICONDUCTOR SUBSTRATES AND A PRODUCTION METHOD - A composite, including a first semiconductor substrate that is secured by soldering material to at least one second semiconductor substrate, a eutectic being formed between the soldering material and the second semiconductor substrate and/or at least one layer possibly provided on the semiconductor substrate. It is provided that the eutectic is formed between the soldering material and a microstructure, which is formed in the region of contact with the soldering material on the second semiconductor substrate and/or the layer. Also described is a production method. | 12-09-2010 |
20100314783 | PHOTOSENSITIVE ADHESIVE COMPOSITION, AND OBTAINED USING THE SAME, ADHESIVE FILM, ADHESIVE SHEET, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, SEMICONDUCTOR DEVICE AND ELECTRONIC PART - A photosensitive adhesive composition comprising: (A) a polyimide having a carboxyl group as a side chain, whereof the acid value is 80 to 180 mg/KOH; (B) a photo-polymerizable compound; and (C) a photopolymerization initiator. | 12-16-2010 |
20110001251 | ADHESIVE COMPOSITION, BONDING MEMBER USING THE ADHESIVE COMPOSITION, SUPPORT MEMBER FOR SEMICONDUCTOR MOUNTING, SEMICONDUCTOR DEVICE, AND PROCESSES FOR PRODUCING THESE - Disclosed is an adhesive composition, comprising, as essential components, a thermosetting resin component A and a high-molecular component B which are evenly compatible and miscible with each other at a temperature of 5 to 40° C. without being separated from each other, and a curing agent component C, | 01-06-2011 |
20110037180 | DICING DIE BONDING FILM HAVING EXCELLENT BURR PROPERTY AND RELIABILITY AND SEMICONDUCTOR DEVICE USING THE SAME - The present invention relates to a dicing die bonding film employed in a semiconductor packaging process, and a semiconductor device using the same. The dicing die bonding film is configured such that a ratio X/Y of adhesive power X between the wafer and the adhesive layer of the die bonding portion to tacky power Y between the die bonding portion and the tacky layer of the dicing portion is 0.15 to 1, and the adhesive layer of the die bonding portion has a storage modulus of 100 to 1000 MPa at a normal temperature. The dicing die bonding film according to the present invention reduces burr generation in dicing process, and thereby preparing a semiconductor device having excellent reliability without inferiority caused by bad connection reliability due to the burr covering a bonding pad. | 02-17-2011 |
20110057331 | THERMOSETTING DIE BONDING FILM, DICING DIE BONDING FILM AND SEMICONDUCTOR DEVICE - An object of the present invention is to provide a thermosetting die-bonding film with which a die-bonding film is suitably broken with a tensile force. The object is achieved by a thermosetting die-bonding, film at least having an adhesive layer that is used to fix a semiconductor chip to an adherend, in which the breaking energy per unit area is 1 J/mm | 03-10-2011 |
20110057332 | SEMICONDUCTOR CHIP WITH CONDUCTIVE ADHESIVE LAYER AND METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor chip with a conductive adhesive layer including steps of: forming a conductive adhesive layer on back side of a wafer on which a semiconductor element is formed; laminating a flexible substrate on back side of the conductive adhesive layer; forming a dicing groove which reaches from a front of the wafer to the conductive adhesive layer and a bottom of which is in the conductive adhesive layer; pressing from back side of the flexible substrate in such a way that the conductive adhesive layer is cut with the dicing groove as an origin point; and separating the flexible substrate from the conductive adhesive layer. | 03-10-2011 |
20110079927 | PHOTOSENSITIVE ADHESIVE COMPOSITION, AND OBTAINED USING THE SAME, ADHESIVE FILM, ADHESIVE SHEET, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, SEMICONDUCTOR DEVICE AND ELECTRONIC PART - A photosensitive adhesive composition comprising: (A) a polyimide having a carboxyl group as a side chain, whereof the acid value is 80 to 180 mg/KOH; (B) a photo-polymerizable compound; and (C) a photopolymerization initiator. | 04-07-2011 |
20110084408 | THERMOSETTING DIE-BONDING FILM - An object of the present invention is to provide a thermosetting die-bonding film that is capable of preventing warping of an adherend by suppressing curing contraction of the film after die bonding, and a dicing die-bonding film. The present invention relates to a thermosetting die-bonding film for adhering and fixing a semiconductor element onto an adherend, comprising at least an epoxy resin and a phenol resin as a thermosetting component, wherein the ratio of the number of moles of epoxy groups to the number of moles of phenolic hydroxyl groups in the thermosetting component is in a range of 1.5 to 6. | 04-14-2011 |
20110084409 | SEMICONDUCTOR ELEMENT MOUNTING BOARD - A semiconductor element mounting board includes: a board having surfaces; a semiconductor element provided at a side of one of the surfaces of the board; a bonding agent layer through which the board and the semiconductor element are bonded together, the bonding agent layer having a storage modulus at 25° C. of 5 to 1,000 MPa; a first layer into which the semiconductor element is embedded, the first layer provided on the one surface of the board; a second layer provided on the other surface of the board, the second layer being constituted from the same material as that of the first layer, the constituent material of the second layer having the same composition ratio as that of the constituent material of the first layer; and surface layers provided on the first and second layers, respectively, each of the surface layers being formed from at least a single layer. In the semiconductor element mounting board, a coefficient of thermal expansion of each surface layer in an inplane direction thereof measured based on JIS C 6481 at a temperature of 20° C. to a glass-transition temperature Tg | 04-14-2011 |
20110121466 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WARP-FREE CHIP - An integrated circuit package system includes: a semiconductor chip; a stress-relieving layer on the semiconductor chip; an adhesion layer on the stress relieving layer; and electrical interconnects bonded to the adhesion layer. | 05-26-2011 |
20110133345 | MANUFACTURING METHOD FOR ELECTRONIC DEVICE - There is provided an electronic device manufacturing method capable of manufacturing a device having a preferable communication characteristic at a low cost with a high productivity. The manufacturing method is for manufacturing an electronic device including a plurality of IC chips | 06-09-2011 |
20110133346 | ADHESIVE FOR CONNECTION OF CIRCUIT MEMBER AND SEMICONDUCTOR DEVICE USING THE SAME - An adhesive for connecting circuit members, which is interposed between a semiconductor chip having protruding connecting terminals and a board having wiring patterns formed thereon for electrically connecting the connecting terminals and the wiring patterns facing each other and bonding the semiconductor chip and the board by applying pressure/heat, containing a resin composition containing a thermoplastic resin, a crosslinkable resin and a hardening agent for forming a crosslink structure of the crosslinkable resin; and composite oxide particles dispersed in the resin composition. | 06-09-2011 |
20110147952 | DICING DIE-BONDING FILM - The invention relates to a dicing die-bonding film having a pressure-sensitive adhesive layer ( | 06-23-2011 |
20110169173 | WIRING SUBSTRATE FOR A SEMICONDUCTOR CHIP AND SEMICONDUCOTOR PACKAGE HAVING THE WIRING SUBSTRATE - A wiring substrate for a semiconductor chip includes a substrate having a first surface and a second surface opposite to the first surface. The substrate has at least one slot from the first surface to the second surface that exposes chip pads of a semiconductor chip mounted to the first surface. The substrate has first and second regions divided by the slot. A plurality of bonding pads is arranged along both side portions of the slot and the bonding pads are connected to bonding wires that are drawn from the chip pads through the slot. First and second conductive patterns are respectively formed in the first and second regions and respectively connected to the at least one bonding pad. A merging pattern extends from the first region to the second region to electrically connect the first conductive pattern and the second conductive pattern. A merging wire electrically connects the merging pattern and the at least one chip pad. | 07-14-2011 |
20110175240 | CHIP MODULE - A chip module and a fabricating method thereof are provided. Firstly, a substrate is provided. Next, a chip is assembled on the substrate and electrically connected with the substrate. Afterward, a plurality of passive units is assembled on the substrate in the style of encircling the chip. Then, a first glue structure is filled between the passive units so that an encircled area is defined by the first glue structure and the passive units. Then, a second glue structure is filled in the encircled area so that the chip is covered by the second glue structure. | 07-21-2011 |
20110180939 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - Provided is a method of manufacturing a semiconductor device capable of adhering semiconductor elements and a support member for mounting semiconductor elements, such as lead frames, organic substrates or the like, even in a relatively low temperature range without damaging adhesion property and workability and of suppressing the occurrence of voids. The method of manufacturing a semiconductor device according to the invention is a method of manufacturing a semiconductor device comprising a semiconductor element and a support member adhered to the semiconductor element through a cured material of an adhesive film, wherein the method comprises the steps (a) to (d) in this order;
| 07-28-2011 |
20110187006 | ADHESIVE COMPOSITION, PROCESS FOR PRODUCING THE SAME, ADHESIVE FILM USING THE SAME, SUBSTRATE FOR MOUNTING SEMICONDUCTOR AND SEMICONDUCTOR DEVICE - Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor. | 08-04-2011 |
20110193244 | ADHESIVE FILM AND PROCESS FOR PREPARING THE SAME AS WELL AS ADHESIVE SHEET AND SEMICONDUCTOR DEVICE - An object of the present invention is to provide a die-adhering adhesive film which can be laminated on a back of a wafer at a temperature lower than a softening temperature of a protecting tape for an ultra-thin wafer, or a dicing tape to be laminated, can reduce a thermal stress such as warpage of a wafer, can simplify a step of manufacturing a semiconductor device, and is excellent in heat resistance and humidity resistance reliance, an adhesive sheet in which the adhesive film and a dicing tape are laminated, as well as a semiconductor device. | 08-11-2011 |
20110227233 | Packaged Electronic Device Having Metal Comprising Self-Healing Die Attach Material - A method of assembling an electronic device and electronic packages therefrom. A die attach adhesive precursor is placed between a top surface of a workpiece and an IC die. The die attach adhesive precursor includes metal particles, a first plurality of first microcapsules having a polymerizable material inside, and a second plurality of second microcapsules having a polymerization agent inside to form a first polymer upon rupture of first and second microcapsules. A force sufficient to rupture at least a portion of the first plurality of first microcapsules and at least a portion of the second plurality of second microcapsules is applied to form a self-healing die attach adhesive wherein the first polymer binds the plurality of metal particles and the remaining microcapsules and secures the IC die to the top surface of the workpiece. The self-healing die attach adhesive generally includes at least 90 vol. % metal. | 09-22-2011 |
20110241223 | INTEGRATED CIRCUIT PACKAGE SYSTEM WITH WIRE-IN-FILM ISOLATION BARRIER AND METHOD FOR MANUFACTURING THEREOF - A method for manufacturing an integrated circuit package in package system includes: providing a substrate having a first wire-bonded die with an active side mounted above; connecting the active side of the first wire-bonded die to the substrate with a bond-wire; mounting a wire-in-film adhesive having an isolation barrier over the first wire-bonded die; and encapsulating the first wire-bonded die, the bond-wires, and the wire-in-film adhesive with an encapsulation. | 10-06-2011 |
20110291301 | Method for Producing Semiconductor Components, and Corresponding Semiconductor Component - A method for producing semiconductor components and a component obtainable by such a method is disclosed. The method comprises the following steps: fixing a conductive film on a carrier; adhesively bonding semiconductor chips onto the conductive film using an adhesive layer, wherein active surfaces of the semiconductor chips, the active surfaces having connection contacts, are situated on that side of the chips which faces the film; overmolding the chips adhesively bonded onto the conductive film with a molding compound; and releasing the conductive film with the overmolded chips from the carrier. In this case, the adhesive layer is structured in such a way that at least connection contacts of the semiconductor chips are free of the adhesive layer and are kept free of the molding compound. | 12-01-2011 |
20110291302 | METHOD AND APPARATUS FOR MANUFACTURING AN ELECTRONIC ASSEMBLY, ELECTRONIC ASSEMBLY MANUFACTURED WITH THE METHOD OR IN THE APPARATUS - A method of producing an electronic module with at least one electronic component and one carrier. A structure is provided on the carrier so that the electronic component can take a desired target position relative to the structure. The structure is coated with a liquid meniscus suitable for receiving the electronic component. Multiple electronic components are provided at a delivery point for the electronic components. The carrier, with the structure, is moved nearby and opposite to the delivery point, where the delivery point delivers one of the electronic components without contact, while the structure on the carrier is moving near the delivery point, so that after a phase of free movement the electronic component at least partly touches the material, and the carrier, with the structure, is moved to a downstream processing point, while the electronic component aligns itself to the structure on the liquid meniscus. | 12-01-2011 |
20110291303 | Semiconductor Device, Substrate for Producing Semiconductor Device and Method of Producing Them - A semiconductor device includes a die pad, a semiconductor element which is loaded on the die pad, and a sealing resin. A plurality of electrically conductive portions each having a layered structure including a metal foil comprising copper or a copper alloy, and electrically conductive portion plating layers provided at both upper and lower ends of the metal foil are arranged around the die pad. The die pad has a lower die pad plating layer, and the semiconductor element is loaded on the die pad comprising such a die pad plating layer. Electrodes provided on the semiconductor element are electrically connected with top ends of the electrically conductive portions via wires, respectively. The lower electrically conductive portion plating layers of the electrically conductive portions and the die pad plating layer of the die pad are exposed outside from the sealing resin on their back faces. | 12-01-2011 |
20110309529 | MODULE SUBSTRATE THAT ALLOWS REPLACEMENT OF FAULTY CHIPS, SEMICONDUCTOR MODULE HAVING THE SAME, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR MODULE - A module substrate may include a substrate body on which a plurality of chip mounting regions having connection pads are defined. Repair structures may be respectively formed, or placed, in the chip mounting regions. Each repair structure includes conductive layer patterns formed over the connection pads in each chip mounting region, an insulation layer pattern formed over the substrate body in each chip mounting region in such a way as to expose the conductive layer patterns, plastic conductive members formed between the connection pads and the conductive layer patterns, and a plastic insulation member formed between the substrate body and the insulation layer pattern in each chip mounting region. | 12-22-2011 |
20120068363 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIE PADDLES AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: forming a package paddle group having a first package paddle electrically isolated from a second package paddle; attaching an integrated circuit device on the first package paddle and the second package paddle; forming a standoff terminal adjacent the package paddle group and electrically connected to the integrated circuit device; connecting a paddle connector to the integrated circuit device and the first package paddle and another paddle connector to the integrated circuit device and the second package paddle; and forming an encapsulation over the integrated circuit device, the first package paddle, the second package paddle, and the standoff terminal, the encapsulation exposing a portion of the first package paddle, the second package paddle, and the standoff terminal. | 03-22-2012 |
20120068364 | Device and Method for Manufacturing a Device - A device includes a semiconductor material having a first surface. A first material is applied to the first surface and a fiber material is embedded in the first material. | 03-22-2012 |
20120074597 | FLEXIBLE UNDERFILL COMPOSITIONS FOR ENHANCED RELIABILITY - Underfill materials for fabricating electronic devices are described. One embodiment includes an underfill composition including an epoxy mixture, an amine hardener component, and a filler. The epoxy mixture may include a first epoxy comprising a bisphenol epoxy, a second epoxy comprising a multifunctional epoxy, and a third epoxy comprising an aliphatic epoxy, the aliphatic epoxy comprising a silicone epoxy. The first, second, and third epoxies each have a different chemical structure. Other embodiments are described and claimed. | 03-29-2012 |
20120080808 | ADHESIVE COMPOSITION, PROCESS FOR PRODUCING THE SAME, ADHESIVE FILM USING THE SAME, SUBSTRATE FOR MOUNTING SEMICONDUCTOR AND SEMICONDUCTOR DEVICE - Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor. | 04-05-2012 |
20120153508 | THERMOSETTING DIE-BONDING FILM - An object of the present invention is to provide a thermosetting die-bonding film having both storage modulus and high adhering strength that are necessary in manufacturing a semiconductor device and to provide a dicing die-bonding film including the thermosetting die-bonding film. The thermosetting die-bonding film of the present invention is a thermosetting die-bonding film that is used in manufacture of a semiconductor device and includes at least an epoxy resin, a phenol resin, an acrylic copolymer, and a filler, has a storage modulus at 80 to 140° C. before thermal curing in a range of 10 kPa to 10 MPa and a storage modulus at 175° C. before thermal curing in a range of 0.1 to 3 MPa. | 06-21-2012 |
20120211901 | SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND POWER SOURCE DEVICE - A manufacturing of a semiconductor device includes forming one of a layer with a first metal and the layer with a second metal on one of a semiconductor chip mounting area of a support plate and a back surface of the semiconductor chip; forming the other of the layer with the first metal and the layer with the second metal on an area corresponding to a part of the area, in which one of the layer with the first metal and the layer with the second metal, of the other one of the semiconductor chip mounting area and the back surface of the semiconductor chip; and forming a layer which includes an alloy with the first metal and the second metal after positioning the semiconductor chip in the semiconductor chip mounting area to bond the semiconductor chip with the semiconductor chip mounting area. | 08-23-2012 |
20120217660 | SEMICONDUCTOR APPARATUS, METHOD FOR MANUFACTURING THE SAME AND ELECTRIC DEVICE - A semiconductor apparatus includes: a semiconductor device including a first electrode; a substrate including a second electrode and a recess; and a heat-dissipating adhesive material to set the semiconductor device in the recess so as to arrange the first electrode close to the second electrode, wherein the first electrode is coupled to the second electrode and the heat-dissipating adhesive material covers a bottom surface and at least part of a side surface of the semiconductor device. | 08-30-2012 |
20120273974 | ADHESIVE COMPOSITION, CIRCUIT CONNECTING MATERIAL, CONNECTION STRUCTURE OF CIRCUIT MEMBER, AND SEMICONDUCTOR DEVICE - The adhesive composition of the invention comprises a radical generator, a thermoplastic resin and a urethane (meth)acrylate having two or more radical-polymerizing groups in the molecule and a weight-average molecular weight of 3000-30,000. | 11-01-2012 |
20120306105 | Multi-Component Power Structures and Methods For Forming The Same - In one embodiment, a method for forming a multi-component power structure for use in electrically propelled vehicles may include constraining a parent material system between a power component and a thermal device. The parent material system may include a low temperature material having a relatively low melting point and a high temperature material having a relatively high melting point. The relatively low melting point may be less than the relatively high melting point. The parent material system can be heated to a melting temperature greater than the relatively low melting point and lower than the relatively high melting point to diffuse the low temperature material into the high temperature material. The parent material system can be solidified to form a transient liquid phase bond that is electrically and thermally conductive. | 12-06-2012 |
20120313264 | CHIP WITH SINTERED CONNECTIONS TO PACKAGE - A microelectronic package and method of making same are provided. The package includes a substrate having first and second opposed surfaces, an edge surface extending therebetween, a plurality of terminals, and a plurality of conductive elements electrically connected with the terminals. The edge surface can be disposed at a periphery of the substrate or can be the edge surface of an aperture within the substrate. A microelectronic element has a front face and contacts thereon, with at least some of the contacts being adjacent to the edge surface of the substrate. A dielectric material overlies the edge surface of the substrate and defines a sloping surface between the front face of the microelectronic element and the substrate. A conductive matrix material defines a plurality of conductive interconnects extending along the sloping surface. The conductive interconnects electrically interconnect respective ones of the contacts with the conductive elements. | 12-13-2012 |
20130037967 | SEMICONDUCTOR PACKAGE SUBSTRATE - Disclosed herein is a semiconductor package substrate including a base substrate, a mounting member mounted on an upper portion of the base substrate, and an adhesive layer formed between the base substrate and the mounting member, wherein the adhesive layer includes a thermally conductive adhesive and a ductile adhesive formed at the outer circumference of the thermally conductive adhesive. | 02-14-2013 |
20130062787 | PHOTOSENSITIVE ADHESIVE COMPOSITION, AND OBTAINED USING THE SAME, ADHESIVE FILM, ADHESIVE SHEET, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, SEMICONDUCTOR DEVICE AND ELECTRONIC PART - A photosensitive adhesive composition comprising: (A) a polyimide having a carboxyl group as a side chain, whereof the acid value is 80 to 180 mg/KOH; (B) a photo-polymerizable compound; and (C) a photopolymerization initiator. | 03-14-2013 |
20130105995 | SEMICONDUCTOR DEVICE STRUCTURES AND THEIR FABRICATION | 05-02-2013 |
20130113119 | SEMICONDUCTOR DEVICE USING COMPOSITION FOR ANISOTROPIC CONDUCTIVE ADHESIVE FILM OR ANISOTROPIC CONDUCTIVE ADHESIVE FILM - A semiconductor device bonded by an anisotropic conductive adhesive composition, the anisotropic conductive adhesive composition having a solid content ratio between a polymer binder system and a curing system of about 40:60 to about 60:40, and a coefficient of thermal expansion of about 150 ppm/° C. or less at about 100° C. or less. | 05-09-2013 |
20130154125 | ADHESIVE FILM AND ELECTRONIC DEVICE INCLUDING THE SAME - An adhesive film includes an amine curing agent and a phenolic curing agent, and has a ratio of a storage modulus at 170° C. after 80% or more curing to a storage modulus at 40° C. before curing in the range of about 1.5 to about 3.0. | 06-20-2013 |
20130161837 | SEMICONDUCTOR PACKAGE, PACKAGING SUBSTRATE AND FABRICATION METHOD THEREOF - A packaging substrate and a semiconductor package using the packaging substrate are provided. The packaging substrate includes: a substrate body having a die attach area, a circuit layer formed around the die attach area and having a plurality of conductive traces each having a wire bonding pad, and a surface treatment layer formed on the wire bonding pads. Therein, only one of the conductive traces is connected to an electroplating line so as to prevent cross-talk that otherwise occurs between conductive traces due to too many electroplating lines in the prior art. | 06-27-2013 |
20130161838 | ANISOTROPIC CONDUCTIVE FILM AND SEMICONDUCTOR DEVICE - A semiconductor device bonded by an anisotropic conductive film, the anisotropic conductive film including a phenoxy resin including a fluorene-substituted phenoxy resin; and a radically polymerizable resin including a fluorene-substituted acrylate. | 06-27-2013 |
20130249119 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - Provided is a semiconductor integrated circuit device having flexible pin arrangement. A semiconductor integrated circuit is bonded to a die pad with an insulating paste, and the potential of the die pad is fixed through a bonding wire from an Al pad provided on the surface of the semiconductor integrated circuit. In the case of a P-type semiconductor substrate, the die pad is set as a terminal other than a terminal having a minimum operating potential of the semiconductor integrated circuit. | 09-26-2013 |
20130328218 | SEALED SEMICONDUCTOR DEVICE HAVING ADHESIVE PATCH WITH INWARDLY SLOPED SIDE SURFACES - A semiconductor device has an external terminal formed through the use of an electrolysis plating method. A front surface of a semiconductor wafer is placed over a front surface of a first support heated to a first temperature. An adhesive sheet is then bonded to a back surface of the semiconductor wafer, after which the semiconductor wafer is subjected to heat treatment at a second temperature higher than the first temperature. After the semiconductor wafer and the adhesive sheet are cut along cutting regions, a plurality of semiconductor chips each having an adhesive patch bonded thereto are obtained. A mother substrate is placed over a front surface of a second support heated to a third temperature and the semiconductor chips are fixed to an upper surface of the mother substrate via the adhesive patch. | 12-12-2013 |
20130334712 | A METHOD FOR MANUFACTURING A CHIP PACKAGE, A METHOD FOR MANUFACTURING A WAFER LEVEL PACKAGE, A CHIP PACKAGE AND A WAFER LEVEL PACKAGE - A method for manufacturing a chip package is provided. The method includes forming a layer over a carrier; forming further carrier material over the layer; selectively removing one or more portions of the further carrier material thereby releasing one or more portions of the layer from the further carrier material; and adhering a chip including one or more contact pads to the carrier via the layer. | 12-19-2013 |
20130334713 | ELECTROSTATIC DISCHARGE COMPLIANT PATTERNED ADHESIVE TAPE - The present disclosure relates to the field of fabricating microelectronic devices, wherein a microelectronic device substrate, such as a microelectronic wafer, may be thinned by a backgrinding process using a patterned adhesive tape that reduces slurry seepage and adhesive contamination while also reducing the potential of electrostatic discharge damage. The patterned adhesive tape may comprise a base film and adhesive material patterned on the base film such that an edge or periphery portion of the microelectronic device substrate may contact the adhesive material, but substantially no adhesive material contacts interconnectors formed on the microelectronic device substrate. The base film of the patterned adhesive tape may have an electrically conductive coating or layer, or may be electrically conductive itself to reduce the potential of electrostatic discharge damage during the backgrinding process. | 12-19-2013 |
20140001655 | POWER TRANSISTOR WITH HEAT DISSIPATION AND METHOD THEREFOR | 01-02-2014 |
20140008819 | SUBSTRATE STRUCTURE, SEMICONDUCTOR PACKAGE AND METHODS OF FABRICATING THE SAME - A substrate structure is provided, including a substrate and a strengthening member bonded to a surface of the substrate. The strengthening member has a CTE (Coefficient of Thermal Expansion) less than that of the substrate so as to effectively prevent warpage from occurring to the substrate structure. | 01-09-2014 |
20140061954 | SEMICONDUCTOR DEVICE WITH PRE-MOLDING CHIP BONDING - This disclosure relates generally to a semiconductor device and method of making the semiconductor device by pressing an electrical contact of a chip into a bonding layer on a carrier. The bonding layer is cured and coupled, at least in part, to the electrical contact. A molding layer is applied in contact with the chip and a first major surface of the bonding layer. Distribution circuitry is coupled to the electrical contact. | 03-06-2014 |
20140084491 | METHOD FOR MANUFACTURING ELECTRONIC DEVICE AND ELECTRONIC DEVICE - A method for manufacturing an electronic device, the method includes: applying an adhesive film on a package board; placing an electronic component on the package board with a bump therebetween; applying a first load to the electronic component while heating the electronic component to a first temperature higher than a reaction start temperature of the adhesive film and lower than a melting point of the bump; reducing the first load to a second load lower than the first load while maintaining the first temperature; and heating the electronic component to a second temperature higher than or equal to the melting point of the bump while maintaining the second load. | 03-27-2014 |
20140097548 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE ADHESIVE FILM - A semiconductor device connected using an anisotropic conductive adhesive composition, the anisotropic conductive adhesive composition including a thermosetting polymerization initiator; and tetrahydrofurfuryl (meth)acrylate or furfuryl (meth)acrylate, wherein the tetrahydrofurfuryl (meth)acrylate or furfuryl (meth)acrylate is present in the composition in an amount of 1 wt % to 25 wt %, based on the total weight of the composition in terms of solid content. | 04-10-2014 |
20140110865 | OPTOELECTRONIC DEVICE AND METHOD FOR THE PRODUCTION THEREOF - An optoelectronic component includes a first substrate on which are arranged an active region and a first contact region, and a first contact layer arranged in the first contact region. The second component includes a second substrate on which is arranged at least one second contact layer arranged in a second contact region. The first contact layer connects electrically conductively with the active region and additionally is bonded to the second contact layer by an adhesive layer. The adhesive layer includes an electrically conductive adhesive. The first contact layer and/or the second contact layer are patterned at least in part. | 04-24-2014 |
20140110866 | SYSTEM AND METHOD OF CHIP PACKAGE BUILD-UP - A system and method for chip package fabrication is disclosed. The chip package includes a base re-distribution layer having an opening formed therein, an adhesive layer having a window formed therein free of adhesive material, and a die affixed to the base re-distribution layer by way of the adhesive layer, the die being aligned with the window such that only a perimeter of the die contacts the adhesive layer. A shield element is positioned between the base re-distribution layer and adhesive layer that is generally aligned with the opening formed in the base re-distribution layer and the window of the adhesive layer such that only a perimeter of the shield element is attached to the adhesive layer. The shield element is separated from the die by an air gap and is configured to be selectively removable from the adhesive layer so as to expose the front surface of the die. | 04-24-2014 |
20140124962 | INTEGRATED CIRCUIT PACKAGE INCLUDING WIRE BOND AND ELECTRICALLY CONDUCTIVE ADHESIVE ELECTRICAL CONNECTIONS - A system may include a package defining a cavity and an integrated circuit (IC) disposed within the cavity. The package may include a first electrically conductive package contact and a second electrically conductive package contact. The IC may include a first electrically conductive IC contact and a second electrically conductive IC contact. The system also may include a wire bond extending between and electrically connecting the first electrically conductive package contact and the first electrically conductive IC contact. The system further may include an electrically conductive adhesive extending between and electrically connecting the second electrically conductive package contact and the second electrically conductive IC contact. Use of wire bonds and electrically conductive adhesive may increase an interconnect density between the IC and the package, while not requiring an increase in size of the IC or a decrease in pitch between wire bonds. | 05-08-2014 |
20140131897 | Warpage Control for Flexible Substrates - A flexible substrate may be provided having a first side and a second side. A device may be electrically coupled to the first side of the flexible substrate through one or more electrical connections. A warpage control device may be attached to the second side flexible substrate. The warpage control device may include an adhesive layer and a rigid layer. The warpage control device may be formed in an area of the second side of the flexible substrate that may be opposite the one or more electrical connections on the first side of the flexible substrate. | 05-15-2014 |
20140131898 | SEMICONDUCTOR PACKAGING CONTAINING SINTERING DIE-ATTACH MATERIAL - Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed. | 05-15-2014 |
20140159256 | ANISOTROPIC CONDUCTIVE FILMS AND SEMICONDUCTOR DEVICES CONNECTED BY THE SAME - An anisotropic conductive film, a method for preparing a semiconductor device, and a semiconductor device, the anisotropic conductive film including a base film, the base film having a storage modulus of 5,000 kgf/cm | 06-12-2014 |
20140175678 | Semiconductor Device and Method of Manufacturing the Same - To achieve a reduction in cost of a semiconductor device, in a common board (a wiring board), a plurality of bonding leads each extend toward the center of the board, and a solder resist film as a die bonding region supporting a minimum chip is coated with a die bonding material. With this, even when a first semiconductor chip as a large chip is mounted, wire bonding can be performed without causing the die bonding material to cover the bonding leads. Thus, development cost can be reduced to reduce the cost of the semiconductor device (LGA). | 06-26-2014 |
20140217618 | METHOD FOR MAKING ELECTRONIC DEVICE WITH LIQUID CRYSTAL POLYMER AND RELATED DEVICES - A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a coverlay layer on the substrate and the electrically conductive pattern, forming a partially cured, tacky adhesive layer on the coverlay layer, and forming openings in the coverlay layer and the partially cured, tacky adhesive layer aligned with the electrically conductive pattern. The method includes positioning an IC on the partially cured, tacky adhesive layer and thereafter curing the partially cured tacky adhesive layer to thereby simultaneously mechanically secure and electrically interconnect the IC to the substrate, the IC having bond pads on a surface thereof. | 08-07-2014 |
20140264950 | CHIP ARRANGEMENT AND A METHOD OF MANUFACTURING A CHIP ARRANGEMENT - In various embodiments, a chip arrangement is provided. The chip arrangement may include a chip carrier and a chip mounted on the chip carrier. The chip may include at least two chip contacts and an insulating adhesive between the chip and the chip carrier to adhere the chip to the chip carrier. The at least two chip contacts may be electrically coupled to the chip carrier. | 09-18-2014 |
20140264951 | LASER DIE BACKSIDE FILM REMOVAL FOR INTEGRATED CIRCUIT (IC) PACKAGING - Embodiments of the present disclosure are directed to die adhesive films for integrated circuit (IC) packaging, as well as methods for forming and removing die adhesive films and package assemblies and systems incorporating such die adhesive films. A die adhesive film may be transparent to a first wavelength of light and photoreactive to a second wavelength of light. In some embodiments, the die adhesive film may be applied to a back or “inactive” side of a die, and the die surface may be detectable through the die adhesive film. The die adhesive film may be cured and/or marked with laser energy having the second wavelength of light. The die adhesive film may include a thermochromic dye and/or nanoparticles configured to provide laser mark contrast. UV laser energy may be used to remove the die adhesive film in order to expose underlying features such as TSV pads. | 09-18-2014 |
20140291869 | ANISOTROPIC CONDUCTIVE FILM INCLUDING CONDUCTIVE ADHESIVE LAYER AND SEMICONDUCTOR DEVICE CONNECTED BY THE SAME - An anisotropic conductive film includes a conductive adhesive layer including conductive particles and insulating particles, and an insulating adhesive layer not including conductive particles. In the anisotropic conductive film, the conductive particles and the insulating particles of the conductive adhesive layer have a total particle density of 7.0×10 | 10-02-2014 |
20140291870 | RESIN COMPOSITION, RESIN COMPOSITION SHEET, SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREFOR - A resin composition excellent in both characteristics of preservation stability and connection reliability is provided by a resin composition that contains (a) an epoxy compound, (b) a microcapsule type hardening acceleration agent, and (c) an inorganic particle whose surface is modified with a compound that has an unsaturated double bond. | 10-02-2014 |
20140332984 | ADHESIVE COMPOSITION, PROCESS FOR PRODUCING THE SAME, ADHESIVE FILM USING THE SAME, SUBSTRATE FOR MOUNTING SEMICONDUCTOR AND SEMICONDUCTOR DEVICE - Disclosed is an adhesive composition which includes (a) an epoxy resin, (b) a curing agent and (c) a polymer compound incompatible with said epoxy resin, and further optionally includes (d) a filler and/or (e) a curing accelerator. Also disclosed are a process for producing an adhesive composition, including mixing (a) the epoxy resin and (b) the curing agent with (d) the filler, followed by mixing the resultant mixture with (c) the polymer compound incompatible with the epoxy resin; an adhesive film including the above-mentioned adhesive composition formed into a film; a substrate for mounting a semiconductor including a wiring board and the above-mentioned adhesive film disposed thereon on its side where chips are to be mounted; and a semiconductor device which includes the above-mentioned adhesive film or the substrate for mounting a semiconductor. | 11-13-2014 |
20140339710 | METHOD FOR BONDING WAFERS AND STRUCTURE OF BONDING PART - A method for bonding wafers includes forming a first bonding part on a surface of a first wafer by stacking a diffusion preventing layer formed of a material having low wettability with AuSn above the first wafer and forming a bonding layer on a surface of the diffusion preventing layer such that the bonding layer stays back of an edge of the diffusion preventing layer, forming a second bonding part on a surface of a second wafer, and bonding the first bonding part and the second bonding part by eutectic bonding with an AuSn solder under a condition that the first wafer and the second wafer are opposed to each other. | 11-20-2014 |
20140346684 | CONNECTION METHOD, CONNECTION STRUCTURE, INSULATING ADHESIVE MEMBER, ELECTRONIC COMPONENT HAVING ADHESIVE MEMBER, AND METHOD FOR MANUFACTURING SAME - An insulating adhesive film is formed by laminating a first insulating adhesive layer which contains a filler in an insulating adhesive composition and a second insulating adhesive layer which contains no filler in an insulating adhesive composition. H/211-27-2014 | |
20140353848 | ADHESIVE FILM FOR HEAT DISSIPATION, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE - A heat dissipation adhesive film, a semiconductor device including the same, and a method of fabricating the semiconductor device, the heat dissipation adhesive film being placeable between a protective layer encasing a semiconductor element therein and a heat dissipation metal layer on the protective layer to bond the protective layer to the heat dissipation metal layer, wherein an adhesive strength between the heat dissipation adhesive film and the protective layer and an adhesive strength between the heat dissipation adhesive film and the heat dissipation metal layer are each about 3 kgf/25 mm | 12-04-2014 |
20140374925 | COMPONENT ASSEMBLY USING A TEMPORARY ATTACH MATERIAL - A method of attaching a die to a carrier using a temporary attach material is disclosed. The method comprises attaching the temporary attach material between a surface of the die and a surface of the carrier. The temporary attach material attaches the die to the carrier. The method comprises bonding at least one connector to the die and the carrier. The connector includes a first end bonded to the carrier and a second end bonded to the die. The method further comprises encapsulating at least a portion of the die and at least a portion of the at least one connector by an encapsulation material. | 12-25-2014 |
20150008596 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a substrate; first and second pads disposed adjacent to each other on the substrate; an electrically conductive tape adhered to the first and second pads and having a through hole at an inner portion of the first pad; an electrically conductive adhesive in the through hole and having a thermal conductivity higher than the thermal conductivity of the electrically conductive tape; a semiconductor chip mounted on the first pad via the electrically conductive adhesive; and an electronic component part mounted on the second pad via the electrically conductive tape. | 01-08-2015 |
20150014865 | CONNECTION ARRANGEMENT OF AN ELECTRIC AND/OR ELECTRONIC COMPONENT - The connection arrangement ( | 01-15-2015 |
20150035173 | ADHESIVES FOR BONDING HANDLER WAFERS TO DEVICE WAFERS AND ENABLING MID-WAVELENGTH INFRARED LASER ABLATION RELEASE - Methods are provided to form adhesive materials that are used to temporarily bond handler wafers to device wafers, and which enable mid-wavelength infrared laser ablation release techniques to release handler wafers from device wafers. | 02-05-2015 |
20150091195 | Method of Packaging a Die - A method of attaching a die to a substrate is disclosed. A major surface of the die has an array of electrical contacts, and is covered with a tape segment having an array of apertures in register with the contacts. Solder balls are inserted into the apertures. The die is positioned against a substrate with the solder balls in register with the die pads on the surface of the substrate, and a heat treatment process is performed to bond the conductive elements to the corresponding bond pads. | 04-02-2015 |
20150097301 | METHODS AND STRUCTURES FOR PROCESSING SEMICONDUCTOR DEVICES - Methods of forming a semiconductor structure include exposing a carrier substrate to a silane material to form a coating, removing a portion of the coating at least adjacent a periphery of the carrier substrate, adhesively bonding another substrate to the carrier substrate, and separating the another substrate from the carrier substrate. The silane material includes a compound having a structure of (XO) | 04-09-2015 |
20150123292 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM - Provided is a semiconductor device, including an anisotropic conductive film connecting the semiconductor device, the anisotropic conductive film having a maximum stress of 0.4 kgf/mm | 05-07-2015 |
20150357288 | PACKAGING STRUCTURE FOR THIN DIE AND METHOD FOR MANUFACTURING THE SAME - A packaging structure for thin die is provided. The packaging structure has a substrate, a thin die, a strengthening layer and an encapsulation body. The thin die is disposed on and electrically connected with the substrate; the strengthening layer is disposed on the thin die; and the encapsulation body is formed on the substrate and covers both the thin die and the strengthening layer. The strengthening layer can bear pressure or stress during the formation of the encapsulation body to protect the thin die. A method for manufacturing the packaging structure for the thin die is further provided to manufacture the above packaging structure for the thin die. | 12-10-2015 |
20160009947 | COMPOSITION FOR INTERLAYER FILLER OF LAYERED SEMICONDUCTOR DEVICE, LAYERED SEMICONDUCTOR DEVICE, AND PROCESS FOR PRODUCING LAYERED SEMICONDUCTOR DEVICE | 01-14-2016 |
20160013168 | Semiconductor Package with Integrated Semiconductor Devices and Passive Component | 01-14-2016 |
20160020175 | SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure has a substrate and a die stack of n die(s), wherein n≧1. The substrate has a first side, a second side and an opening extending from the first side to the second side. The die stack is disposed in the opening. The thickness of the substrate is substantially the same as the thickness of the die stack. | 01-21-2016 |
20160064349 | SEMICONDUCTOR DEVICE CONNECTED BY ANISOTROPIC CONDUCTIVE FILM - A semiconductor device connected by an anisotropic conductive film, the anisotropic conductive film having a differential scanning calorimeter onset temperature of 60° C. to 85° C., and a elastic modulus change of 30% or less, as calculated by Equation 1, below, | 03-03-2016 |
20160133605 | SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - A semiconductor device includes a substrate, a first semiconductor package disposed on the substrate, and a second semiconductor package spaced apart from the first semiconductor package on the substrate. The second semiconductor package includes a semiconductor chip stacked on the substrate, an adhesion part covering the semiconductor chip, and a heat-blocking structure disposed between the substrate and the semiconductor chip. Heat generated from the first semiconductor package and transmitted to the second semiconductor package through the substrate is blocked by the heat-blocking structure. | 05-12-2016 |
20160160102 | PHOTOSENSITIVE RESIN COMPOSITION, FILM ADHESIVE, ADHESIVE SHEET, ADHESIVE PATTERN, SEMICONDUCTOR WAFER WITH ADHESIVE LAYER, AND SEMICONDUCTOR DEVICE - The present invention provides a photosensitive resin composition comprising an alkali-soluble resin having a phenolic hydroxyl group as an end group (A); a radiation-polymerizable compound (B); and a photoinitiator (C), a film adhesive, an adhesive sheet, an adhesive pattern, a semiconductor wafer with an adhesive layer, and a semiconductor device using the photosensitive resin composition. | 06-09-2016 |
20160181193 | PACKAGE STUCTURE AND METHOD OF FABRICATING THE SAME | 06-23-2016 |
20160190097 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Embodiments of the present disclosure provide a semiconductor device, a semiconductor package, and a method for manufacturing a semiconductor device. The semiconductor device comprises: a semiconductor die; an electrical isolation layer formed on a surface of the semiconductor die; a substrate; and a non-conductive adhesive layer disposed between the electrical isolation layer and the substrate, so as to adhere the electrical isolation layer to the substrate. | 06-30-2016 |
20160254247 | Fan-out WLP with package | 09-01-2016 |