| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257717000 | Isolation of cooling means (e.g., heat sink) by an electrically insulating element (e.g., spacer) | 37 |
| 20080211088 | SEMICONDUCTOR DEVICE - The semiconductor device includes a substrate, a first semiconductor element, a second semiconductor element, a first heat sink and a second heat sink. The first and the second semiconductor elements are provided on the substrate. The maximum power consumption of the first semiconductor element is lower than that of the second semiconductor element. The first heat sink is fixed to the first semiconductor element. The second heat sink is fixed to the second semiconductor element. The first heat sink is spaced apart from the second heat sink. | 09-04-2008 |
| 20080230895 | SEMICONDUCTOR PACKAGE AND THE METHOD FOR MANUFACTURING THE SAME - A method for manufacturing semiconductor packages is provided. The upper surface of a substrate has a plurality of slots and surface mount devices are positioned across the slots. In this circumstance, the space below the surface mount devices can be filled up with sealant as a result of the arrangement of the slots. This can avoid the occurrence of the melted solders to bridge to each other and of the tomb stone effect of the surface mount devices. | 09-25-2008 |
| 20080237846 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A BGA substrate which has a back surface to which a heat radiating plate | 10-02-2008 |
| 20080277780 | Electrical circuit device - An electrical circuit device includes an electrical circuit that includes a plurality of electrically connected components including a component that necessitates heat measures, a substrate that physically connects main components among the plural components of the electrical circuit, and a package that hermetically seals the substrate. The component that necessitates heat measures is arranged outside the package. | 11-13-2008 |
| 20080290507 | CHIP EMBEDDED PRINTED CIRCUIT BOARD AND FABRICATING METHOD THEREOF - The chip embedded printed circuit board and a fabricating method thereof are disclosed, wherein a circuit pattern is formed by depositing a metal layer on a support layer, a semiconductor chip is packaged on a support layer to wrap the semiconductor chip and the circuit pattern on the support layer and to form an isolation layer, a via hole filled with conductive material is formed through the isolation layer for interlayer electrical connection, part of the support layer is selectively removed to form a plated heat sink, such that a packaging process can be performed in a very planar state and the plated heat sink can be integrated with a printed circuit board. | 11-27-2008 |
| 20090001561 | High Thermal Performance Packaging for Circuit Dies - A circuit die is disposed into a region defined by a mold. A molding material is then introduced into the region to encapsulate the circuit die. Prior to substantial curing of the molding material, at least a portion of the molding material is removed from over a surface of the circuit die, creating a recessed region in the encapsulating material. A heat spreader may then be disposed within the recessed region, as well as over the top surface of the encapsulating material. The heat spreader may have a downset that substantially aligns with the recessed region and reduces the distance between the heat spreader and the spacer for better heat dissipation. | 01-01-2009 |
| 20090020868 | Integrated circuit package and system interface - An apparatus for enhancing the performance of an IC package and media interface. Adding a fissure to a Flip-Chip type package improves the crosstalk performance of the package for both high and low frequencies. The wall of the fissure can be implemented with a heat spreader layer and can be connected to any AC ground such as VSS or VDD package planes. The fissures can also accommodate the ingress of an optical fiber, which allows for a direct interface with the transceivers. The direct optical fiber interface permits the removal of solder balls for high speed signal traces, with their respective vias. On-chip integrated LEDs or other similar light source transceivers can drive the high speed signal media. Selective deposition of low dielectric material can also improve the frequency response of high speed signal package traces. | 01-22-2009 |
| 20090039503 | SEMICONDUCTOR DEVICE - The invention provides a heat radiating structure which reduces a mechanical stress applied to an electronic part mounted on a printed circuit board including a semiconductor package. The heat radiating structure is constructed by a semiconductor package mounted on a printed circuit board, a thermal conduction sheet arranged on an upper surface of the semiconductor package, and a metal case provided with a heat radiating fin for receiving a heat transmitted form the thermal conduction sheet so as to discharge to an atmospheric air, and the metal case is provided with a concavo-convex structure in a contact portion with the thermal conduction sheet. | 02-12-2009 |
| 20090057883 | Method and structure of minimizing mold bleeding on a substrate surface of a semiconductor package - A method and structure of minimizing mold bleeding on a substrate surface of a semiconductor package is disclosed. In one embodiment, a method includes forming a dam structure on an outer area of a substrate surface of a semiconductor package and blocking a flow of a mold material from a mold cavity of the semiconductor package to the outer area of the substrate surface using the dam structure. In another embodiment, a substrate surface of a semiconductor package includes product forming areas to provide mounting spaces of semiconductor chips and staggered offset mesh block areas surrounding the product forming areas to act as dam structures to minimize mold bleeding from a mold cavity of the semiconductor package to outer areas of the substrate surface. | 03-05-2009 |
| 20090072387 | CURVILINEAR HEAT SPREADER/LID WITH IMPROVED HEAT DISSIPATION - A heat spreader or lid for a microelectronic package, in which the heat spreader has an underside surface that includes at least one curvilinear contour, in which the curvilinear contour is selected from at least one positive or protruding curvilinear feature, at least one negative or recessed curvilinear feature, and a combination thereof. A microelectronic package that includes the heat spreader/lid, in which there is improved heat dissipation or reduced mechanical stress in an interface between the heat spreader/lid and a circuit chip. | 03-19-2009 |
| 20090096087 | MICROELECTRONIC ASSEMBLY AND METHOD OF PREPARING SAME - A microelectronic assembly includes a die ( | 04-16-2009 |
| 20090194870 | Method and Apparatus for Solid State Cooling System - The disclosure relates to a Point Cooler based on a combination of principles, including large area, low current density PN junction cooling, and electron emission from heavily doped shallowly-depleted P tips. Using Junction Cooling rather than thermoelectric cooling enables an all silicon device to be made that favorably competes with the commercial thermoelectric cooling systems. Theoretical values of T | 08-06-2009 |
| 20090212418 | THERMAL INTERFACE MATERIAL DESIGN FOR ENHANCED THERMAL PERFORMANCE AND IMPROVED PACKAGE STRUCTURAL INTEGRITY - An electronic package comprising a semiconductor device, a heat spreader layer, and a thermal interface material layer located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer having heat conductive particles suspended therein. A portion of the particles are exposed on at least one non-planar surface of the resin layer such that the portion of exposed particles occupies a majority of a total area of a horizontal plane of the non-planar surface. | 08-27-2009 |
| 20100044856 | ELECTRONIC PACKAGE WITH A THERMAL INTERPOSER AND METHOD OF MANUFACTURING THE SAME - An electronic package includes a die including a thermal interface material through which a primary heat flux path is enabled for conducting heat from the die, an organic substrate, and a thermal interposer provided between the organic substrate and the die, the thermal interposer having an area extending beyond a footprint of the die, the area including the thermal interface material, the thermal interposer conducting heat generated by the die through the thermal interface material such that an auxiliary heat flux path for conducting heat generated in the die is enabled. | 02-25-2010 |
| 20100090336 | SEMICONDUCTOR ELEMENT COOLING STRUCTURE - A semiconductor element cooling structure includes first and second semiconductor elements; a heat sink having a mounting surface on which the semiconductor elements are mounted and a cooling medium channel formed inside, through which a cooling medium for cooling the semiconductor elements flows; and a protruded portion provided at a position opposite to the mounting surface of the heat sink, extending in a direction intersecting flow direction of the cooling medium (direction of arrow DR | 04-15-2010 |
| 20110031613 | SEMICONDUCTOR PACKAGE HAVING A HEAT DISSIPATION MEMBER - A semiconductor package having a heat dissipation member capable of efficiently conveying excess heat away from semiconductor chips is presented. The semiconductor package includes a semiconductor chip, through-electrodes, and a heat dissipation member. The semiconductor chip has a first surface, a second surface facing away from the first surface, and bonding pads which are disposed on the first surface. The through-electrodes are electrically connected with the bonding pads and passing through the first and second surfaces of the semiconductor chip, and protrude outward from the second surface. The heat dissipation member faces the second surface of the semiconductor chip and is coupled to the through-electrodes. | 02-10-2011 |
| 20110108979 | SEMICONDUCTOR DEVICE AND DISPLAY APPARATUS - In a COF of an embodiment of the present invention, the smaller distance to edges of a heat-releasing member an area of the heat-releasing member has, the larger openings the area has. Accordingly, a volume per area (an area per length) of the heat-releasing member decreases toward the edges. The arrangement improves flexibility of the COF. This prevents a stress caused by bending the COF from concentrating at the edges. This makes it possible to prevent a line on an insulating film from being broken. Also, it becomes possible to prevent an anisotropic conductive resin from coming off which is used to bond the COF with a display panel in providing the COF in a display apparatus. | 05-12-2011 |
| 20110233758 | SEMICONDUCTOR DEVICE - A semiconductor devices includes a first die pad having the conductivity connected to one end of a DC power source, a second die pad having the conductivity connected to the other end of the DC power source, a first switching element provided on the first die pad, receiving DC power from the DC power source via the first die pad, and having a terminal opposite to the first die pad connected to a first output terminal, and a second switching element provided on the second die pad, receiving the DC power from the DC power source via the second die pad, and connected to the first output terminal, and having a terminal opposite to the second die pad. | 09-29-2011 |
| 20120043652 | SEMICONDUCTOR POWER MODULE - A semiconductor power module includes an active element and a passive element serving as semiconductor elements each having a first electrode on a front surface and a second electrode on a back surface thereof, a heat pipe having a first region defined as arrangement parts of the active element and the passive element on its one end side and electrically connected to one of the first and second electrodes of the active element and the passive element arranged in the first region, a cooling fin arranged in a second region defined on the other end side of the heat pipe, and a heat pipe provided to sandwich the active element, the passive element, and the cooling fin arranged on the heat pipe along with the heat pipe and electrically connected to the other of the first and second electrodes of the active element and passive element. | 02-23-2012 |
| 20120091573 | SEMICONDUCTOR DEVICE - Provided is a semiconductor device including a heat dissipating fin; an insulating sheet bonded to an upper surface of the heat dissipating fin, with a part of the upper surface being exposed; a heat spreader located on the insulating sheet; a power element located on the heat spreader; and a transfer molding resin located to cover a predetermined surface including the part of the upper surface of the heat dissipating fin, the insulating sheet, the heat spreader and the power element, wherein the upper surface of the heat dissipating fin has a protruding shape and/or recessed shape located so as to bind an edge of the insulating sheet. | 04-19-2012 |
| 20130154084 | SEMICONDUCTOR MODULE - A semiconductor module includes a semiconductor device; a metal plate portion that includes a first surface on a side of the semiconductor device and has a fastening portion at an end thereof; a molded portion that is formed by molding a resin on the semiconductor device and the metal plate portion, a cooling plate portion that is a separate member from the metal plate portion, is provided on a side opposite to the first surface on the side of the semiconductor device, and includes fins on a side opposite to the side of the metal plate portion; wherein the fastening portion of the metal plate portion is exposed out of the molded portion, and the cooling plate portion includes a fastening portion at a position that corresponds to a position of the fastening portion of the metal plate portion. | 06-20-2013 |
| 20140210072 | SEMICONDUCTOR MODULE - A semiconductor module includes a control board, and a shield plate arranged opposing the control board. A metal first heat dissipating portion is provided on a surface of the control board. A metal second heat dissipating portion is provided on a first surface of the shield plate, opposing the surface of the control board. A dielectric body is arranged between the first heat dissipating portion and the second heat dissipating portion. | 07-31-2014 |
| 20140319674 | SEMICONDUCTOR COOLING DEVICE - A semiconductor cooling device includes: a cooling medium flow channel, through which a cooling medium for cooling a semiconductor chip flows; a laminar flow section which is provided in a region upstream of the cooling medium flow channel and allows the cooling medium to flow in the form of laminar flow; and a turbulent flow section which is provided in a region downstream of the laminar flow section in the cooling medium flow channel and allows the cooling medium, which flows in the form of laminar flow from the laminar flow section, to flow in the form of turbulent flow. | 10-30-2014 |
| 20140367847 | METHODS FOR ESTABLISHING THERMAL JOINTS BETWEEN HEAT SPREADERS OR LIDS AND HEAT SOURCES - According to various aspects, exemplary embodiments are disclosed of thermal interface materials, electronic devices, and methods for establishing thermal joints between heat spreaders or lids and heat sources. In exemplary embodiments, a method of establishing a thermal joint for conducting heat between a heat spreader and a heat source of an electronic device generally includes positioning a thermal interface material (TIM | 12-18-2014 |
| 20160049350 | SEMICONDUCTOR DEVICE AND HEAT-DISSIPATING MECHANISM - A semiconductor device includes a semiconductor chip which can be a heat-generating semiconductor chip or a semiconductor relay substrate in which an integrated circuit or wiring is built in. A sintered-silver-coated film is adhered on a surface layer part of the semiconductor substrate, interposed by a silicon oxide film. A heat-dissipating fin (heat sink), which may be copper or aluminum, is bonded on the sintered-silver-coated film, interposed by an adhesive layer. | 02-18-2016 |
| 20160086917 | Multi-Stacked Structures of Semiconductor Packages - A multi-stacked structure of semiconductor packages includes a plurality of substrates stacked in a vertical direction, semiconductor packages mounted on each substrate of the plurality of the substrates, a heat release column extending commonly through the plurality of the substrates and overlapping at least one semiconductor package serving as a heat generation source among the semiconductor packages in the vertical direction, and a heat dissipation part thermally connected to one end of the heat release column. | 03-24-2016 |
| 20160104681 | Semiconductor Device and Method of Forming Prefabricated Heat Spreader Frame with Embedded Semiconductor Die - A semiconductor device is made by mounting a prefabricated heat spreader frame over a temporary substrate. The heat spreader frame includes vertical bodies over a flat plate. A semiconductor die is mounted to the heat spreader frame for thermal dissipation. An encapsulant is deposited around the vertical bodies and semiconductor die while leaving contact pads on the semiconductor die exposed. The encapsulant can be deposited using a wafer level direct/top gate molding process or wafer level film assist molding process. An interconnect structure is formed over the semiconductor die. The interconnect structure includes a first conductive layer formed over the semiconductor die, an insulating layer formed over the first conductive layer, and a second conductive layer formed over the first conductive layer and insulating layer. The temporary substrate is removed, dicing tape is applied to the heat spreader frame, and the semiconductor die is singulated. | 04-14-2016 |
| 20160126158 | INTEGRATED CIRCUIT HEAT DISSIPATION USING NANOSTRUCTURES - An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer | 05-05-2016 |
| 20160141222 | ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - In manufacturing an electronic device in which a semiconductor chip including an element layer formed on a front surface of a substrate and a heat sink to perform heat radiation of the semiconductor chip are connected via a heat spreader, a first heat spreader is formed on a rear surface of the semiconductor chip using a first carbon nanotube, a second heat spreader is formed on the heat sink using a second carbon nanotube, and the first heat spreader and the second heat spreader are caused to adhere to each other. With this configuration, a highly reliable electronic device that has very low heat resistance and achieves efficient heat radiation with a relatively simple configuration is fabricated. | 05-19-2016 |
| 20160155682 | INTEGRATED HEAT SPREADER THAT MAXIMIZES HEAT TRANSFER FROM A MULTI-CHIP PACKAGE | 06-02-2016 |
| 20160172266 | SEMICONDUCTOR DEVICE | 06-16-2016 |
| 20160190036 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor element having a front surface and a rear surface, a pair of heat sinks disposed facing each other so as to sandwich the semiconductor element, and attached respectively to the front surface and the rear surface, and a fastening screw fastening the pair of the heat sinks in the facing direction, the fastening screw having insulation property. Threads are arranged on at least a part of the fastening screw in an axis direction of the fastening screw between the pair of the heat sinks. | 06-30-2016 |
| 20160197024 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE | 07-07-2016 |
| 20160197025 | Method of Fabricating an Electronic Device | 07-07-2016 |
| 20170236768 | HEAT-DISSIPATING STRUCTURE AND SEMICONDUCTOR MODULE USING SAME | 08-17-2017 |
| 20180026021 | SEMICONDUCTOR DEVICE | 01-25-2018 |
| 20220139884 | HIGH CONNECTIVITY DEVICE STACKING - The present disclosure generally relates to stacked miniaturized electronic devices and methods of forming the same. More specifically, embodiments described herein relate to semiconductor device spacers and methods of forming the same. The semiconductor device spacers described herein may be utilized to form stacked semiconductor package assemblies, stacked PCB assemblies, and the like. | 05-05-2022 |
