| Class / Patent application number | Description | Number of patent applications / Date published |
|---|
| 257667000 | With dam or vent for encapsulant | 29 |
| 20080230878 | Leadframe based flip chip semiconductor package and lead frame thereof - A flip chip semiconductor package is disclosed according to the present invention, the flip chip semiconductor package comprises a chip that is mounted on and electrically connects to a leadframe via a plurality of solder bumps by means of flip chip, and an encapsulate that encapsulates the chip, the plurality of solder bumps, and the leadframe, wherein, the leadframe further comprises a plurality of leads and a ground plane that is located between the plurality of leads, and also a slit is formed on the ground plane, and then a molding compound that makes up the encapsulant should be capable of filling within the slit, thus to enhance the adhesion between the ground plane and the encapsulant, and then avoid delamination between the ground plane and the encapsulant in subsequent thermal cycle processes, thereby increasing the reliability of fabricated products. | 09-25-2008 |
| 20090020858 | TAPE CARRIER SUBSTRATE AND SEMICONDUCTOR DEVICE - The present invention provides a tape carrier substrate that can prevent a conductor wire on the tape carrier substrate from being broken at the boundary portion between the conductor wire and a slit formed in a folding portion of the tape carrier substrate. The slit is formed in the folding portion of the tape carrier substrate so that the width thereof located on an extensional portion side of the tape carrier substrate is larger than that located on a central portion side of the tape carrier substrate. Possible stress resulting from bending of the tape carrier substrate is thus distributed. This prevents the stress from concentrating at the boundary portion between the slit and the conductor wire. | 01-22-2009 |
| 20090096070 | Semiconductor package and substrate for the same - A semiconductor package is revealed with a special designed substrate. The substrate has a plurality of fingers, a dummy metal pattern, and at least a peripheral slot penetrating through the substrate. The dummy metal pattern is aligned to two opposing sides of the peripheral slot and is electrically isolated from the fingers. A chip is disposed on the substrate and is electrically connected to the fingers. An encapsulant is completely filled the peripheral slot. The peripheral slot can enhance the mold flow and eliminate the mold flash. The shape of the dummy metal pattern aligned to the peripheral slot is used to offer stiffening edges to prevent the substrate from warpage and from breakage at peripheries, to enhance the thermal stress resistance due to thermal cycles, and to avoid damages to the chip. | 04-16-2009 |
| 20090152691 | LEADFRAME HAVING DIE ATTACH PAD WITH DELAMINATION AND CRACK-ARRESTING FEATURES - One aspect of the invention pertains to a semiconductor package having a die and a die attach pad with a plurality of spaced apart pedestals supported by a web. A die is mounted on the die attach pad such that the die is supported by at least a plurality of the pedestals. Selected edge regions of the die are arranged to overlie recessed regions of the die attach pad between adjacent pedestals. The die is electrically connected to at least some of the contact leads. An adhesive is arranged to secure the die to the die attach pad, with the thickness of the adhesive between the web of the die attach pad and the die being greater than the thickness of the adhesive between the die and the top surfaces of the pedestals that support the die. The die attach pad may have rounded peripheral corners between adjacent edge surfaces of the die attach pad. In another aspect of the invention, a method of packaging integrated circuits is described, wherein the resulting packages include at least some of the aforementioned leadframe structures. | 06-18-2009 |
| 20090166821 | Leadframe Design for QFN Package with Top Terminal Leads - A semiconductor package includes a leadframe. A first lead finger has a lower portion, a connecting portion extending vertically upward from the lower portion, and a substantially flat, top portion. The top portion forms a top terminal lead structure. A second lead finger is electrically connected to the first lead finger. A portion of the second lead finger forms a bottom terminal lead structure. A portion of the second lead finger corresponds to a bottom surface of the semiconductor package. A surface of the substantially flat, top portion corresponds to a top surface of the semiconductor package. | 07-02-2009 |
| 20090189260 | SEMICONDUCTOR DEVICE - In a non-leaded type semiconductor device, a tab, tab suspension leads, and other leads are exposed to one surface of a seal member. A semiconductor element is positioned within the seal member and fixed to a surface of the tab with an adhesive. The tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element. A groove is formed in the tab surface portion positioned between the area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove being formed so as to surround the semiconductor element fixing area, thereby preventing peeling-off between the tab to which the semiconductor element is fixed and the resin which constitutes the package. | 07-30-2009 |
| 20090212404 | LEADFRAME HAVING MOLD LOCK VENT - A leadframe for supporting a semiconductor chip, the leadframe including a die pad having a first major surface and an opposing second major surface defining a thickness and having at least one perimeter edge, and an opening spaced from the at least one perimeter edge and extending through the thickness of the die pad between the first and second major surfaces. A vent extends from the at least one perimeter edge to the opening so that the opening is in communication with the at least one perimeter edge. | 08-27-2009 |
| 20090218664 | STRUCTURE OF A LEAD-FRAME MATRIX OF PHOTOELECTRON DEVICES - A structure of a lead-frame matrix of photoelectron devices is provided. The lead-frame matrix is used to fabricate a first lead-frame array and a second lead-frame array. In the structure of the lead-frame matrix of the photoelectron devices, pins of the first lead-frame array and pins of the second lead-frame array are alternatively inserted. | 09-03-2009 |
| 20090243056 | CHIP PACKAGE HAVING ASYMMETRIC MOLDING - A chip package having asymmetric molding includes a lead frame, a chip, an adhesive layer, bonding wires and a molding compound. The lead frame includes a turbulent plate and a frame body having inner lead portions and outer lead portions. The turbulent plate is bended downwards to form a concave portion. The first end of the turbulent plate is connected to the frame body, and the second end is lower than the inner lead portions. The chip is fixed under the inner lead portions through the adhesive layer. The bonding wires are connected between the chip and the inner lead portions. The molding compound encapsulates the chip, the bonding wires, and the turbulent plate. The ratio between the thickness of the molding compound over and under the concave portion is larger than 1. The thickness of the molding compound under and over the outer lead portions is not equal. | 10-01-2009 |
| 20090302442 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit die packaging system includes: providing a lead frame having a die attach paddle, an isolated pad, and a connector; attaching an integrated circuit die to the die attach paddle and the connector; forming an encapsulation over the integrated circuit die, the connector, the die attach paddle, and the isolated pad; and singulating the connector and the die attach paddle whereby the isolated pads are electrically isolated. | 12-10-2009 |
| 20110049687 | ENCAPSULANT INTERPOSER SYSTEM WITH INTEGRATED PASSIVE DEVICES AND MANUFACTURING METHOD THEREFOR - A method of manufacturing a semiconductor package system includes: forming a leadframe having a passive device; encapsulating the passive device to form an encapsulant interposer; attaching a first die to the encapsulant interposer; forming a substrate interposer having a second die; and stacking the encapsulant interposer over the substrate interposer. | 03-03-2011 |
| 20110057298 | Partially Patterned Lead Frames and Methods of Making and Using the Same in Semiconductor Packaging - A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging lead-count, wherein the method lends itself to better automation of the manufacturing line and improved quality and reliability of the packages produced therefrom. A major portion of the manufacturing process steps is performed with a partially patterned strip of metal formed into a web-like lead frame on one side so that the web-like lead frame is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is hermetically sealed with an encapsulant. The resultant package being electrically isolated enables strip testing and reliable singulation. | 03-10-2011 |
| 20110198739 | Method for Manufacturing Semiconductor Device - A semiconductor device manufacturing method prevents the occurrence of a short-circuit between leads caused by peeling-off of residual resin formed on lead side faces or lead lower portions. A laser beam is radiated a plurality of times from a main surface side of leads and also a plurality of times from a back surface side of the leads to intra-dam resin formed in a dam portion, the dam portion being enclosed with adjacent leads, a dam bar and a sealing body, thereby removing all the intra-dam resin formed on lead side faces and lead lower portions. The laser beam radiation of the intra-dam resin may leave behind a sealing body-side resin portion and a projecting resin portion which projects outwardly from the sealing body. | 08-18-2011 |
| 20110284999 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a lead frame having a die attach paddle, an isolated pad, and a connector; attaching an integrated circuit die to the die attach paddle and the connector; forming an encapsulation over the integrated circuit die, the connector, the die attach paddle, and the isolated pad; and singulating the connector and the die attach paddle whereby the isolated pads are electrically isolated. | 11-24-2011 |
| 20120228753 | INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE SYSTEM WITH UNDERFILLING STRUCTURES AND METHOD OF MANUFACTURE THEREOF - A method of manufacturing of an integrated circuit packaging system includes: providing a bottom package in a cavity in a central region of the bottom package having inter-package interconnects in the cavity; forming a vent on an inter-package connection side of the bottom package from an exterior of the bottom package to the cavity; mounting a top package on the inter-package interconnects; and applying an underfill through the vent and into the cavity. | 09-13-2012 |
| 20120235286 | INSERTS FOR DIRECTING MOLDING COMPOUND FLOW AND SEMICONDUCTOR DIE ASSEMBLIES - Flow diverting structures for preferentially impeding, redirecting or both impeding and redirecting the flow of flowable encapsulant material, such as molding compound, proximate a selected surface or surfaces of a semiconductor die or dice during encapsulation are disclosed. Flow diverting structures may be included in or associated with one or more portions of a lead frame, such as a paddle, tie bars, or lead fingers. Flow diverting structures may also be inserted into a mold in association with semiconductor dice carried on non-lead frame substrates, such as interposers and circuit boards, to preferentially impede, redirect or both impede and redirect the flow of molding compound flowing between and over the semiconductor dice. | 09-20-2012 |
| 20120248589 | LEAD FRAME WITH COINED INNER LEADS - A lead frame used in semiconductor packaging has an outer dam bar and inner leads that extend away from the dam bar. The inner leads have distal ends and tips at the distal ends. Each inner lead has a coined area on a first major surface at the distal end and spaced from the tip. The coined area and the spacing of the coined area from the tip form a shoulder structure. The coined area is configured to receive one end of a bond wire that interconnects the inner lead with a wire bond pad of a semiconductor die. The shoulder structure creates a molding compound locking mechanism to reduce shear stress and delamination in the lead bonding area. | 10-04-2012 |
| 20130161800 | PCB FOR MUF AND MOLDING STRUCTURE OF THE PCB - A printed circuit board (PCB) for molded underfill (MUF) and a PCB molding structure that may expand a range of applying the PCB and may resolve a problem of generation of a void during manufacturing of a semiconductor package. The PCB includes: a molding area on which a plurality of semiconductor chips are mounted and that is sealed; and a peripheral area that is formed around the molding area, contacts a mold for molding during a molding process, and includes a first side adjacent to a portion into which a molding material is injected and a second side that faces the first side that is adjacent to a portion from which air may be discharged, wherein an active area where the semiconductor chips are disposed in the molding area is disposed nearer the first side than to the second side. | 06-27-2013 |
| 20130168838 | INSERTS FOR DIRECTING MOLDING COMPOUND FLOW AND SEMICONDUCTOR DIE ASSEMBLIES - Flow diverting structures for preferentially impeding, redirecting or both impeding and redirecting the flow of flowable encapsulant material, such as molding compound, proximate a selected surface or surfaces of a semiconductor die or dice during encapsulation are disclosed. Flow diverting structures may be included in or associated with one or more portions of a lead frame, such as a paddle, tie bars, or lead fingers. Flow diverting structures may also be inserted into a mold in association with semiconductor dice carried on non-lead frame substrates, such as interposers and circuit boards, to preferentially impede, redirect or both impede and redirect the flow of molding compound flowing between and over the semiconductor dice. | 07-04-2013 |
| 20130256851 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING MOLD HAVING RESIN DAM AND SEMICONDUCTOR DEVICE - The suppression of resin leakage is combined with the suppression of damage to the functional wiring area of a wiring board in forming an encapsulation resin. A method for manufacturing a semiconductor device includes the step of clamping a wiring board with a first mold and a second mold. The second mold includes: a flat portion contacting a wiring board; a recessed portion forming a cavity to form an encapsulation resin; and a projecting portion formed at a location spaced apart from the recessed portion on the flat portion, the projecting portion projecting on the first mold side, and extending along the first edge of the wiring board. | 10-03-2013 |
| 20140021593 | LOWER SEMICONDUCTOR MOLDING DIE, SEMICONDUCTOR PACKAGE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE - A semiconductor package may include a circuit board chip having a through-hole, a semiconductor device mounted on the circuit board chip, and an encapsulant. The encapsulant encapsulates the semiconductor device, fills the through-hole and has an external pattern that is the complement of a mold within which the encapsulant was formed. The external pattern on one side of the package reflects a mold shape that retards the flow of encapsulant material relative to the flow of encapsulant material on the opposite side of the package. | 01-23-2014 |
| 20140091443 | SURFACE MOUNT PACKAGE FOR A SEMICONDUCTOR INTEGRATED DEVICE, RELATED ASSEMBLY AND MANUFACTURING PROCESS - A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package. | 04-03-2014 |
| 20140252575 | LEAD FRAME FOR SEMICONDUCTOR PACKAGE - A lead frame having a die support area for supporting a semiconductor die, a plurality of leads surrounding the die support area, and a dam bar connecting adjacent leads. The dam bar has a dummy tab between adjacent ones of the leads that transversely extends towards the die support area. The presence of the dummy tab reduces the volume of mold compound between the lead frame leads and thus, when the lead frame is cut via punching, only the lead frame is cut and not the molding material. This reduces mechanical stress during singulation significantly and as a result, the occurrence of package cracking is reduced. In addition, less mold compound at the dam bar inter-lead reduces debris during cutting, which in turn reduces debris from contaminating the package. | 09-11-2014 |
| 20140264793 | LEAD FRAME FOR SEMICONDUCTOR PACKAGE WITH ENHANCED STRESS RELIEF - A semiconductor package includes a lead frame, a semiconductor die, bond wires providing an electrical connection between the die and the lead frame, and a mold compound that encapsulates the lead frame, the die and the bond wires. The lead frame includes spaced apart first and second frame members each having an inner peripheral edge and an opposing outer peripheral edge, spaced apart lead pads disposed between the inner peripheral edges of the first and second frame members, and conductive leads disposed proximate to the outer peripheral edge of each of the first and second frame members. The die is mounted on the lead pads. | 09-18-2014 |
| 20140312478 | CHIP PACKAGE AND MANUFACTURING METHOD THEREOF - A chip package is provided. The chip package comprises a semiconductor chip, an isolation layer, a redistributing metal layer, and a bonding pad. The semiconductor chip has a first conducting pad disposed on a lower surface, and a first hole corresponding to the first conducting pad. The first hole and the isolation layer extend from an upper surface to the lower surface to expose the first conducting pad. The redistributing metal layer is disposed on the isolation layer and has a redistributing metal line corresponding to the first conducting pad, the redistributing metal line is connected to the first conducting pad through the opening. The bonding pad is disposed on the isolation layer and one side of the semiconductor chip, wherein the redistributing metal line extends to the bonding pad to electrically connect the first conducting pad to the bonding pad. A method thereof is also provided. | 10-23-2014 |
| 20150021750 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present invention has a tray corresponding to a heat sink, a circuit part is accommodated in an accommodating part of the tray, and the circuit part is potting-sealed with a sealing resin such that external electrodes are exposed. The sealing resin covers and seals a top part of the tray. | 01-22-2015 |
| 20150115421 | METHOD AN APPARATUS FOR STOPPING RESIN BLEED AND MOLD FLASH ON INTEGRATED CIRCIT LEAD FINISHES - A method and apparatus of minimizing resin bleed and mold flash on integrated lead finishes by providing groves on the external leads that can control the length of resin bleed. | 04-30-2015 |
| 20150340300 | SEMICONDUCTOR DEVICE, MANUFACTURING APPARATUS FOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MODULE - A semiconductor device includes: a semiconductor element; a frame which has a first surface, holds the semiconductor element on the first surface, and is electrically connected with the semiconductor element; and a seal which has electrical insulation properties and seals the semiconductor element and the frame, wherein a through-hole is formed in the seal, the through-hole has a hole axis which extends in a direction intersecting with the first surface, and an inner peripheral end surface of the seal exposed inside the through-hole is inclined with respect to the hole axis. | 11-26-2015 |
| 20170236782 | SEMICONDUCTOR MODULE MANUFACTURING METHOD AND SEMICONDUCTOR MODULE | 08-17-2017 |
